[deliverable/linux.git] / drivers / gpu / drm / sti / sti_cursor.c

/*
 * Copyright (C) STMicroelectronics SA 2014
 * Authors: Vincent Abriou <vincent.abriou@st.com>
 *          Fabien Dessenne <fabien.dessenne@st.com>
 *          for STMicroelectronics.
 * License terms:  GNU General Public License (GPL), version 2
 */

#include <drm/drm_atomic.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_gem_cma_helper.h>

#include "sti_compositor.h"
#include "sti_cursor.h"
#include "sti_plane.h"
#include "sti_vtg.h"

/* Registers */
#define CUR_CTL             0x00
#define CUR_VPO             0x0C
#define CUR_PML             0x14
#define CUR_PMP             0x18
#define CUR_SIZE            0x1C
#define CUR_CML             0x20
#define CUR_AWS             0x28
#define CUR_AWE             0x2C

#define CUR_CTL_CLUT_UPDATE BIT(1)

#define STI_CURS_MIN_SIZE   1
#define STI_CURS_MAX_SIZE   128

/*
 * pixmap dma buffer stucture
 *
 * @paddr:  physical address
 * @size:   buffer size
 * @base:   virtual address
 */
struct dma_pixmap {
	dma_addr_t paddr;
	size_t size;
	void *base;
};

/**
 * STI Cursor structure
 *
 * @sti_plane:    sti_plane structure
 * @dev:          driver device
 * @regs:         cursor registers
 * @width:        cursor width
 * @height:       cursor height
 * @clut:         color look up table
 * @clut_paddr:   color look up table physical address
 * @pixmap:       pixmap dma buffer (clut8-format cursor)
 */
struct sti_cursor {
	struct sti_plane plane;
	struct device *dev;
	void __iomem *regs;
	unsigned int width;
	unsigned int height;
	unsigned short *clut;
	dma_addr_t clut_paddr;
	struct dma_pixmap pixmap;
};

static const uint32_t cursor_supported_formats[] = {
	DRM_FORMAT_ARGB8888,
};

#define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)

static void sti_cursor_argb8888_to_clut8(struct sti_cursor *cursor, u32 *src)
{
	u8  *dst = cursor->pixmap.base;
	unsigned int i, j;
	u32 a, r, g, b;

	for (i = 0; i < cursor->height; i++) {
		for (j = 0; j < cursor->width; j++) {
			/* Pick the 2 higher bits of each component */
			a = (*src >> 30) & 3;
			r = (*src >> 22) & 3;
			g = (*src >> 14) & 3;
			b = (*src >> 6) & 3;
			*dst = a << 6 | r << 4 | g << 2 | b;
			src++;
			dst++;
		}
	}
}

static void sti_cursor_init(struct sti_cursor *cursor)
{
	unsigned short *base = cursor->clut;
	unsigned int a, r, g, b;

	/* Assign CLUT values, ARGB444 format */
	for (a = 0; a < 4; a++)
		for (r = 0; r < 4; r++)
			for (g = 0; g < 4; g++)
				for (b = 0; b < 4; b++)
					*base++ = (a * 5) << 12 |
						  (r * 5) << 8 |
						  (g * 5) << 4 |
						  (b * 5);
}

static int sti_cursor_atomic_check(struct drm_plane *drm_plane,
				   struct drm_plane_state *state)
{
	struct sti_plane *plane = to_sti_plane(drm_plane);
	struct sti_cursor *cursor = to_sti_cursor(plane);
	struct drm_crtc *crtc = state->crtc;
	struct drm_framebuffer *fb = state->fb;
	struct drm_crtc_state *crtc_state;
	struct drm_display_mode *mode;
	int dst_x, dst_y, dst_w, dst_h;
	int src_w, src_h;

	/* no need for further checks if the plane is being disabled */
	if (!crtc || !fb)
		return 0;

	crtc_state = drm_atomic_get_crtc_state(state->state, crtc);
	mode = &crtc_state->mode;
	dst_x = state->crtc_x;
	dst_y = state->crtc_y;
	dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x);
	dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y);
	/* src_x are in 16.16 format */
	src_w = state->src_w >> 16;
	src_h = state->src_h >> 16;

	if (src_w < STI_CURS_MIN_SIZE ||
	    src_h < STI_CURS_MIN_SIZE ||
	    src_w > STI_CURS_MAX_SIZE ||
	    src_h > STI_CURS_MAX_SIZE) {
		DRM_ERROR("Invalid cursor size (%dx%d)\n",
				src_w, src_h);
		return -EINVAL;
	}

	/* If the cursor size has changed, re-allocated the pixmap */
	if (!cursor->pixmap.base ||
	    (cursor->width != src_w) ||
	    (cursor->height != src_h)) {
		cursor->width = src_w;
		cursor->height = src_h;

		if (cursor->pixmap.base)
			dma_free_writecombine(cursor->dev,
					      cursor->pixmap.size,
					      cursor->pixmap.base,
					      cursor->pixmap.paddr);

		cursor->pixmap.size = cursor->width * cursor->height;

		cursor->pixmap.base = dma_alloc_writecombine(cursor->dev,
							cursor->pixmap.size,
							&cursor->pixmap.paddr,
							GFP_KERNEL | GFP_DMA);
		if (!cursor->pixmap.base) {
			DRM_ERROR("Failed to allocate memory for pixmap\n");
			return -EINVAL;
		}
	}

	if (!drm_fb_cma_get_gem_obj(fb, 0)) {
		DRM_ERROR("Can't get CMA GEM object for fb\n");
		return -EINVAL;
	}

	DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
		      crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)),
		      drm_plane->base.id, sti_plane_to_str(plane));
	DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);

	return 0;
}

static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
				     struct drm_plane_state *oldstate)
{
	struct drm_plane_state *state = drm_plane->state;
	struct sti_plane *plane = to_sti_plane(drm_plane);
	struct sti_cursor *cursor = to_sti_cursor(plane);
	struct drm_crtc *crtc = state->crtc;
	struct drm_framebuffer *fb = state->fb;
	struct drm_display_mode *mode;
	int dst_x, dst_y;
	struct drm_gem_cma_object *cma_obj;
	u32 y, x;
	u32 val;

	if (!crtc || !fb)
		return;

	mode = &crtc->mode;
	dst_x = state->crtc_x;
	dst_y = state->crtc_y;

	cma_obj = drm_fb_cma_get_gem_obj(fb, 0);

	/* Convert ARGB8888 to CLUT8 */
	sti_cursor_argb8888_to_clut8(cursor, (u32 *)cma_obj->vaddr);

	/* AWS and AWE depend on the mode */
	y = sti_vtg_get_line_number(*mode, 0);
	x = sti_vtg_get_pixel_number(*mode, 0);
	val = y << 16 | x;
	writel(val, cursor->regs + CUR_AWS);
	y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
	x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
	val = y << 16 | x;
	writel(val, cursor->regs + CUR_AWE);

	/* Set memory location, size, and position */
	writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
	writel(cursor->width, cursor->regs + CUR_PMP);
	writel(cursor->height << 16 | cursor->width, cursor->regs + CUR_SIZE);

	y = sti_vtg_get_line_number(*mode, dst_y);
	x = sti_vtg_get_pixel_number(*mode, dst_x);
	writel((y << 16) | x, cursor->regs + CUR_VPO);

	/* Set and fetch CLUT */
	writel(cursor->clut_paddr, cursor->regs + CUR_CML);
	writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);

	plane->status = STI_PLANE_UPDATED;
}

static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
				      struct drm_plane_state *oldstate)
{
	struct sti_plane *plane = to_sti_plane(drm_plane);

	if (!drm_plane->crtc) {
		DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
				 drm_plane->base.id);
		return;
	}

	DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
			 drm_plane->crtc->base.id,
			 sti_mixer_to_str(to_sti_mixer(drm_plane->crtc)),
			 drm_plane->base.id, sti_plane_to_str(plane));

	plane->status = STI_PLANE_DISABLING;
}

static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
	.atomic_check = sti_cursor_atomic_check,
	.atomic_update = sti_cursor_atomic_update,
	.atomic_disable = sti_cursor_atomic_disable,
};

struct drm_plane *sti_cursor_create(struct drm_device *drm_dev,
				    struct device *dev, int desc,
				    void __iomem *baseaddr,
				    unsigned int possible_crtcs)
{
	struct sti_cursor *cursor;
	size_t size;
	int res;

	cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
	if (!cursor) {
		DRM_ERROR("Failed to allocate memory for cursor\n");
		return NULL;
	}

	/* Allocate clut buffer */
	size = 0x100 * sizeof(unsigned short);
	cursor->clut = dma_alloc_writecombine(dev, size, &cursor->clut_paddr,
					      GFP_KERNEL | GFP_DMA);

	if (!cursor->clut) {
		DRM_ERROR("Failed to allocate memory for cursor clut\n");
		goto err_clut;
	}

	cursor->dev = dev;
	cursor->regs = baseaddr;
	cursor->plane.desc = desc;
	cursor->plane.status = STI_PLANE_DISABLED;

	sti_cursor_init(cursor);

	res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
				       possible_crtcs,
				       &sti_plane_helpers_funcs,
				       cursor_supported_formats,
				       ARRAY_SIZE(cursor_supported_formats),
				       DRM_PLANE_TYPE_CURSOR, NULL);
	if (res) {
		DRM_ERROR("Failed to initialize universal plane\n");
		goto err_plane;
	}

	drm_plane_helper_add(&cursor->plane.drm_plane,
			     &sti_cursor_helpers_funcs);

	sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);

	return &cursor->plane.drm_plane;

err_plane:
	dma_free_writecombine(dev, size, cursor->clut, cursor->clut_paddr);
err_clut:
	devm_kfree(dev, cursor);
	return NULL;
}
Commit	Line	Data
96006a77 BG	1	/*
	2	* Copyright (C) STMicroelectronics SA 2014
	3	* Authors: Vincent Abriou <vincent.abriou@st.com>
	4	* Fabien Dessenne <fabien.dessenne@st.com>
	5	* for STMicroelectronics.
	6	* License terms: GNU General Public License (GPL), version 2
	7	*/
96006a77	8
dd86dc2f	9	#include <drm/drm_atomic.h>
29d1dc62 VA	10	#include <drm/drm_fb_cma_helper.h>
29d1dc62 VA	11	#include <drm/drm_gem_cma_helper.h>
29d1dc62 VA	12
29d1dc62 VA	13	#include "sti_compositor.h"
96006a77	14	#include "sti_cursor.h"
9e1f05b2	15	#include "sti_plane.h"
96006a77 BG	16	#include "sti_vtg.h"
	17
	18	/* Registers */
	19	#define CUR_CTL 0x00
	20	#define CUR_VPO 0x0C
	21	#define CUR_PML 0x14
	22	#define CUR_PMP 0x18
	23	#define CUR_SIZE 0x1C
	24	#define CUR_CML 0x20
	25	#define CUR_AWS 0x28
	26	#define CUR_AWE 0x2C
	27
	28	#define CUR_CTL_CLUT_UPDATE BIT(1)
	29
	30	#define STI_CURS_MIN_SIZE 1
	31	#define STI_CURS_MAX_SIZE 128
	32
	33	/*
	34	* pixmap dma buffer stucture
	35	*
	36	* @paddr: physical address
	37	* @size: buffer size
	38	* @base: virtual address
	39	*/
	40	struct dma_pixmap {
	41	dma_addr_t paddr;
	42	size_t size;
	43	void *base;
	44	};
	45
	46	/**
	47	* STI Cursor structure
	48	*
29d1dc62 VA	49	* @sti_plane: sti_plane structure
	50	* @dev: driver device
	51	* @regs: cursor registers
	52	* @width: cursor width
	53	* @height: cursor height
	54	* @clut: color look up table
	55	* @clut_paddr: color look up table physical address
	56	* @pixmap: pixmap dma buffer (clut8-format cursor)
96006a77 BG	57	*/
96006a77 BG	58	struct sti_cursor {
871bcdfe VA	59	struct sti_plane plane;
	60	struct device *dev;
	61	void __iomem *regs;
96006a77 BG	62	unsigned int width;
	63	unsigned int height;
	64	unsigned short *clut;
	65	dma_addr_t clut_paddr;
	66	struct dma_pixmap pixmap;
	67	};
	68
	69	static const uint32_t cursor_supported_formats[] = {
	70	DRM_FORMAT_ARGB8888,
	71	};
	72
871bcdfe	73	#define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)
96006a77	74
29d1dc62	75	static void sti_cursor_argb8888_to_clut8(struct sti_cursor cursor, u32 src)
96006a77	76	{
96006a77 BG	77	u8 *dst = cursor->pixmap.base;
	78	unsigned int i, j;
	79	u32 a, r, g, b;
	80
	81	for (i = 0; i < cursor->height; i++) {
	82	for (j = 0; j < cursor->width; j++) {
	83	/* Pick the 2 higher bits of each component */
	84	a = (*src >> 30) & 3;
	85	r = (*src >> 22) & 3;
	86	g = (*src >> 14) & 3;
	87	b = (*src >> 6) & 3;
	88	*dst = a << 6 \| r << 4 \| g << 2 \| b;
	89	src++;
	90	dst++;
	91	}
	92	}
	93	}
	94
29d1dc62 VA	95	static void sti_cursor_init(struct sti_cursor *cursor)
	96	{
	97	unsigned short *base = cursor->clut;
	98	unsigned int a, r, g, b;
	99
	100	/* Assign CLUT values, ARGB444 format */
	101	for (a = 0; a < 4; a++)
	102	for (r = 0; r < 4; r++)
	103	for (g = 0; g < 4; g++)
	104	for (b = 0; b < 4; b++)
	105	base++ = (a 5) << 12 \|
	106	(r * 5) << 8 \|
	107	(g * 5) << 4 \|
	108	(b * 5);
	109	}
	110
dd86dc2f VA	111	static int sti_cursor_atomic_check(struct drm_plane *drm_plane,
dd86dc2f VA	112	struct drm_plane_state *state)
96006a77	113	{
29d1dc62	114	struct sti_plane *plane = to_sti_plane(drm_plane);
871bcdfe	115	struct sti_cursor *cursor = to_sti_cursor(plane);
29d1dc62	116	struct drm_crtc *crtc = state->crtc;
29d1dc62	117	struct drm_framebuffer *fb = state->fb;
dd86dc2f VA	118	struct drm_crtc_state *crtc_state;
	119	struct drm_display_mode *mode;
	120	int dst_x, dst_y, dst_w, dst_h;
	121	int src_w, src_h;
	122
	123	/* no need for further checks if the plane is being disabled */
	124	if (!crtc \|\| !fb)
	125	return 0;
	126
	127	crtc_state = drm_atomic_get_crtc_state(state->state, crtc);
	128	mode = &crtc_state->mode;
	129	dst_x = state->crtc_x;
	130	dst_y = state->crtc_y;
	131	dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x);
	132	dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y);
29d1dc62	133	/* src_x are in 16.16 format */
dd86dc2f VA	134	src_w = state->src_w >> 16;
dd86dc2f VA	135	src_h = state->src_h >> 16;
96006a77	136
29d1dc62 VA	137	if (src_w < STI_CURS_MIN_SIZE \|\|
	138	src_h < STI_CURS_MIN_SIZE \|\|
	139	src_w > STI_CURS_MAX_SIZE \|\|
	140	src_h > STI_CURS_MAX_SIZE) {
96006a77	141	DRM_ERROR("Invalid cursor size (%dx%d)\n",
29d1dc62	142	src_w, src_h);
dd86dc2f	143	return -EINVAL;
96006a77 BG	144	}
	145
	146	/* If the cursor size has changed, re-allocated the pixmap */
	147	if (!cursor->pixmap.base \|\|
29d1dc62 VA	148	(cursor->width != src_w) \|\|
	149	(cursor->height != src_h)) {
	150	cursor->width = src_w;
	151	cursor->height = src_h;
96006a77 BG	152
96006a77 BG	153	if (cursor->pixmap.base)
871bcdfe	154	dma_free_writecombine(cursor->dev,
96006a77 BG	155	cursor->pixmap.size,
	156	cursor->pixmap.base,
	157	cursor->pixmap.paddr);
	158
	159	cursor->pixmap.size = cursor->width * cursor->height;
	160
871bcdfe	161	cursor->pixmap.base = dma_alloc_writecombine(cursor->dev,
96006a77 BG	162	cursor->pixmap.size,
	163	&cursor->pixmap.paddr,
	164	GFP_KERNEL \| GFP_DMA);
	165	if (!cursor->pixmap.base) {
	166	DRM_ERROR("Failed to allocate memory for pixmap\n");
dd86dc2f	167	return -EINVAL;
96006a77 BG	168	}
	169	}
	170
dd86dc2f	171	if (!drm_fb_cma_get_gem_obj(fb, 0)) {
29d1dc62	172	DRM_ERROR("Can't get CMA GEM object for fb\n");
dd86dc2f	173	return -EINVAL;
29d1dc62 VA	174	}
29d1dc62 VA	175
dd86dc2f VA	176	DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
	177	crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)),
	178	drm_plane->base.id, sti_plane_to_str(plane));
	179	DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);
	180
	181	return 0;
	182	}
	183
	184	static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
	185	struct drm_plane_state *oldstate)
	186	{
	187	struct drm_plane_state *state = drm_plane->state;
	188	struct sti_plane *plane = to_sti_plane(drm_plane);
	189	struct sti_cursor *cursor = to_sti_cursor(plane);
	190	struct drm_crtc *crtc = state->crtc;
	191	struct drm_framebuffer *fb = state->fb;
	192	struct drm_display_mode *mode;
	193	int dst_x, dst_y;
	194	struct drm_gem_cma_object *cma_obj;
	195	u32 y, x;
	196	u32 val;
	197
	198	if (!crtc \|\| !fb)
	199	return;
	200
	201	mode = &crtc->mode;
	202	dst_x = state->crtc_x;
	203	dst_y = state->crtc_y;
	204
	205	cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
	206
96006a77	207	/* Convert ARGB8888 to CLUT8 */
29d1dc62	208	sti_cursor_argb8888_to_clut8(cursor, (u32 *)cma_obj->vaddr);
96006a77 BG	209
	210	/* AWS and AWE depend on the mode */
	211	y = sti_vtg_get_line_number(*mode, 0);
	212	x = sti_vtg_get_pixel_number(*mode, 0);
	213	val = y << 16 \| x;
871bcdfe	214	writel(val, cursor->regs + CUR_AWS);
96006a77 BG	215	y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
	216	x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
	217	val = y << 16 \| x;
871bcdfe	218	writel(val, cursor->regs + CUR_AWE);
96006a77	219
96006a77	220	/* Set memory location, size, and position */
871bcdfe VA	221	writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
	222	writel(cursor->width, cursor->regs + CUR_PMP);
	223	writel(cursor->height << 16 \| cursor->width, cursor->regs + CUR_SIZE);
96006a77	224
29d1dc62	225	y = sti_vtg_get_line_number(*mode, dst_y);
b83a8b53	226	x = sti_vtg_get_pixel_number(*mode, dst_x);
29d1dc62	227	writel((y << 16) \| x, cursor->regs + CUR_VPO);
96006a77	228
0b9d0416 FD	229	/* Set and fetch CLUT */
	230	writel(cursor->clut_paddr, cursor->regs + CUR_CML);
	231	writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);
	232
29d1dc62	233	plane->status = STI_PLANE_UPDATED;
96006a77 BG	234	}
96006a77 BG	235
29d1dc62 VA	236	static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
29d1dc62 VA	237	struct drm_plane_state *oldstate)
96006a77	238	{
29d1dc62	239	struct sti_plane *plane = to_sti_plane(drm_plane);
96006a77	240
29d1dc62 VA	241	if (!drm_plane->crtc) {
	242	DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
	243	drm_plane->base.id);
	244	return;
	245	}
96006a77	246
29d1dc62	247	DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
dd86dc2f VA	248	drm_plane->crtc->base.id,
dd86dc2f VA	249	sti_mixer_to_str(to_sti_mixer(drm_plane->crtc)),
29d1dc62 VA	250	drm_plane->base.id, sti_plane_to_str(plane));
	251
	252	plane->status = STI_PLANE_DISABLING;
96006a77 BG	253	}
96006a77 BG	254
29d1dc62	255	static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
dd86dc2f	256	.atomic_check = sti_cursor_atomic_check,
29d1dc62 VA	257	.atomic_update = sti_cursor_atomic_update,
29d1dc62 VA	258	.atomic_disable = sti_cursor_atomic_disable,
96006a77 BG	259	};
96006a77 BG	260
29d1dc62 VA	261	struct drm_plane sti_cursor_create(struct drm_device drm_dev,
	262	struct device *dev, int desc,
	263	void __iomem *baseaddr,
	264	unsigned int possible_crtcs)
96006a77 BG	265	{
96006a77 BG	266	struct sti_cursor *cursor;
29d1dc62 VA	267	size_t size;
29d1dc62 VA	268	int res;
96006a77 BG	269
	270	cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
	271	if (!cursor) {
	272	DRM_ERROR("Failed to allocate memory for cursor\n");
	273	return NULL;
	274	}
	275
	276	/* Allocate clut buffer */
29d1dc62 VA	277	size = 0x100 * sizeof(unsigned short);
	278	cursor->clut = dma_alloc_writecombine(dev, size, &cursor->clut_paddr,
	279	GFP_KERNEL \| GFP_DMA);
96006a77 BG	280
	281	if (!cursor->clut) {
	282	DRM_ERROR("Failed to allocate memory for cursor clut\n");
29d1dc62	283	goto err_clut;
96006a77 BG	284	}
96006a77 BG	285
871bcdfe VA	286	cursor->dev = dev;
	287	cursor->regs = baseaddr;
	288	cursor->plane.desc = desc;
29d1dc62	289	cursor->plane.status = STI_PLANE_DISABLED;
96006a77	290
871bcdfe VA	291	sti_cursor_init(cursor);
871bcdfe VA	292
29d1dc62 VA	293	res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
	294	possible_crtcs,
	295	&sti_plane_helpers_funcs,
	296	cursor_supported_formats,
	297	ARRAY_SIZE(cursor_supported_formats),
b0b3b795	298	DRM_PLANE_TYPE_CURSOR, NULL);
29d1dc62 VA	299	if (res) {
	300	DRM_ERROR("Failed to initialize universal plane\n");
	301	goto err_plane;
	302	}
	303
	304	drm_plane_helper_add(&cursor->plane.drm_plane,
	305	&sti_cursor_helpers_funcs);
	306
	307	sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);
	308
	309	return &cursor->plane.drm_plane;
	310
	311	err_plane:
	312	dma_free_writecombine(dev, size, cursor->clut, cursor->clut_paddr);
	313	err_clut:
	314	devm_kfree(dev, cursor);
	315	return NULL;
96006a77	316	}