[deliverable/linux.git] / drivers / gpu / drm / sti / sti_cursor.c

/*
 * Copyright (C) STMicroelectronics SA 2014
 * Authors: Vincent Abriou <vincent.abriou@st.com>
 *          Fabien Dessenne <fabien.dessenne@st.com>
 *          for STMicroelectronics.
 * License terms:  GNU General Public License (GPL), version 2
 */
#include <drm/drmP.h>

#include <drm/drm_atomic_helper.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_gem_cma_helper.h>
#include <drm/drm_plane_helper.h>

#include "sti_compositor.h"
#include "sti_cursor.h"
#include "sti_plane.h"
#include "sti_vtg.h"

/* Registers */
#define CUR_CTL             0x00
#define CUR_VPO             0x0C
#define CUR_PML             0x14
#define CUR_PMP             0x18
#define CUR_SIZE            0x1C
#define CUR_CML             0x20
#define CUR_AWS             0x28
#define CUR_AWE             0x2C

#define CUR_CTL_CLUT_UPDATE BIT(1)

#define STI_CURS_MIN_SIZE   1
#define STI_CURS_MAX_SIZE   128

/*
 * pixmap dma buffer stucture
 *
 * @paddr:  physical address
 * @size:   buffer size
 * @base:   virtual address
 */
struct dma_pixmap {
	dma_addr_t paddr;
	size_t size;
	void *base;
};

/**
 * STI Cursor structure
 *
 * @sti_plane:    sti_plane structure
 * @dev:          driver device
 * @regs:         cursor registers
 * @width:        cursor width
 * @height:       cursor height
 * @clut:         color look up table
 * @clut_paddr:   color look up table physical address
 * @pixmap:       pixmap dma buffer (clut8-format cursor)
 */
struct sti_cursor {
	struct sti_plane plane;
	struct device *dev;
	void __iomem *regs;
	unsigned int width;
	unsigned int height;
	unsigned short *clut;
	dma_addr_t clut_paddr;
	struct dma_pixmap pixmap;
};

static const uint32_t cursor_supported_formats[] = {
	DRM_FORMAT_ARGB8888,
};

#define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)

static void sti_cursor_argb8888_to_clut8(struct sti_cursor *cursor, u32 *src)
{
	u8  *dst = cursor->pixmap.base;
	unsigned int i, j;
	u32 a, r, g, b;

	for (i = 0; i < cursor->height; i++) {
		for (j = 0; j < cursor->width; j++) {
			/* Pick the 2 higher bits of each component */
			a = (*src >> 30) & 3;
			r = (*src >> 22) & 3;
			g = (*src >> 14) & 3;
			b = (*src >> 6) & 3;
			*dst = a << 6 | r << 4 | g << 2 | b;
			src++;
			dst++;
		}
	}
}

static void sti_cursor_init(struct sti_cursor *cursor)
{
	unsigned short *base = cursor->clut;
	unsigned int a, r, g, b;

	/* Assign CLUT values, ARGB444 format */
	for (a = 0; a < 4; a++)
		for (r = 0; r < 4; r++)
			for (g = 0; g < 4; g++)
				for (b = 0; b < 4; b++)
					*base++ = (a * 5) << 12 |
						  (r * 5) << 8 |
						  (g * 5) << 4 |
						  (b * 5);
}

static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
				     struct drm_plane_state *oldstate)
{
	struct drm_plane_state *state = drm_plane->state;
	struct sti_plane *plane = to_sti_plane(drm_plane);
	struct sti_cursor *cursor = to_sti_cursor(plane);
	struct drm_crtc *crtc = state->crtc;
	struct sti_mixer *mixer = to_sti_mixer(crtc);
	struct drm_framebuffer *fb = state->fb;
	struct drm_display_mode *mode = &crtc->mode;
	int dst_x = state->crtc_x;
	int dst_y = state->crtc_y;
	int dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x);
	int dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y);
	/* src_x are in 16.16 format */
	int src_w = state->src_w >> 16;
	int src_h = state->src_h >> 16;
	bool first_prepare = plane->status == STI_PLANE_DISABLED ? true : false;
	struct drm_gem_cma_object *cma_obj;
	u32 y, x;
	u32 val;

	DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
		      crtc->base.id, sti_mixer_to_str(mixer),
		      drm_plane->base.id, sti_plane_to_str(plane));
	DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);

	dev_dbg(cursor->dev, "%s %s\n", __func__,
		sti_plane_to_str(plane));

	if (src_w < STI_CURS_MIN_SIZE ||
	    src_h < STI_CURS_MIN_SIZE ||
	    src_w > STI_CURS_MAX_SIZE ||
	    src_h > STI_CURS_MAX_SIZE) {
		DRM_ERROR("Invalid cursor size (%dx%d)\n",
				src_w, src_h);
		return;
	}

	/* If the cursor size has changed, re-allocated the pixmap */
	if (!cursor->pixmap.base ||
	    (cursor->width != src_w) ||
	    (cursor->height != src_h)) {
		cursor->width = src_w;
		cursor->height = src_h;

		if (cursor->pixmap.base)
			dma_free_writecombine(cursor->dev,
					      cursor->pixmap.size,
					      cursor->pixmap.base,
					      cursor->pixmap.paddr);

		cursor->pixmap.size = cursor->width * cursor->height;

		cursor->pixmap.base = dma_alloc_writecombine(cursor->dev,
							cursor->pixmap.size,
							&cursor->pixmap.paddr,
							GFP_KERNEL | GFP_DMA);
		if (!cursor->pixmap.base) {
			DRM_ERROR("Failed to allocate memory for pixmap\n");
			return;
		}
	}

	cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
	if (!cma_obj) {
		DRM_ERROR("Can't get CMA GEM object for fb\n");
		return;
	}

	/* Convert ARGB8888 to CLUT8 */
	sti_cursor_argb8888_to_clut8(cursor, (u32 *)cma_obj->vaddr);

	/* AWS and AWE depend on the mode */
	y = sti_vtg_get_line_number(*mode, 0);
	x = sti_vtg_get_pixel_number(*mode, 0);
	val = y << 16 | x;
	writel(val, cursor->regs + CUR_AWS);
	y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
	x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
	val = y << 16 | x;
	writel(val, cursor->regs + CUR_AWE);

	if (first_prepare) {
		/* Set and fetch CLUT */
		writel(cursor->clut_paddr, cursor->regs + CUR_CML);
		writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);
	}

	/* Set memory location, size, and position */
	writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
	writel(cursor->width, cursor->regs + CUR_PMP);
	writel(cursor->height << 16 | cursor->width, cursor->regs + CUR_SIZE);

	y = sti_vtg_get_line_number(*mode, dst_y);
	x = sti_vtg_get_pixel_number(*mode, dst_y);
	writel((y << 16) | x, cursor->regs + CUR_VPO);

	plane->status = STI_PLANE_UPDATED;
}

static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
				      struct drm_plane_state *oldstate)
{
	struct sti_plane *plane = to_sti_plane(drm_plane);
	struct sti_mixer *mixer = to_sti_mixer(drm_plane->crtc);

	if (!drm_plane->crtc) {
		DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
				 drm_plane->base.id);
		return;
	}

	DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
			 drm_plane->crtc->base.id, sti_mixer_to_str(mixer),
			 drm_plane->base.id, sti_plane_to_str(plane));

	plane->status = STI_PLANE_DISABLING;
}

static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
	.atomic_update = sti_cursor_atomic_update,
	.atomic_disable = sti_cursor_atomic_disable,
};

struct drm_plane *sti_cursor_create(struct drm_device *drm_dev,
				    struct device *dev, int desc,
				    void __iomem *baseaddr,
				    unsigned int possible_crtcs)
{
	struct sti_cursor *cursor;
	size_t size;
	int res;

	cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
	if (!cursor) {
		DRM_ERROR("Failed to allocate memory for cursor\n");
		return NULL;
	}

	/* Allocate clut buffer */
	size = 0x100 * sizeof(unsigned short);
	cursor->clut = dma_alloc_writecombine(dev, size, &cursor->clut_paddr,
					      GFP_KERNEL | GFP_DMA);

	if (!cursor->clut) {
		DRM_ERROR("Failed to allocate memory for cursor clut\n");
		goto err_clut;
	}

	cursor->dev = dev;
	cursor->regs = baseaddr;
	cursor->plane.desc = desc;
	cursor->plane.status = STI_PLANE_DISABLED;

	sti_cursor_init(cursor);

	res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
				       possible_crtcs,
				       &sti_plane_helpers_funcs,
				       cursor_supported_formats,
				       ARRAY_SIZE(cursor_supported_formats),
				       DRM_PLANE_TYPE_CURSOR);
	if (res) {
		DRM_ERROR("Failed to initialize universal plane\n");
		goto err_plane;
	}

	drm_plane_helper_add(&cursor->plane.drm_plane,
			     &sti_cursor_helpers_funcs);

	sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);

	return &cursor->plane.drm_plane;

err_plane:
	dma_free_writecombine(dev, size, cursor->clut, cursor->clut_paddr);
err_clut:
	devm_kfree(dev, cursor);
	return NULL;
}
Commit	Line	Data
96006a77 BG	1	/*
	2	* Copyright (C) STMicroelectronics SA 2014
	3	* Authors: Vincent Abriou <vincent.abriou@st.com>
	4	* Fabien Dessenne <fabien.dessenne@st.com>
	5	* for STMicroelectronics.
	6	* License terms: GNU General Public License (GPL), version 2
	7	*/
	8	#include <drm/drmP.h>
	9
29d1dc62 VA	10	#include <drm/drm_atomic_helper.h>
	11	#include <drm/drm_fb_cma_helper.h>
	12	#include <drm/drm_gem_cma_helper.h>
	13	#include <drm/drm_plane_helper.h>
	14
	15	#include "sti_compositor.h"
96006a77	16	#include "sti_cursor.h"
9e1f05b2	17	#include "sti_plane.h"
96006a77 BG	18	#include "sti_vtg.h"
	19
	20	/* Registers */
	21	#define CUR_CTL 0x00
	22	#define CUR_VPO 0x0C
	23	#define CUR_PML 0x14
	24	#define CUR_PMP 0x18
	25	#define CUR_SIZE 0x1C
	26	#define CUR_CML 0x20
	27	#define CUR_AWS 0x28
	28	#define CUR_AWE 0x2C
	29
	30	#define CUR_CTL_CLUT_UPDATE BIT(1)
	31
	32	#define STI_CURS_MIN_SIZE 1
	33	#define STI_CURS_MAX_SIZE 128
	34
	35	/*
	36	* pixmap dma buffer stucture
	37	*
	38	* @paddr: physical address
	39	* @size: buffer size
	40	* @base: virtual address
	41	*/
	42	struct dma_pixmap {
	43	dma_addr_t paddr;
	44	size_t size;
	45	void *base;
	46	};
	47
	48	/**
	49	* STI Cursor structure
	50	*
29d1dc62 VA	51	* @sti_plane: sti_plane structure
	52	* @dev: driver device
	53	* @regs: cursor registers
	54	* @width: cursor width
	55	* @height: cursor height
	56	* @clut: color look up table
	57	* @clut_paddr: color look up table physical address
	58	* @pixmap: pixmap dma buffer (clut8-format cursor)
96006a77 BG	59	*/
96006a77 BG	60	struct sti_cursor {
871bcdfe VA	61	struct sti_plane plane;
	62	struct device *dev;
	63	void __iomem *regs;
96006a77 BG	64	unsigned int width;
	65	unsigned int height;
	66	unsigned short *clut;
	67	dma_addr_t clut_paddr;
	68	struct dma_pixmap pixmap;
	69	};
	70
	71	static const uint32_t cursor_supported_formats[] = {
	72	DRM_FORMAT_ARGB8888,
	73	};
	74
871bcdfe	75	#define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)
96006a77	76
29d1dc62	77	static void sti_cursor_argb8888_to_clut8(struct sti_cursor cursor, u32 src)
96006a77	78	{
96006a77 BG	79	u8 *dst = cursor->pixmap.base;
	80	unsigned int i, j;
	81	u32 a, r, g, b;
	82
	83	for (i = 0; i < cursor->height; i++) {
	84	for (j = 0; j < cursor->width; j++) {
	85	/* Pick the 2 higher bits of each component */
	86	a = (*src >> 30) & 3;
	87	r = (*src >> 22) & 3;
	88	g = (*src >> 14) & 3;
	89	b = (*src >> 6) & 3;
	90	*dst = a << 6 \| r << 4 \| g << 2 \| b;
	91	src++;
	92	dst++;
	93	}
	94	}
	95	}
	96
29d1dc62 VA	97	static void sti_cursor_init(struct sti_cursor *cursor)
	98	{
	99	unsigned short *base = cursor->clut;
	100	unsigned int a, r, g, b;
	101
	102	/* Assign CLUT values, ARGB444 format */
	103	for (a = 0; a < 4; a++)
	104	for (r = 0; r < 4; r++)
	105	for (g = 0; g < 4; g++)
	106	for (b = 0; b < 4; b++)
	107	base++ = (a 5) << 12 \|
	108	(r * 5) << 8 \|
	109	(g * 5) << 4 \|
	110	(b * 5);
	111	}
	112
	113	static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
	114	struct drm_plane_state *oldstate)
96006a77	115	{
29d1dc62 VA	116	struct drm_plane_state *state = drm_plane->state;
29d1dc62 VA	117	struct sti_plane *plane = to_sti_plane(drm_plane);
871bcdfe	118	struct sti_cursor *cursor = to_sti_cursor(plane);
29d1dc62 VA	119	struct drm_crtc *crtc = state->crtc;
	120	struct sti_mixer *mixer = to_sti_mixer(crtc);
	121	struct drm_framebuffer *fb = state->fb;
	122	struct drm_display_mode *mode = &crtc->mode;
	123	int dst_x = state->crtc_x;
	124	int dst_y = state->crtc_y;
	125	int dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x);
	126	int dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y);
	127	/* src_x are in 16.16 format */
	128	int src_w = state->src_w >> 16;
	129	int src_h = state->src_h >> 16;
	130	bool first_prepare = plane->status == STI_PLANE_DISABLED ? true : false;
	131	struct drm_gem_cma_object *cma_obj;
96006a77 BG	132	u32 y, x;
	133	u32 val;
	134
29d1dc62 VA	135	DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
	136	crtc->base.id, sti_mixer_to_str(mixer),
	137	drm_plane->base.id, sti_plane_to_str(plane));
	138	DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);
96006a77	139
29d1dc62 VA	140	dev_dbg(cursor->dev, "%s %s\n", __func__,
29d1dc62 VA	141	sti_plane_to_str(plane));
96006a77	142
29d1dc62 VA	143	if (src_w < STI_CURS_MIN_SIZE \|\|
	144	src_h < STI_CURS_MIN_SIZE \|\|
	145	src_w > STI_CURS_MAX_SIZE \|\|
	146	src_h > STI_CURS_MAX_SIZE) {
96006a77	147	DRM_ERROR("Invalid cursor size (%dx%d)\n",
29d1dc62 VA	148	src_w, src_h);
29d1dc62 VA	149	return;
96006a77 BG	150	}
	151
	152	/* If the cursor size has changed, re-allocated the pixmap */
	153	if (!cursor->pixmap.base \|\|
29d1dc62 VA	154	(cursor->width != src_w) \|\|
	155	(cursor->height != src_h)) {
	156	cursor->width = src_w;
	157	cursor->height = src_h;
96006a77 BG	158
96006a77 BG	159	if (cursor->pixmap.base)
871bcdfe	160	dma_free_writecombine(cursor->dev,
96006a77 BG	161	cursor->pixmap.size,
	162	cursor->pixmap.base,
	163	cursor->pixmap.paddr);
	164
	165	cursor->pixmap.size = cursor->width * cursor->height;
	166
871bcdfe	167	cursor->pixmap.base = dma_alloc_writecombine(cursor->dev,
96006a77 BG	168	cursor->pixmap.size,
	169	&cursor->pixmap.paddr,
	170	GFP_KERNEL \| GFP_DMA);
	171	if (!cursor->pixmap.base) {
	172	DRM_ERROR("Failed to allocate memory for pixmap\n");
29d1dc62	173	return;
96006a77 BG	174	}
	175	}
	176
29d1dc62 VA	177	cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
	178	if (!cma_obj) {
	179	DRM_ERROR("Can't get CMA GEM object for fb\n");
	180	return;
	181	}
	182
96006a77	183	/* Convert ARGB8888 to CLUT8 */
29d1dc62	184	sti_cursor_argb8888_to_clut8(cursor, (u32 *)cma_obj->vaddr);
96006a77 BG	185
	186	/* AWS and AWE depend on the mode */
	187	y = sti_vtg_get_line_number(*mode, 0);
	188	x = sti_vtg_get_pixel_number(*mode, 0);
	189	val = y << 16 \| x;
871bcdfe	190	writel(val, cursor->regs + CUR_AWS);
96006a77 BG	191	y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
	192	x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
	193	val = y << 16 \| x;
871bcdfe	194	writel(val, cursor->regs + CUR_AWE);
96006a77 BG	195
	196	if (first_prepare) {
	197	/* Set and fetch CLUT */
871bcdfe VA	198	writel(cursor->clut_paddr, cursor->regs + CUR_CML);
871bcdfe VA	199	writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);
96006a77 BG	200	}
96006a77 BG	201
96006a77	202	/* Set memory location, size, and position */
871bcdfe VA	203	writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
	204	writel(cursor->width, cursor->regs + CUR_PMP);
	205	writel(cursor->height << 16 \| cursor->width, cursor->regs + CUR_SIZE);
96006a77	206
29d1dc62 VA	207	y = sti_vtg_get_line_number(*mode, dst_y);
	208	x = sti_vtg_get_pixel_number(*mode, dst_y);
	209	writel((y << 16) \| x, cursor->regs + CUR_VPO);
96006a77	210
29d1dc62	211	plane->status = STI_PLANE_UPDATED;
96006a77 BG	212	}
96006a77 BG	213
29d1dc62 VA	214	static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
29d1dc62 VA	215	struct drm_plane_state *oldstate)
96006a77	216	{
29d1dc62 VA	217	struct sti_plane *plane = to_sti_plane(drm_plane);
29d1dc62 VA	218	struct sti_mixer *mixer = to_sti_mixer(drm_plane->crtc);
96006a77	219
29d1dc62 VA	220	if (!drm_plane->crtc) {
	221	DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
	222	drm_plane->base.id);
	223	return;
	224	}
96006a77	225
29d1dc62 VA	226	DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
	227	drm_plane->crtc->base.id, sti_mixer_to_str(mixer),
	228	drm_plane->base.id, sti_plane_to_str(plane));
	229
	230	plane->status = STI_PLANE_DISABLING;
96006a77 BG	231	}
96006a77 BG	232
29d1dc62 VA	233	static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
	234	.atomic_update = sti_cursor_atomic_update,
	235	.atomic_disable = sti_cursor_atomic_disable,
96006a77 BG	236	};
96006a77 BG	237
29d1dc62 VA	238	struct drm_plane sti_cursor_create(struct drm_device drm_dev,
	239	struct device *dev, int desc,
	240	void __iomem *baseaddr,
	241	unsigned int possible_crtcs)
96006a77 BG	242	{
96006a77 BG	243	struct sti_cursor *cursor;
29d1dc62 VA	244	size_t size;
29d1dc62 VA	245	int res;
96006a77 BG	246
	247	cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
	248	if (!cursor) {
	249	DRM_ERROR("Failed to allocate memory for cursor\n");
	250	return NULL;
	251	}
	252
	253	/* Allocate clut buffer */
29d1dc62 VA	254	size = 0x100 * sizeof(unsigned short);
	255	cursor->clut = dma_alloc_writecombine(dev, size, &cursor->clut_paddr,
	256	GFP_KERNEL \| GFP_DMA);
96006a77 BG	257
	258	if (!cursor->clut) {
	259	DRM_ERROR("Failed to allocate memory for cursor clut\n");
29d1dc62	260	goto err_clut;
96006a77 BG	261	}
96006a77 BG	262
871bcdfe VA	263	cursor->dev = dev;
	264	cursor->regs = baseaddr;
	265	cursor->plane.desc = desc;
29d1dc62	266	cursor->plane.status = STI_PLANE_DISABLED;
96006a77	267
871bcdfe VA	268	sti_cursor_init(cursor);
871bcdfe VA	269
29d1dc62 VA	270	res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
	271	possible_crtcs,
	272	&sti_plane_helpers_funcs,
	273	cursor_supported_formats,
	274	ARRAY_SIZE(cursor_supported_formats),
	275	DRM_PLANE_TYPE_CURSOR);
	276	if (res) {
	277	DRM_ERROR("Failed to initialize universal plane\n");
	278	goto err_plane;
	279	}
	280
	281	drm_plane_helper_add(&cursor->plane.drm_plane,
	282	&sti_cursor_helpers_funcs);
	283
	284	sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);
	285
	286	return &cursor->plane.drm_plane;
	287
	288	err_plane:
	289	dma_free_writecombine(dev, size, cursor->clut, cursor->clut_paddr);
	290	err_clut:
	291	devm_kfree(dev, cursor);
	292	return NULL;
96006a77	293	}