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drm/sti: add colorspace property to the HDMI connector
[deliverable/linux.git] / drivers / gpu / drm / sti / sti_hdmi.c
CommitLineData
5402626c
BG		 1/*
2 * Copyright (C) STMicroelectronics SA 2014
3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
4 * License terms: GNU General Public License (GPL), version 2
5 */
6
7#include <linux/clk.h>
8#include <linux/component.h>
9#include <linux/hdmi.h>
10#include <linux/module.h>
11#include <linux/of_gpio.h>
12#include <linux/platform_device.h>
13#include <linux/reset.h>
14
15#include <drm/drmP.h>
de4b00b0 16#include <drm/drm_atomic_helper.h>
5402626c
BG		 17#include <drm/drm_crtc_helper.h>
18#include <drm/drm_edid.h>
19
20#include "sti_hdmi.h"
21#include "sti_hdmi_tx3g4c28phy.h"
22#include "sti_hdmi_tx3g0c55phy.h"
23#include "sti_vtg.h"
24
25#define HDMI_CFG 0x0000
26#define HDMI_INT_EN 0x0004
27#define HDMI_INT_STA 0x0008
28#define HDMI_INT_CLR 0x000C
29#define HDMI_STA 0x0010
30#define HDMI_ACTIVE_VID_XMIN 0x0100
31#define HDMI_ACTIVE_VID_XMAX 0x0104
32#define HDMI_ACTIVE_VID_YMIN 0x0108
33#define HDMI_ACTIVE_VID_YMAX 0x010C
34#define HDMI_DFLT_CHL0_DAT 0x0110
35#define HDMI_DFLT_CHL1_DAT 0x0114
36#define HDMI_DFLT_CHL2_DAT 0x0118
37#define HDMI_SW_DI_1_HEAD_WORD 0x0210
38#define HDMI_SW_DI_1_PKT_WORD0 0x0214
39#define HDMI_SW_DI_1_PKT_WORD1 0x0218
40#define HDMI_SW_DI_1_PKT_WORD2 0x021C
41#define HDMI_SW_DI_1_PKT_WORD3 0x0220
42#define HDMI_SW_DI_1_PKT_WORD4 0x0224
43#define HDMI_SW_DI_1_PKT_WORD5 0x0228
44#define HDMI_SW_DI_1_PKT_WORD6 0x022C
45#define HDMI_SW_DI_CFG 0x0230
cffe1e89
AP		 46#define HDMI_SW_DI_2_HEAD_WORD 0x0600
47#define HDMI_SW_DI_2_PKT_WORD0 0x0604
48#define HDMI_SW_DI_2_PKT_WORD1 0x0608
49#define HDMI_SW_DI_2_PKT_WORD2 0x060C
50#define HDMI_SW_DI_2_PKT_WORD3 0x0610
51#define HDMI_SW_DI_2_PKT_WORD4 0x0614
52#define HDMI_SW_DI_2_PKT_WORD5 0x0618
53#define HDMI_SW_DI_2_PKT_WORD6 0x061C
e42e7bd7
VA		 54#define HDMI_SW_DI_3_HEAD_WORD 0x0620
55#define HDMI_SW_DI_3_PKT_WORD0 0x0624
56#define HDMI_SW_DI_3_PKT_WORD1 0x0628
57#define HDMI_SW_DI_3_PKT_WORD2 0x062C
58#define HDMI_SW_DI_3_PKT_WORD3 0x0630
59#define HDMI_SW_DI_3_PKT_WORD4 0x0634
60#define HDMI_SW_DI_3_PKT_WORD5 0x0638
61#define HDMI_SW_DI_3_PKT_WORD6 0x063C
5402626c
BG		 62
63#define HDMI_IFRAME_SLOT_AVI 1
cffe1e89 64#define HDMI_IFRAME_SLOT_AUDIO 2
e42e7bd7 65#define HDMI_IFRAME_SLOT_VENDOR 3
5402626c
BG		 66
67#define XCAT(prefix, x, suffix) prefix ## x ## suffix
68#define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD)
69#define HDMI_SW_DI_N_PKT_WORD0(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD0)
70#define HDMI_SW_DI_N_PKT_WORD1(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD1)
71#define HDMI_SW_DI_N_PKT_WORD2(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD2)
72#define HDMI_SW_DI_N_PKT_WORD3(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD3)
73#define HDMI_SW_DI_N_PKT_WORD4(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD4)
74#define HDMI_SW_DI_N_PKT_WORD5(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD5)
75#define HDMI_SW_DI_N_PKT_WORD6(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD6)
76
181975a2
VA		 77#define HDMI_SW_DI_MAX_WORD 7
78
5402626c
BG		 79#define HDMI_IFRAME_DISABLED 0x0
80#define HDMI_IFRAME_SINGLE_SHOT 0x1
81#define HDMI_IFRAME_FIELD 0x2
82#define HDMI_IFRAME_FRAME 0x3
83#define HDMI_IFRAME_MASK 0x3
84#define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */
85
86#define HDMI_CFG_DEVICE_EN BIT(0)
87#define HDMI_CFG_HDMI_NOT_DVI BIT(1)
88#define HDMI_CFG_HDCP_EN BIT(2)
89#define HDMI_CFG_ESS_NOT_OESS BIT(3)
90#define HDMI_CFG_H_SYNC_POL_NEG BIT(4)
91#define HDMI_CFG_SINK_TERM_DET_EN BIT(5)
92#define HDMI_CFG_V_SYNC_POL_NEG BIT(6)
93#define HDMI_CFG_422_EN BIT(8)
94#define HDMI_CFG_FIFO_OVERRUN_CLR BIT(12)
95#define HDMI_CFG_FIFO_UNDERRUN_CLR BIT(13)
96#define HDMI_CFG_SW_RST_EN BIT(31)
97
98#define HDMI_INT_GLOBAL BIT(0)
99#define HDMI_INT_SW_RST BIT(1)
100#define HDMI_INT_PIX_CAP BIT(3)
101#define HDMI_INT_HOT_PLUG BIT(4)
102#define HDMI_INT_DLL_LCK BIT(5)
103#define HDMI_INT_NEW_FRAME BIT(6)
104#define HDMI_INT_GENCTRL_PKT BIT(7)
105#define HDMI_INT_SINK_TERM_PRESENT BIT(11)
106
107#define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \
108 | HDMI_INT_DLL_LCK \
109 | HDMI_INT_HOT_PLUG \
110 | HDMI_INT_GLOBAL)
111
112#define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \
113 | HDMI_INT_GENCTRL_PKT \
114 | HDMI_INT_NEW_FRAME \
115 | HDMI_INT_DLL_LCK \
116 | HDMI_INT_HOT_PLUG \
117 | HDMI_INT_PIX_CAP \
118 | HDMI_INT_SW_RST \
119 | HDMI_INT_GLOBAL)
120
121#define HDMI_STA_SW_RST BIT(1)
122
cffe1e89
AP		 123#define HDMI_INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0)
124#define HDMI_INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8)
125#define HDMI_INFOFRAME_HEADER_LEN(x) (((x) & 0x0f) << 16)
126
5402626c
BG		 127struct sti_hdmi_connector {
128 struct drm_connector drm_connector;
129 struct drm_encoder *encoder;
130 struct sti_hdmi *hdmi;
5671cefb 131 struct drm_property *colorspace_property;
5402626c
BG		 132};
133
134#define to_sti_hdmi_connector(x) \
135 container_of(x, struct sti_hdmi_connector, drm_connector)
136
137u32 hdmi_read(struct sti_hdmi *hdmi, int offset)
138{
139 return readl(hdmi->regs + offset);
140}
141
142void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset)
143{
144 writel(val, hdmi->regs + offset);
145}
146
147/**
148 * HDMI interrupt handler threaded
149 *
150 * @irq: irq number
151 * @arg: connector structure
152 */
153static irqreturn_t hdmi_irq_thread(int irq, void *arg)
154{
155 struct sti_hdmi *hdmi = arg;
156
157 /* Hot plug/unplug IRQ */
158 if (hdmi->irq_status & HDMI_INT_HOT_PLUG) {
76569207 159 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
5402626c
BG		 160 if (hdmi->drm_dev)
161 drm_helper_hpd_irq_event(hdmi->drm_dev);
162 }
163
164 /* Sw reset and PLL lock are exclusive so we can use the same
165 * event to signal them
166 */
167 if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) {
168 hdmi->event_received = true;
169 wake_up_interruptible(&hdmi->wait_event);
170 }
171
172 return IRQ_HANDLED;
173}
174
175/**
176 * HDMI interrupt handler
177 *
178 * @irq: irq number
179 * @arg: connector structure
180 */
181static irqreturn_t hdmi_irq(int irq, void *arg)
182{
183 struct sti_hdmi *hdmi = arg;
184
185 /* read interrupt status */
186 hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA);
187
188 /* clear interrupt status */
189 hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR);
190
191 /* force sync bus write */
192 hdmi_read(hdmi, HDMI_INT_STA);
193
194 return IRQ_WAKE_THREAD;
195}
196
197/**
198 * Set hdmi active area depending on the drm display mode selected
199 *
200 * @hdmi: pointer on the hdmi internal structure
201 */
202static void hdmi_active_area(struct sti_hdmi *hdmi)
203{
204 u32 xmin, xmax;
205 u32 ymin, ymax;
206
8661532a
VA		 207 xmin = sti_vtg_get_pixel_number(hdmi->mode, 1);
208 xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay);
5402626c
BG		 209 ymin = sti_vtg_get_line_number(hdmi->mode, 0);
210 ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1);
211
212 hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN);
213 hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX);
214 hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN);
215 hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
216}
217
218/**
219 * Overall hdmi configuration
220 *
221 * @hdmi: pointer on the hdmi internal structure
222 */
223static void hdmi_config(struct sti_hdmi *hdmi)
224{
225 u32 conf;
226
227 DRM_DEBUG_DRIVER("\n");
228
229 /* Clear overrun and underrun fifo */
230 conf = HDMI_CFG_FIFO_OVERRUN_CLR | HDMI_CFG_FIFO_UNDERRUN_CLR;
231
232 /* Enable HDMI mode not DVI */
233 conf |= HDMI_CFG_HDMI_NOT_DVI | HDMI_CFG_ESS_NOT_OESS;
234
235 /* Enable sink term detection */
236 conf |= HDMI_CFG_SINK_TERM_DET_EN;
237
238 /* Set Hsync polarity */
239 if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) {
240 DRM_DEBUG_DRIVER("H Sync Negative\n");
241 conf |= HDMI_CFG_H_SYNC_POL_NEG;
242 }
243
244 /* Set Vsync polarity */
245 if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) {
246 DRM_DEBUG_DRIVER("V Sync Negative\n");
247 conf |= HDMI_CFG_V_SYNC_POL_NEG;
248 }
249
250 /* Enable HDMI */
251 conf |= HDMI_CFG_DEVICE_EN;
252
253 hdmi_write(hdmi, conf, HDMI_CFG);
254}
255
181975a2
VA		 256/*
257 * Helper to reset info frame
258 *
259 * @hdmi: pointer on the hdmi internal structure
260 * @slot: infoframe to reset
261 */
262static void hdmi_infoframe_reset(struct sti_hdmi *hdmi,
263 u32 slot)
264{
265 u32 val, i;
266 u32 head_offset, pack_offset;
267
268 switch (slot) {
269 case HDMI_IFRAME_SLOT_AVI:
270 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI);
271 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI);
272 break;
273 case HDMI_IFRAME_SLOT_AUDIO:
274 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO);
275 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO);
276 break;
e42e7bd7
VA		 277 case HDMI_IFRAME_SLOT_VENDOR:
278 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_VENDOR);
279 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_VENDOR);
280 break;
181975a2
VA		 281 default:
282 DRM_ERROR("unsupported infoframe slot: %#x\n", slot);
283 return;
284 }
285
286 /* Disable transmission for the selected slot */
287 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
288 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot);
289 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
290
291 /* Reset info frame registers */
292 hdmi_write(hdmi, 0x0, head_offset);
293 for (i = 0; i < HDMI_SW_DI_MAX_WORD; i += sizeof(u32))
294 hdmi_write(hdmi, 0x0, pack_offset + i);
295}
296
cffe1e89
AP		 297/**
298 * Helper to concatenate infoframe in 32 bits word
299 *
300 * @ptr: pointer on the hdmi internal structure
301 * @data: infoframe to write
302 * @size: size to write
303 */
304static inline unsigned int hdmi_infoframe_subpack(const u8 *ptr, size_t size)
305{
306 unsigned long value = 0;
307 size_t i;
308
309 for (i = size; i > 0; i--)
310 value = (value << 8) | ptr[i - 1];
311
312 return value;
313}
314
315/**
316 * Helper to write info frame
317 *
318 * @hdmi: pointer on the hdmi internal structure
319 * @data: infoframe to write
320 * @size: size to write
321 */
e42e7bd7
VA		 322static void hdmi_infoframe_write_infopack(struct sti_hdmi *hdmi,
323 const u8 *data,
324 size_t size)
cffe1e89
AP		 325{
326 const u8 *ptr = data;
327 u32 val, slot, mode, i;
328 u32 head_offset, pack_offset;
cffe1e89
AP		 329
330 switch (*ptr) {
331 case HDMI_INFOFRAME_TYPE_AVI:
332 slot = HDMI_IFRAME_SLOT_AVI;
333 mode = HDMI_IFRAME_FIELD;
334 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI);
335 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI);
cffe1e89 336 break;
cffe1e89
AP		 337 case HDMI_INFOFRAME_TYPE_AUDIO:
338 slot = HDMI_IFRAME_SLOT_AUDIO;
339 mode = HDMI_IFRAME_FRAME;
340 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO);
341 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO);
cffe1e89 342 break;
e42e7bd7
VA		 343 case HDMI_INFOFRAME_TYPE_VENDOR:
344 slot = HDMI_IFRAME_SLOT_VENDOR;
345 mode = HDMI_IFRAME_FRAME;
346 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_VENDOR);
347 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_VENDOR);
348 break;
cffe1e89
AP		 349 default:
350 DRM_ERROR("unsupported infoframe type: %#x\n", *ptr);
351 return;
352 }
353
354 /* Disable transmission slot for updated infoframe */
355 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
356 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot);
357 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
358
359 val = HDMI_INFOFRAME_HEADER_TYPE(*ptr++);
360 val |= HDMI_INFOFRAME_HEADER_VERSION(*ptr++);
361 val |= HDMI_INFOFRAME_HEADER_LEN(*ptr++);
362 writel(val, hdmi->regs + head_offset);
363
364 /*
365 * Each subpack contains 4 bytes
366 * The First Bytes of the first subpacket must contain the checksum
e42e7bd7 367 * Packet size is increase by one.
cffe1e89 368 */
e42e7bd7 369 size = size - HDMI_INFOFRAME_HEADER_SIZE + 1;
cffe1e89
AP		 370 for (i = 0; i < size; i += sizeof(u32)) {
371 size_t num;
372
373 num = min_t(size_t, size - i, sizeof(u32));
374 val = hdmi_infoframe_subpack(ptr, num);
375 ptr += sizeof(u32);
376 writel(val, hdmi->regs + pack_offset + i);
377 }
378
379 /* Enable transmission slot for updated infoframe */
380 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
50f2138a 381 val |= HDMI_IFRAME_CFG_DI_N(mode, slot);
cffe1e89
AP		 382 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
383}
384
5402626c
BG		 385/**
386 * Prepare and configure the AVI infoframe
387 *
388 * AVI infoframe are transmitted at least once per two video field and
389 * contains information about HDMI transmission mode such as color space,
390 * colorimetry, ...
391 *
392 * @hdmi: pointer on the hdmi internal structure
393 *
394 * Return negative value if error occurs
395 */
396static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi)
397{
398 struct drm_display_mode *mode = &hdmi->mode;
399 struct hdmi_avi_infoframe infoframe;
400 u8 buffer[HDMI_INFOFRAME_SIZE(AVI)];
5402626c
BG		 401 int ret;
402
403 DRM_DEBUG_DRIVER("\n");
404
405 ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe, mode);
406 if (ret < 0) {
407 DRM_ERROR("failed to setup AVI infoframe: %d\n", ret);
408 return ret;
409 }
410
411 /* fixed infoframe configuration not linked to the mode */
5671cefb 412 infoframe.colorspace = hdmi->colorspace;
5402626c
BG		 413 infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
414 infoframe.colorimetry = HDMI_COLORIMETRY_NONE;
415
416 ret = hdmi_avi_infoframe_pack(&infoframe, buffer, sizeof(buffer));
417 if (ret < 0) {
418 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
419 return ret;
420 }
421
e42e7bd7 422 hdmi_infoframe_write_infopack(hdmi, buffer, ret);
5402626c 423
cffe1e89
AP		 424 return 0;
425}
426
427/**
428 * Prepare and configure the AUDIO infoframe
429 *
430 * AUDIO infoframe are transmitted once per frame and
431 * contains information about HDMI transmission mode such as audio codec,
432 * sample size, ...
433 *
434 * @hdmi: pointer on the hdmi internal structure
435 *
436 * Return negative value if error occurs
437 */
438static int hdmi_audio_infoframe_config(struct sti_hdmi *hdmi)
439{
440 struct hdmi_audio_infoframe infofame;
441 u8 buffer[HDMI_INFOFRAME_SIZE(AUDIO)];
442 int ret;
443
444 ret = hdmi_audio_infoframe_init(&infofame);
445 if (ret < 0) {
446 DRM_ERROR("failed to setup audio infoframe: %d\n", ret);
447 return ret;
448 }
449
450 infofame.channels = 2;
451
452 ret = hdmi_audio_infoframe_pack(&infofame, buffer, sizeof(buffer));
453 if (ret < 0) {
454 DRM_ERROR("failed to pack audio infoframe: %d\n", ret);
455 return ret;
456 }
457
e42e7bd7
VA		 458 hdmi_infoframe_write_infopack(hdmi, buffer, ret);
459
460 return 0;
461}
462
463/*
464 * Prepare and configure the VS infoframe
465 *
466 * Vendor Specific infoframe are transmitted once per frame and
467 * contains vendor specific information.
468 *
469 * @hdmi: pointer on the hdmi internal structure
470 *
471 * Return negative value if error occurs
472 */
473#define HDMI_VENDOR_INFOFRAME_MAX_SIZE 6
474static int hdmi_vendor_infoframe_config(struct sti_hdmi *hdmi)
475{
476 struct drm_display_mode *mode = &hdmi->mode;
477 struct hdmi_vendor_infoframe infoframe;
478 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_VENDOR_INFOFRAME_MAX_SIZE];
479 int ret;
480
481 DRM_DEBUG_DRIVER("\n");
482
483 ret = drm_hdmi_vendor_infoframe_from_display_mode(&infoframe, mode);
484 if (ret < 0) {
485 /*
486 * Going into that statement does not means vendor infoframe
487 * fails. It just informed us that vendor infoframe is not
488 * needed for the selected mode. Only 4k or stereoscopic 3D
489 * mode requires vendor infoframe. So just simply return 0.
490 */
491 return 0;
492 }
493
494 ret = hdmi_vendor_infoframe_pack(&infoframe, buffer, sizeof(buffer));
495 if (ret < 0) {
496 DRM_ERROR("failed to pack VS infoframe: %d\n", ret);
497 return ret;
498 }
499
500 hdmi_infoframe_write_infopack(hdmi, buffer, ret);
5402626c
BG		 501
502 return 0;
503}
504
505/**
506 * Software reset of the hdmi subsystem
507 *
508 * @hdmi: pointer on the hdmi internal structure
509 *
510 */
511#define HDMI_TIMEOUT_SWRESET 100 /*milliseconds */
512static void hdmi_swreset(struct sti_hdmi *hdmi)
513{
514 u32 val;
515
516 DRM_DEBUG_DRIVER("\n");
517
518 /* Enable hdmi_audio clock only during hdmi reset */
519 if (clk_prepare_enable(hdmi->clk_audio))
520 DRM_INFO("Failed to prepare/enable hdmi_audio clk\n");
521
522 /* Sw reset */
523 hdmi->event_received = false;
524
525 val = hdmi_read(hdmi, HDMI_CFG);
526 val |= HDMI_CFG_SW_RST_EN;
527 hdmi_write(hdmi, val, HDMI_CFG);
528
529 /* Wait reset completed */
530 wait_event_interruptible_timeout(hdmi->wait_event,
531 hdmi->event_received == true,
532 msecs_to_jiffies
533 (HDMI_TIMEOUT_SWRESET));
534
535 /*
536 * HDMI_STA_SW_RST bit is set to '1' when SW_RST bit in HDMI_CFG is
537 * set to '1' and clk_audio is running.
538 */
539 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0)
540 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n");
541
542 val = hdmi_read(hdmi, HDMI_CFG);
543 val &= ~HDMI_CFG_SW_RST_EN;
544 hdmi_write(hdmi, val, HDMI_CFG);
545
546 /* Disable hdmi_audio clock. Not used anymore for drm purpose */
547 clk_disable_unprepare(hdmi->clk_audio);
548}
549
550static void sti_hdmi_disable(struct drm_bridge *bridge)
551{
552 struct sti_hdmi *hdmi = bridge->driver_private;
553
554 u32 val = hdmi_read(hdmi, HDMI_CFG);
555
556 if (!hdmi->enabled)
557 return;
558
559 DRM_DEBUG_DRIVER("\n");
560
561 /* Disable HDMI */
562 val &= ~HDMI_CFG_DEVICE_EN;
563 hdmi_write(hdmi, val, HDMI_CFG);
564
565 hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR);
566
567 /* Stop the phy */
568 hdmi->phy_ops->stop(hdmi);
569
181975a2
VA		 570 /* Reset info frame transmission */
571 hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AVI);
572 hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AUDIO);
e42e7bd7 573 hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_VENDOR);
181975a2 574
5402626c
BG		 575 /* Set the default channel data to be a dark red */
576 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT);
577 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT);
578 hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT);
579
580 /* Disable/unprepare hdmi clock */
581 clk_disable_unprepare(hdmi->clk_phy);
582 clk_disable_unprepare(hdmi->clk_tmds);
583 clk_disable_unprepare(hdmi->clk_pix);
584
585 hdmi->enabled = false;
586}
587
588static void sti_hdmi_pre_enable(struct drm_bridge *bridge)
589{
590 struct sti_hdmi *hdmi = bridge->driver_private;
591
592 DRM_DEBUG_DRIVER("\n");
593
594 if (hdmi->enabled)
595 return;
596
597 /* Prepare/enable clocks */
598 if (clk_prepare_enable(hdmi->clk_pix))
599 DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n");
600 if (clk_prepare_enable(hdmi->clk_tmds))
601 DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n");
602 if (clk_prepare_enable(hdmi->clk_phy))
603 DRM_ERROR("Failed to prepare/enable hdmi_rejec_pll clk\n");
604
605 hdmi->enabled = true;
606
607 /* Program hdmi serializer and start phy */
608 if (!hdmi->phy_ops->start(hdmi)) {
609 DRM_ERROR("Unable to start hdmi phy\n");
610 return;
611 }
612
613 /* Program hdmi active area */
614 hdmi_active_area(hdmi);
615
616 /* Enable working interrupts */
617 hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN);
618
619 /* Program hdmi config */
620 hdmi_config(hdmi);
621
622 /* Program AVI infoframe */
623 if (hdmi_avi_infoframe_config(hdmi))
624 DRM_ERROR("Unable to configure AVI infoframe\n");
625
cffe1e89
AP		 626 /* Program AUDIO infoframe */
627 if (hdmi_audio_infoframe_config(hdmi))
628 DRM_ERROR("Unable to configure AUDIO infoframe\n");
629
e42e7bd7
VA		 630 /* Program VS infoframe */
631 if (hdmi_vendor_infoframe_config(hdmi))
632 DRM_ERROR("Unable to configure VS infoframe\n");
633
5402626c
BG		 634 /* Sw reset */
635 hdmi_swreset(hdmi);
636}
637
638static void sti_hdmi_set_mode(struct drm_bridge *bridge,
639 struct drm_display_mode *mode,
640 struct drm_display_mode *adjusted_mode)
641{
642 struct sti_hdmi *hdmi = bridge->driver_private;
643 int ret;
644
645 DRM_DEBUG_DRIVER("\n");
646
647 /* Copy the drm display mode in the connector local structure */
648 memcpy(&hdmi->mode, mode, sizeof(struct drm_display_mode));
649
650 /* Update clock framerate according to the selected mode */
651 ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000);
652 if (ret < 0) {
653 DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n",
654 mode->clock * 1000);
655 return;
656 }
657 ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000);
658 if (ret < 0) {
659 DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n",
660 mode->clock * 1000);
661 return;
662 }
663}
664
665static void sti_hdmi_bridge_nope(struct drm_bridge *bridge)
666{
667 /* do nothing */
668}
669
5402626c
BG		 670static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = {
671 .pre_enable = sti_hdmi_pre_enable,
672 .enable = sti_hdmi_bridge_nope,
673 .disable = sti_hdmi_disable,
674 .post_disable = sti_hdmi_bridge_nope,
675 .mode_set = sti_hdmi_set_mode,
5402626c
BG		 676};
677
678static int sti_hdmi_connector_get_modes(struct drm_connector *connector)
679{
41a14623
BG		 680 struct sti_hdmi_connector *hdmi_connector
681 = to_sti_hdmi_connector(connector);
682 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
5402626c
BG		 683 struct edid *edid;
684 int count;
685
686 DRM_DEBUG_DRIVER("\n");
687
41a14623 688 edid = drm_get_edid(connector, hdmi->ddc_adapt);
5402626c
BG		 689 if (!edid)
690 goto fail;
691
692 count = drm_add_edid_modes(connector, edid);
693 drm_mode_connector_update_edid_property(connector, edid);
694
695 kfree(edid);
696 return count;
697
698fail:
871bcdfe 699 DRM_ERROR("Can't read HDMI EDID\n");
5402626c
BG		 700 return 0;
701}
702
703#define CLK_TOLERANCE_HZ 50
704
705static int sti_hdmi_connector_mode_valid(struct drm_connector *connector,
706 struct drm_display_mode *mode)
707{
708 int target = mode->clock * 1000;
709 int target_min = target - CLK_TOLERANCE_HZ;
710 int target_max = target + CLK_TOLERANCE_HZ;
711 int result;
712 struct sti_hdmi_connector *hdmi_connector
713 = to_sti_hdmi_connector(connector);
714 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
715
716
717 result = clk_round_rate(hdmi->clk_pix, target);
718
719 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
720 target, result);
721
722 if ((result < target_min) || (result > target_max)) {
723 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target);
724 return MODE_BAD;
725 }
726
727 return MODE_OK;
728}
729
730struct drm_encoder *sti_hdmi_best_encoder(struct drm_connector *connector)
731{
732 struct sti_hdmi_connector *hdmi_connector
733 = to_sti_hdmi_connector(connector);
734
735 /* Best encoder is the one associated during connector creation */
736 return hdmi_connector->encoder;
737}
738
c5de4853
VS		 739static const
740struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = {
5402626c
BG		 741 .get_modes = sti_hdmi_connector_get_modes,
742 .mode_valid = sti_hdmi_connector_mode_valid,
743 .best_encoder = sti_hdmi_best_encoder,
744};
745
746/* get detection status of display device */
747static enum drm_connector_status
748sti_hdmi_connector_detect(struct drm_connector *connector, bool force)
749{
750 struct sti_hdmi_connector *hdmi_connector
751 = to_sti_hdmi_connector(connector);
752 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
753
754 DRM_DEBUG_DRIVER("\n");
755
756 if (hdmi->hpd) {
757 DRM_DEBUG_DRIVER("hdmi cable connected\n");
758 return connector_status_connected;
759 }
760
761 DRM_DEBUG_DRIVER("hdmi cable disconnected\n");
762 return connector_status_disconnected;
763}
764
765static void sti_hdmi_connector_destroy(struct drm_connector *connector)
766{
767 struct sti_hdmi_connector *hdmi_connector
768 = to_sti_hdmi_connector(connector);
769
770 drm_connector_unregister(connector);
771 drm_connector_cleanup(connector);
772 kfree(hdmi_connector);
773}
774
5671cefb
VA		 775static void sti_hdmi_connector_init_property(struct drm_device *drm_dev,
776 struct drm_connector *connector)
777{
778 struct sti_hdmi_connector *hdmi_connector
779 = to_sti_hdmi_connector(connector);
780 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
781 struct drm_property *prop;
782
783 /* colorspace property */
784 hdmi->colorspace = DEFAULT_COLORSPACE_MODE;
785 prop = drm_property_create_enum(drm_dev, 0, "colorspace",
786 colorspace_mode_names,
787 ARRAY_SIZE(colorspace_mode_names));
788 if (!prop) {
789 DRM_ERROR("fails to create colorspace property\n");
790 return;
791 }
792 hdmi_connector->colorspace_property = prop;
793 drm_object_attach_property(&connector->base, prop, hdmi->colorspace);
794}
795
796static int
797sti_hdmi_connector_set_property(struct drm_connector *connector,
798 struct drm_connector_state *state,
799 struct drm_property *property,
800 uint64_t val)
801{
802 struct sti_hdmi_connector *hdmi_connector
803 = to_sti_hdmi_connector(connector);
804 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
805
806 if (property == hdmi_connector->colorspace_property) {
807 hdmi->colorspace = val;
808 return 0;
809 }
810
811 DRM_ERROR("failed to set hdmi connector property\n");
812 return -EINVAL;
813}
814
815static int
816sti_hdmi_connector_get_property(struct drm_connector *connector,
817 const struct drm_connector_state *state,
818 struct drm_property *property,
819 uint64_t *val)
820{
821 struct sti_hdmi_connector *hdmi_connector
822 = to_sti_hdmi_connector(connector);
823 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
824
825 if (property == hdmi_connector->colorspace_property) {
826 *val = hdmi->colorspace;
827 return 0;
828 }
829
830 DRM_ERROR("failed to get hdmi connector property\n");
831 return -EINVAL;
832}
833
c5de4853 834static const struct drm_connector_funcs sti_hdmi_connector_funcs = {
de4b00b0 835 .dpms = drm_atomic_helper_connector_dpms,
5402626c
BG		 836 .fill_modes = drm_helper_probe_single_connector_modes,
837 .detect = sti_hdmi_connector_detect,
838 .destroy = sti_hdmi_connector_destroy,
de4b00b0 839 .reset = drm_atomic_helper_connector_reset,
5671cefb
VA		 840 .set_property = drm_atomic_helper_connector_set_property,
841 .atomic_set_property = sti_hdmi_connector_set_property,
842 .atomic_get_property = sti_hdmi_connector_get_property,
de4b00b0
BG		 843 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
844 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
5402626c
BG		 845};
846
847static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev)
848{
849 struct drm_encoder *encoder;
850
851 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
852 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
853 return encoder;
854 }
855
856 return NULL;
857}
858
859static int sti_hdmi_bind(struct device *dev, struct device *master, void *data)
860{
861 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
862 struct drm_device *drm_dev = data;
863 struct drm_encoder *encoder;
864 struct sti_hdmi_connector *connector;
865 struct drm_connector *drm_connector;
866 struct drm_bridge *bridge;
5402626c
BG		 867 int err;
868
5402626c
BG		 869 /* Set the drm device handle */
870 hdmi->drm_dev = drm_dev;
871
872 encoder = sti_hdmi_find_encoder(drm_dev);
873 if (!encoder)
807642d7 874 return -EINVAL;
5402626c
BG		 875
876 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
877 if (!connector)
807642d7 878 return -EINVAL;
5402626c
BG		 879
880 connector->hdmi = hdmi;
881
882 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
883 if (!bridge)
807642d7 884 return -EINVAL;
5402626c
BG		 885
886 bridge->driver_private = hdmi;
b07b90fd 887 bridge->funcs = &sti_hdmi_bridge_funcs;
3d3f8b1f 888 drm_bridge_attach(drm_dev, bridge);
5402626c
BG		 889
890 encoder->bridge = bridge;
891 connector->encoder = encoder;
892
893 drm_connector = (struct drm_connector *)connector;
894
895 drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
896
897 drm_connector_init(drm_dev, drm_connector,
898 &sti_hdmi_connector_funcs, DRM_MODE_CONNECTOR_HDMIA);
899 drm_connector_helper_add(drm_connector,
900 &sti_hdmi_connector_helper_funcs);
901
5671cefb
VA		 902 /* initialise property */
903 sti_hdmi_connector_init_property(drm_dev, drm_connector);
904
5402626c
BG		 905 err = drm_connector_register(drm_connector);
906 if (err)
907 goto err_connector;
908
909 err = drm_mode_connector_attach_encoder(drm_connector, encoder);
910 if (err) {
911 DRM_ERROR("Failed to attach a connector to a encoder\n");
912 goto err_sysfs;
913 }
914
915 /* Enable default interrupts */
916 hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN);
917
918 return 0;
919
920err_sysfs:
921 drm_connector_unregister(drm_connector);
922err_connector:
5402626c 923 drm_connector_cleanup(drm_connector);
807642d7 924
5402626c
BG		 925 return -EINVAL;
926}
927
928static void sti_hdmi_unbind(struct device *dev,
929 struct device *master, void *data)
930{
931 /* do nothing */
932}
933
934static const struct component_ops sti_hdmi_ops = {
935 .bind = sti_hdmi_bind,
936 .unbind = sti_hdmi_unbind,
937};
938
8e932cf0 939static const struct of_device_id hdmi_of_match[] = {
5402626c
BG		 940 {
941 .compatible = "st,stih416-hdmi",
942 .data = &tx3g0c55phy_ops,
943 }, {
944 .compatible = "st,stih407-hdmi",
945 .data = &tx3g4c28phy_ops,
946 }, {
947 /* end node */
948 }
949};
950MODULE_DEVICE_TABLE(of, hdmi_of_match);
951
952static int sti_hdmi_probe(struct platform_device *pdev)
953{
954 struct device *dev = &pdev->dev;
955 struct sti_hdmi *hdmi;
956 struct device_node *np = dev->of_node;
957 struct resource *res;
53bdcf5f 958 struct device_node *ddc;
5402626c
BG		 959 int ret;
960
961 DRM_INFO("%s\n", __func__);
962
963 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
964 if (!hdmi)
965 return -ENOMEM;
966
53bdcf5f
BG		 967 ddc = of_parse_phandle(pdev->dev.of_node, "ddc", 0);
968 if (ddc) {
4d5821a7 969 hdmi->ddc_adapt = of_get_i2c_adapter_by_node(ddc);
53bdcf5f 970 of_node_put(ddc);
4d5821a7
VZ		 971 if (!hdmi->ddc_adapt)
972 return -EPROBE_DEFER;
53bdcf5f
BG		 973 }
974
5402626c
BG		 975 hdmi->dev = pdev->dev;
976
977 /* Get resources */
978 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg");
979 if (!res) {
980 DRM_ERROR("Invalid hdmi resource\n");
807642d7
VZ		 981 ret = -ENOMEM;
982 goto release_adapter;
5402626c
BG		 983 }
984 hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
807642d7
VZ		 985 if (!hdmi->regs) {
986 ret = -ENOMEM;
987 goto release_adapter;
988 }
5402626c
BG		 989
990 if (of_device_is_compatible(np, "st,stih416-hdmi")) {
991 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
992 "syscfg");
993 if (!res) {
994 DRM_ERROR("Invalid syscfg resource\n");
807642d7
VZ		 995 ret = -ENOMEM;
996 goto release_adapter;
5402626c
BG		 997 }
998 hdmi->syscfg = devm_ioremap_nocache(dev, res->start,
999 resource_size(res));
807642d7
VZ		 1000 if (!hdmi->syscfg) {
1001 ret = -ENOMEM;
1002 goto release_adapter;
1003 }
5402626c
BG		 1004 }
1005
1006 hdmi->phy_ops = (struct hdmi_phy_ops *)
1007 of_match_node(hdmi_of_match, np)->data;
1008
1009 /* Get clock resources */
1010 hdmi->clk_pix = devm_clk_get(dev, "pix");
1011 if (IS_ERR(hdmi->clk_pix)) {
1012 DRM_ERROR("Cannot get hdmi_pix clock\n");
807642d7
VZ		 1013 ret = PTR_ERR(hdmi->clk_pix);
1014 goto release_adapter;
5402626c
BG		 1015 }
1016
1017 hdmi->clk_tmds = devm_clk_get(dev, "tmds");
1018 if (IS_ERR(hdmi->clk_tmds)) {
1019 DRM_ERROR("Cannot get hdmi_tmds clock\n");
807642d7
VZ		 1020 ret = PTR_ERR(hdmi->clk_tmds);
1021 goto release_adapter;
5402626c
BG		 1022 }
1023
1024 hdmi->clk_phy = devm_clk_get(dev, "phy");
1025 if (IS_ERR(hdmi->clk_phy)) {
1026 DRM_ERROR("Cannot get hdmi_phy clock\n");
807642d7
VZ		 1027 ret = PTR_ERR(hdmi->clk_phy);
1028 goto release_adapter;
5402626c
BG		 1029 }
1030
1031 hdmi->clk_audio = devm_clk_get(dev, "audio");
1032 if (IS_ERR(hdmi->clk_audio)) {
1033 DRM_ERROR("Cannot get hdmi_audio clock\n");
807642d7
VZ		 1034 ret = PTR_ERR(hdmi->clk_audio);
1035 goto release_adapter;
5402626c
BG		 1036 }
1037
76569207 1038 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
5402626c
BG		 1039
1040 init_waitqueue_head(&hdmi->wait_event);
1041
1042 hdmi->irq = platform_get_irq_byname(pdev, "irq");
1043
1044 ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq,
1045 hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi);
1046 if (ret) {
1047 DRM_ERROR("Failed to register HDMI interrupt\n");
807642d7 1048 goto release_adapter;
5402626c
BG		 1049 }
1050
1051 hdmi->reset = devm_reset_control_get(dev, "hdmi");
1052 /* Take hdmi out of reset */
1053 if (!IS_ERR(hdmi->reset))
1054 reset_control_deassert(hdmi->reset);
1055
1056 platform_set_drvdata(pdev, hdmi);
1057
1058 return component_add(&pdev->dev, &sti_hdmi_ops);
807642d7
VZ		 1059
1060 release_adapter:
4d5821a7 1061 i2c_put_adapter(hdmi->ddc_adapt);
807642d7
VZ		 1062
1063 return ret;
5402626c
BG		 1064}
1065
1066static int sti_hdmi_remove(struct platform_device *pdev)
1067{
41a14623
BG		 1068 struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev);
1069
4d5821a7 1070 i2c_put_adapter(hdmi->ddc_adapt);
5402626c 1071 component_del(&pdev->dev, &sti_hdmi_ops);
4d5821a7 1072
5402626c
BG		 1073 return 0;
1074}
1075
1076struct platform_driver sti_hdmi_driver = {
1077 .driver = {
1078 .name = "sti-hdmi",
1079 .owner = THIS_MODULE,
1080 .of_match_table = hdmi_of_match,
1081 },
1082 .probe = sti_hdmi_probe,
1083 .remove = sti_hdmi_remove,
1084};
1085
5402626c
BG		 1086MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
1087MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
1088MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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