Commit | Line | Data |
---|---|---|
d8f4a9ed TR |
1 | /* |
2 | * Copyright (C) 2012 Avionic Design GmbH | |
d43f81cb | 3 | * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved. |
d8f4a9ed TR |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
776dc384 TR |
10 | #include <linux/host1x.h> |
11 | ||
d8f4a9ed | 12 | #include "drm.h" |
de2ba664 | 13 | #include "gem.h" |
d8f4a9ed TR |
14 | |
15 | #define DRIVER_NAME "tegra" | |
16 | #define DRIVER_DESC "NVIDIA Tegra graphics" | |
17 | #define DRIVER_DATE "20120330" | |
18 | #define DRIVER_MAJOR 0 | |
19 | #define DRIVER_MINOR 0 | |
20 | #define DRIVER_PATCHLEVEL 0 | |
21 | ||
08943e6c TR |
22 | struct tegra_drm_file { |
23 | struct list_head contexts; | |
24 | }; | |
25 | ||
776dc384 | 26 | static int tegra_drm_load(struct drm_device *drm, unsigned long flags) |
692e6d7b | 27 | { |
776dc384 | 28 | struct host1x_device *device = to_host1x_device(drm->dev); |
386a2a71 | 29 | struct tegra_drm *tegra; |
692e6d7b TB |
30 | int err; |
31 | ||
776dc384 | 32 | tegra = kzalloc(sizeof(*tegra), GFP_KERNEL); |
386a2a71 | 33 | if (!tegra) |
692e6d7b TB |
34 | return -ENOMEM; |
35 | ||
776dc384 | 36 | dev_set_drvdata(drm->dev, tegra); |
386a2a71 TR |
37 | mutex_init(&tegra->clients_lock); |
38 | INIT_LIST_HEAD(&tegra->clients); | |
386a2a71 TR |
39 | drm->dev_private = tegra; |
40 | tegra->drm = drm; | |
d8f4a9ed TR |
41 | |
42 | drm_mode_config_init(drm); | |
43 | ||
776dc384 | 44 | err = host1x_device_init(device); |
d8f4a9ed TR |
45 | if (err < 0) |
46 | return err; | |
47 | ||
603f0cc9 TR |
48 | /* |
49 | * We don't use the drm_irq_install() helpers provided by the DRM | |
50 | * core, so we need to set this manually in order to allow the | |
51 | * DRM_IOCTL_WAIT_VBLANK to operate correctly. | |
52 | */ | |
4423843c | 53 | drm->irq_enabled = true; |
603f0cc9 | 54 | |
6e5ff998 TR |
55 | err = drm_vblank_init(drm, drm->mode_config.num_crtc); |
56 | if (err < 0) | |
57 | return err; | |
58 | ||
d8f4a9ed TR |
59 | err = tegra_drm_fb_init(drm); |
60 | if (err < 0) | |
61 | return err; | |
62 | ||
63 | drm_kms_helper_poll_init(drm); | |
64 | ||
65 | return 0; | |
66 | } | |
67 | ||
68 | static int tegra_drm_unload(struct drm_device *drm) | |
69 | { | |
776dc384 TR |
70 | struct host1x_device *device = to_host1x_device(drm->dev); |
71 | int err; | |
72 | ||
d8f4a9ed TR |
73 | drm_kms_helper_poll_fini(drm); |
74 | tegra_drm_fb_exit(drm); | |
f002abc1 TR |
75 | drm_vblank_cleanup(drm); |
76 | drm_mode_config_cleanup(drm); | |
d8f4a9ed | 77 | |
776dc384 TR |
78 | err = host1x_device_exit(device); |
79 | if (err < 0) | |
80 | return err; | |
81 | ||
d8f4a9ed TR |
82 | return 0; |
83 | } | |
84 | ||
85 | static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp) | |
86 | { | |
08943e6c | 87 | struct tegra_drm_file *fpriv; |
d43f81cb TB |
88 | |
89 | fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL); | |
90 | if (!fpriv) | |
91 | return -ENOMEM; | |
92 | ||
93 | INIT_LIST_HEAD(&fpriv->contexts); | |
94 | filp->driver_priv = fpriv; | |
95 | ||
d8f4a9ed TR |
96 | return 0; |
97 | } | |
98 | ||
c88c3630 | 99 | static void tegra_drm_context_free(struct tegra_drm_context *context) |
d43f81cb TB |
100 | { |
101 | context->client->ops->close_channel(context); | |
102 | kfree(context); | |
103 | } | |
104 | ||
d8f4a9ed TR |
105 | static void tegra_drm_lastclose(struct drm_device *drm) |
106 | { | |
60c2f709 | 107 | #ifdef CONFIG_TEGRA_DRM_FBDEV |
386a2a71 | 108 | struct tegra_drm *tegra = drm->dev_private; |
d8f4a9ed | 109 | |
386a2a71 | 110 | tegra_fbdev_restore_mode(tegra->fbdev); |
60c2f709 | 111 | #endif |
d8f4a9ed TR |
112 | } |
113 | ||
c40f0f1a TR |
114 | static struct host1x_bo * |
115 | host1x_bo_lookup(struct drm_device *drm, struct drm_file *file, u32 handle) | |
116 | { | |
117 | struct drm_gem_object *gem; | |
118 | struct tegra_bo *bo; | |
119 | ||
120 | gem = drm_gem_object_lookup(drm, file, handle); | |
121 | if (!gem) | |
122 | return NULL; | |
123 | ||
124 | mutex_lock(&drm->struct_mutex); | |
125 | drm_gem_object_unreference(gem); | |
126 | mutex_unlock(&drm->struct_mutex); | |
127 | ||
128 | bo = to_tegra_bo(gem); | |
129 | return &bo->base; | |
130 | } | |
131 | ||
132 | int tegra_drm_submit(struct tegra_drm_context *context, | |
133 | struct drm_tegra_submit *args, struct drm_device *drm, | |
134 | struct drm_file *file) | |
135 | { | |
136 | unsigned int num_cmdbufs = args->num_cmdbufs; | |
137 | unsigned int num_relocs = args->num_relocs; | |
138 | unsigned int num_waitchks = args->num_waitchks; | |
139 | struct drm_tegra_cmdbuf __user *cmdbufs = | |
a7ed68fc | 140 | (void __user *)(uintptr_t)args->cmdbufs; |
c40f0f1a | 141 | struct drm_tegra_reloc __user *relocs = |
a7ed68fc | 142 | (void __user *)(uintptr_t)args->relocs; |
c40f0f1a | 143 | struct drm_tegra_waitchk __user *waitchks = |
a7ed68fc | 144 | (void __user *)(uintptr_t)args->waitchks; |
c40f0f1a TR |
145 | struct drm_tegra_syncpt syncpt; |
146 | struct host1x_job *job; | |
147 | int err; | |
148 | ||
149 | /* We don't yet support other than one syncpt_incr struct per submit */ | |
150 | if (args->num_syncpts != 1) | |
151 | return -EINVAL; | |
152 | ||
153 | job = host1x_job_alloc(context->channel, args->num_cmdbufs, | |
154 | args->num_relocs, args->num_waitchks); | |
155 | if (!job) | |
156 | return -ENOMEM; | |
157 | ||
158 | job->num_relocs = args->num_relocs; | |
159 | job->num_waitchk = args->num_waitchks; | |
160 | job->client = (u32)args->context; | |
161 | job->class = context->client->base.class; | |
162 | job->serialize = true; | |
163 | ||
164 | while (num_cmdbufs) { | |
165 | struct drm_tegra_cmdbuf cmdbuf; | |
166 | struct host1x_bo *bo; | |
167 | ||
9a991600 DC |
168 | if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) { |
169 | err = -EFAULT; | |
c40f0f1a | 170 | goto fail; |
9a991600 | 171 | } |
c40f0f1a TR |
172 | |
173 | bo = host1x_bo_lookup(drm, file, cmdbuf.handle); | |
174 | if (!bo) { | |
175 | err = -ENOENT; | |
176 | goto fail; | |
177 | } | |
178 | ||
179 | host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset); | |
180 | num_cmdbufs--; | |
181 | cmdbufs++; | |
182 | } | |
183 | ||
9a991600 DC |
184 | if (copy_from_user(job->relocarray, relocs, |
185 | sizeof(*relocs) * num_relocs)) { | |
186 | err = -EFAULT; | |
c40f0f1a | 187 | goto fail; |
9a991600 | 188 | } |
c40f0f1a TR |
189 | |
190 | while (num_relocs--) { | |
191 | struct host1x_reloc *reloc = &job->relocarray[num_relocs]; | |
192 | struct host1x_bo *cmdbuf, *target; | |
193 | ||
194 | cmdbuf = host1x_bo_lookup(drm, file, (u32)reloc->cmdbuf); | |
195 | target = host1x_bo_lookup(drm, file, (u32)reloc->target); | |
196 | ||
197 | reloc->cmdbuf = cmdbuf; | |
198 | reloc->target = target; | |
199 | ||
200 | if (!reloc->target || !reloc->cmdbuf) { | |
201 | err = -ENOENT; | |
202 | goto fail; | |
203 | } | |
204 | } | |
205 | ||
9a991600 DC |
206 | if (copy_from_user(job->waitchk, waitchks, |
207 | sizeof(*waitchks) * num_waitchks)) { | |
208 | err = -EFAULT; | |
c40f0f1a | 209 | goto fail; |
9a991600 | 210 | } |
c40f0f1a | 211 | |
9a991600 DC |
212 | if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts, |
213 | sizeof(syncpt))) { | |
214 | err = -EFAULT; | |
c40f0f1a | 215 | goto fail; |
9a991600 | 216 | } |
c40f0f1a TR |
217 | |
218 | job->is_addr_reg = context->client->ops->is_addr_reg; | |
219 | job->syncpt_incrs = syncpt.incrs; | |
220 | job->syncpt_id = syncpt.id; | |
221 | job->timeout = 10000; | |
222 | ||
223 | if (args->timeout && args->timeout < 10000) | |
224 | job->timeout = args->timeout; | |
225 | ||
226 | err = host1x_job_pin(job, context->client->base.dev); | |
227 | if (err) | |
228 | goto fail; | |
229 | ||
230 | err = host1x_job_submit(job); | |
231 | if (err) | |
232 | goto fail_submit; | |
233 | ||
234 | args->fence = job->syncpt_end; | |
235 | ||
236 | host1x_job_put(job); | |
237 | return 0; | |
238 | ||
239 | fail_submit: | |
240 | host1x_job_unpin(job); | |
241 | fail: | |
242 | host1x_job_put(job); | |
243 | return err; | |
244 | } | |
245 | ||
246 | ||
d43f81cb | 247 | #ifdef CONFIG_DRM_TEGRA_STAGING |
c88c3630 TR |
248 | static struct tegra_drm_context *tegra_drm_get_context(__u64 context) |
249 | { | |
250 | return (struct tegra_drm_context *)(uintptr_t)context; | |
251 | } | |
252 | ||
08943e6c | 253 | static bool tegra_drm_file_owns_context(struct tegra_drm_file *file, |
c88c3630 | 254 | struct tegra_drm_context *context) |
d43f81cb | 255 | { |
c88c3630 | 256 | struct tegra_drm_context *ctx; |
d43f81cb TB |
257 | |
258 | list_for_each_entry(ctx, &file->contexts, list) | |
259 | if (ctx == context) | |
260 | return true; | |
261 | ||
262 | return false; | |
263 | } | |
264 | ||
265 | static int tegra_gem_create(struct drm_device *drm, void *data, | |
266 | struct drm_file *file) | |
267 | { | |
268 | struct drm_tegra_gem_create *args = data; | |
269 | struct tegra_bo *bo; | |
270 | ||
773af77f | 271 | bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags, |
d43f81cb TB |
272 | &args->handle); |
273 | if (IS_ERR(bo)) | |
274 | return PTR_ERR(bo); | |
275 | ||
276 | return 0; | |
277 | } | |
278 | ||
279 | static int tegra_gem_mmap(struct drm_device *drm, void *data, | |
280 | struct drm_file *file) | |
281 | { | |
282 | struct drm_tegra_gem_mmap *args = data; | |
283 | struct drm_gem_object *gem; | |
284 | struct tegra_bo *bo; | |
285 | ||
286 | gem = drm_gem_object_lookup(drm, file, args->handle); | |
287 | if (!gem) | |
288 | return -EINVAL; | |
289 | ||
290 | bo = to_tegra_bo(gem); | |
291 | ||
2bc7b0ca | 292 | args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node); |
d43f81cb TB |
293 | |
294 | drm_gem_object_unreference(gem); | |
295 | ||
296 | return 0; | |
297 | } | |
298 | ||
299 | static int tegra_syncpt_read(struct drm_device *drm, void *data, | |
300 | struct drm_file *file) | |
301 | { | |
776dc384 | 302 | struct host1x *host = dev_get_drvdata(drm->dev->parent); |
d43f81cb | 303 | struct drm_tegra_syncpt_read *args = data; |
776dc384 | 304 | struct host1x_syncpt *sp; |
d43f81cb | 305 | |
776dc384 | 306 | sp = host1x_syncpt_get(host, args->id); |
d43f81cb TB |
307 | if (!sp) |
308 | return -EINVAL; | |
309 | ||
310 | args->value = host1x_syncpt_read_min(sp); | |
311 | return 0; | |
312 | } | |
313 | ||
314 | static int tegra_syncpt_incr(struct drm_device *drm, void *data, | |
315 | struct drm_file *file) | |
316 | { | |
776dc384 | 317 | struct host1x *host1x = dev_get_drvdata(drm->dev->parent); |
d43f81cb | 318 | struct drm_tegra_syncpt_incr *args = data; |
776dc384 | 319 | struct host1x_syncpt *sp; |
d43f81cb | 320 | |
776dc384 | 321 | sp = host1x_syncpt_get(host1x, args->id); |
d43f81cb TB |
322 | if (!sp) |
323 | return -EINVAL; | |
324 | ||
ebae30b1 | 325 | return host1x_syncpt_incr(sp); |
d43f81cb TB |
326 | } |
327 | ||
328 | static int tegra_syncpt_wait(struct drm_device *drm, void *data, | |
329 | struct drm_file *file) | |
330 | { | |
776dc384 | 331 | struct host1x *host1x = dev_get_drvdata(drm->dev->parent); |
d43f81cb | 332 | struct drm_tegra_syncpt_wait *args = data; |
776dc384 | 333 | struct host1x_syncpt *sp; |
d43f81cb | 334 | |
776dc384 | 335 | sp = host1x_syncpt_get(host1x, args->id); |
d43f81cb TB |
336 | if (!sp) |
337 | return -EINVAL; | |
338 | ||
339 | return host1x_syncpt_wait(sp, args->thresh, args->timeout, | |
340 | &args->value); | |
341 | } | |
342 | ||
343 | static int tegra_open_channel(struct drm_device *drm, void *data, | |
344 | struct drm_file *file) | |
345 | { | |
08943e6c | 346 | struct tegra_drm_file *fpriv = file->driver_priv; |
386a2a71 | 347 | struct tegra_drm *tegra = drm->dev_private; |
d43f81cb | 348 | struct drm_tegra_open_channel *args = data; |
c88c3630 | 349 | struct tegra_drm_context *context; |
53fa7f72 | 350 | struct tegra_drm_client *client; |
d43f81cb TB |
351 | int err = -ENODEV; |
352 | ||
353 | context = kzalloc(sizeof(*context), GFP_KERNEL); | |
354 | if (!context) | |
355 | return -ENOMEM; | |
356 | ||
776dc384 | 357 | list_for_each_entry(client, &tegra->clients, list) |
53fa7f72 | 358 | if (client->base.class == args->client) { |
d43f81cb TB |
359 | err = client->ops->open_channel(client, context); |
360 | if (err) | |
361 | break; | |
362 | ||
d43f81cb TB |
363 | list_add(&context->list, &fpriv->contexts); |
364 | args->context = (uintptr_t)context; | |
53fa7f72 | 365 | context->client = client; |
d43f81cb TB |
366 | return 0; |
367 | } | |
368 | ||
369 | kfree(context); | |
370 | return err; | |
371 | } | |
372 | ||
373 | static int tegra_close_channel(struct drm_device *drm, void *data, | |
374 | struct drm_file *file) | |
375 | { | |
08943e6c | 376 | struct tegra_drm_file *fpriv = file->driver_priv; |
776dc384 | 377 | struct drm_tegra_close_channel *args = data; |
c88c3630 TR |
378 | struct tegra_drm_context *context; |
379 | ||
380 | context = tegra_drm_get_context(args->context); | |
d43f81cb | 381 | |
08943e6c | 382 | if (!tegra_drm_file_owns_context(fpriv, context)) |
d43f81cb TB |
383 | return -EINVAL; |
384 | ||
385 | list_del(&context->list); | |
c88c3630 | 386 | tegra_drm_context_free(context); |
d43f81cb TB |
387 | |
388 | return 0; | |
389 | } | |
390 | ||
391 | static int tegra_get_syncpt(struct drm_device *drm, void *data, | |
392 | struct drm_file *file) | |
393 | { | |
08943e6c | 394 | struct tegra_drm_file *fpriv = file->driver_priv; |
d43f81cb | 395 | struct drm_tegra_get_syncpt *args = data; |
c88c3630 | 396 | struct tegra_drm_context *context; |
d43f81cb TB |
397 | struct host1x_syncpt *syncpt; |
398 | ||
c88c3630 TR |
399 | context = tegra_drm_get_context(args->context); |
400 | ||
08943e6c | 401 | if (!tegra_drm_file_owns_context(fpriv, context)) |
d43f81cb TB |
402 | return -ENODEV; |
403 | ||
53fa7f72 | 404 | if (args->index >= context->client->base.num_syncpts) |
d43f81cb TB |
405 | return -EINVAL; |
406 | ||
53fa7f72 | 407 | syncpt = context->client->base.syncpts[args->index]; |
d43f81cb TB |
408 | args->id = host1x_syncpt_id(syncpt); |
409 | ||
410 | return 0; | |
411 | } | |
412 | ||
413 | static int tegra_submit(struct drm_device *drm, void *data, | |
414 | struct drm_file *file) | |
415 | { | |
08943e6c | 416 | struct tegra_drm_file *fpriv = file->driver_priv; |
d43f81cb | 417 | struct drm_tegra_submit *args = data; |
c88c3630 TR |
418 | struct tegra_drm_context *context; |
419 | ||
420 | context = tegra_drm_get_context(args->context); | |
d43f81cb | 421 | |
08943e6c | 422 | if (!tegra_drm_file_owns_context(fpriv, context)) |
d43f81cb TB |
423 | return -ENODEV; |
424 | ||
425 | return context->client->ops->submit(context, args, drm, file); | |
426 | } | |
c54a169b AM |
427 | |
428 | static int tegra_get_syncpt_base(struct drm_device *drm, void *data, | |
429 | struct drm_file *file) | |
430 | { | |
431 | struct tegra_drm_file *fpriv = file->driver_priv; | |
432 | struct drm_tegra_get_syncpt_base *args = data; | |
433 | struct tegra_drm_context *context; | |
434 | struct host1x_syncpt_base *base; | |
435 | struct host1x_syncpt *syncpt; | |
436 | ||
437 | context = tegra_drm_get_context(args->context); | |
438 | ||
439 | if (!tegra_drm_file_owns_context(fpriv, context)) | |
440 | return -ENODEV; | |
441 | ||
442 | if (args->syncpt >= context->client->base.num_syncpts) | |
443 | return -EINVAL; | |
444 | ||
445 | syncpt = context->client->base.syncpts[args->syncpt]; | |
446 | ||
447 | base = host1x_syncpt_get_base(syncpt); | |
448 | if (!base) | |
449 | return -ENXIO; | |
450 | ||
451 | args->id = host1x_syncpt_base_id(base); | |
452 | ||
453 | return 0; | |
454 | } | |
d43f81cb TB |
455 | #endif |
456 | ||
baa70943 | 457 | static const struct drm_ioctl_desc tegra_drm_ioctls[] = { |
d43f81cb TB |
458 | #ifdef CONFIG_DRM_TEGRA_STAGING |
459 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, DRM_UNLOCKED | DRM_AUTH), | |
460 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, DRM_UNLOCKED), | |
461 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, DRM_UNLOCKED), | |
462 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, DRM_UNLOCKED), | |
463 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, DRM_UNLOCKED), | |
464 | DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, DRM_UNLOCKED), | |
465 | DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, DRM_UNLOCKED), | |
466 | DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, DRM_UNLOCKED), | |
467 | DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, DRM_UNLOCKED), | |
c54a169b | 468 | DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, DRM_UNLOCKED), |
d43f81cb | 469 | #endif |
d8f4a9ed TR |
470 | }; |
471 | ||
472 | static const struct file_operations tegra_drm_fops = { | |
473 | .owner = THIS_MODULE, | |
474 | .open = drm_open, | |
475 | .release = drm_release, | |
476 | .unlocked_ioctl = drm_ioctl, | |
de2ba664 | 477 | .mmap = tegra_drm_mmap, |
d8f4a9ed | 478 | .poll = drm_poll, |
d8f4a9ed TR |
479 | .read = drm_read, |
480 | #ifdef CONFIG_COMPAT | |
481 | .compat_ioctl = drm_compat_ioctl, | |
482 | #endif | |
483 | .llseek = noop_llseek, | |
484 | }; | |
485 | ||
6e5ff998 TR |
486 | static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm, int pipe) |
487 | { | |
488 | struct drm_crtc *crtc; | |
489 | ||
490 | list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) { | |
491 | struct tegra_dc *dc = to_tegra_dc(crtc); | |
492 | ||
493 | if (dc->pipe == pipe) | |
494 | return crtc; | |
495 | } | |
496 | ||
497 | return NULL; | |
498 | } | |
499 | ||
500 | static u32 tegra_drm_get_vblank_counter(struct drm_device *dev, int crtc) | |
501 | { | |
502 | /* TODO: implement real hardware counter using syncpoints */ | |
503 | return drm_vblank_count(dev, crtc); | |
504 | } | |
505 | ||
506 | static int tegra_drm_enable_vblank(struct drm_device *drm, int pipe) | |
507 | { | |
508 | struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe); | |
509 | struct tegra_dc *dc = to_tegra_dc(crtc); | |
510 | ||
511 | if (!crtc) | |
512 | return -ENODEV; | |
513 | ||
514 | tegra_dc_enable_vblank(dc); | |
515 | ||
516 | return 0; | |
517 | } | |
518 | ||
519 | static void tegra_drm_disable_vblank(struct drm_device *drm, int pipe) | |
520 | { | |
521 | struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe); | |
522 | struct tegra_dc *dc = to_tegra_dc(crtc); | |
523 | ||
524 | if (crtc) | |
525 | tegra_dc_disable_vblank(dc); | |
526 | } | |
527 | ||
3c03c46a TR |
528 | static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file) |
529 | { | |
08943e6c | 530 | struct tegra_drm_file *fpriv = file->driver_priv; |
c88c3630 | 531 | struct tegra_drm_context *context, *tmp; |
3c03c46a TR |
532 | struct drm_crtc *crtc; |
533 | ||
534 | list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) | |
535 | tegra_dc_cancel_page_flip(crtc, file); | |
d43f81cb TB |
536 | |
537 | list_for_each_entry_safe(context, tmp, &fpriv->contexts, list) | |
c88c3630 | 538 | tegra_drm_context_free(context); |
d43f81cb TB |
539 | |
540 | kfree(fpriv); | |
3c03c46a TR |
541 | } |
542 | ||
e450fcc6 TR |
543 | #ifdef CONFIG_DEBUG_FS |
544 | static int tegra_debugfs_framebuffers(struct seq_file *s, void *data) | |
545 | { | |
546 | struct drm_info_node *node = (struct drm_info_node *)s->private; | |
547 | struct drm_device *drm = node->minor->dev; | |
548 | struct drm_framebuffer *fb; | |
549 | ||
550 | mutex_lock(&drm->mode_config.fb_lock); | |
551 | ||
552 | list_for_each_entry(fb, &drm->mode_config.fb_list, head) { | |
553 | seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n", | |
554 | fb->base.id, fb->width, fb->height, fb->depth, | |
555 | fb->bits_per_pixel, | |
556 | atomic_read(&fb->refcount.refcount)); | |
557 | } | |
558 | ||
559 | mutex_unlock(&drm->mode_config.fb_lock); | |
560 | ||
561 | return 0; | |
562 | } | |
563 | ||
564 | static struct drm_info_list tegra_debugfs_list[] = { | |
565 | { "framebuffers", tegra_debugfs_framebuffers, 0 }, | |
566 | }; | |
567 | ||
568 | static int tegra_debugfs_init(struct drm_minor *minor) | |
569 | { | |
570 | return drm_debugfs_create_files(tegra_debugfs_list, | |
571 | ARRAY_SIZE(tegra_debugfs_list), | |
572 | minor->debugfs_root, minor); | |
573 | } | |
574 | ||
575 | static void tegra_debugfs_cleanup(struct drm_minor *minor) | |
576 | { | |
577 | drm_debugfs_remove_files(tegra_debugfs_list, | |
578 | ARRAY_SIZE(tegra_debugfs_list), minor); | |
579 | } | |
580 | #endif | |
581 | ||
9b57f5f2 | 582 | static struct drm_driver tegra_drm_driver = { |
604faa7d | 583 | .driver_features = DRIVER_MODESET | DRIVER_GEM, |
d8f4a9ed TR |
584 | .load = tegra_drm_load, |
585 | .unload = tegra_drm_unload, | |
586 | .open = tegra_drm_open, | |
3c03c46a | 587 | .preclose = tegra_drm_preclose, |
d8f4a9ed TR |
588 | .lastclose = tegra_drm_lastclose, |
589 | ||
6e5ff998 TR |
590 | .get_vblank_counter = tegra_drm_get_vblank_counter, |
591 | .enable_vblank = tegra_drm_enable_vblank, | |
592 | .disable_vblank = tegra_drm_disable_vblank, | |
593 | ||
e450fcc6 TR |
594 | #if defined(CONFIG_DEBUG_FS) |
595 | .debugfs_init = tegra_debugfs_init, | |
596 | .debugfs_cleanup = tegra_debugfs_cleanup, | |
597 | #endif | |
598 | ||
de2ba664 AM |
599 | .gem_free_object = tegra_bo_free_object, |
600 | .gem_vm_ops = &tegra_bo_vm_ops, | |
601 | .dumb_create = tegra_bo_dumb_create, | |
602 | .dumb_map_offset = tegra_bo_dumb_map_offset, | |
43387b37 | 603 | .dumb_destroy = drm_gem_dumb_destroy, |
d8f4a9ed TR |
604 | |
605 | .ioctls = tegra_drm_ioctls, | |
606 | .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls), | |
607 | .fops = &tegra_drm_fops, | |
608 | ||
609 | .name = DRIVER_NAME, | |
610 | .desc = DRIVER_DESC, | |
611 | .date = DRIVER_DATE, | |
612 | .major = DRIVER_MAJOR, | |
613 | .minor = DRIVER_MINOR, | |
614 | .patchlevel = DRIVER_PATCHLEVEL, | |
615 | }; | |
776dc384 TR |
616 | |
617 | int tegra_drm_register_client(struct tegra_drm *tegra, | |
618 | struct tegra_drm_client *client) | |
619 | { | |
620 | mutex_lock(&tegra->clients_lock); | |
621 | list_add_tail(&client->list, &tegra->clients); | |
622 | mutex_unlock(&tegra->clients_lock); | |
623 | ||
624 | return 0; | |
625 | } | |
626 | ||
627 | int tegra_drm_unregister_client(struct tegra_drm *tegra, | |
628 | struct tegra_drm_client *client) | |
629 | { | |
630 | mutex_lock(&tegra->clients_lock); | |
631 | list_del_init(&client->list); | |
632 | mutex_unlock(&tegra->clients_lock); | |
633 | ||
634 | return 0; | |
635 | } | |
636 | ||
637 | static int host1x_drm_probe(struct host1x_device *device) | |
638 | { | |
639 | return drm_host1x_init(&tegra_drm_driver, device); | |
640 | } | |
641 | ||
642 | static int host1x_drm_remove(struct host1x_device *device) | |
643 | { | |
644 | drm_host1x_exit(&tegra_drm_driver, device); | |
645 | ||
646 | return 0; | |
647 | } | |
648 | ||
649 | static const struct of_device_id host1x_drm_subdevs[] = { | |
650 | { .compatible = "nvidia,tegra20-dc", }, | |
651 | { .compatible = "nvidia,tegra20-hdmi", }, | |
652 | { .compatible = "nvidia,tegra20-gr2d", }, | |
5f60ed0d | 653 | { .compatible = "nvidia,tegra20-gr3d", }, |
776dc384 TR |
654 | { .compatible = "nvidia,tegra30-dc", }, |
655 | { .compatible = "nvidia,tegra30-hdmi", }, | |
656 | { .compatible = "nvidia,tegra30-gr2d", }, | |
5f60ed0d | 657 | { .compatible = "nvidia,tegra30-gr3d", }, |
dec72739 | 658 | { .compatible = "nvidia,tegra114-dsi", }, |
7d1d28ac | 659 | { .compatible = "nvidia,tegra114-hdmi", }, |
5f60ed0d | 660 | { .compatible = "nvidia,tegra114-gr3d", }, |
8620fc62 | 661 | { .compatible = "nvidia,tegra124-dc", }, |
776dc384 TR |
662 | { /* sentinel */ } |
663 | }; | |
664 | ||
665 | static struct host1x_driver host1x_drm_driver = { | |
666 | .name = "drm", | |
667 | .probe = host1x_drm_probe, | |
668 | .remove = host1x_drm_remove, | |
669 | .subdevs = host1x_drm_subdevs, | |
670 | }; | |
671 | ||
672 | static int __init host1x_drm_init(void) | |
673 | { | |
674 | int err; | |
675 | ||
676 | err = host1x_driver_register(&host1x_drm_driver); | |
677 | if (err < 0) | |
678 | return err; | |
679 | ||
680 | err = platform_driver_register(&tegra_dc_driver); | |
681 | if (err < 0) | |
682 | goto unregister_host1x; | |
683 | ||
dec72739 | 684 | err = platform_driver_register(&tegra_dsi_driver); |
776dc384 TR |
685 | if (err < 0) |
686 | goto unregister_dc; | |
687 | ||
dec72739 TR |
688 | err = platform_driver_register(&tegra_hdmi_driver); |
689 | if (err < 0) | |
690 | goto unregister_dsi; | |
691 | ||
776dc384 TR |
692 | err = platform_driver_register(&tegra_gr2d_driver); |
693 | if (err < 0) | |
694 | goto unregister_hdmi; | |
695 | ||
5f60ed0d TR |
696 | err = platform_driver_register(&tegra_gr3d_driver); |
697 | if (err < 0) | |
698 | goto unregister_gr2d; | |
699 | ||
776dc384 TR |
700 | return 0; |
701 | ||
5f60ed0d TR |
702 | unregister_gr2d: |
703 | platform_driver_unregister(&tegra_gr2d_driver); | |
776dc384 TR |
704 | unregister_hdmi: |
705 | platform_driver_unregister(&tegra_hdmi_driver); | |
dec72739 TR |
706 | unregister_dsi: |
707 | platform_driver_unregister(&tegra_dsi_driver); | |
776dc384 TR |
708 | unregister_dc: |
709 | platform_driver_unregister(&tegra_dc_driver); | |
710 | unregister_host1x: | |
711 | host1x_driver_unregister(&host1x_drm_driver); | |
712 | return err; | |
713 | } | |
714 | module_init(host1x_drm_init); | |
715 | ||
716 | static void __exit host1x_drm_exit(void) | |
717 | { | |
5f60ed0d | 718 | platform_driver_unregister(&tegra_gr3d_driver); |
776dc384 TR |
719 | platform_driver_unregister(&tegra_gr2d_driver); |
720 | platform_driver_unregister(&tegra_hdmi_driver); | |
dec72739 | 721 | platform_driver_unregister(&tegra_dsi_driver); |
776dc384 TR |
722 | platform_driver_unregister(&tegra_dc_driver); |
723 | host1x_driver_unregister(&host1x_drm_driver); | |
724 | } | |
725 | module_exit(host1x_drm_exit); | |
726 | ||
727 | MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>"); | |
728 | MODULE_DESCRIPTION("NVIDIA Tegra DRM driver"); | |
729 | MODULE_LICENSE("GPL v2"); |