Merge tag 'for-linus-20140808' of git://git.infradead.org/linux-mtd
[deliverable/linux.git] / drivers / gpu / drm / tegra / drm.h
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1/*
2 * Copyright (C) 2012 Avionic Design GmbH
d43f81cb 3 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
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4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
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10#ifndef HOST1X_DRM_H
11#define HOST1X_DRM_H 1
d8f4a9ed 12
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13#include <uapi/drm/tegra_drm.h>
14#include <linux/host1x.h>
15
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16#include <drm/drmP.h>
17#include <drm/drm_crtc_helper.h>
18#include <drm/drm_edid.h>
19#include <drm/drm_fb_helper.h>
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20#include <drm/drm_fixed.h>
21
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22#include "gem.h"
23
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24struct reset_control;
25
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26struct tegra_fb {
27 struct drm_framebuffer base;
28 struct tegra_bo **planes;
29 unsigned int num_planes;
30};
31
60c2f709 32#ifdef CONFIG_DRM_TEGRA_FBDEV
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33struct tegra_fbdev {
34 struct drm_fb_helper base;
35 struct tegra_fb *fb;
36};
60c2f709 37#endif
de2ba664 38
386a2a71 39struct tegra_drm {
d8f4a9ed 40 struct drm_device *drm;
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41
42 struct mutex clients_lock;
43 struct list_head clients;
44
60c2f709 45#ifdef CONFIG_DRM_TEGRA_FBDEV
de2ba664 46 struct tegra_fbdev *fbdev;
60c2f709 47#endif
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48
49 unsigned int pitch_align;
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50};
51
53fa7f72 52struct tegra_drm_client;
d8f4a9ed 53
c88c3630 54struct tegra_drm_context {
53fa7f72 55 struct tegra_drm_client *client;
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56 struct host1x_channel *channel;
57 struct list_head list;
58};
59
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60struct tegra_drm_client_ops {
61 int (*open_channel)(struct tegra_drm_client *client,
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62 struct tegra_drm_context *context);
63 void (*close_channel)(struct tegra_drm_context *context);
c40f0f1a 64 int (*is_addr_reg)(struct device *dev, u32 class, u32 offset);
c88c3630 65 int (*submit)(struct tegra_drm_context *context,
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66 struct drm_tegra_submit *args, struct drm_device *drm,
67 struct drm_file *file);
68};
69
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70int tegra_drm_submit(struct tegra_drm_context *context,
71 struct drm_tegra_submit *args, struct drm_device *drm,
72 struct drm_file *file);
73
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74struct tegra_drm_client {
75 struct host1x_client base;
776dc384 76 struct list_head list;
d43f81cb 77
53fa7f72 78 const struct tegra_drm_client_ops *ops;
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79};
80
53fa7f72 81static inline struct tegra_drm_client *
776dc384 82host1x_to_drm_client(struct host1x_client *client)
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83{
84 return container_of(client, struct tegra_drm_client, base);
85}
86
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87int tegra_drm_register_client(struct tegra_drm *tegra,
88 struct tegra_drm_client *client);
89int tegra_drm_unregister_client(struct tegra_drm *tegra,
90 struct tegra_drm_client *client);
776dc384 91
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92int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm);
93int tegra_drm_exit(struct tegra_drm *tegra);
d8f4a9ed 94
8620fc62 95struct tegra_dc_soc_info;
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96struct tegra_output;
97
98struct tegra_dc {
776dc384 99 struct host1x_client client;
d8f4a9ed 100 struct device *dev;
d18d3033 101 spinlock_t lock;
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102
103 struct drm_crtc base;
104 int pipe;
105
106 struct clk *clk;
ca48080a 107 struct reset_control *rst;
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108 void __iomem *regs;
109 int irq;
110
111 struct tegra_output *rgb;
112
113 struct list_head list;
114
115 struct drm_info_list *debugfs_files;
116 struct drm_minor *minor;
117 struct dentry *debugfs;
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118
119 /* page-flip handling */
120 struct drm_pending_vblank_event *event;
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121
122 const struct tegra_dc_soc_info *soc;
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123};
124
53fa7f72 125static inline struct tegra_dc *
776dc384 126host1x_client_to_dc(struct host1x_client *client)
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127{
128 return container_of(client, struct tegra_dc, client);
129}
130
131static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)
132{
37826519 133 return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;
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134}
135
136static inline void tegra_dc_writel(struct tegra_dc *dc, unsigned long value,
137 unsigned long reg)
138{
139 writel(value, dc->regs + (reg << 2));
140}
141
142static inline unsigned long tegra_dc_readl(struct tegra_dc *dc,
143 unsigned long reg)
144{
145 return readl(dc->regs + (reg << 2));
146}
147
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148struct tegra_dc_window {
149 struct {
150 unsigned int x;
151 unsigned int y;
152 unsigned int w;
153 unsigned int h;
154 } src;
155 struct {
156 unsigned int x;
157 unsigned int y;
158 unsigned int w;
159 unsigned int h;
160 } dst;
161 unsigned int bits_per_pixel;
162 unsigned int format;
f925390e 163 unsigned int swap;
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164 unsigned int stride[2];
165 unsigned long base[3];
db7fbdfd 166 bool bottom_up;
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167
168 struct tegra_bo_tiling tiling;
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169};
170
171/* from dc.c */
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172void tegra_dc_enable_vblank(struct tegra_dc *dc);
173void tegra_dc_disable_vblank(struct tegra_dc *dc);
174void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
f34bc787 175
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176struct tegra_output_ops {
177 int (*enable)(struct tegra_output *output);
178 int (*disable)(struct tegra_output *output);
179 int (*setup_clock)(struct tegra_output *output, struct clk *clk,
91eded9b 180 unsigned long pclk, unsigned int *div);
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181 int (*check_mode)(struct tegra_output *output,
182 struct drm_display_mode *mode,
183 enum drm_mode_status *status);
6b6b6042 184 enum drm_connector_status (*detect)(struct tegra_output *output);
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185};
186
187enum tegra_output_type {
188 TEGRA_OUTPUT_RGB,
edec4af4 189 TEGRA_OUTPUT_HDMI,
dec72739 190 TEGRA_OUTPUT_DSI,
6b6b6042 191 TEGRA_OUTPUT_EDP,
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192};
193
194struct tegra_output {
195 struct device_node *of_node;
196 struct device *dev;
197
198 const struct tegra_output_ops *ops;
199 enum tegra_output_type type;
200
9be7d864 201 struct drm_panel *panel;
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202 struct i2c_adapter *ddc;
203 const struct edid *edid;
204 unsigned int hpd_irq;
205 int hpd_gpio;
206
207 struct drm_encoder encoder;
208 struct drm_connector connector;
209};
210
211static inline struct tegra_output *encoder_to_output(struct drm_encoder *e)
212{
213 return container_of(e, struct tegra_output, encoder);
214}
215
216static inline struct tegra_output *connector_to_output(struct drm_connector *c)
217{
218 return container_of(c, struct tegra_output, connector);
219}
220
221static inline int tegra_output_enable(struct tegra_output *output)
222{
223 if (output && output->ops && output->ops->enable)
224 return output->ops->enable(output);
225
226 return output ? -ENOSYS : -EINVAL;
227}
228
229static inline int tegra_output_disable(struct tegra_output *output)
230{
231 if (output && output->ops && output->ops->disable)
232 return output->ops->disable(output);
233
234 return output ? -ENOSYS : -EINVAL;
235}
236
237static inline int tegra_output_setup_clock(struct tegra_output *output,
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238 struct clk *clk, unsigned long pclk,
239 unsigned int *div)
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240{
241 if (output && output->ops && output->ops->setup_clock)
91eded9b 242 return output->ops->setup_clock(output, clk, pclk, div);
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243
244 return output ? -ENOSYS : -EINVAL;
245}
246
247static inline int tegra_output_check_mode(struct tegra_output *output,
248 struct drm_display_mode *mode,
249 enum drm_mode_status *status)
250{
251 if (output && output->ops && output->ops->check_mode)
252 return output->ops->check_mode(output, mode, status);
253
254 return output ? -ENOSYS : -EINVAL;
255}
256
257/* from rgb.c */
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258int tegra_dc_rgb_probe(struct tegra_dc *dc);
259int tegra_dc_rgb_remove(struct tegra_dc *dc);
260int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc);
261int tegra_dc_rgb_exit(struct tegra_dc *dc);
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262
263/* from output.c */
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264int tegra_output_probe(struct tegra_output *output);
265int tegra_output_remove(struct tegra_output *output);
266int tegra_output_init(struct drm_device *drm, struct tegra_output *output);
267int tegra_output_exit(struct tegra_output *output);
d8f4a9ed 268
6b6b6042 269/* from dpaux.c */
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270struct tegra_dpaux;
271struct drm_dp_link;
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272
273struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np);
274enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux);
275int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output);
276int tegra_dpaux_detach(struct tegra_dpaux *dpaux);
277int tegra_dpaux_enable(struct tegra_dpaux *dpaux);
278int tegra_dpaux_disable(struct tegra_dpaux *dpaux);
279int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding);
280int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link,
281 u8 pattern);
282
d8f4a9ed 283/* from fb.c */
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284struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
285 unsigned int index);
db7fbdfd 286bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer);
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287int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer,
288 struct tegra_bo_tiling *tiling);
e2215321 289int tegra_drm_fb_prepare(struct drm_device *drm);
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290int tegra_drm_fb_init(struct drm_device *drm);
291void tegra_drm_fb_exit(struct drm_device *drm);
60c2f709 292#ifdef CONFIG_DRM_TEGRA_FBDEV
688c59af 293void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev);
60c2f709 294#endif
d8f4a9ed 295
776dc384 296extern struct platform_driver tegra_dc_driver;
dec72739 297extern struct platform_driver tegra_dsi_driver;
6b6b6042 298extern struct platform_driver tegra_sor_driver;
776dc384 299extern struct platform_driver tegra_hdmi_driver;
6b6b6042 300extern struct platform_driver tegra_dpaux_driver;
776dc384 301extern struct platform_driver tegra_gr2d_driver;
5f60ed0d 302extern struct platform_driver tegra_gr3d_driver;
d8f4a9ed 303
4231c6b0 304#endif /* HOST1X_DRM_H */
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