Commit | Line | Data |
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d8f4a9ed TR |
1 | /* |
2 | * Copyright (C) 2012 Avionic Design GmbH | |
d43f81cb | 3 | * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved. |
d8f4a9ed TR |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
4231c6b0 TB |
10 | #ifndef HOST1X_DRM_H |
11 | #define HOST1X_DRM_H 1 | |
d8f4a9ed | 12 | |
e1e90644 TR |
13 | #include <uapi/drm/tegra_drm.h> |
14 | #include <linux/host1x.h> | |
fb36d0ee | 15 | #include <linux/of_gpio.h> |
e1e90644 | 16 | |
d8f4a9ed TR |
17 | #include <drm/drmP.h> |
18 | #include <drm/drm_crtc_helper.h> | |
19 | #include <drm/drm_edid.h> | |
20 | #include <drm/drm_fb_helper.h> | |
d8f4a9ed TR |
21 | #include <drm/drm_fixed.h> |
22 | ||
c134f019 TR |
23 | #include "gem.h" |
24 | ||
ca48080a SW |
25 | struct reset_control; |
26 | ||
de2ba664 AM |
27 | struct tegra_fb { |
28 | struct drm_framebuffer base; | |
29 | struct tegra_bo **planes; | |
30 | unsigned int num_planes; | |
31 | }; | |
32 | ||
60c2f709 | 33 | #ifdef CONFIG_DRM_TEGRA_FBDEV |
de2ba664 AM |
34 | struct tegra_fbdev { |
35 | struct drm_fb_helper base; | |
36 | struct tegra_fb *fb; | |
37 | }; | |
60c2f709 | 38 | #endif |
de2ba664 | 39 | |
386a2a71 | 40 | struct tegra_drm { |
d8f4a9ed | 41 | struct drm_device *drm; |
d8f4a9ed | 42 | |
df06b759 TR |
43 | struct iommu_domain *domain; |
44 | struct drm_mm mm; | |
45 | ||
d8f4a9ed TR |
46 | struct mutex clients_lock; |
47 | struct list_head clients; | |
48 | ||
60c2f709 | 49 | #ifdef CONFIG_DRM_TEGRA_FBDEV |
de2ba664 | 50 | struct tegra_fbdev *fbdev; |
60c2f709 | 51 | #endif |
d1f3e1e0 TR |
52 | |
53 | unsigned int pitch_align; | |
1503ca47 TR |
54 | |
55 | struct { | |
56 | struct drm_atomic_state *state; | |
57 | struct work_struct work; | |
58 | struct mutex lock; | |
59 | } commit; | |
d8f4a9ed TR |
60 | }; |
61 | ||
53fa7f72 | 62 | struct tegra_drm_client; |
d8f4a9ed | 63 | |
c88c3630 | 64 | struct tegra_drm_context { |
53fa7f72 | 65 | struct tegra_drm_client *client; |
d43f81cb TB |
66 | struct host1x_channel *channel; |
67 | struct list_head list; | |
68 | }; | |
69 | ||
53fa7f72 TR |
70 | struct tegra_drm_client_ops { |
71 | int (*open_channel)(struct tegra_drm_client *client, | |
c88c3630 TR |
72 | struct tegra_drm_context *context); |
73 | void (*close_channel)(struct tegra_drm_context *context); | |
c40f0f1a | 74 | int (*is_addr_reg)(struct device *dev, u32 class, u32 offset); |
c88c3630 | 75 | int (*submit)(struct tegra_drm_context *context, |
d43f81cb TB |
76 | struct drm_tegra_submit *args, struct drm_device *drm, |
77 | struct drm_file *file); | |
78 | }; | |
79 | ||
c40f0f1a TR |
80 | int tegra_drm_submit(struct tegra_drm_context *context, |
81 | struct drm_tegra_submit *args, struct drm_device *drm, | |
82 | struct drm_file *file); | |
83 | ||
53fa7f72 TR |
84 | struct tegra_drm_client { |
85 | struct host1x_client base; | |
776dc384 | 86 | struct list_head list; |
d43f81cb | 87 | |
53fa7f72 | 88 | const struct tegra_drm_client_ops *ops; |
d8f4a9ed TR |
89 | }; |
90 | ||
53fa7f72 | 91 | static inline struct tegra_drm_client * |
776dc384 | 92 | host1x_to_drm_client(struct host1x_client *client) |
53fa7f72 TR |
93 | { |
94 | return container_of(client, struct tegra_drm_client, base); | |
95 | } | |
96 | ||
688c59af TR |
97 | int tegra_drm_register_client(struct tegra_drm *tegra, |
98 | struct tegra_drm_client *client); | |
99 | int tegra_drm_unregister_client(struct tegra_drm *tegra, | |
100 | struct tegra_drm_client *client); | |
776dc384 | 101 | |
688c59af TR |
102 | int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm); |
103 | int tegra_drm_exit(struct tegra_drm *tegra); | |
d8f4a9ed | 104 | |
8620fc62 | 105 | struct tegra_dc_soc_info; |
d8f4a9ed TR |
106 | struct tegra_output; |
107 | ||
791ddb1e TR |
108 | struct tegra_dc_stats { |
109 | unsigned long frames; | |
110 | unsigned long vblank; | |
111 | unsigned long underflow; | |
112 | unsigned long overflow; | |
113 | }; | |
114 | ||
d8f4a9ed | 115 | struct tegra_dc { |
776dc384 | 116 | struct host1x_client client; |
42e9ce05 | 117 | struct host1x_syncpt *syncpt; |
d8f4a9ed | 118 | struct device *dev; |
d18d3033 | 119 | spinlock_t lock; |
d8f4a9ed TR |
120 | |
121 | struct drm_crtc base; | |
9c012700 | 122 | int powergate; |
d8f4a9ed TR |
123 | int pipe; |
124 | ||
125 | struct clk *clk; | |
ca48080a | 126 | struct reset_control *rst; |
d8f4a9ed TR |
127 | void __iomem *regs; |
128 | int irq; | |
129 | ||
130 | struct tegra_output *rgb; | |
131 | ||
791ddb1e | 132 | struct tegra_dc_stats stats; |
d8f4a9ed TR |
133 | struct list_head list; |
134 | ||
135 | struct drm_info_list *debugfs_files; | |
136 | struct drm_minor *minor; | |
137 | struct dentry *debugfs; | |
3c03c46a TR |
138 | |
139 | /* page-flip handling */ | |
140 | struct drm_pending_vblank_event *event; | |
8620fc62 TR |
141 | |
142 | const struct tegra_dc_soc_info *soc; | |
df06b759 TR |
143 | |
144 | struct iommu_domain *domain; | |
d8f4a9ed TR |
145 | }; |
146 | ||
53fa7f72 | 147 | static inline struct tegra_dc * |
776dc384 | 148 | host1x_client_to_dc(struct host1x_client *client) |
d8f4a9ed TR |
149 | { |
150 | return container_of(client, struct tegra_dc, client); | |
151 | } | |
152 | ||
153 | static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc) | |
154 | { | |
37826519 | 155 | return crtc ? container_of(crtc, struct tegra_dc, base) : NULL; |
d8f4a9ed TR |
156 | } |
157 | ||
03a60569 TR |
158 | static inline void tegra_dc_writel(struct tegra_dc *dc, u32 value, |
159 | unsigned long offset) | |
d8f4a9ed | 160 | { |
03a60569 | 161 | writel(value, dc->regs + (offset << 2)); |
d8f4a9ed TR |
162 | } |
163 | ||
03a60569 | 164 | static inline u32 tegra_dc_readl(struct tegra_dc *dc, unsigned long offset) |
d8f4a9ed | 165 | { |
03a60569 | 166 | return readl(dc->regs + (offset << 2)); |
d8f4a9ed TR |
167 | } |
168 | ||
f34bc787 TR |
169 | struct tegra_dc_window { |
170 | struct { | |
171 | unsigned int x; | |
172 | unsigned int y; | |
173 | unsigned int w; | |
174 | unsigned int h; | |
175 | } src; | |
176 | struct { | |
177 | unsigned int x; | |
178 | unsigned int y; | |
179 | unsigned int w; | |
180 | unsigned int h; | |
181 | } dst; | |
182 | unsigned int bits_per_pixel; | |
f34bc787 TR |
183 | unsigned int stride[2]; |
184 | unsigned long base[3]; | |
db7fbdfd | 185 | bool bottom_up; |
c134f019 TR |
186 | |
187 | struct tegra_bo_tiling tiling; | |
8f604f8c TR |
188 | u32 format; |
189 | u32 swap; | |
f34bc787 TR |
190 | }; |
191 | ||
192 | /* from dc.c */ | |
42e9ce05 | 193 | u32 tegra_dc_get_vblank_counter(struct tegra_dc *dc); |
688c59af TR |
194 | void tegra_dc_enable_vblank(struct tegra_dc *dc); |
195 | void tegra_dc_disable_vblank(struct tegra_dc *dc); | |
196 | void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file); | |
62b9e063 | 197 | void tegra_dc_commit(struct tegra_dc *dc); |
ca915b10 TR |
198 | int tegra_dc_state_setup_clock(struct tegra_dc *dc, |
199 | struct drm_crtc_state *crtc_state, | |
200 | struct clk *clk, unsigned long pclk, | |
201 | unsigned int div); | |
f34bc787 | 202 | |
d8f4a9ed TR |
203 | struct tegra_output { |
204 | struct device_node *of_node; | |
205 | struct device *dev; | |
206 | ||
9be7d864 | 207 | struct drm_panel *panel; |
d8f4a9ed TR |
208 | struct i2c_adapter *ddc; |
209 | const struct edid *edid; | |
210 | unsigned int hpd_irq; | |
211 | int hpd_gpio; | |
fb36d0ee | 212 | enum of_gpio_flags hpd_gpio_flags; |
d8f4a9ed TR |
213 | |
214 | struct drm_encoder encoder; | |
215 | struct drm_connector connector; | |
216 | }; | |
217 | ||
218 | static inline struct tegra_output *encoder_to_output(struct drm_encoder *e) | |
219 | { | |
220 | return container_of(e, struct tegra_output, encoder); | |
221 | } | |
222 | ||
223 | static inline struct tegra_output *connector_to_output(struct drm_connector *c) | |
224 | { | |
225 | return container_of(c, struct tegra_output, connector); | |
226 | } | |
227 | ||
d8f4a9ed | 228 | /* from rgb.c */ |
688c59af TR |
229 | int tegra_dc_rgb_probe(struct tegra_dc *dc); |
230 | int tegra_dc_rgb_remove(struct tegra_dc *dc); | |
231 | int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc); | |
232 | int tegra_dc_rgb_exit(struct tegra_dc *dc); | |
d8f4a9ed TR |
233 | |
234 | /* from output.c */ | |
688c59af | 235 | int tegra_output_probe(struct tegra_output *output); |
328ec69e | 236 | void tegra_output_remove(struct tegra_output *output); |
688c59af | 237 | int tegra_output_init(struct drm_device *drm, struct tegra_output *output); |
328ec69e | 238 | void tegra_output_exit(struct tegra_output *output); |
d8f4a9ed | 239 | |
132085d8 TR |
240 | int tegra_output_connector_get_modes(struct drm_connector *connector); |
241 | struct drm_encoder * | |
242 | tegra_output_connector_best_encoder(struct drm_connector *connector); | |
243 | enum drm_connector_status | |
244 | tegra_output_connector_detect(struct drm_connector *connector, bool force); | |
245 | void tegra_output_connector_destroy(struct drm_connector *connector); | |
246 | ||
247 | void tegra_output_encoder_destroy(struct drm_encoder *encoder); | |
248 | ||
6b6b6042 | 249 | /* from dpaux.c */ |
6b6b6042 TR |
250 | struct tegra_dpaux; |
251 | struct drm_dp_link; | |
6b6b6042 TR |
252 | |
253 | struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np); | |
254 | enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux); | |
255 | int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output); | |
256 | int tegra_dpaux_detach(struct tegra_dpaux *dpaux); | |
257 | int tegra_dpaux_enable(struct tegra_dpaux *dpaux); | |
258 | int tegra_dpaux_disable(struct tegra_dpaux *dpaux); | |
259 | int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding); | |
260 | int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link, | |
261 | u8 pattern); | |
262 | ||
d8f4a9ed | 263 | /* from fb.c */ |
de2ba664 AM |
264 | struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer, |
265 | unsigned int index); | |
db7fbdfd | 266 | bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer); |
c134f019 TR |
267 | int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer, |
268 | struct tegra_bo_tiling *tiling); | |
f9914214 TR |
269 | struct drm_framebuffer *tegra_fb_create(struct drm_device *drm, |
270 | struct drm_file *file, | |
271 | struct drm_mode_fb_cmd2 *cmd); | |
e2215321 | 272 | int tegra_drm_fb_prepare(struct drm_device *drm); |
1d1e6fe9 | 273 | void tegra_drm_fb_free(struct drm_device *drm); |
688c59af TR |
274 | int tegra_drm_fb_init(struct drm_device *drm); |
275 | void tegra_drm_fb_exit(struct drm_device *drm); | |
60c2f709 | 276 | #ifdef CONFIG_DRM_TEGRA_FBDEV |
688c59af | 277 | void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev); |
f9914214 | 278 | void tegra_fb_output_poll_changed(struct drm_device *drm); |
60c2f709 | 279 | #endif |
d8f4a9ed | 280 | |
776dc384 | 281 | extern struct platform_driver tegra_dc_driver; |
dec72739 | 282 | extern struct platform_driver tegra_dsi_driver; |
6b6b6042 | 283 | extern struct platform_driver tegra_sor_driver; |
776dc384 | 284 | extern struct platform_driver tegra_hdmi_driver; |
6b6b6042 | 285 | extern struct platform_driver tegra_dpaux_driver; |
776dc384 | 286 | extern struct platform_driver tegra_gr2d_driver; |
5f60ed0d | 287 | extern struct platform_driver tegra_gr3d_driver; |
d8f4a9ed | 288 | |
4231c6b0 | 289 | #endif /* HOST1X_DRM_H */ |