[deliverable/linux.git] / drivers / gpu / drm / virtio / virtgpu_display.c

/*
 * Copyright (C) 2015 Red Hat, Inc.
 * All Rights Reserved.
 *
 * Authors:
 *    Dave Airlie
 *    Alon Levy
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include "virtgpu_drv.h"
#include <drm/drm_crtc_helper.h>
#include <drm/drm_atomic_helper.h>

#define XRES_MIN   320
#define YRES_MIN   200

#define XRES_DEF  1024
#define YRES_DEF   768

#define XRES_MAX  8192
#define YRES_MAX  8192

static void
virtio_gpu_hide_cursor(struct virtio_gpu_device *vgdev,
		       struct virtio_gpu_output *output)
{
	output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
	output->cursor.resource_id = 0;
	virtio_gpu_cursor_ping(vgdev, output);
}

static int virtio_gpu_crtc_cursor_set(struct drm_crtc *crtc,
				      struct drm_file *file_priv,
				      uint32_t handle,
				      uint32_t width,
				      uint32_t height,
				      int32_t hot_x, int32_t hot_y)
{
	struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
	struct virtio_gpu_output *output =
		container_of(crtc, struct virtio_gpu_output, crtc);
	struct drm_gem_object *gobj = NULL;
	struct virtio_gpu_object *qobj = NULL;
	struct virtio_gpu_fence *fence = NULL;
	int ret = 0;

	if (handle == 0) {
		virtio_gpu_hide_cursor(vgdev, output);
		return 0;
	}

	/* lookup the cursor */
	gobj = drm_gem_object_lookup(file_priv, handle);
	if (gobj == NULL)
		return -ENOENT;

	qobj = gem_to_virtio_gpu_obj(gobj);

	if (!qobj->hw_res_handle) {
		ret = -EINVAL;
		goto out;
	}

	virtio_gpu_cmd_transfer_to_host_2d(vgdev, qobj->hw_res_handle, 0,
					   cpu_to_le32(64),
					   cpu_to_le32(64),
					   0, 0, &fence);
	ret = virtio_gpu_object_reserve(qobj, false);
	if (!ret) {
		reservation_object_add_excl_fence(qobj->tbo.resv,
						  &fence->f);
		fence_put(&fence->f);
		virtio_gpu_object_unreserve(qobj);
		virtio_gpu_object_wait(qobj, false);
	}

	output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
	output->cursor.resource_id = cpu_to_le32(qobj->hw_res_handle);
	output->cursor.hot_x = cpu_to_le32(hot_x);
	output->cursor.hot_y = cpu_to_le32(hot_y);
	virtio_gpu_cursor_ping(vgdev, output);
	ret = 0;

out:
	drm_gem_object_unreference_unlocked(gobj);
	return ret;
}

static int virtio_gpu_crtc_cursor_move(struct drm_crtc *crtc,
				    int x, int y)
{
	struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
	struct virtio_gpu_output *output =
		container_of(crtc, struct virtio_gpu_output, crtc);

	output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR);
	output->cursor.pos.x = cpu_to_le32(x);
	output->cursor.pos.y = cpu_to_le32(y);
	virtio_gpu_cursor_ping(vgdev, output);
	return 0;
}

static int virtio_gpu_page_flip(struct drm_crtc *crtc,
				struct drm_framebuffer *fb,
				struct drm_pending_vblank_event *event,
				uint32_t flags)
{
	struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
	struct virtio_gpu_output *output =
		container_of(crtc, struct virtio_gpu_output, crtc);
	struct drm_plane *plane = crtc->primary;
	struct virtio_gpu_framebuffer *vgfb;
	struct virtio_gpu_object *bo;
	unsigned long irqflags;
	uint32_t handle;

	plane->fb = fb;
	vgfb = to_virtio_gpu_framebuffer(plane->fb);
	bo = gem_to_virtio_gpu_obj(vgfb->obj);
	handle = bo->hw_res_handle;

	DRM_DEBUG("handle 0x%x%s, crtc %dx%d\n", handle,
		  bo->dumb ? ", dumb" : "",
		  crtc->mode.hdisplay, crtc->mode.vdisplay);
	if (bo->dumb) {
		virtio_gpu_cmd_transfer_to_host_2d
			(vgdev, handle, 0,
			 cpu_to_le32(crtc->mode.hdisplay),
			 cpu_to_le32(crtc->mode.vdisplay),
			 0, 0, NULL);
	}
	virtio_gpu_cmd_set_scanout(vgdev, output->index, handle,
				   crtc->mode.hdisplay,
				   crtc->mode.vdisplay, 0, 0);
	virtio_gpu_cmd_resource_flush(vgdev, handle, 0, 0,
				      crtc->mode.hdisplay,
				      crtc->mode.vdisplay);

	if (event) {
		spin_lock_irqsave(&crtc->dev->event_lock, irqflags);
		drm_send_vblank_event(crtc->dev, -1, event);
		spin_unlock_irqrestore(&crtc->dev->event_lock, irqflags);
	}

	return 0;
}

static const struct drm_crtc_funcs virtio_gpu_crtc_funcs = {
	.cursor_set2            = virtio_gpu_crtc_cursor_set,
	.cursor_move            = virtio_gpu_crtc_cursor_move,
	.set_config             = drm_atomic_helper_set_config,
	.destroy                = drm_crtc_cleanup,

	.page_flip              = virtio_gpu_page_flip,
	.reset                  = drm_atomic_helper_crtc_reset,
	.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
	.atomic_destroy_state   = drm_atomic_helper_crtc_destroy_state,
};

static void virtio_gpu_user_framebuffer_destroy(struct drm_framebuffer *fb)
{
	struct virtio_gpu_framebuffer *virtio_gpu_fb
		= to_virtio_gpu_framebuffer(fb);

	if (virtio_gpu_fb->obj)
		drm_gem_object_unreference_unlocked(virtio_gpu_fb->obj);
	drm_framebuffer_cleanup(fb);
	kfree(virtio_gpu_fb);
}

static int
virtio_gpu_framebuffer_surface_dirty(struct drm_framebuffer *fb,
				     struct drm_file *file_priv,
				     unsigned flags, unsigned color,
				     struct drm_clip_rect *clips,
				     unsigned num_clips)
{
	struct virtio_gpu_framebuffer *virtio_gpu_fb
		= to_virtio_gpu_framebuffer(fb);

	return virtio_gpu_surface_dirty(virtio_gpu_fb, clips, num_clips);
}

static const struct drm_framebuffer_funcs virtio_gpu_fb_funcs = {
	.destroy = virtio_gpu_user_framebuffer_destroy,
	.dirty = virtio_gpu_framebuffer_surface_dirty,
};

int
virtio_gpu_framebuffer_init(struct drm_device *dev,
			    struct virtio_gpu_framebuffer *vgfb,
			    const struct drm_mode_fb_cmd2 *mode_cmd,
			    struct drm_gem_object *obj)
{
	int ret;
	struct virtio_gpu_object *bo;
	vgfb->obj = obj;

	bo = gem_to_virtio_gpu_obj(obj);

	ret = drm_framebuffer_init(dev, &vgfb->base, &virtio_gpu_fb_funcs);
	if (ret) {
		vgfb->obj = NULL;
		return ret;
	}
	drm_helper_mode_fill_fb_struct(&vgfb->base, mode_cmd);

	spin_lock_init(&vgfb->dirty_lock);
	vgfb->x1 = vgfb->y1 = INT_MAX;
	vgfb->x2 = vgfb->y2 = 0;
	return 0;
}

static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
	struct drm_device *dev = crtc->dev;
	struct virtio_gpu_device *vgdev = dev->dev_private;
	struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);

	virtio_gpu_cmd_set_scanout(vgdev, output->index, 0,
				   crtc->mode.hdisplay,
				   crtc->mode.vdisplay, 0, 0);
}

static void virtio_gpu_crtc_enable(struct drm_crtc *crtc)
{
}

static void virtio_gpu_crtc_disable(struct drm_crtc *crtc)
{
	struct drm_device *dev = crtc->dev;
	struct virtio_gpu_device *vgdev = dev->dev_private;
	struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);

	virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0);
}

static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc,
					struct drm_crtc_state *state)
{
	return 0;
}

static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc,
					 struct drm_crtc_state *old_state)
{
	unsigned long flags;

	spin_lock_irqsave(&crtc->dev->event_lock, flags);
	if (crtc->state->event)
		drm_crtc_send_vblank_event(crtc, crtc->state->event);
	spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
}

static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {
	.enable        = virtio_gpu_crtc_enable,
	.disable       = virtio_gpu_crtc_disable,
	.mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,
	.atomic_check  = virtio_gpu_crtc_atomic_check,
	.atomic_flush  = virtio_gpu_crtc_atomic_flush,
};

static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,
				    struct drm_display_mode *mode,
				    struct drm_display_mode *adjusted_mode)
{
}

static void virtio_gpu_enc_enable(struct drm_encoder *encoder)
{
}

static void virtio_gpu_enc_disable(struct drm_encoder *encoder)
{
}

static int virtio_gpu_conn_get_modes(struct drm_connector *connector)
{
	struct virtio_gpu_output *output =
		drm_connector_to_virtio_gpu_output(connector);
	struct drm_display_mode *mode = NULL;
	int count, width, height;

	width  = le32_to_cpu(output->info.r.width);
	height = le32_to_cpu(output->info.r.height);
	count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX);

	if (width == 0 || height == 0) {
		width = XRES_DEF;
		height = YRES_DEF;
		drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF);
	} else {
		DRM_DEBUG("add mode: %dx%d\n", width, height);
		mode = drm_cvt_mode(connector->dev, width, height, 60,
				    false, false, false);
		mode->type |= DRM_MODE_TYPE_PREFERRED;
		drm_mode_probed_add(connector, mode);
		count++;
	}

	return count;
}

static int virtio_gpu_conn_mode_valid(struct drm_connector *connector,
				      struct drm_display_mode *mode)
{
	struct virtio_gpu_output *output =
		drm_connector_to_virtio_gpu_output(connector);
	int width, height;

	width  = le32_to_cpu(output->info.r.width);
	height = le32_to_cpu(output->info.r.height);

	if (!(mode->type & DRM_MODE_TYPE_PREFERRED))
		return MODE_OK;
	if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF)
		return MODE_OK;
	if (mode->hdisplay <= width  && mode->hdisplay >= width - 16 &&
	    mode->vdisplay <= height && mode->vdisplay >= height - 16)
		return MODE_OK;

	DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay);
	return MODE_BAD;
}

static struct drm_encoder*
virtio_gpu_best_encoder(struct drm_connector *connector)
{
	struct virtio_gpu_output *virtio_gpu_output =
		drm_connector_to_virtio_gpu_output(connector);

	return &virtio_gpu_output->enc;
}

static const struct drm_encoder_helper_funcs virtio_gpu_enc_helper_funcs = {
	.mode_set   = virtio_gpu_enc_mode_set,
	.enable     = virtio_gpu_enc_enable,
	.disable    = virtio_gpu_enc_disable,
};

static const struct drm_connector_helper_funcs virtio_gpu_conn_helper_funcs = {
	.get_modes    = virtio_gpu_conn_get_modes,
	.mode_valid   = virtio_gpu_conn_mode_valid,
	.best_encoder = virtio_gpu_best_encoder,
};

static enum drm_connector_status virtio_gpu_conn_detect(
			struct drm_connector *connector,
			bool force)
{
	struct virtio_gpu_output *output =
		drm_connector_to_virtio_gpu_output(connector);

	if (output->info.enabled)
		return connector_status_connected;
	else
		return connector_status_disconnected;
}

static void virtio_gpu_conn_destroy(struct drm_connector *connector)
{
	struct virtio_gpu_output *virtio_gpu_output =
		drm_connector_to_virtio_gpu_output(connector);

	drm_connector_unregister(connector);
	drm_connector_cleanup(connector);
	kfree(virtio_gpu_output);
}

static const struct drm_connector_funcs virtio_gpu_connector_funcs = {
	.dpms = drm_atomic_helper_connector_dpms,
	.detect = virtio_gpu_conn_detect,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.destroy = virtio_gpu_conn_destroy,
	.reset = drm_atomic_helper_connector_reset,
	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};

static const struct drm_encoder_funcs virtio_gpu_enc_funcs = {
	.destroy = drm_encoder_cleanup,
};

static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index)
{
	struct drm_device *dev = vgdev->ddev;
	struct virtio_gpu_output *output = vgdev->outputs + index;
	struct drm_connector *connector = &output->conn;
	struct drm_encoder *encoder = &output->enc;
	struct drm_crtc *crtc = &output->crtc;
	struct drm_plane *plane;

	output->index = index;
	if (index == 0) {
		output->info.enabled = cpu_to_le32(true);
		output->info.r.width = cpu_to_le32(XRES_DEF);
		output->info.r.height = cpu_to_le32(YRES_DEF);
	}

	plane = virtio_gpu_plane_init(vgdev, index);
	if (IS_ERR(plane))
		return PTR_ERR(plane);
	drm_crtc_init_with_planes(dev, crtc, plane, NULL,
				  &virtio_gpu_crtc_funcs, NULL);
	drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs);
	plane->crtc = crtc;

	drm_connector_init(dev, connector, &virtio_gpu_connector_funcs,
			   DRM_MODE_CONNECTOR_VIRTUAL);
	drm_connector_helper_add(connector, &virtio_gpu_conn_helper_funcs);

	drm_encoder_init(dev, encoder, &virtio_gpu_enc_funcs,
			 DRM_MODE_ENCODER_VIRTUAL, NULL);
	drm_encoder_helper_add(encoder, &virtio_gpu_enc_helper_funcs);
	encoder->possible_crtcs = 1 << index;

	drm_mode_connector_attach_encoder(connector, encoder);
	drm_connector_register(connector);
	return 0;
}

static struct drm_framebuffer *
virtio_gpu_user_framebuffer_create(struct drm_device *dev,
				   struct drm_file *file_priv,
				   const struct drm_mode_fb_cmd2 *mode_cmd)
{
	struct drm_gem_object *obj = NULL;
	struct virtio_gpu_framebuffer *virtio_gpu_fb;
	int ret;

	/* lookup object associated with res handle */
	obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
	if (!obj)
		return ERR_PTR(-EINVAL);

	virtio_gpu_fb = kzalloc(sizeof(*virtio_gpu_fb), GFP_KERNEL);
	if (virtio_gpu_fb == NULL)
		return ERR_PTR(-ENOMEM);

	ret = virtio_gpu_framebuffer_init(dev, virtio_gpu_fb, mode_cmd, obj);
	if (ret) {
		kfree(virtio_gpu_fb);
		if (obj)
			drm_gem_object_unreference_unlocked(obj);
		return NULL;
	}

	return &virtio_gpu_fb->base;
}

static const struct drm_mode_config_funcs virtio_gpu_mode_funcs = {
	.fb_create = virtio_gpu_user_framebuffer_create,
	.atomic_check = drm_atomic_helper_check,
	.atomic_commit = drm_atomic_helper_commit,
};

int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev)
{
	int i;

	drm_mode_config_init(vgdev->ddev);
	vgdev->ddev->mode_config.funcs = (void *)&virtio_gpu_mode_funcs;

	/* modes will be validated against the framebuffer size */
	vgdev->ddev->mode_config.min_width = XRES_MIN;
	vgdev->ddev->mode_config.min_height = YRES_MIN;
	vgdev->ddev->mode_config.max_width = XRES_MAX;
	vgdev->ddev->mode_config.max_height = YRES_MAX;

	for (i = 0 ; i < vgdev->num_scanouts; ++i)
		vgdev_output_init(vgdev, i);

        drm_mode_config_reset(vgdev->ddev);
	return 0;
}

void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev)
{
	virtio_gpu_fbdev_fini(vgdev);
	drm_mode_config_cleanup(vgdev->ddev);
}
Commit	Line	Data
dc5698e8 DA	1	/*
	2	* Copyright (C) 2015 Red Hat, Inc.
	3	* All Rights Reserved.
	4	*
	5	* Authors:
	6	* Dave Airlie
	7	* Alon Levy
	8	*
	9	* Permission is hereby granted, free of charge, to any person obtaining a
	10	* copy of this software and associated documentation files (the "Software"),
	11	* to deal in the Software without restriction, including without limitation
	12	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	13	* and/or sell copies of the Software, and to permit persons to whom the
	14	* Software is furnished to do so, subject to the following conditions:
	15	*
	16	* The above copyright notice and this permission notice shall be included in
	17	* all copies or substantial portions of the Software.
	18	*
	19	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	20	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	21	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	22	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	23	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	24	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	25	* OTHER DEALINGS IN THE SOFTWARE.
	26	*/
	27
	28	#include "virtgpu_drv.h"
	29	#include <drm/drm_crtc_helper.h>
	30	#include <drm/drm_atomic_helper.h>
	31
	32	#define XRES_MIN 320
	33	#define YRES_MIN 200
	34
	35	#define XRES_DEF 1024
	36	#define YRES_DEF 768
	37
	38	#define XRES_MAX 8192
	39	#define YRES_MAX 8192
	40
dc5698e8 DA	41	static void
	42	virtio_gpu_hide_cursor(struct virtio_gpu_device *vgdev,
	43	struct virtio_gpu_output *output)
	44	{
	45	output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
	46	output->cursor.resource_id = 0;
	47	virtio_gpu_cursor_ping(vgdev, output);
	48	}
	49
	50	static int virtio_gpu_crtc_cursor_set(struct drm_crtc *crtc,
	51	struct drm_file *file_priv,
	52	uint32_t handle,
	53	uint32_t width,
	54	uint32_t height,
	55	int32_t hot_x, int32_t hot_y)
	56	{
	57	struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
	58	struct virtio_gpu_output *output =
	59	container_of(crtc, struct virtio_gpu_output, crtc);
	60	struct drm_gem_object *gobj = NULL;
	61	struct virtio_gpu_object *qobj = NULL;
	62	struct virtio_gpu_fence *fence = NULL;
	63	int ret = 0;
	64
	65	if (handle == 0) {
	66	virtio_gpu_hide_cursor(vgdev, output);
	67	return 0;
	68	}
	69
	70	/* lookup the cursor */
a8ad0bd8	71	gobj = drm_gem_object_lookup(file_priv, handle);
dc5698e8 DA	72	if (gobj == NULL)
	73	return -ENOENT;
	74
	75	qobj = gem_to_virtio_gpu_obj(gobj);
	76
	77	if (!qobj->hw_res_handle) {
	78	ret = -EINVAL;
	79	goto out;
	80	}
	81
	82	virtio_gpu_cmd_transfer_to_host_2d(vgdev, qobj->hw_res_handle, 0,
	83	cpu_to_le32(64),
	84	cpu_to_le32(64),
	85	0, 0, &fence);
6d415334 GH	86	ret = virtio_gpu_object_reserve(qobj, false);
	87	if (!ret) {
	88	reservation_object_add_excl_fence(qobj->tbo.resv,
	89	&fence->f);
	90	fence_put(&fence->f);
	91	virtio_gpu_object_unreserve(qobj);
	92	virtio_gpu_object_wait(qobj, false);
	93	}
dc5698e8 DA	94
	95	output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
	96	output->cursor.resource_id = cpu_to_le32(qobj->hw_res_handle);
	97	output->cursor.hot_x = cpu_to_le32(hot_x);
	98	output->cursor.hot_y = cpu_to_le32(hot_y);
	99	virtio_gpu_cursor_ping(vgdev, output);
	100	ret = 0;
	101
	102	out:
	103	drm_gem_object_unreference_unlocked(gobj);
	104	return ret;
	105	}
	106
	107	static int virtio_gpu_crtc_cursor_move(struct drm_crtc *crtc,
	108	int x, int y)
	109	{
	110	struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
	111	struct virtio_gpu_output *output =
	112	container_of(crtc, struct virtio_gpu_output, crtc);
	113
	114	output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR);
	115	output->cursor.pos.x = cpu_to_le32(x);
	116	output->cursor.pos.y = cpu_to_le32(y);
	117	virtio_gpu_cursor_ping(vgdev, output);
	118	return 0;
	119	}
	120
d24796a4 GH	121	static int virtio_gpu_page_flip(struct drm_crtc *crtc,
	122	struct drm_framebuffer *fb,
	123	struct drm_pending_vblank_event *event,
	124	uint32_t flags)
	125	{
	126	struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
	127	struct virtio_gpu_output *output =
	128	container_of(crtc, struct virtio_gpu_output, crtc);
	129	struct drm_plane *plane = crtc->primary;
	130	struct virtio_gpu_framebuffer *vgfb;
	131	struct virtio_gpu_object *bo;
	132	unsigned long irqflags;
	133	uint32_t handle;
	134
	135	plane->fb = fb;
	136	vgfb = to_virtio_gpu_framebuffer(plane->fb);
	137	bo = gem_to_virtio_gpu_obj(vgfb->obj);
	138	handle = bo->hw_res_handle;
	139
	140	DRM_DEBUG("handle 0x%x%s, crtc %dx%d\n", handle,
	141	bo->dumb ? ", dumb" : "",
	142	crtc->mode.hdisplay, crtc->mode.vdisplay);
	143	if (bo->dumb) {
	144	virtio_gpu_cmd_transfer_to_host_2d
	145	(vgdev, handle, 0,
	146	cpu_to_le32(crtc->mode.hdisplay),
	147	cpu_to_le32(crtc->mode.vdisplay),
	148	0, 0, NULL);
	149	}
	150	virtio_gpu_cmd_set_scanout(vgdev, output->index, handle,
	151	crtc->mode.hdisplay,
	152	crtc->mode.vdisplay, 0, 0);
	153	virtio_gpu_cmd_resource_flush(vgdev, handle, 0, 0,
	154	crtc->mode.hdisplay,
	155	crtc->mode.vdisplay);
	156
	157	if (event) {
	158	spin_lock_irqsave(&crtc->dev->event_lock, irqflags);
	159	drm_send_vblank_event(crtc->dev, -1, event);
	160	spin_unlock_irqrestore(&crtc->dev->event_lock, irqflags);
	161	}
	162
	163	return 0;
	164	}
	165
dc5698e8 DA	166	static const struct drm_crtc_funcs virtio_gpu_crtc_funcs = {
	167	.cursor_set2 = virtio_gpu_crtc_cursor_set,
	168	.cursor_move = virtio_gpu_crtc_cursor_move,
dc5698e8 DA	169	.set_config = drm_atomic_helper_set_config,
	170	.destroy = drm_crtc_cleanup,
	171
d24796a4	172	.page_flip = virtio_gpu_page_flip,
dc5698e8 DA	173	.reset = drm_atomic_helper_crtc_reset,
	174	.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
	175	.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
	176	};
	177
	178	static void virtio_gpu_user_framebuffer_destroy(struct drm_framebuffer *fb)
	179	{
	180	struct virtio_gpu_framebuffer *virtio_gpu_fb
	181	= to_virtio_gpu_framebuffer(fb);
	182
	183	if (virtio_gpu_fb->obj)
	184	drm_gem_object_unreference_unlocked(virtio_gpu_fb->obj);
	185	drm_framebuffer_cleanup(fb);
	186	kfree(virtio_gpu_fb);
	187	}
	188
	189	static int
	190	virtio_gpu_framebuffer_surface_dirty(struct drm_framebuffer *fb,
	191	struct drm_file *file_priv,
	192	unsigned flags, unsigned color,
	193	struct drm_clip_rect *clips,
	194	unsigned num_clips)
	195	{
	196	struct virtio_gpu_framebuffer *virtio_gpu_fb
	197	= to_virtio_gpu_framebuffer(fb);
	198
	199	return virtio_gpu_surface_dirty(virtio_gpu_fb, clips, num_clips);
	200	}
	201
	202	static const struct drm_framebuffer_funcs virtio_gpu_fb_funcs = {
	203	.destroy = virtio_gpu_user_framebuffer_destroy,
	204	.dirty = virtio_gpu_framebuffer_surface_dirty,
	205	};
	206
	207	int
	208	virtio_gpu_framebuffer_init(struct drm_device *dev,
	209	struct virtio_gpu_framebuffer *vgfb,
1eb83451	210	const struct drm_mode_fb_cmd2 *mode_cmd,
dc5698e8 DA	211	struct drm_gem_object *obj)
	212	{
	213	int ret;
	214	struct virtio_gpu_object *bo;
	215	vgfb->obj = obj;
	216
	217	bo = gem_to_virtio_gpu_obj(obj);
	218
	219	ret = drm_framebuffer_init(dev, &vgfb->base, &virtio_gpu_fb_funcs);
	220	if (ret) {
	221	vgfb->obj = NULL;
	222	return ret;
	223	}
	224	drm_helper_mode_fill_fb_struct(&vgfb->base, mode_cmd);
	225
	226	spin_lock_init(&vgfb->dirty_lock);
	227	vgfb->x1 = vgfb->y1 = INT_MAX;
	228	vgfb->x2 = vgfb->y2 = 0;
	229	return 0;
	230	}
	231
dc5698e8 DA	232	static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc)
	233	{
	234	struct drm_device *dev = crtc->dev;
	235	struct virtio_gpu_device *vgdev = dev->dev_private;
	236	struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
	237
	238	virtio_gpu_cmd_set_scanout(vgdev, output->index, 0,
	239	crtc->mode.hdisplay,
	240	crtc->mode.vdisplay, 0, 0);
	241	}
	242
	243	static void virtio_gpu_crtc_enable(struct drm_crtc *crtc)
	244	{
	245	}
	246
	247	static void virtio_gpu_crtc_disable(struct drm_crtc *crtc)
	248	{
	249	struct drm_device *dev = crtc->dev;
	250	struct virtio_gpu_device *vgdev = dev->dev_private;
	251	struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
	252
	253	virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0);
	254	}
	255
	256	static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc,
	257	struct drm_crtc_state *state)
	258	{
	259	return 0;
	260	}
	261
9a11d2e7 GP	262	static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc,
	263	struct drm_crtc_state *old_state)
	264	{
	265	unsigned long flags;
	266
	267	spin_lock_irqsave(&crtc->dev->event_lock, flags);
	268	if (crtc->state->event)
	269	drm_crtc_send_vblank_event(crtc, crtc->state->event);
	270	spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
	271	}
	272
dc5698e8 DA	273	static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {
	274	.enable = virtio_gpu_crtc_enable,
	275	.disable = virtio_gpu_crtc_disable,
dc5698e8 DA	276	.mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,
dc5698e8 DA	277	.atomic_check = virtio_gpu_crtc_atomic_check,
9a11d2e7	278	.atomic_flush = virtio_gpu_crtc_atomic_flush,
dc5698e8 DA	279	};
dc5698e8 DA	280
dc5698e8 DA	281	static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,
	282	struct drm_display_mode *mode,
	283	struct drm_display_mode *adjusted_mode)
	284	{
	285	}
	286
	287	static void virtio_gpu_enc_enable(struct drm_encoder *encoder)
	288	{
	289	}
	290
	291	static void virtio_gpu_enc_disable(struct drm_encoder *encoder)
	292	{
	293	}
	294
	295	static int virtio_gpu_conn_get_modes(struct drm_connector *connector)
	296	{
	297	struct virtio_gpu_output *output =
	298	drm_connector_to_virtio_gpu_output(connector);
	299	struct drm_display_mode *mode = NULL;
	300	int count, width, height;
	301
	302	width = le32_to_cpu(output->info.r.width);
	303	height = le32_to_cpu(output->info.r.height);
	304	count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX);
	305
	306	if (width == 0 \|\| height == 0) {
	307	width = XRES_DEF;
	308	height = YRES_DEF;
	309	drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF);
	310	} else {
	311	DRM_DEBUG("add mode: %dx%d\n", width, height);
	312	mode = drm_cvt_mode(connector->dev, width, height, 60,
	313	false, false, false);
	314	mode->type \|= DRM_MODE_TYPE_PREFERRED;
	315	drm_mode_probed_add(connector, mode);
	316	count++;
	317	}
	318
	319	return count;
	320	}
	321
	322	static int virtio_gpu_conn_mode_valid(struct drm_connector *connector,
	323	struct drm_display_mode *mode)
	324	{
	325	struct virtio_gpu_output *output =
	326	drm_connector_to_virtio_gpu_output(connector);
	327	int width, height;
	328
	329	width = le32_to_cpu(output->info.r.width);
	330	height = le32_to_cpu(output->info.r.height);
	331
	332	if (!(mode->type & DRM_MODE_TYPE_PREFERRED))
	333	return MODE_OK;
	334	if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF)
	335	return MODE_OK;
	336	if (mode->hdisplay <= width && mode->hdisplay >= width - 16 &&
	337	mode->vdisplay <= height && mode->vdisplay >= height - 16)
	338	return MODE_OK;
	339
	340	DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay);
	341	return MODE_BAD;
	342	}
	343
	344	static struct drm_encoder*
345	virtio_gpu_best_encoder(struct drm_connector *connector)
346	{
347	struct virtio_gpu_output *virtio_gpu_output =
348	drm_connector_to_virtio_gpu_output(connector);
349
350	return &virtio_gpu_output->enc;
351	}
352
353	static const struct drm_encoder_helper_funcs virtio_gpu_enc_helper_funcs = {
dc5698e8 DA	354	.mode_set = virtio_gpu_enc_mode_set,
	355	.enable = virtio_gpu_enc_enable,
	356	.disable = virtio_gpu_enc_disable,
	357	};
	358
	359	static const struct drm_connector_helper_funcs virtio_gpu_conn_helper_funcs = {
	360	.get_modes = virtio_gpu_conn_get_modes,
	361	.mode_valid = virtio_gpu_conn_mode_valid,
	362	.best_encoder = virtio_gpu_best_encoder,
	363	};
	364
dc5698e8 DA	365	static enum drm_connector_status virtio_gpu_conn_detect(
	366	struct drm_connector *connector,
	367	bool force)
	368	{
	369	struct virtio_gpu_output *output =
	370	drm_connector_to_virtio_gpu_output(connector);
	371
	372	if (output->info.enabled)
	373	return connector_status_connected;
	374	else
	375	return connector_status_disconnected;
	376	}
	377
	378	static void virtio_gpu_conn_destroy(struct drm_connector *connector)
	379	{
	380	struct virtio_gpu_output *virtio_gpu_output =
	381	drm_connector_to_virtio_gpu_output(connector);
	382
	383	drm_connector_unregister(connector);
	384	drm_connector_cleanup(connector);
	385	kfree(virtio_gpu_output);
	386	}
	387
	388	static const struct drm_connector_funcs virtio_gpu_connector_funcs = {
	389	.dpms = drm_atomic_helper_connector_dpms,
dc5698e8	390	.detect = virtio_gpu_conn_detect,
6af3e656	391	.fill_modes = drm_helper_probe_single_connector_modes,
dc5698e8 DA	392	.destroy = virtio_gpu_conn_destroy,
	393	.reset = drm_atomic_helper_connector_reset,
	394	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
	395	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
	396	};
	397
	398	static const struct drm_encoder_funcs virtio_gpu_enc_funcs = {
	399	.destroy = drm_encoder_cleanup,
	400	};
	401
	402	static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index)
	403	{
	404	struct drm_device *dev = vgdev->ddev;
	405	struct virtio_gpu_output *output = vgdev->outputs + index;
	406	struct drm_connector *connector = &output->conn;
	407	struct drm_encoder *encoder = &output->enc;
	408	struct drm_crtc *crtc = &output->crtc;
	409	struct drm_plane *plane;
	410
	411	output->index = index;
	412	if (index == 0) {
	413	output->info.enabled = cpu_to_le32(true);
	414	output->info.r.width = cpu_to_le32(XRES_DEF);
	415	output->info.r.height = cpu_to_le32(YRES_DEF);
	416	}
	417
	418	plane = virtio_gpu_plane_init(vgdev, index);
	419	if (IS_ERR(plane))
	420	return PTR_ERR(plane);
	421	drm_crtc_init_with_planes(dev, crtc, plane, NULL,
f9882876	422	&virtio_gpu_crtc_funcs, NULL);
dc5698e8 DA	423	drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs);
	424	plane->crtc = crtc;
	425
	426	drm_connector_init(dev, connector, &virtio_gpu_connector_funcs,
	427	DRM_MODE_CONNECTOR_VIRTUAL);
	428	drm_connector_helper_add(connector, &virtio_gpu_conn_helper_funcs);
	429
	430	drm_encoder_init(dev, encoder, &virtio_gpu_enc_funcs,
13a3d91f	431	DRM_MODE_ENCODER_VIRTUAL, NULL);
dc5698e8 DA	432	drm_encoder_helper_add(encoder, &virtio_gpu_enc_helper_funcs);
	433	encoder->possible_crtcs = 1 << index;
	434
	435	drm_mode_connector_attach_encoder(connector, encoder);
	436	drm_connector_register(connector);
	437	return 0;
	438	}
	439
	440	static struct drm_framebuffer *
	441	virtio_gpu_user_framebuffer_create(struct drm_device *dev,
	442	struct drm_file *file_priv,
1eb83451	443	const struct drm_mode_fb_cmd2 *mode_cmd)
dc5698e8 DA	444	{
	445	struct drm_gem_object *obj = NULL;
	446	struct virtio_gpu_framebuffer *virtio_gpu_fb;
	447	int ret;
	448
	449	/* lookup object associated with res handle */
a8ad0bd8	450	obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
dc5698e8 DA	451	if (!obj)
	452	return ERR_PTR(-EINVAL);
	453
	454	virtio_gpu_fb = kzalloc(sizeof(*virtio_gpu_fb), GFP_KERNEL);
	455	if (virtio_gpu_fb == NULL)
	456	return ERR_PTR(-ENOMEM);
	457
	458	ret = virtio_gpu_framebuffer_init(dev, virtio_gpu_fb, mode_cmd, obj);
	459	if (ret) {
	460	kfree(virtio_gpu_fb);
	461	if (obj)
	462	drm_gem_object_unreference_unlocked(obj);
	463	return NULL;
	464	}
	465
	466	return &virtio_gpu_fb->base;
	467	}
	468
	469	static const struct drm_mode_config_funcs virtio_gpu_mode_funcs = {
	470	.fb_create = virtio_gpu_user_framebuffer_create,
	471	.atomic_check = drm_atomic_helper_check,
	472	.atomic_commit = drm_atomic_helper_commit,
	473	};
	474
	475	int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev)
	476	{
	477	int i;
	478
	479	drm_mode_config_init(vgdev->ddev);
	480	vgdev->ddev->mode_config.funcs = (void *)&virtio_gpu_mode_funcs;
	481
	482	/* modes will be validated against the framebuffer size */
	483	vgdev->ddev->mode_config.min_width = XRES_MIN;
	484	vgdev->ddev->mode_config.min_height = YRES_MIN;
	485	vgdev->ddev->mode_config.max_width = XRES_MAX;
	486	vgdev->ddev->mode_config.max_height = YRES_MAX;
	487
	488	for (i = 0 ; i < vgdev->num_scanouts; ++i)
	489	vgdev_output_init(vgdev, i);
	490
	491	drm_mode_config_reset(vgdev->ddev);
	492	return 0;
	493	}
	494
	495	void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev)
	496	{
	497	virtio_gpu_fbdev_fini(vgdev);
	498	drm_mode_config_cleanup(vgdev->ddev);
	499	}