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drm/vmwgfx: Correctly detect 3D
[deliverable/linux.git] / drivers / gpu / drm / vmwgfx / vmwgfx_drv.c
CommitLineData
fb1d9738
JB		 1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "drmP.h"
29#include "vmwgfx_drv.h"
30#include "ttm/ttm_placement.h"
31#include "ttm/ttm_bo_driver.h"
32#include "ttm/ttm_object.h"
33#include "ttm/ttm_module.h"
34
35#define VMWGFX_DRIVER_NAME "vmwgfx"
36#define VMWGFX_DRIVER_DESC "Linux drm driver for VMware graphics devices"
37#define VMWGFX_CHIP_SVGAII 0
38#define VMW_FB_RESERVATION 0
39
40/**
41 * Fully encoded drm commands. Might move to vmw_drm.h
42 */
43
44#define DRM_IOCTL_VMW_GET_PARAM \
45 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GET_PARAM, \
46 struct drm_vmw_getparam_arg)
47#define DRM_IOCTL_VMW_ALLOC_DMABUF \
48 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_ALLOC_DMABUF, \
49 union drm_vmw_alloc_dmabuf_arg)
50#define DRM_IOCTL_VMW_UNREF_DMABUF \
51 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_DMABUF, \
52 struct drm_vmw_unref_dmabuf_arg)
53#define DRM_IOCTL_VMW_CURSOR_BYPASS \
54 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CURSOR_BYPASS, \
55 struct drm_vmw_cursor_bypass_arg)
56
57#define DRM_IOCTL_VMW_CONTROL_STREAM \
58 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CONTROL_STREAM, \
59 struct drm_vmw_control_stream_arg)
60#define DRM_IOCTL_VMW_CLAIM_STREAM \
61 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CLAIM_STREAM, \
62 struct drm_vmw_stream_arg)
63#define DRM_IOCTL_VMW_UNREF_STREAM \
64 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_STREAM, \
65 struct drm_vmw_stream_arg)
66
67#define DRM_IOCTL_VMW_CREATE_CONTEXT \
68 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CREATE_CONTEXT, \
69 struct drm_vmw_context_arg)
70#define DRM_IOCTL_VMW_UNREF_CONTEXT \
71 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_CONTEXT, \
72 struct drm_vmw_context_arg)
73#define DRM_IOCTL_VMW_CREATE_SURFACE \
74 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_SURFACE, \
75 union drm_vmw_surface_create_arg)
76#define DRM_IOCTL_VMW_UNREF_SURFACE \
77 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_SURFACE, \
78 struct drm_vmw_surface_arg)
79#define DRM_IOCTL_VMW_REF_SURFACE \
80 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_REF_SURFACE, \
81 union drm_vmw_surface_reference_arg)
82#define DRM_IOCTL_VMW_EXECBUF \
83 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_EXECBUF, \
84 struct drm_vmw_execbuf_arg)
85#define DRM_IOCTL_VMW_FIFO_DEBUG \
86 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FIFO_DEBUG, \
87 struct drm_vmw_fifo_debug_arg)
88#define DRM_IOCTL_VMW_FENCE_WAIT \
89 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_WAIT, \
90 struct drm_vmw_fence_wait_arg)
91
92
93/**
94 * The core DRM version of this macro doesn't account for
95 * DRM_COMMAND_BASE.
96 */
97
98#define VMW_IOCTL_DEF(ioctl, func, flags) \
99 [DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func}
100
101/**
102 * Ioctl definitions.
103 */
104
105static struct drm_ioctl_desc vmw_ioctls[] = {
e1f78003
TH		 106 VMW_IOCTL_DEF(DRM_IOCTL_VMW_GET_PARAM, vmw_getparam_ioctl,
107 DRM_AUTH | DRM_UNLOCKED),
fb1d9738 108 VMW_IOCTL_DEF(DRM_IOCTL_VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
e1f78003 109 DRM_AUTH | DRM_UNLOCKED),
fb1d9738 110 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
e1f78003 111 DRM_AUTH | DRM_UNLOCKED),
fb1d9738 112 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CURSOR_BYPASS,
e1f78003
TH		 113 vmw_kms_cursor_bypass_ioctl,
114 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
fb1d9738
JB		 115
116 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CONTROL_STREAM, vmw_overlay_ioctl,
e1f78003 117 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
fb1d9738 118 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
e1f78003 119 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
fb1d9738 120 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
e1f78003 121 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
fb1d9738
JB		 122
123 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
e1f78003 124 DRM_AUTH | DRM_UNLOCKED),
fb1d9738 125 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
e1f78003 126 DRM_AUTH | DRM_UNLOCKED),
fb1d9738 127 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
e1f78003 128 DRM_AUTH | DRM_UNLOCKED),
fb1d9738 129 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
e1f78003 130 DRM_AUTH | DRM_UNLOCKED),
fb1d9738 131 VMW_IOCTL_DEF(DRM_IOCTL_VMW_REF_SURFACE, vmw_surface_reference_ioctl,
e1f78003 132 DRM_AUTH | DRM_UNLOCKED),
fb1d9738 133 VMW_IOCTL_DEF(DRM_IOCTL_VMW_EXECBUF, vmw_execbuf_ioctl,
e1f78003 134 DRM_AUTH | DRM_UNLOCKED),
fb1d9738 135 VMW_IOCTL_DEF(DRM_IOCTL_VMW_FIFO_DEBUG, vmw_fifo_debug_ioctl,
e1f78003 136 DRM_AUTH | DRM_ROOT_ONLY | DRM_MASTER | DRM_UNLOCKED),
fb1d9738 137 VMW_IOCTL_DEF(DRM_IOCTL_VMW_FENCE_WAIT, vmw_fence_wait_ioctl,
e1f78003 138 DRM_AUTH | DRM_UNLOCKED)
fb1d9738
JB		 139};
140
141static struct pci_device_id vmw_pci_id_list[] = {
142 {0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII},
143 {0, 0, 0}
144};
145
146static char *vmw_devname = "vmwgfx";
147
148static int vmw_probe(struct pci_dev *, const struct pci_device_id *);
149static void vmw_master_init(struct vmw_master *);
d9f36a00
TH		 150static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
151 void *ptr);
fb1d9738
JB		 152
153static void vmw_print_capabilities(uint32_t capabilities)
154{
155 DRM_INFO("Capabilities:\n");
156 if (capabilities & SVGA_CAP_RECT_COPY)
157 DRM_INFO(" Rect copy.\n");
158 if (capabilities & SVGA_CAP_CURSOR)
159 DRM_INFO(" Cursor.\n");
160 if (capabilities & SVGA_CAP_CURSOR_BYPASS)
161 DRM_INFO(" Cursor bypass.\n");
162 if (capabilities & SVGA_CAP_CURSOR_BYPASS_2)
163 DRM_INFO(" Cursor bypass 2.\n");
164 if (capabilities & SVGA_CAP_8BIT_EMULATION)
165 DRM_INFO(" 8bit emulation.\n");
166 if (capabilities & SVGA_CAP_ALPHA_CURSOR)
167 DRM_INFO(" Alpha cursor.\n");
168 if (capabilities & SVGA_CAP_3D)
169 DRM_INFO(" 3D.\n");
170 if (capabilities & SVGA_CAP_EXTENDED_FIFO)
171 DRM_INFO(" Extended Fifo.\n");
172 if (capabilities & SVGA_CAP_MULTIMON)
173 DRM_INFO(" Multimon.\n");
174 if (capabilities & SVGA_CAP_PITCHLOCK)
175 DRM_INFO(" Pitchlock.\n");
176 if (capabilities & SVGA_CAP_IRQMASK)
177 DRM_INFO(" Irq mask.\n");
178 if (capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)
179 DRM_INFO(" Display Topology.\n");
180 if (capabilities & SVGA_CAP_GMR)
181 DRM_INFO(" GMR.\n");
182 if (capabilities & SVGA_CAP_TRACES)
183 DRM_INFO(" Traces.\n");
184}
185
186static int vmw_request_device(struct vmw_private *dev_priv)
187{
188 int ret;
189
190 vmw_kms_save_vga(dev_priv);
191
192 ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
193 if (unlikely(ret != 0)) {
194 DRM_ERROR("Unable to initialize FIFO.\n");
195 return ret;
196 }
197
198 return 0;
199}
200
201static void vmw_release_device(struct vmw_private *dev_priv)
202{
203 vmw_fifo_release(dev_priv, &dev_priv->fifo);
204 vmw_kms_restore_vga(dev_priv);
205}
206
207
208static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
209{
210 struct vmw_private *dev_priv;
211 int ret;
212
213 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
214 if (unlikely(dev_priv == NULL)) {
215 DRM_ERROR("Failed allocating a device private struct.\n");
216 return -ENOMEM;
217 }
218 memset(dev_priv, 0, sizeof(*dev_priv));
219
220 dev_priv->dev = dev;
221 dev_priv->vmw_chipset = chipset;
7704befb 222 dev_priv->last_read_sequence = (uint32_t) -100;
fb1d9738
JB		 223 mutex_init(&dev_priv->hw_mutex);
224 mutex_init(&dev_priv->cmdbuf_mutex);
225 rwlock_init(&dev_priv->resource_lock);
226 idr_init(&dev_priv->context_idr);
227 idr_init(&dev_priv->surface_idr);
228 idr_init(&dev_priv->stream_idr);
229 ida_init(&dev_priv->gmr_ida);
230 mutex_init(&dev_priv->init_mutex);
231 init_waitqueue_head(&dev_priv->fence_queue);
232 init_waitqueue_head(&dev_priv->fifo_queue);
233 atomic_set(&dev_priv->fence_queue_waiters, 0);
234 atomic_set(&dev_priv->fifo_queue_waiters, 0);
235 INIT_LIST_HEAD(&dev_priv->gmr_lru);
236
237 dev_priv->io_start = pci_resource_start(dev->pdev, 0);
238 dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
239 dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
240
241 mutex_lock(&dev_priv->hw_mutex);
242 dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
243
244 if (dev_priv->capabilities & SVGA_CAP_GMR) {
245 dev_priv->max_gmr_descriptors =
246 vmw_read(dev_priv,
247 SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH);
248 dev_priv->max_gmr_ids =
249 vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS);
250 }
251
252 dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE);
253 dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE);
254 dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH);
255 dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT);
256
257 mutex_unlock(&dev_priv->hw_mutex);
258
259 vmw_print_capabilities(dev_priv->capabilities);
260
261 if (dev_priv->capabilities & SVGA_CAP_GMR) {
262 DRM_INFO("Max GMR ids is %u\n",
263 (unsigned)dev_priv->max_gmr_ids);
264 DRM_INFO("Max GMR descriptors is %u\n",
265 (unsigned)dev_priv->max_gmr_descriptors);
266 }
267 DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
268 dev_priv->vram_start, dev_priv->vram_size / 1024);
269 DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
270 dev_priv->mmio_start, dev_priv->mmio_size / 1024);
271
272 ret = vmw_ttm_global_init(dev_priv);
273 if (unlikely(ret != 0))
274 goto out_err0;
275
276
277 vmw_master_init(&dev_priv->fbdev_master);
278 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
279 dev_priv->active_master = &dev_priv->fbdev_master;
280
281
282 ret = ttm_bo_device_init(&dev_priv->bdev,
283 dev_priv->bo_global_ref.ref.object,
284 &vmw_bo_driver, VMWGFX_FILE_PAGE_OFFSET,
285 false);
286 if (unlikely(ret != 0)) {
287 DRM_ERROR("Failed initializing TTM buffer object driver.\n");
288 goto out_err1;
289 }
290
291 ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
292 (dev_priv->vram_size >> PAGE_SHIFT));
293 if (unlikely(ret != 0)) {
294 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
295 goto out_err2;
296 }
297
298 dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
299 dev_priv->mmio_size, DRM_MTRR_WC);
300
301 dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
302 dev_priv->mmio_size);
303
304 if (unlikely(dev_priv->mmio_virt == NULL)) {
305 ret = -ENOMEM;
306 DRM_ERROR("Failed mapping MMIO.\n");
307 goto out_err3;
308 }
309
310 dev_priv->tdev = ttm_object_device_init
311 (dev_priv->mem_global_ref.object, 12);
312
313 if (unlikely(dev_priv->tdev == NULL)) {
314 DRM_ERROR("Unable to initialize TTM object management.\n");
315 ret = -ENOMEM;
316 goto out_err4;
317 }
318
319 dev->dev_private = dev_priv;
320
321 if (!dev->devname)
322 dev->devname = vmw_devname;
323
324 if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
325 ret = drm_irq_install(dev);
326 if (unlikely(ret != 0)) {
327 DRM_ERROR("Failed installing irq: %d\n", ret);
328 goto out_no_irq;
329 }
330 }
331
332 ret = pci_request_regions(dev->pdev, "vmwgfx probe");
333 dev_priv->stealth = (ret != 0);
334 if (dev_priv->stealth) {
335 /**
336 * Request at least the mmio PCI resource.
337 */
338
339 DRM_INFO("It appears like vesafb is loaded. "
340 "Ignore above error if any. Entering stealth mode.\n");
341 ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
342 if (unlikely(ret != 0)) {
343 DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
344 goto out_no_device;
345 }
346 vmw_kms_init(dev_priv);
347 vmw_overlay_init(dev_priv);
348 } else {
349 ret = vmw_request_device(dev_priv);
350 if (unlikely(ret != 0))
351 goto out_no_device;
352 vmw_kms_init(dev_priv);
353 vmw_overlay_init(dev_priv);
354 vmw_fb_init(dev_priv);
355 }
356
d9f36a00
TH		 357 dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
358 register_pm_notifier(&dev_priv->pm_nb);
359
8e19a951
JB		 360 DRM_INFO("%s", vmw_fifo_have_3d(dev_priv) ? "Have 3D\n" : "No 3D\n");
361
fb1d9738
JB		 362 return 0;
363
364out_no_device:
365 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
366 drm_irq_uninstall(dev_priv->dev);
367 if (dev->devname == vmw_devname)
368 dev->devname = NULL;
369out_no_irq:
370 ttm_object_device_release(&dev_priv->tdev);
371out_err4:
372 iounmap(dev_priv->mmio_virt);
373out_err3:
374 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
375 dev_priv->mmio_size, DRM_MTRR_WC);
376 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
377out_err2:
378 (void)ttm_bo_device_release(&dev_priv->bdev);
379out_err1:
380 vmw_ttm_global_release(dev_priv);
381out_err0:
382 ida_destroy(&dev_priv->gmr_ida);
383 idr_destroy(&dev_priv->surface_idr);
384 idr_destroy(&dev_priv->context_idr);
385 idr_destroy(&dev_priv->stream_idr);
386 kfree(dev_priv);
387 return ret;
388}
389
390static int vmw_driver_unload(struct drm_device *dev)
391{
392 struct vmw_private *dev_priv = vmw_priv(dev);
393
394 DRM_INFO(VMWGFX_DRIVER_NAME " unload.\n");
395
d9f36a00
TH		 396 unregister_pm_notifier(&dev_priv->pm_nb);
397
fb1d9738
JB		 398 if (!dev_priv->stealth) {
399 vmw_fb_close(dev_priv);
400 vmw_kms_close(dev_priv);
401 vmw_overlay_close(dev_priv);
402 vmw_release_device(dev_priv);
403 pci_release_regions(dev->pdev);
404 } else {
405 vmw_kms_close(dev_priv);
406 vmw_overlay_close(dev_priv);
407 pci_release_region(dev->pdev, 2);
408 }
409 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
410 drm_irq_uninstall(dev_priv->dev);
411 if (dev->devname == vmw_devname)
412 dev->devname = NULL;
413 ttm_object_device_release(&dev_priv->tdev);
414 iounmap(dev_priv->mmio_virt);
415 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
416 dev_priv->mmio_size, DRM_MTRR_WC);
417 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
418 (void)ttm_bo_device_release(&dev_priv->bdev);
419 vmw_ttm_global_release(dev_priv);
420 ida_destroy(&dev_priv->gmr_ida);
421 idr_destroy(&dev_priv->surface_idr);
422 idr_destroy(&dev_priv->context_idr);
423 idr_destroy(&dev_priv->stream_idr);
424
425 kfree(dev_priv);
426
427 return 0;
428}
429
430static void vmw_postclose(struct drm_device *dev,
431 struct drm_file *file_priv)
432{
433 struct vmw_fpriv *vmw_fp;
434
435 vmw_fp = vmw_fpriv(file_priv);
436 ttm_object_file_release(&vmw_fp->tfile);
437 if (vmw_fp->locked_master)
438 drm_master_put(&vmw_fp->locked_master);
439 kfree(vmw_fp);
440}
441
442static int vmw_driver_open(struct drm_device *dev, struct drm_file *file_priv)
443{
444 struct vmw_private *dev_priv = vmw_priv(dev);
445 struct vmw_fpriv *vmw_fp;
446 int ret = -ENOMEM;
447
448 vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL);
449 if (unlikely(vmw_fp == NULL))
450 return ret;
451
452 vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10);
453 if (unlikely(vmw_fp->tfile == NULL))
454 goto out_no_tfile;
455
456 file_priv->driver_priv = vmw_fp;
457
458 if (unlikely(dev_priv->bdev.dev_mapping == NULL))
459 dev_priv->bdev.dev_mapping =
460 file_priv->filp->f_path.dentry->d_inode->i_mapping;
461
462 return 0;
463
464out_no_tfile:
465 kfree(vmw_fp);
466 return ret;
467}
468
469static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
470 unsigned long arg)
471{
472 struct drm_file *file_priv = filp->private_data;
473 struct drm_device *dev = file_priv->minor->dev;
474 unsigned int nr = DRM_IOCTL_NR(cmd);
fb1d9738
JB		 475
476 /*
e1f78003 477 * Do extra checking on driver private ioctls.
fb1d9738
JB		 478 */
479
480 if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
481 && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
482 struct drm_ioctl_desc *ioctl =
483 &vmw_ioctls[nr - DRM_COMMAND_BASE];
484
485 if (unlikely(ioctl->cmd != cmd)) {
486 DRM_ERROR("Invalid command format, ioctl %d\n",
487 nr - DRM_COMMAND_BASE);
488 return -EINVAL;
489 }
fb1d9738
JB		 490 }
491
e1f78003 492 return drm_ioctl(filp, cmd, arg);
fb1d9738
JB		 493}
494
495static int vmw_firstopen(struct drm_device *dev)
496{
497 struct vmw_private *dev_priv = vmw_priv(dev);
498 dev_priv->is_opened = true;
499
500 return 0;
501}
502
503static void vmw_lastclose(struct drm_device *dev)
504{
505 struct vmw_private *dev_priv = vmw_priv(dev);
506 struct drm_crtc *crtc;
507 struct drm_mode_set set;
508 int ret;
509
510 /**
511 * Do nothing on the lastclose call from drm_unload.
512 */
513
514 if (!dev_priv->is_opened)
515 return;
516
517 dev_priv->is_opened = false;
518 set.x = 0;
519 set.y = 0;
520 set.fb = NULL;
521 set.mode = NULL;
522 set.connectors = NULL;
523 set.num_connectors = 0;
524
525 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
526 set.crtc = crtc;
527 ret = crtc->funcs->set_config(&set);
528 WARN_ON(ret != 0);
529 }
530
531}
532
533static void vmw_master_init(struct vmw_master *vmaster)
534{
535 ttm_lock_init(&vmaster->lock);
536}
537
538static int vmw_master_create(struct drm_device *dev,
539 struct drm_master *master)
540{
541 struct vmw_master *vmaster;
542
543 DRM_INFO("Master create.\n");
544 vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL);
545 if (unlikely(vmaster == NULL))
546 return -ENOMEM;
547
548 ttm_lock_init(&vmaster->lock);
549 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
550 master->driver_priv = vmaster;
551
552 return 0;
553}
554
555static void vmw_master_destroy(struct drm_device *dev,
556 struct drm_master *master)
557{
558 struct vmw_master *vmaster = vmw_master(master);
559
560 DRM_INFO("Master destroy.\n");
561 master->driver_priv = NULL;
562 kfree(vmaster);
563}
564
565
566static int vmw_master_set(struct drm_device *dev,
567 struct drm_file *file_priv,
568 bool from_open)
569{
570 struct vmw_private *dev_priv = vmw_priv(dev);
571 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
572 struct vmw_master *active = dev_priv->active_master;
573 struct vmw_master *vmaster = vmw_master(file_priv->master);
574 int ret = 0;
575
576 DRM_INFO("Master set.\n");
577 if (dev_priv->stealth) {
578 ret = vmw_request_device(dev_priv);
579 if (unlikely(ret != 0))
580 return ret;
581 }
582
583 if (active) {
584 BUG_ON(active != &dev_priv->fbdev_master);
585 ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
586 if (unlikely(ret != 0))
587 goto out_no_active_lock;
588
589 ttm_lock_set_kill(&active->lock, true, SIGTERM);
590 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
591 if (unlikely(ret != 0)) {
592 DRM_ERROR("Unable to clean VRAM on "
593 "master drop.\n");
594 }
595
596 dev_priv->active_master = NULL;
597 }
598
599 ttm_lock_set_kill(&vmaster->lock, false, SIGTERM);
600 if (!from_open) {
601 ttm_vt_unlock(&vmaster->lock);
602 BUG_ON(vmw_fp->locked_master != file_priv->master);
603 drm_master_put(&vmw_fp->locked_master);
604 }
605
606 dev_priv->active_master = vmaster;
607
608 return 0;
609
610out_no_active_lock:
611 vmw_release_device(dev_priv);
612 return ret;
613}
614
615static void vmw_master_drop(struct drm_device *dev,
616 struct drm_file *file_priv,
617 bool from_release)
618{
619 struct vmw_private *dev_priv = vmw_priv(dev);
620 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
621 struct vmw_master *vmaster = vmw_master(file_priv->master);
622 int ret;
623
624 DRM_INFO("Master drop.\n");
625
626 /**
627 * Make sure the master doesn't disappear while we have
628 * it locked.
629 */
630
631 vmw_fp->locked_master = drm_master_get(file_priv->master);
632 ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
633
634 if (unlikely((ret != 0))) {
635 DRM_ERROR("Unable to lock TTM at VT switch.\n");
636 drm_master_put(&vmw_fp->locked_master);
637 }
638
639 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
640
641 if (dev_priv->stealth) {
642 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
643 if (unlikely(ret != 0))
644 DRM_ERROR("Unable to clean VRAM on master drop.\n");
645 vmw_release_device(dev_priv);
646 }
647 dev_priv->active_master = &dev_priv->fbdev_master;
648 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
649 ttm_vt_unlock(&dev_priv->fbdev_master.lock);
650
651 if (!dev_priv->stealth)
652 vmw_fb_on(dev_priv);
653}
654
655
656static void vmw_remove(struct pci_dev *pdev)
657{
658 struct drm_device *dev = pci_get_drvdata(pdev);
659
660 drm_put_dev(dev);
661}
662
d9f36a00
TH		 663static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
664 void *ptr)
665{
666 struct vmw_private *dev_priv =
667 container_of(nb, struct vmw_private, pm_nb);
668 struct vmw_master *vmaster = dev_priv->active_master;
669
670 switch (val) {
671 case PM_HIBERNATION_PREPARE:
672 case PM_SUSPEND_PREPARE:
673 ttm_suspend_lock(&vmaster->lock);
674
675 /**
676 * This empties VRAM and unbinds all GMR bindings.
677 * Buffer contents is moved to swappable memory.
678 */
679 ttm_bo_swapout_all(&dev_priv->bdev);
680 break;
681 case PM_POST_HIBERNATION:
682 case PM_POST_SUSPEND:
683 ttm_suspend_unlock(&vmaster->lock);
684 break;
685 case PM_RESTORE_PREPARE:
686 break;
687 case PM_POST_RESTORE:
688 break;
689 default:
690 break;
691 }
692 return 0;
693}
694
695/**
696 * These might not be needed with the virtual SVGA device.
697 */
698
699int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
700{
701 pci_save_state(pdev);
702 pci_disable_device(pdev);
703 pci_set_power_state(pdev, PCI_D3hot);
704 return 0;
705}
706
707int vmw_pci_resume(struct pci_dev *pdev)
708{
709 pci_set_power_state(pdev, PCI_D0);
710 pci_restore_state(pdev);
711 return pci_enable_device(pdev);
712}
713
fb1d9738
JB		 714static struct drm_driver driver = {
715 .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED |
716 DRIVER_MODESET,
717 .load = vmw_driver_load,
718 .unload = vmw_driver_unload,
719 .firstopen = vmw_firstopen,
720 .lastclose = vmw_lastclose,
721 .irq_preinstall = vmw_irq_preinstall,
722 .irq_postinstall = vmw_irq_postinstall,
723 .irq_uninstall = vmw_irq_uninstall,
724 .irq_handler = vmw_irq_handler,
725 .reclaim_buffers_locked = NULL,
726 .get_map_ofs = drm_core_get_map_ofs,
727 .get_reg_ofs = drm_core_get_reg_ofs,
728 .ioctls = vmw_ioctls,
729 .num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
730 .dma_quiescent = NULL, /*vmw_dma_quiescent, */
731 .master_create = vmw_master_create,
732 .master_destroy = vmw_master_destroy,
733 .master_set = vmw_master_set,
734 .master_drop = vmw_master_drop,
735 .open = vmw_driver_open,
736 .postclose = vmw_postclose,
737 .fops = {
738 .owner = THIS_MODULE,
739 .open = drm_open,
740 .release = drm_release,
741 .unlocked_ioctl = vmw_unlocked_ioctl,
742 .mmap = vmw_mmap,
743 .poll = drm_poll,
744 .fasync = drm_fasync,
745#if defined(CONFIG_COMPAT)
746 .compat_ioctl = drm_compat_ioctl,
747#endif
748 },
749 .pci_driver = {
750 .name = VMWGFX_DRIVER_NAME,
751 .id_table = vmw_pci_id_list,
752 .probe = vmw_probe,
d9f36a00
TH		 753 .remove = vmw_remove,
754 .suspend = vmw_pci_suspend,
755 .resume = vmw_pci_resume
fb1d9738
JB		 756 },
757 .name = VMWGFX_DRIVER_NAME,
758 .desc = VMWGFX_DRIVER_DESC,
759 .date = VMWGFX_DRIVER_DATE,
760 .major = VMWGFX_DRIVER_MAJOR,
761 .minor = VMWGFX_DRIVER_MINOR,
762 .patchlevel = VMWGFX_DRIVER_PATCHLEVEL
763};
764
765static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
766{
767 return drm_get_dev(pdev, ent, &driver);
768}
769
770static int __init vmwgfx_init(void)
771{
772 int ret;
773 ret = drm_init(&driver);
774 if (ret)
775 DRM_ERROR("Failed initializing DRM.\n");
776 return ret;
777}
778
779static void __exit vmwgfx_exit(void)
780{
781 drm_exit(&driver);
782}
783
784module_init(vmwgfx_init);
785module_exit(vmwgfx_exit);
786
787MODULE_AUTHOR("VMware Inc. and others");
788MODULE_DESCRIPTION("Standalone drm driver for the VMware SVGA device");
789MODULE_LICENSE("GPL and additional rights");
Linux kernel - Deliverables
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