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drm/vmwgfx: Add a kernel interface to create a framebuffer v2
[deliverable/linux.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
CommitLineData
fb1d9738
JB		 1/**************************************************************************
2 *
c8261a96 3 * Copyright © 2009-2014 VMware, Inc., Palo Alto, CA., USA
fb1d9738
JB		 4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
56d1c78d 30
fb1d9738
JB		 31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
c8261a96 34void vmw_du_cleanup(struct vmw_display_unit *du)
fb1d9738
JB		 35{
36 if (du->cursor_surface)
37 vmw_surface_unreference(&du->cursor_surface);
38 if (du->cursor_dmabuf)
39 vmw_dmabuf_unreference(&du->cursor_dmabuf);
34ea3d38 40 drm_connector_unregister(&du->connector);
fb1d9738
JB		 41 drm_crtc_cleanup(&du->crtc);
42 drm_encoder_cleanup(&du->encoder);
43 drm_connector_cleanup(&du->connector);
44}
45
46/*
47 * Display Unit Cursor functions
48 */
49
50int vmw_cursor_update_image(struct vmw_private *dev_priv,
51 u32 *image, u32 width, u32 height,
52 u32 hotspotX, u32 hotspotY)
53{
54 struct {
55 u32 cmd;
56 SVGAFifoCmdDefineAlphaCursor cursor;
57 } *cmd;
58 u32 image_size = width * height * 4;
59 u32 cmd_size = sizeof(*cmd) + image_size;
60
61 if (!image)
62 return -EINVAL;
63
64 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
65 if (unlikely(cmd == NULL)) {
66 DRM_ERROR("Fifo reserve failed.\n");
67 return -ENOMEM;
68 }
69
70 memset(cmd, 0, sizeof(*cmd));
71
72 memcpy(&cmd[1], image, image_size);
73
74 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
75 cmd->cursor.id = cpu_to_le32(0);
76 cmd->cursor.width = cpu_to_le32(width);
77 cmd->cursor.height = cpu_to_le32(height);
78 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
79 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
80
81 vmw_fifo_commit(dev_priv, cmd_size);
82
83 return 0;
84}
85
6a91d97e
JB		 86int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
87 struct vmw_dma_buffer *dmabuf,
88 u32 width, u32 height,
89 u32 hotspotX, u32 hotspotY)
90{
91 struct ttm_bo_kmap_obj map;
92 unsigned long kmap_offset;
93 unsigned long kmap_num;
94 void *virtual;
95 bool dummy;
96 int ret;
97
98 kmap_offset = 0;
99 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
100
ee3939e0 101 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL);
6a91d97e
JB		 102 if (unlikely(ret != 0)) {
103 DRM_ERROR("reserve failed\n");
104 return -EINVAL;
105 }
106
107 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
108 if (unlikely(ret != 0))
109 goto err_unreserve;
110
111 virtual = ttm_kmap_obj_virtual(&map, &dummy);
112 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
113 hotspotX, hotspotY);
114
115 ttm_bo_kunmap(&map);
116err_unreserve:
117 ttm_bo_unreserve(&dmabuf->base);
118
119 return ret;
120}
121
122
fb1d9738
JB		 123void vmw_cursor_update_position(struct vmw_private *dev_priv,
124 bool show, int x, int y)
125{
126 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
127 uint32_t count;
128
129 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
130 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
131 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
132 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
133 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
134}
135
136int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
137 uint32_t handle, uint32_t width, uint32_t height)
138{
139 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
fb1d9738
JB		 140 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
141 struct vmw_surface *surface = NULL;
142 struct vmw_dma_buffer *dmabuf = NULL;
143 int ret;
144
bfb89928
DV		 145 /*
146 * FIXME: Unclear whether there's any global state touched by the
147 * cursor_set function, especially vmw_cursor_update_position looks
148 * suspicious. For now take the easy route and reacquire all locks. We
149 * can do this since the caller in the drm core doesn't check anything
150 * which is protected by any looks.
151 */
21e88620 152 drm_modeset_unlock_crtc(crtc);
bfb89928
DV		 153 drm_modeset_lock_all(dev_priv->dev);
154
baa91d64 155 /* A lot of the code assumes this */
bfb89928
DV		 156 if (handle && (width != 64 || height != 64)) {
157 ret = -EINVAL;
158 goto out;
159 }
baa91d64 160
fb1d9738 161 if (handle) {
a5d0f576
VS		 162 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
163
e7ac9211
JB		 164 ret = vmw_user_lookup_handle(dev_priv, tfile,
165 handle, &surface, &dmabuf);
166 if (ret) {
167 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
bfb89928
DV		 168 ret = -EINVAL;
169 goto out;
fb1d9738
JB		 170 }
171 }
172
e7ac9211
JB		 173 /* need to do this before taking down old image */
174 if (surface && !surface->snooper.image) {
175 DRM_ERROR("surface not suitable for cursor\n");
176 vmw_surface_unreference(&surface);
bfb89928
DV		 177 ret = -EINVAL;
178 goto out;
e7ac9211
JB		 179 }
180
fb1d9738
JB		 181 /* takedown old cursor */
182 if (du->cursor_surface) {
183 du->cursor_surface->snooper.crtc = NULL;
184 vmw_surface_unreference(&du->cursor_surface);
185 }
186 if (du->cursor_dmabuf)
187 vmw_dmabuf_unreference(&du->cursor_dmabuf);
188
189 /* setup new image */
190 if (surface) {
191 /* vmw_user_surface_lookup takes one reference */
192 du->cursor_surface = surface;
193
194 du->cursor_surface->snooper.crtc = crtc;
195 du->cursor_age = du->cursor_surface->snooper.age;
196 vmw_cursor_update_image(dev_priv, surface->snooper.image,
197 64, 64, du->hotspot_x, du->hotspot_y);
198 } else if (dmabuf) {
fb1d9738
JB		 199 /* vmw_user_surface_lookup takes one reference */
200 du->cursor_dmabuf = dmabuf;
201
6a91d97e
JB		 202 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
203 du->hotspot_x, du->hotspot_y);
fb1d9738
JB		 204 } else {
205 vmw_cursor_update_position(dev_priv, false, 0, 0);
bfb89928
DV		 206 ret = 0;
207 goto out;
fb1d9738
JB		 208 }
209
da7653d6
TH		 210 vmw_cursor_update_position(dev_priv, true,
211 du->cursor_x + du->hotspot_x,
212 du->cursor_y + du->hotspot_y);
fb1d9738 213
bfb89928
DV		 214 ret = 0;
215out:
216 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 217 drm_modeset_lock_crtc(crtc, crtc->cursor);
bfb89928
DV		 218
219 return ret;
fb1d9738
JB		 220}
221
222int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
223{
224 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
225 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
226 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
227
228 du->cursor_x = x + crtc->x;
229 du->cursor_y = y + crtc->y;
230
dac35663
DV		 231 /*
232 * FIXME: Unclear whether there's any global state touched by the
233 * cursor_set function, especially vmw_cursor_update_position looks
234 * suspicious. For now take the easy route and reacquire all locks. We
235 * can do this since the caller in the drm core doesn't check anything
236 * which is protected by any looks.
237 */
21e88620 238 drm_modeset_unlock_crtc(crtc);
dac35663
DV		 239 drm_modeset_lock_all(dev_priv->dev);
240
fb1d9738 241 vmw_cursor_update_position(dev_priv, shown,
da7653d6
TH		 242 du->cursor_x + du->hotspot_x,
243 du->cursor_y + du->hotspot_y);
fb1d9738 244
dac35663 245 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 246 drm_modeset_lock_crtc(crtc, crtc->cursor);
dac35663 247
fb1d9738
JB		 248 return 0;
249}
250
251void vmw_kms_cursor_snoop(struct vmw_surface *srf,
252 struct ttm_object_file *tfile,
253 struct ttm_buffer_object *bo,
254 SVGA3dCmdHeader *header)
255{
256 struct ttm_bo_kmap_obj map;
257 unsigned long kmap_offset;
258 unsigned long kmap_num;
259 SVGA3dCopyBox *box;
260 unsigned box_count;
261 void *virtual;
262 bool dummy;
263 struct vmw_dma_cmd {
264 SVGA3dCmdHeader header;
265 SVGA3dCmdSurfaceDMA dma;
266 } *cmd;
2ac86371 267 int i, ret;
fb1d9738
JB		 268
269 cmd = container_of(header, struct vmw_dma_cmd, header);
270
271 /* No snooper installed */
272 if (!srf->snooper.image)
273 return;
274
275 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
276 DRM_ERROR("face and mipmap for cursors should never != 0\n");
277 return;
278 }
279
280 if (cmd->header.size < 64) {
281 DRM_ERROR("at least one full copy box must be given\n");
282 return;
283 }
284
285 box = (SVGA3dCopyBox *)&cmd[1];
286 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
287 sizeof(SVGA3dCopyBox);
288
2ac86371 289 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
fb1d9738
JB		 290 box->x != 0 || box->y != 0 || box->z != 0 ||
291 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
2ac86371 292 box->d != 1 || box_count != 1) {
fb1d9738 293 /* TODO handle none page aligned offsets */
2ac86371
JB		 294 /* TODO handle more dst & src != 0 */
295 /* TODO handle more then one copy */
296 DRM_ERROR("Cant snoop dma request for cursor!\n");
297 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
298 box->srcx, box->srcy, box->srcz,
299 box->x, box->y, box->z,
300 box->w, box->h, box->d, box_count,
301 cmd->dma.guest.ptr.offset);
fb1d9738
JB		 302 return;
303 }
304
305 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
306 kmap_num = (64*64*4) >> PAGE_SHIFT;
307
ee3939e0 308 ret = ttm_bo_reserve(bo, true, false, false, NULL);
fb1d9738
JB		 309 if (unlikely(ret != 0)) {
310 DRM_ERROR("reserve failed\n");
311 return;
312 }
313
314 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
315 if (unlikely(ret != 0))
316 goto err_unreserve;
317
318 virtual = ttm_kmap_obj_virtual(&map, &dummy);
319
2ac86371
JB		 320 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
321 memcpy(srf->snooper.image, virtual, 64*64*4);
322 } else {
323 /* Image is unsigned pointer. */
324 for (i = 0; i < box->h; i++)
325 memcpy(srf->snooper.image + i * 64,
326 virtual + i * cmd->dma.guest.pitch,
327 box->w * 4);
328 }
329
fb1d9738
JB		 330 srf->snooper.age++;
331
fb1d9738
JB		 332 ttm_bo_kunmap(&map);
333err_unreserve:
334 ttm_bo_unreserve(bo);
335}
336
337void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
338{
339 struct drm_device *dev = dev_priv->dev;
340 struct vmw_display_unit *du;
341 struct drm_crtc *crtc;
342
343 mutex_lock(&dev->mode_config.mutex);
344
345 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
346 du = vmw_crtc_to_du(crtc);
347 if (!du->cursor_surface ||
348 du->cursor_age == du->cursor_surface->snooper.age)
349 continue;
350
351 du->cursor_age = du->cursor_surface->snooper.age;
352 vmw_cursor_update_image(dev_priv,
353 du->cursor_surface->snooper.image,
354 64, 64, du->hotspot_x, du->hotspot_y);
355 }
356
357 mutex_unlock(&dev->mode_config.mutex);
358}
359
360/*
361 * Generic framebuffer code
362 */
363
fb1d9738
JB		 364/*
365 * Surface framebuffer code
366 */
367
847c5964 368static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
fb1d9738 369{
3a939a5e 370 struct vmw_framebuffer_surface *vfbs =
fb1d9738 371 vmw_framebuffer_to_vfbs(framebuffer);
3a939a5e 372
fb1d9738 373 drm_framebuffer_cleanup(framebuffer);
3a939a5e 374 vmw_surface_unreference(&vfbs->surface);
90ff18bc 375 ttm_base_object_unref(&vfbs->base.user_obj);
fb1d9738 376
3a939a5e 377 kfree(vfbs);
fb1d9738
JB		 378}
379
847c5964 380static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
02b00162 381 struct drm_file *file_priv,
fb1d9738
JB		 382 unsigned flags, unsigned color,
383 struct drm_clip_rect *clips,
384 unsigned num_clips)
385{
386 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
387 struct vmw_framebuffer_surface *vfbs =
388 vmw_framebuffer_to_vfbs(framebuffer);
fb1d9738 389 struct drm_clip_rect norect;
5deb65cf 390 int ret, inc = 1;
fb1d9738 391
c8261a96
SY		 392 /* Legacy Display Unit does not support 3D */
393 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB		 394 return -EINVAL;
395
73e9efd4
VS		 396 drm_modeset_lock_all(dev_priv->dev);
397
294adf7d 398 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS		 399 if (unlikely(ret != 0)) {
400 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 401 return ret;
73e9efd4 402 }
3a939a5e 403
fb1d9738
JB		 404 if (!num_clips) {
405 num_clips = 1;
406 clips = &norect;
407 norect.x1 = norect.y1 = 0;
408 norect.x2 = framebuffer->width;
409 norect.y2 = framebuffer->height;
410 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
411 num_clips /= 2;
412 inc = 2; /* skip source rects */
413 }
414
c8261a96 415 if (dev_priv->active_display_unit == vmw_du_screen_object)
10b1e0ca
TH		 416 ret = vmw_kms_sou_do_surface_dirty(dev_priv, &vfbs->base,
417 clips, NULL, NULL, 0, 0,
418 num_clips, inc, NULL);
35c05125 419 else
6bf6bf03
TH		 420 ret = vmw_kms_stdu_surface_dirty(dev_priv, &vfbs->base,
421 clips, NULL, NULL, 0, 0,
422 num_clips, inc, NULL);
fb1d9738 423
3eab3d9e 424 vmw_fifo_flush(dev_priv, false);
294adf7d 425 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS		 426
427 drm_modeset_unlock_all(dev_priv->dev);
428
fb1d9738
JB		 429 return 0;
430}
431
10b1e0ca
TH		 432/**
433 * vmw_kms_readback - Perform a readback from the screen system to
434 * a dma-buffer backed framebuffer.
435 *
436 * @dev_priv: Pointer to the device private structure.
437 * @file_priv: Pointer to a struct drm_file identifying the caller.
438 * Must be set to NULL if @user_fence_rep is NULL.
439 * @vfb: Pointer to the dma-buffer backed framebuffer.
440 * @user_fence_rep: User-space provided structure for fence information.
441 * Must be set to non-NULL if @file_priv is non-NULL.
442 * @vclips: Array of clip rects.
443 * @num_clips: Number of clip rects in @vclips.
444 *
445 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
446 * interrupted.
447 */
448int vmw_kms_readback(struct vmw_private *dev_priv,
449 struct drm_file *file_priv,
450 struct vmw_framebuffer *vfb,
451 struct drm_vmw_fence_rep __user *user_fence_rep,
452 struct drm_vmw_rect *vclips,
453 uint32_t num_clips)
454{
455 switch (dev_priv->active_display_unit) {
456 case vmw_du_screen_object:
457 return vmw_kms_sou_readback(dev_priv, file_priv, vfb,
458 user_fence_rep, vclips, num_clips);
6bf6bf03
TH		 459 case vmw_du_screen_target:
460 return vmw_kms_stdu_dma(dev_priv, file_priv, vfb,
461 user_fence_rep, NULL, vclips, num_clips,
462 1, false, true);
10b1e0ca
TH		 463 default:
464 WARN_ONCE(true,
465 "Readback called with invalid display system.\n");
6bf6bf03 466}
10b1e0ca
TH		 467
468 return -ENOSYS;
469}
470
471
fb1d9738
JB		 472static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
473 .destroy = vmw_framebuffer_surface_destroy,
474 .dirty = vmw_framebuffer_surface_dirty,
fb1d9738
JB		 475};
476
d3216a0c
TH		 477static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
478 struct vmw_surface *surface,
479 struct vmw_framebuffer **out,
480 const struct drm_mode_fb_cmd
f89c6c32
SY		 481 *mode_cmd,
482 bool is_dmabuf_proxy)
fb1d9738
JB		 483
484{
485 struct drm_device *dev = dev_priv->dev;
486 struct vmw_framebuffer_surface *vfbs;
d3216a0c 487 enum SVGA3dSurfaceFormat format;
fb1d9738
JB		 488 int ret;
489
c8261a96
SY		 490 /* 3D is only supported on HWv8 and newer hosts */
491 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB		 492 return -ENOSYS;
493
d3216a0c
TH		 494 /*
495 * Sanity checks.
496 */
497
e7ac9211
JB		 498 /* Surface must be marked as a scanout. */
499 if (unlikely(!surface->scanout))
500 return -EINVAL;
501
d3216a0c
TH		 502 if (unlikely(surface->mip_levels[0] != 1 ||
503 surface->num_sizes != 1 ||
b360a3ce
TH		 504 surface->base_size.width < mode_cmd->width ||
505 surface->base_size.height < mode_cmd->height ||
506 surface->base_size.depth != 1)) {
d3216a0c
TH		 507 DRM_ERROR("Incompatible surface dimensions "
508 "for requested mode.\n");
509 return -EINVAL;
510 }
511
512 switch (mode_cmd->depth) {
513 case 32:
514 format = SVGA3D_A8R8G8B8;
515 break;
516 case 24:
517 format = SVGA3D_X8R8G8B8;
518 break;
519 case 16:
520 format = SVGA3D_R5G6B5;
521 break;
522 case 15:
523 format = SVGA3D_A1R5G5B5;
524 break;
525 default:
526 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
527 return -EINVAL;
528 }
529
530 if (unlikely(format != surface->format)) {
531 DRM_ERROR("Invalid surface format for requested mode.\n");
532 return -EINVAL;
533 }
534
fb1d9738
JB		 535 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
536 if (!vfbs) {
537 ret = -ENOMEM;
538 goto out_err1;
539 }
540
fb1d9738
JB		 541 if (!vmw_surface_reference(surface)) {
542 DRM_ERROR("failed to reference surface %p\n", surface);
80f0b5af
DV		 543 ret = -EINVAL;
544 goto out_err2;
fb1d9738
JB		 545 }
546
547 /* XXX get the first 3 from the surface info */
d3216a0c 548 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 549 vfbs->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH		 550 vfbs->base.base.depth = mode_cmd->depth;
551 vfbs->base.base.width = mode_cmd->width;
552 vfbs->base.base.height = mode_cmd->height;
fb1d9738 553 vfbs->surface = surface;
90ff18bc 554 vfbs->base.user_handle = mode_cmd->handle;
f89c6c32 555 vfbs->is_dmabuf_proxy = is_dmabuf_proxy;
3a939a5e 556
fb1d9738
JB		 557 *out = &vfbs->base;
558
80f0b5af
DV		 559 ret = drm_framebuffer_init(dev, &vfbs->base.base,
560 &vmw_framebuffer_surface_funcs);
561 if (ret)
562 goto out_err3;
563
fb1d9738
JB		 564 return 0;
565
566out_err3:
80f0b5af 567 vmw_surface_unreference(&surface);
fb1d9738
JB		 568out_err2:
569 kfree(vfbs);
570out_err1:
571 return ret;
572}
573
574/*
575 * Dmabuf framebuffer code
576 */
577
847c5964 578static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
fb1d9738
JB		 579{
580 struct vmw_framebuffer_dmabuf *vfbd =
581 vmw_framebuffer_to_vfbd(framebuffer);
582
583 drm_framebuffer_cleanup(framebuffer);
584 vmw_dmabuf_unreference(&vfbd->buffer);
90ff18bc 585 ttm_base_object_unref(&vfbd->base.user_obj);
fb1d9738
JB		 586
587 kfree(vfbd);
588}
589
847c5964 590static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
02b00162 591 struct drm_file *file_priv,
fb1d9738
JB		 592 unsigned flags, unsigned color,
593 struct drm_clip_rect *clips,
594 unsigned num_clips)
595{
596 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
5deb65cf
JB		 597 struct vmw_framebuffer_dmabuf *vfbd =
598 vmw_framebuffer_to_vfbd(framebuffer);
fb1d9738 599 struct drm_clip_rect norect;
5deb65cf 600 int ret, increment = 1;
fb1d9738 601
73e9efd4
VS		 602 drm_modeset_lock_all(dev_priv->dev);
603
294adf7d 604 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS		 605 if (unlikely(ret != 0)) {
606 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 607 return ret;
73e9efd4 608 }
3a939a5e 609
df1c93ba 610 if (!num_clips) {
fb1d9738
JB		 611 num_clips = 1;
612 clips = &norect;
613 norect.x1 = norect.y1 = 0;
614 norect.x2 = framebuffer->width;
615 norect.y2 = framebuffer->height;
616 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
617 num_clips /= 2;
618 increment = 2;
619 }
620
6bf6bf03
TH		 621 switch (dev_priv->active_display_unit) {
622 case vmw_du_screen_target:
623 ret = vmw_kms_stdu_dma(dev_priv, NULL, &vfbd->base, NULL,
624 clips, NULL, num_clips, increment,
625 true, true);
626 break;
627 case vmw_du_screen_object:
10b1e0ca 628 ret = vmw_kms_sou_do_dmabuf_dirty(dev_priv, &vfbd->base,
c8261a96 629 clips, num_clips, increment,
10b1e0ca 630 true,
c8261a96 631 NULL);
6bf6bf03
TH		 632 break;
633 default:
634 ret = -ENOSYS;
635 WARN_ONCE(true,
636 "Dirty called with invalid display system.\n");
637 break;
56d1c78d 638 }
fb1d9738 639
3eab3d9e 640 vmw_fifo_flush(dev_priv, false);
294adf7d 641 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS		 642
643 drm_modeset_unlock_all(dev_priv->dev);
644
5deb65cf 645 return ret;
fb1d9738
JB		 646}
647
648static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
649 .destroy = vmw_framebuffer_dmabuf_destroy,
650 .dirty = vmw_framebuffer_dmabuf_dirty,
fb1d9738
JB		 651};
652
497a3ff9
JB		 653/**
654 * Pin the dmabuffer to the start of vram.
655 */
fd006a43 656static int vmw_framebuffer_pin(struct vmw_framebuffer *vfb)
fb1d9738
JB		 657{
658 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 659 struct vmw_dma_buffer *buf;
fb1d9738
JB		 660 int ret;
661
fd006a43
TH		 662 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
663 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
fb1d9738 664
fd006a43
TH		 665 if (!buf)
666 return 0;
fb1d9738 667
fd006a43
TH		 668 switch (dev_priv->active_display_unit) {
669 case vmw_du_legacy:
670 vmw_overlay_pause_all(dev_priv);
671 ret = vmw_dmabuf_pin_in_start_of_vram(dev_priv, buf, false);
672 vmw_overlay_resume_all(dev_priv);
673 break;
674 case vmw_du_screen_object:
675 case vmw_du_screen_target:
676 if (vfb->dmabuf)
677 return vmw_dmabuf_pin_in_vram_or_gmr(dev_priv, buf,
678 false);
fb1d9738 679
fd006a43
TH		 680 return vmw_dmabuf_pin_in_placement(dev_priv, buf,
681 &vmw_mob_placement, false);
682 default:
683 return -EINVAL;
684 }
316ab13a 685
fd006a43 686 return ret;
fb1d9738
JB		 687}
688
fd006a43 689static int vmw_framebuffer_unpin(struct vmw_framebuffer *vfb)
fb1d9738
JB		 690{
691 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 692 struct vmw_dma_buffer *buf;
fb1d9738 693
fd006a43
TH		 694 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
695 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
696
697 if (WARN_ON(!buf))
fb1d9738 698 return 0;
fb1d9738 699
fd006a43 700 return vmw_dmabuf_unpin(dev_priv, buf, false);
fb1d9738
JB		 701}
702
f89c6c32
SY		 703/**
704 * vmw_create_dmabuf_proxy - create a proxy surface for the DMA buf
705 *
706 * @dev: DRM device
707 * @mode_cmd: parameters for the new surface
708 * @dmabuf_mob: MOB backing the DMA buf
709 * @srf_out: newly created surface
710 *
711 * When the content FB is a DMA buf, we create a surface as a proxy to the
712 * same buffer. This way we can do a surface copy rather than a surface DMA.
713 * This is a more efficient approach
714 *
715 * RETURNS:
716 * 0 on success, error code otherwise
717 */
718static int vmw_create_dmabuf_proxy(struct drm_device *dev,
fd006a43 719 const struct drm_mode_fb_cmd *mode_cmd,
f89c6c32
SY		 720 struct vmw_dma_buffer *dmabuf_mob,
721 struct vmw_surface **srf_out)
722{
723 uint32_t format;
724 struct drm_vmw_size content_base_size;
6bf6bf03 725 struct vmw_resource *res;
f89c6c32
SY		 726 int ret;
727
f89c6c32
SY		 728 switch (mode_cmd->depth) {
729 case 32:
730 case 24:
731 format = SVGA3D_X8R8G8B8;
732 break;
733
734 case 16:
735 case 15:
736 format = SVGA3D_R5G6B5;
737 break;
738
739 case 8:
740 format = SVGA3D_P8;
741 break;
742
743 default:
744 DRM_ERROR("Invalid framebuffer format %d\n", mode_cmd->depth);
745 return -EINVAL;
746 }
747
748 content_base_size.width = mode_cmd->width;
749 content_base_size.height = mode_cmd->height;
750 content_base_size.depth = 1;
751
752 ret = vmw_surface_gb_priv_define(dev,
753 0, /* kernel visible only */
754 0, /* flags */
755 format,
756 true, /* can be a scanout buffer */
757 1, /* num of mip levels */
758 0,
759 content_base_size,
760 srf_out);
761 if (ret) {
762 DRM_ERROR("Failed to allocate proxy content buffer\n");
763 return ret;
764 }
765
6bf6bf03 766 res = &(*srf_out)->res;
f89c6c32 767
6bf6bf03
TH		 768 /* Reserve and switch the backing mob. */
769 mutex_lock(&res->dev_priv->cmdbuf_mutex);
770 (void) vmw_resource_reserve(res, false, true);
771 vmw_dmabuf_unreference(&res->backup);
772 res->backup = vmw_dmabuf_reference(dmabuf_mob);
773 res->backup_offset = 0;
774 vmw_resource_unreserve(res, NULL, 0);
775 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
f89c6c32 776
6bf6bf03 777 return 0;
f89c6c32
SY		 778}
779
780
781
d3216a0c
TH		 782static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
783 struct vmw_dma_buffer *dmabuf,
784 struct vmw_framebuffer **out,
785 const struct drm_mode_fb_cmd
786 *mode_cmd)
fb1d9738
JB		 787
788{
789 struct drm_device *dev = dev_priv->dev;
790 struct vmw_framebuffer_dmabuf *vfbd;
d3216a0c 791 unsigned int requested_size;
fb1d9738
JB		 792 int ret;
793
d3216a0c
TH		 794 requested_size = mode_cmd->height * mode_cmd->pitch;
795 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
796 DRM_ERROR("Screen buffer object size is too small "
797 "for requested mode.\n");
798 return -EINVAL;
799 }
800
c337ada7 801 /* Limited framebuffer color depth support for screen objects */
c8261a96 802 if (dev_priv->active_display_unit == vmw_du_screen_object) {
c337ada7
JB		 803 switch (mode_cmd->depth) {
804 case 32:
805 case 24:
806 /* Only support 32 bpp for 32 and 24 depth fbs */
807 if (mode_cmd->bpp == 32)
808 break;
809
810 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
811 mode_cmd->depth, mode_cmd->bpp);
812 return -EINVAL;
813 case 16:
814 case 15:
815 /* Only support 16 bpp for 16 and 15 depth fbs */
816 if (mode_cmd->bpp == 16)
817 break;
818
819 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
820 mode_cmd->depth, mode_cmd->bpp);
821 return -EINVAL;
822 default:
823 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
824 return -EINVAL;
825 }
826 }
827
fb1d9738
JB		 828 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
829 if (!vfbd) {
830 ret = -ENOMEM;
831 goto out_err1;
832 }
833
fb1d9738
JB		 834 if (!vmw_dmabuf_reference(dmabuf)) {
835 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
80f0b5af
DV		 836 ret = -EINVAL;
837 goto out_err2;
fb1d9738
JB		 838 }
839
d3216a0c 840 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 841 vfbd->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH		 842 vfbd->base.base.depth = mode_cmd->depth;
843 vfbd->base.base.width = mode_cmd->width;
844 vfbd->base.base.height = mode_cmd->height;
2fcd5a73 845 vfbd->base.dmabuf = true;
fb1d9738 846 vfbd->buffer = dmabuf;
90ff18bc 847 vfbd->base.user_handle = mode_cmd->handle;
fb1d9738
JB		 848 *out = &vfbd->base;
849
80f0b5af
DV		 850 ret = drm_framebuffer_init(dev, &vfbd->base.base,
851 &vmw_framebuffer_dmabuf_funcs);
852 if (ret)
853 goto out_err3;
854
fb1d9738
JB		 855 return 0;
856
857out_err3:
80f0b5af 858 vmw_dmabuf_unreference(&dmabuf);
fb1d9738
JB		 859out_err2:
860 kfree(vfbd);
861out_err1:
862 return ret;
863}
864
fd006a43
TH		 865/**
866 * vmw_kms_new_framebuffer - Create a new framebuffer.
867 *
868 * @dev_priv: Pointer to device private struct.
869 * @dmabuf: Pointer to dma buffer to wrap the kms framebuffer around.
870 * Either @dmabuf or @surface must be NULL.
871 * @surface: Pointer to a surface to wrap the kms framebuffer around.
872 * Either @dmabuf or @surface must be NULL.
873 * @only_2d: No presents will occur to this dma buffer based framebuffer. This
874 * Helps the code to do some important optimizations.
875 * @mode_cmd: Frame-buffer metadata.
876 */
877struct vmw_framebuffer *
878vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
879 struct vmw_dma_buffer *dmabuf,
880 struct vmw_surface *surface,
881 bool only_2d,
882 const struct drm_mode_fb_cmd *mode_cmd)
883{
884 struct vmw_framebuffer *vfb;
885 bool is_dmabuf_proxy = false;
886 int ret;
887
888 /*
889 * We cannot use the SurfaceDMA command in an non-accelerated VM,
890 * therefore, wrap the DMA buf in a surface so we can use the
891 * SurfaceCopy command.
892 */
893 if (dmabuf && only_2d &&
894 dev_priv->active_display_unit == vmw_du_screen_target) {
895 ret = vmw_create_dmabuf_proxy(dev_priv->dev, mode_cmd,
896 dmabuf, &surface);
897 if (ret)
898 return ERR_PTR(ret);
899
900 is_dmabuf_proxy = true;
901 }
902
903 /* Create the new framebuffer depending one what we have */
904 if (surface)
905 ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
906 mode_cmd,
907 is_dmabuf_proxy);
908 else if (dmabuf)
909 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, dmabuf, &vfb,
910 mode_cmd);
911 else
912 BUG();
913
914 if (ret)
915 return ERR_PTR(ret);
916
917 vfb->pin = vmw_framebuffer_pin;
918 vfb->unpin = vmw_framebuffer_unpin;
919
920 return vfb;
921}
922
fb1d9738
JB		 923/*
924 * Generic Kernel modesetting functions
925 */
926
927static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
928 struct drm_file *file_priv,
308e5bcb 929 struct drm_mode_fb_cmd2 *mode_cmd2)
fb1d9738
JB		 930{
931 struct vmw_private *dev_priv = vmw_priv(dev);
932 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
933 struct vmw_framebuffer *vfb = NULL;
934 struct vmw_surface *surface = NULL;
935 struct vmw_dma_buffer *bo = NULL;
90ff18bc 936 struct ttm_base_object *user_obj;
308e5bcb 937 struct drm_mode_fb_cmd mode_cmd;
fb1d9738
JB		 938 int ret;
939
308e5bcb
JB		 940 mode_cmd.width = mode_cmd2->width;
941 mode_cmd.height = mode_cmd2->height;
942 mode_cmd.pitch = mode_cmd2->pitches[0];
943 mode_cmd.handle = mode_cmd2->handles[0];
248dbc23 944 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
308e5bcb
JB		 945 &mode_cmd.bpp);
946
d3216a0c
TH		 947 /**
948 * This code should be conditioned on Screen Objects not being used.
949 * If screen objects are used, we can allocate a GMR to hold the
950 * requested framebuffer.
951 */
952
8a783896 953 if (!vmw_kms_validate_mode_vram(dev_priv,
1a464cbb
LT		 954 mode_cmd.pitch,
955 mode_cmd.height)) {
c8261a96 956 DRM_ERROR("Requested mode exceed bounding box limit.\n");
d9826409 957 return ERR_PTR(-ENOMEM);
d3216a0c
TH		 958 }
959
90ff18bc
TH		 960 /*
961 * Take a reference on the user object of the resource
962 * backing the kms fb. This ensures that user-space handle
963 * lookups on that resource will always work as long as
964 * it's registered with a kms framebuffer. This is important,
965 * since vmw_execbuf_process identifies resources in the
966 * command stream using user-space handles.
967 */
968
308e5bcb 969 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
90ff18bc
TH		 970 if (unlikely(user_obj == NULL)) {
971 DRM_ERROR("Could not locate requested kms frame buffer.\n");
972 return ERR_PTR(-ENOENT);
973 }
974
d3216a0c
TH		 975 /**
976 * End conditioned code.
977 */
978
e7ac9211
JB		 979 /* returns either a dmabuf or surface */
980 ret = vmw_user_lookup_handle(dev_priv, tfile,
4cf73129 981 mode_cmd.handle,
e7ac9211 982 &surface, &bo);
fb1d9738 983 if (ret)
e7ac9211
JB		 984 goto err_out;
985
fd006a43
TH		 986 vfb = vmw_kms_new_framebuffer(dev_priv, bo, surface,
987 !(dev_priv->capabilities & SVGA_CAP_3D),
988 &mode_cmd);
989 if (IS_ERR(vfb)) {
990 ret = PTR_ERR(vfb);
991 goto err_out;
992 }
e7ac9211
JB		 993
994err_out:
995 /* vmw_user_lookup_handle takes one ref so does new_fb */
996 if (bo)
997 vmw_dmabuf_unreference(&bo);
998 if (surface)
999 vmw_surface_unreference(&surface);
fb1d9738
JB		 1000
1001 if (ret) {
1002 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
90ff18bc 1003 ttm_base_object_unref(&user_obj);
cce13ff7 1004 return ERR_PTR(ret);
90ff18bc
TH		 1005 } else
1006 vfb->user_obj = user_obj;
fb1d9738
JB		 1007
1008 return &vfb->base;
1009}
1010
e6ecefaa 1011static const struct drm_mode_config_funcs vmw_kms_funcs = {
fb1d9738 1012 .fb_create = vmw_kms_fb_create,
fb1d9738
JB		 1013};
1014
c8261a96 1015int vmw_kms_generic_present(struct vmw_private *dev_priv,
2fcd5a73
JB		 1016 struct drm_file *file_priv,
1017 struct vmw_framebuffer *vfb,
1018 struct vmw_surface *surface,
1019 uint32_t sid,
1020 int32_t destX, int32_t destY,
1021 struct drm_vmw_rect *clips,
1022 uint32_t num_clips)
1023{
10b1e0ca
TH		 1024 return vmw_kms_sou_do_surface_dirty(dev_priv, vfb, NULL, clips,
1025 &surface->res, destX, destY,
1026 num_clips, 1, NULL);
2fcd5a73
JB		 1027}
1028
6bf6bf03 1029
c8261a96
SY		 1030int vmw_kms_present(struct vmw_private *dev_priv,
1031 struct drm_file *file_priv,
1032 struct vmw_framebuffer *vfb,
1033 struct vmw_surface *surface,
1034 uint32_t sid,
1035 int32_t destX, int32_t destY,
1036 struct drm_vmw_rect *clips,
1037 uint32_t num_clips)
1038{
35c05125
SY		 1039 int ret;
1040
6bf6bf03
TH		 1041 switch (dev_priv->active_display_unit) {
1042 case vmw_du_screen_target:
1043 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, clips,
1044 &surface->res, destX, destY,
1045 num_clips, 1, NULL);
1046 break;
1047 case vmw_du_screen_object:
1048 ret = vmw_kms_generic_present(dev_priv, file_priv, vfb, surface,
1049 sid, destX, destY, clips,
1050 num_clips);
1051 break;
1052 default:
1053 WARN_ONCE(true,
1054 "Present called with invalid display system.\n");
1055 ret = -ENOSYS;
1056 break;
1057 }
35c05125
SY		 1058 if (ret)
1059 return ret;
1060
1061 vmw_fifo_flush(dev_priv, false);
1062
1063 return 0;
c8261a96
SY		 1064}
1065
fb1d9738
JB		 1066int vmw_kms_init(struct vmw_private *dev_priv)
1067{
1068 struct drm_device *dev = dev_priv->dev;
1069 int ret;
1070
1071 drm_mode_config_init(dev);
1072 dev->mode_config.funcs = &vmw_kms_funcs;
3bef3572
JB		 1073 dev->mode_config.min_width = 1;
1074 dev->mode_config.min_height = 1;
7e71f8a5
JB		 1075 /* assumed largest fb size */
1076 dev->mode_config.max_width = 8192;
1077 dev->mode_config.max_height = 8192;
fb1d9738 1078
35c05125
SY		 1079 ret = vmw_kms_stdu_init_display(dev_priv);
1080 if (ret) {
1081 ret = vmw_kms_sou_init_display(dev_priv);
1082 if (ret) /* Fallback */
1083 ret = vmw_kms_ldu_init_display(dev_priv);
1084 }
fb1d9738 1085
c8261a96 1086 return ret;
fb1d9738
JB		 1087}
1088
1089int vmw_kms_close(struct vmw_private *dev_priv)
1090{
c8261a96
SY		 1091 int ret;
1092
fb1d9738
JB		 1093 /*
1094 * Docs says we should take the lock before calling this function
1095 * but since it destroys encoders and our destructor calls
1096 * drm_encoder_cleanup which takes the lock we deadlock.
1097 */
1098 drm_mode_config_cleanup(dev_priv->dev);
c8261a96
SY		 1099 if (dev_priv->active_display_unit == vmw_du_screen_object)
1100 ret = vmw_kms_sou_close_display(dev_priv);
35c05125
SY		 1101 else if (dev_priv->active_display_unit == vmw_du_screen_target)
1102 ret = vmw_kms_stdu_close_display(dev_priv);
c0d18316 1103 else
c8261a96
SY		 1104 ret = vmw_kms_ldu_close_display(dev_priv);
1105
1106 return ret;
fb1d9738
JB		 1107}
1108
1109int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1110 struct drm_file *file_priv)
1111{
1112 struct drm_vmw_cursor_bypass_arg *arg = data;
1113 struct vmw_display_unit *du;
fb1d9738
JB		 1114 struct drm_crtc *crtc;
1115 int ret = 0;
1116
1117
1118 mutex_lock(&dev->mode_config.mutex);
1119 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1120
1121 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1122 du = vmw_crtc_to_du(crtc);
1123 du->hotspot_x = arg->xhot;
1124 du->hotspot_y = arg->yhot;
1125 }
1126
1127 mutex_unlock(&dev->mode_config.mutex);
1128 return 0;
1129 }
1130
a4cd5d68
RC		 1131 crtc = drm_crtc_find(dev, arg->crtc_id);
1132 if (!crtc) {
4ae87ff0 1133 ret = -ENOENT;
fb1d9738
JB		 1134 goto out;
1135 }
1136
fb1d9738
JB		 1137 du = vmw_crtc_to_du(crtc);
1138
1139 du->hotspot_x = arg->xhot;
1140 du->hotspot_y = arg->yhot;
1141
1142out:
1143 mutex_unlock(&dev->mode_config.mutex);
1144
1145 return ret;
1146}
1147
0bef23f9 1148int vmw_kms_write_svga(struct vmw_private *vmw_priv,
d7e1958d 1149 unsigned width, unsigned height, unsigned pitch,
6558429b 1150 unsigned bpp, unsigned depth)
fb1d9738 1151{
d7e1958d
JB		 1152 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1153 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1154 else if (vmw_fifo_have_pitchlock(vmw_priv))
1155 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1156 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1157 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
6558429b 1158 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
0bef23f9
MD		 1159
1160 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1161 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1162 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1163 return -EINVAL;
1164 }
1165
1166 return 0;
d7e1958d 1167}
fb1d9738 1168
d7e1958d
JB		 1169int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1170{
7c4f7780
TH		 1171 struct vmw_vga_topology_state *save;
1172 uint32_t i;
1173
fb1d9738
JB		 1174 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1175 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
7c4f7780 1176 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
d7e1958d
JB		 1177 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1178 vmw_priv->vga_pitchlock =
7c4f7780 1179 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
d7e1958d 1180 else if (vmw_fifo_have_pitchlock(vmw_priv))
7c4f7780 1181 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
c8261a96 1182 SVGA_FIFO_PITCHLOCK);
7c4f7780
TH		 1183
1184 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1185 return 0;
fb1d9738 1186
7c4f7780
TH		 1187 vmw_priv->num_displays = vmw_read(vmw_priv,
1188 SVGA_REG_NUM_GUEST_DISPLAYS);
1189
029e50bf
TH		 1190 if (vmw_priv->num_displays == 0)
1191 vmw_priv->num_displays = 1;
1192
7c4f7780
TH		 1193 for (i = 0; i < vmw_priv->num_displays; ++i) {
1194 save = &vmw_priv->vga_save[i];
1195 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1196 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1197 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1198 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1199 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1200 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1201 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
30c78bb8
TH		 1202 if (i == 0 && vmw_priv->num_displays == 1 &&
1203 save->width == 0 && save->height == 0) {
1204
1205 /*
1206 * It should be fairly safe to assume that these
1207 * values are uninitialized.
1208 */
1209
1210 save->width = vmw_priv->vga_width - save->pos_x;
1211 save->height = vmw_priv->vga_height - save->pos_y;
1212 }
7c4f7780 1213 }
30c78bb8 1214
fb1d9738
JB		 1215 return 0;
1216}
1217
1218int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1219{
7c4f7780
TH		 1220 struct vmw_vga_topology_state *save;
1221 uint32_t i;
1222
fb1d9738
JB		 1223 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1224 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
7c4f7780 1225 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
d7e1958d
JB		 1226 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1227 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1228 vmw_priv->vga_pitchlock);
1229 else if (vmw_fifo_have_pitchlock(vmw_priv))
1230 iowrite32(vmw_priv->vga_pitchlock,
1231 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
fb1d9738 1232
7c4f7780
TH		 1233 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1234 return 0;
1235
1236 for (i = 0; i < vmw_priv->num_displays; ++i) {
1237 save = &vmw_priv->vga_save[i];
1238 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1239 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1240 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1241 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1242 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1243 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1244 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1245 }
1246
fb1d9738
JB		 1247 return 0;
1248}
d8bd19d2 1249
e133e737
TH		 1250bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1251 uint32_t pitch,
1252 uint32_t height)
1253{
35c05125
SY		 1254 return ((u64) pitch * (u64) height) < (u64)
1255 ((dev_priv->active_display_unit == vmw_du_screen_target) ?
1256 dev_priv->prim_bb_mem : dev_priv->vram_size);
e133e737
TH		 1257}
1258
1c482ab3
JB		 1259
1260/**
1261 * Function called by DRM code called with vbl_lock held.
1262 */
7a1c2f6c
TH		 1263u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1264{
1265 return 0;
1266}
626ab771 1267
1c482ab3
JB		 1268/**
1269 * Function called by DRM code called with vbl_lock held.
1270 */
1271int vmw_enable_vblank(struct drm_device *dev, int crtc)
1272{
1273 return -ENOSYS;
1274}
1275
1276/**
1277 * Function called by DRM code called with vbl_lock held.
1278 */
1279void vmw_disable_vblank(struct drm_device *dev, int crtc)
1280{
1281}
1282
626ab771
JB		 1283
1284/*
1285 * Small shared kms functions.
1286 */
1287
847c5964 1288static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
626ab771
JB		 1289 struct drm_vmw_rect *rects)
1290{
1291 struct drm_device *dev = dev_priv->dev;
1292 struct vmw_display_unit *du;
1293 struct drm_connector *con;
626ab771
JB		 1294
1295 mutex_lock(&dev->mode_config.mutex);
1296
1297#if 0
6ea77d13
TH		 1298 {
1299 unsigned int i;
1300
1301 DRM_INFO("%s: new layout ", __func__);
1302 for (i = 0; i < num; i++)
1303 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1304 rects[i].w, rects[i].h);
1305 DRM_INFO("\n");
1306 }
626ab771
JB		 1307#endif
1308
1309 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1310 du = vmw_connector_to_du(con);
1311 if (num > du->unit) {
1312 du->pref_width = rects[du->unit].w;
1313 du->pref_height = rects[du->unit].h;
1314 du->pref_active = true;
cd2b89e7
TH		 1315 du->gui_x = rects[du->unit].x;
1316 du->gui_y = rects[du->unit].y;
626ab771
JB		 1317 } else {
1318 du->pref_width = 800;
1319 du->pref_height = 600;
1320 du->pref_active = false;
1321 }
1322 con->status = vmw_du_connector_detect(con, true);
1323 }
1324
1325 mutex_unlock(&dev->mode_config.mutex);
1326
1327 return 0;
1328}
1329
1330void vmw_du_crtc_save(struct drm_crtc *crtc)
1331{
1332}
1333
1334void vmw_du_crtc_restore(struct drm_crtc *crtc)
1335{
1336}
1337
1338void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1339 u16 *r, u16 *g, u16 *b,
1340 uint32_t start, uint32_t size)
1341{
1342 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1343 int i;
1344
1345 for (i = 0; i < size; i++) {
1346 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1347 r[i], g[i], b[i]);
1348 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1349 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1350 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1351 }
1352}
1353
1354void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1355{
1356}
1357
1358void vmw_du_connector_save(struct drm_connector *connector)
1359{
1360}
1361
1362void vmw_du_connector_restore(struct drm_connector *connector)
1363{
1364}
1365
1366enum drm_connector_status
1367vmw_du_connector_detect(struct drm_connector *connector, bool force)
1368{
1369 uint32_t num_displays;
1370 struct drm_device *dev = connector->dev;
1371 struct vmw_private *dev_priv = vmw_priv(dev);
cd2b89e7 1372 struct vmw_display_unit *du = vmw_connector_to_du(connector);
626ab771 1373
626ab771 1374 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
626ab771 1375
cd2b89e7
TH		 1376 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1377 du->pref_active) ?
626ab771
JB		 1378 connector_status_connected : connector_status_disconnected);
1379}
1380
1381static struct drm_display_mode vmw_kms_connector_builtin[] = {
1382 /* 640x480@60Hz */
1383 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1384 752, 800, 0, 480, 489, 492, 525, 0,
1385 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1386 /* 800x600@60Hz */
1387 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1388 968, 1056, 0, 600, 601, 605, 628, 0,
1389 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1390 /* 1024x768@60Hz */
1391 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1392 1184, 1344, 0, 768, 771, 777, 806, 0,
1393 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1394 /* 1152x864@75Hz */
1395 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1396 1344, 1600, 0, 864, 865, 868, 900, 0,
1397 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1398 /* 1280x768@60Hz */
1399 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1400 1472, 1664, 0, 768, 771, 778, 798, 0,
1401 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1402 /* 1280x800@60Hz */
1403 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1404 1480, 1680, 0, 800, 803, 809, 831, 0,
1405 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1406 /* 1280x960@60Hz */
1407 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1408 1488, 1800, 0, 960, 961, 964, 1000, 0,
1409 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1410 /* 1280x1024@60Hz */
1411 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1412 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1413 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1414 /* 1360x768@60Hz */
1415 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1416 1536, 1792, 0, 768, 771, 777, 795, 0,
1417 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1418 /* 1440x1050@60Hz */
1419 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1420 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1421 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1422 /* 1440x900@60Hz */
1423 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1424 1672, 1904, 0, 900, 903, 909, 934, 0,
1425 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1426 /* 1600x1200@60Hz */
1427 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1428 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1429 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1430 /* 1680x1050@60Hz */
1431 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1432 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1433 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1434 /* 1792x1344@60Hz */
1435 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1436 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1437 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1438 /* 1853x1392@60Hz */
1439 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1440 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1441 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1442 /* 1920x1200@60Hz */
1443 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1444 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1445 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1446 /* 1920x1440@60Hz */
1447 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1448 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1449 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450 /* 2560x1600@60Hz */
1451 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1452 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1453 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1454 /* Terminate */
1455 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1456};
1457
1543b4dd
TH		 1458/**
1459 * vmw_guess_mode_timing - Provide fake timings for a
1460 * 60Hz vrefresh mode.
1461 *
1462 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1463 * members filled in.
1464 */
1465static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1466{
1467 mode->hsync_start = mode->hdisplay + 50;
1468 mode->hsync_end = mode->hsync_start + 50;
1469 mode->htotal = mode->hsync_end + 50;
1470
1471 mode->vsync_start = mode->vdisplay + 50;
1472 mode->vsync_end = mode->vsync_start + 50;
1473 mode->vtotal = mode->vsync_end + 50;
1474
1475 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1476 mode->vrefresh = drm_mode_vrefresh(mode);
1477}
1478
1479
626ab771
JB		 1480int vmw_du_connector_fill_modes(struct drm_connector *connector,
1481 uint32_t max_width, uint32_t max_height)
1482{
1483 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1484 struct drm_device *dev = connector->dev;
1485 struct vmw_private *dev_priv = vmw_priv(dev);
1486 struct drm_display_mode *mode = NULL;
1487 struct drm_display_mode *bmode;
1488 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1489 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1490 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1491 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1492 };
1493 int i;
9a72384d
SY		 1494 u32 assumed_bpp = 2;
1495
1496 /*
1497 * If using screen objects, then assume 32-bpp because that's what the
1498 * SVGA device is assuming
1499 */
c8261a96 1500 if (dev_priv->active_display_unit == vmw_du_screen_object)
9a72384d 1501 assumed_bpp = 4;
626ab771 1502
35c05125
SY		 1503 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1504 max_width = min(max_width, dev_priv->stdu_max_width);
1505 max_height = min(max_height, dev_priv->stdu_max_height);
1506 }
1507
626ab771 1508 /* Add preferred mode */
c8261a96
SY		 1509 mode = drm_mode_duplicate(dev, &prefmode);
1510 if (!mode)
1511 return 0;
1512 mode->hdisplay = du->pref_width;
1513 mode->vdisplay = du->pref_height;
1514 vmw_guess_mode_timing(mode);
626ab771 1515
c8261a96
SY		 1516 if (vmw_kms_validate_mode_vram(dev_priv,
1517 mode->hdisplay * assumed_bpp,
1518 mode->vdisplay)) {
1519 drm_mode_probed_add(connector, mode);
1520 } else {
1521 drm_mode_destroy(dev, mode);
1522 mode = NULL;
1523 }
55bde5b2 1524
c8261a96
SY		 1525 if (du->pref_mode) {
1526 list_del_init(&du->pref_mode->head);
1527 drm_mode_destroy(dev, du->pref_mode);
626ab771
JB		 1528 }
1529
c8261a96
SY		 1530 /* mode might be null here, this is intended */
1531 du->pref_mode = mode;
1532
626ab771
JB		 1533 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1534 bmode = &vmw_kms_connector_builtin[i];
1535 if (bmode->hdisplay > max_width ||
1536 bmode->vdisplay > max_height)
1537 continue;
1538
9a72384d
SY		 1539 if (!vmw_kms_validate_mode_vram(dev_priv,
1540 bmode->hdisplay * assumed_bpp,
626ab771
JB		 1541 bmode->vdisplay))
1542 continue;
1543
1544 mode = drm_mode_duplicate(dev, bmode);
1545 if (!mode)
1546 return 0;
1547 mode->vrefresh = drm_mode_vrefresh(mode);
1548
1549 drm_mode_probed_add(connector, mode);
1550 }
1551
d41025c0
JB		 1552 /* Move the prefered mode first, help apps pick the right mode. */
1553 if (du->pref_mode)
1554 list_move(&du->pref_mode->head, &connector->probed_modes);
1555
b87577b7 1556 drm_mode_connector_list_update(connector, true);
626ab771
JB		 1557
1558 return 1;
1559}
1560
1561int vmw_du_connector_set_property(struct drm_connector *connector,
1562 struct drm_property *property,
1563 uint64_t val)
1564{
1565 return 0;
1566}
cd2b89e7
TH		 1567
1568
1569int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1570 struct drm_file *file_priv)
1571{
1572 struct vmw_private *dev_priv = vmw_priv(dev);
1573 struct drm_vmw_update_layout_arg *arg =
1574 (struct drm_vmw_update_layout_arg *)data;
cd2b89e7
TH		 1575 void __user *user_rects;
1576 struct drm_vmw_rect *rects;
1577 unsigned rects_size;
1578 int ret;
1579 int i;
1580 struct drm_mode_config *mode_config = &dev->mode_config;
c8261a96 1581 struct drm_vmw_rect bounding_box = {0};
cd2b89e7 1582
cd2b89e7
TH		 1583 if (!arg->num_outputs) {
1584 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1585 vmw_du_update_layout(dev_priv, 1, &def_rect);
5151adb3 1586 return 0;
cd2b89e7
TH		 1587 }
1588
1589 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
bab9efc2
XW		 1590 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1591 GFP_KERNEL);
5151adb3
TH		 1592 if (unlikely(!rects))
1593 return -ENOMEM;
cd2b89e7
TH		 1594
1595 user_rects = (void __user *)(unsigned long)arg->rects;
1596 ret = copy_from_user(rects, user_rects, rects_size);
1597 if (unlikely(ret != 0)) {
1598 DRM_ERROR("Failed to get rects.\n");
1599 ret = -EFAULT;
1600 goto out_free;
1601 }
1602
1603 for (i = 0; i < arg->num_outputs; ++i) {
bab9efc2
XW		 1604 if (rects[i].x < 0 ||
1605 rects[i].y < 0 ||
1606 rects[i].x + rects[i].w > mode_config->max_width ||
1607 rects[i].y + rects[i].h > mode_config->max_height) {
cd2b89e7
TH		 1608 DRM_ERROR("Invalid GUI layout.\n");
1609 ret = -EINVAL;
1610 goto out_free;
1611 }
c8261a96
SY		 1612
1613 /*
1614 * bounding_box.w and bunding_box.h are used as
1615 * lower-right coordinates
1616 */
1617 if (rects[i].x + rects[i].w > bounding_box.w)
1618 bounding_box.w = rects[i].x + rects[i].w;
1619
1620 if (rects[i].y + rects[i].h > bounding_box.h)
1621 bounding_box.h = rects[i].y + rects[i].h;
cd2b89e7
TH		 1622 }
1623
35c05125
SY		 1624 /*
1625 * For Screen Target Display Unit, all the displays must fit
1626 * inside of maximum texture size.
1627 */
1628 if (dev_priv->active_display_unit == vmw_du_screen_target)
1629 if (bounding_box.w > dev_priv->texture_max_width ||
1630 bounding_box.h > dev_priv->texture_max_height) {
1631 DRM_ERROR("Layout exceeds maximum texture size\n");
1632 ret = -EINVAL;
1633 goto out_free;
1634 }
1635
1636
cd2b89e7
TH		 1637 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1638
1639out_free:
1640 kfree(rects);
cd2b89e7
TH		 1641 return ret;
1642}
1a4b172a
TH		 1643
1644/**
1645 * vmw_kms_helper_dirty - Helper to build commands and perform actions based
1646 * on a set of cliprects and a set of display units.
1647 *
1648 * @dev_priv: Pointer to a device private structure.
1649 * @framebuffer: Pointer to the framebuffer on which to perform the actions.
1650 * @clips: A set of struct drm_clip_rect. Either this os @vclips must be NULL.
1651 * Cliprects are given in framebuffer coordinates.
1652 * @vclips: A set of struct drm_vmw_rect cliprects. Either this or @clips must
1653 * be NULL. Cliprects are given in source coordinates.
1654 * @dest_x: X coordinate offset for the crtc / destination clip rects.
1655 * @dest_y: Y coordinate offset for the crtc / destination clip rects.
1656 * @num_clips: Number of cliprects in the @clips or @vclips array.
1657 * @increment: Integer with which to increment the clip counter when looping.
1658 * Used to skip a predetermined number of clip rects.
1659 * @dirty: Closure structure. See the description of struct vmw_kms_dirty.
1660 */
1661int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
1662 struct vmw_framebuffer *framebuffer,
1663 const struct drm_clip_rect *clips,
1664 const struct drm_vmw_rect *vclips,
1665 s32 dest_x, s32 dest_y,
1666 int num_clips,
1667 int increment,
1668 struct vmw_kms_dirty *dirty)
1669{
1670 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1671 struct drm_crtc *crtc;
1672 u32 num_units = 0;
1673 u32 i, k;
1674 int ret;
1675
1676 dirty->dev_priv = dev_priv;
1677
1678 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1679 if (crtc->primary->fb != &framebuffer->base)
1680 continue;
1681 units[num_units++] = vmw_crtc_to_du(crtc);
1682 }
1683
1684 for (k = 0; k < num_units; k++) {
1685 struct vmw_display_unit *unit = units[k];
1686 s32 crtc_x = unit->crtc.x;
1687 s32 crtc_y = unit->crtc.y;
1688 s32 crtc_width = unit->crtc.mode.hdisplay;
1689 s32 crtc_height = unit->crtc.mode.vdisplay;
1690 const struct drm_clip_rect *clips_ptr = clips;
1691 const struct drm_vmw_rect *vclips_ptr = vclips;
1692
1693 dirty->unit = unit;
1694 if (dirty->fifo_reserve_size > 0) {
1695 dirty->cmd = vmw_fifo_reserve(dev_priv,
1696 dirty->fifo_reserve_size);
1697 if (!dirty->cmd) {
1698 DRM_ERROR("Couldn't reserve fifo space "
1699 "for dirty blits.\n");
1700 return ret;
1701 }
1702 memset(dirty->cmd, 0, dirty->fifo_reserve_size);
1703 }
1704 dirty->num_hits = 0;
1705 for (i = 0; i < num_clips; i++, clips_ptr += increment,
1706 vclips_ptr += increment) {
1707 s32 clip_left;
1708 s32 clip_top;
1709
1710 /*
1711 * Select clip array type. Note that integer type
1712 * in @clips is unsigned short, whereas in @vclips
1713 * it's 32-bit.
1714 */
1715 if (clips) {
1716 dirty->fb_x = (s32) clips_ptr->x1;
1717 dirty->fb_y = (s32) clips_ptr->y1;
1718 dirty->unit_x2 = (s32) clips_ptr->x2 + dest_x -
1719 crtc_x;
1720 dirty->unit_y2 = (s32) clips_ptr->y2 + dest_y -
1721 crtc_y;
1722 } else {
1723 dirty->fb_x = vclips_ptr->x;
1724 dirty->fb_y = vclips_ptr->y;
1725 dirty->unit_x2 = dirty->fb_x + vclips_ptr->w +
1726 dest_x - crtc_x;
1727 dirty->unit_y2 = dirty->fb_y + vclips_ptr->h +
1728 dest_y - crtc_y;
1729 }
1730
1731 dirty->unit_x1 = dirty->fb_x + dest_x - crtc_x;
1732 dirty->unit_y1 = dirty->fb_y + dest_y - crtc_y;
1733
1734 /* Skip this clip if it's outside the crtc region */
1735 if (dirty->unit_x1 >= crtc_width ||
1736 dirty->unit_y1 >= crtc_height ||
1737 dirty->unit_x2 <= 0 || dirty->unit_y2 <= 0)
1738 continue;
1739
1740 /* Clip right and bottom to crtc limits */
1741 dirty->unit_x2 = min_t(s32, dirty->unit_x2,
1742 crtc_width);
1743 dirty->unit_y2 = min_t(s32, dirty->unit_y2,
1744 crtc_height);
1745
1746 /* Clip left and top to crtc limits */
1747 clip_left = min_t(s32, dirty->unit_x1, 0);
1748 clip_top = min_t(s32, dirty->unit_y1, 0);
1749 dirty->unit_x1 -= clip_left;
1750 dirty->unit_y1 -= clip_top;
1751 dirty->fb_x -= clip_left;
1752 dirty->fb_y -= clip_top;
1753
1754 dirty->clip(dirty);
1755 }
1756
1757 dirty->fifo_commit(dirty);
1758 }
1759
1760 return 0;
1761}
1762
1763/**
1764 * vmw_kms_helper_buffer_prepare - Reserve and validate a buffer object before
1765 * command submission.
1766 *
1767 * @dev_priv. Pointer to a device private structure.
1768 * @buf: The buffer object
1769 * @interruptible: Whether to perform waits as interruptible.
1770 * @validate_as_mob: Whether the buffer should be validated as a MOB. If false,
1771 * The buffer will be validated as a GMR. Already pinned buffers will not be
1772 * validated.
1773 *
1774 * Returns 0 on success, negative error code on failure, -ERESTARTSYS if
1775 * interrupted by a signal.
1776 */
1777int vmw_kms_helper_buffer_prepare(struct vmw_private *dev_priv,
1778 struct vmw_dma_buffer *buf,
1779 bool interruptible,
1780 bool validate_as_mob)
1781{
1782 struct ttm_buffer_object *bo = &buf->base;
1783 int ret;
1784
1785 ttm_bo_reserve(bo, false, false, interruptible, 0);
1786 ret = vmw_validate_single_buffer(dev_priv, bo, interruptible,
1787 validate_as_mob);
1788 if (ret)
1789 ttm_bo_unreserve(bo);
1790
1791 return ret;
1792}
1793
1794/**
1795 * vmw_kms_helper_buffer_revert - Undo the actions of
1796 * vmw_kms_helper_buffer_prepare.
1797 *
1798 * @res: Pointer to the buffer object.
1799 *
1800 * Helper to be used if an error forces the caller to undo the actions of
1801 * vmw_kms_helper_buffer_prepare.
1802 */
1803void vmw_kms_helper_buffer_revert(struct vmw_dma_buffer *buf)
1804{
1805 if (buf)
1806 ttm_bo_unreserve(&buf->base);
1807}
1808
1809/**
1810 * vmw_kms_helper_buffer_finish - Unreserve and fence a buffer object after
1811 * kms command submission.
1812 *
1813 * @dev_priv: Pointer to a device private structure.
1814 * @file_priv: Pointer to a struct drm_file representing the caller's
1815 * connection. Must be set to NULL if @user_fence_rep is NULL, and conversely
1816 * if non-NULL, @user_fence_rep must be non-NULL.
1817 * @buf: The buffer object.
1818 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1819 * ref-counted fence pointer is returned here.
1820 * @user_fence_rep: Optional pointer to a user-space provided struct
1821 * drm_vmw_fence_rep. If provided, @file_priv must also be provided and the
1822 * function copies fence data to user-space in a fail-safe manner.
1823 */
1824void vmw_kms_helper_buffer_finish(struct vmw_private *dev_priv,
1825 struct drm_file *file_priv,
1826 struct vmw_dma_buffer *buf,
1827 struct vmw_fence_obj **out_fence,
1828 struct drm_vmw_fence_rep __user *
1829 user_fence_rep)
1830{
1831 struct vmw_fence_obj *fence;
1832 uint32_t handle;
1833 int ret;
1834
1835 ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
1836 file_priv ? &handle : NULL);
1837 if (buf)
1838 vmw_fence_single_bo(&buf->base, fence);
1839 if (file_priv)
1840 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),
1841 ret, user_fence_rep, fence,
1842 handle);
1843 if (out_fence)
1844 *out_fence = fence;
1845 else
1846 vmw_fence_obj_unreference(&fence);
1847
1848 vmw_kms_helper_buffer_revert(buf);
1849}
1850
1851
1852/**
1853 * vmw_kms_helper_resource_revert - Undo the actions of
1854 * vmw_kms_helper_resource_prepare.
1855 *
1856 * @res: Pointer to the resource. Typically a surface.
1857 *
1858 * Helper to be used if an error forces the caller to undo the actions of
1859 * vmw_kms_helper_resource_prepare.
1860 */
1861void vmw_kms_helper_resource_revert(struct vmw_resource *res)
1862{
1863 vmw_kms_helper_buffer_revert(res->backup);
1864 vmw_resource_unreserve(res, NULL, 0);
1865 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1866}
1867
1868/**
1869 * vmw_kms_helper_resource_prepare - Reserve and validate a resource before
1870 * command submission.
1871 *
1872 * @res: Pointer to the resource. Typically a surface.
1873 * @interruptible: Whether to perform waits as interruptible.
1874 *
1875 * Reserves and validates also the backup buffer if a guest-backed resource.
1876 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
1877 * interrupted by a signal.
1878 */
1879int vmw_kms_helper_resource_prepare(struct vmw_resource *res,
1880 bool interruptible)
1881{
1882 int ret = 0;
1883
1884 if (interruptible)
1885 ret = mutex_lock_interruptible(&res->dev_priv->cmdbuf_mutex);
1886 else
1887 mutex_lock(&res->dev_priv->cmdbuf_mutex);
1888
1889 if (unlikely(ret != 0))
1890 return -ERESTARTSYS;
1891
1892 ret = vmw_resource_reserve(res, interruptible, false);
1893 if (ret)
1894 goto out_unlock;
1895
1896 if (res->backup) {
1897 ret = vmw_kms_helper_buffer_prepare(res->dev_priv, res->backup,
1898 interruptible,
1899 res->dev_priv->has_mob);
1900 if (ret)
1901 goto out_unreserve;
1902 }
1903 ret = vmw_resource_validate(res);
1904 if (ret)
1905 goto out_revert;
1906 return 0;
1907
1908out_revert:
1909 vmw_kms_helper_buffer_revert(res->backup);
1910out_unreserve:
1911 vmw_resource_unreserve(res, NULL, 0);
1912out_unlock:
1913 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1914 return ret;
1915}
1916
1917/**
1918 * vmw_kms_helper_resource_finish - Unreserve and fence a resource after
1919 * kms command submission.
1920 *
1921 * @res: Pointer to the resource. Typically a surface.
1922 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1923 * ref-counted fence pointer is returned here.
1924 */
1925void vmw_kms_helper_resource_finish(struct vmw_resource *res,
1926 struct vmw_fence_obj **out_fence)
1927{
1928 if (res->backup || out_fence)
1929 vmw_kms_helper_buffer_finish(res->dev_priv, NULL, res->backup,
1930 out_fence, NULL);
1931
1932 vmw_resource_unreserve(res, NULL, 0);
1933 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1934}
6bf6bf03
TH		 1935
1936/**
1937 * vmw_kms_update_proxy - Helper function to update a proxy surface from
1938 * its backing MOB.
1939 *
1940 * @res: Pointer to the surface resource
1941 * @clips: Clip rects in framebuffer (surface) space.
1942 * @num_clips: Number of clips in @clips.
1943 * @increment: Integer with which to increment the clip counter when looping.
1944 * Used to skip a predetermined number of clip rects.
1945 *
1946 * This function makes sure the proxy surface is updated from its backing MOB
1947 * using the region given by @clips. The surface resource @res and its backing
1948 * MOB needs to be reserved and validated on call.
1949 */
1950int vmw_kms_update_proxy(struct vmw_resource *res,
1951 const struct drm_clip_rect *clips,
1952 unsigned num_clips,
1953 int increment)
1954{
1955 struct vmw_private *dev_priv = res->dev_priv;
1956 struct drm_vmw_size *size = &vmw_res_to_srf(res)->base_size;
1957 struct {
1958 SVGA3dCmdHeader header;
1959 SVGA3dCmdUpdateGBImage body;
1960 } *cmd;
1961 SVGA3dBox *box;
1962 size_t copy_size = 0;
1963 int i;
1964
1965 if (!clips)
1966 return 0;
1967
1968 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
1969 if (!cmd) {
1970 DRM_ERROR("Couldn't reserve fifo space for proxy surface "
1971 "update.\n");
1972 return -ENOMEM;
1973 }
1974
1975 for (i = 0; i < num_clips; ++i, clips += increment, ++cmd) {
1976 box = &cmd->body.box;
1977
1978 cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1979 cmd->header.size = sizeof(cmd->body);
1980 cmd->body.image.sid = res->id;
1981 cmd->body.image.face = 0;
1982 cmd->body.image.mipmap = 0;
1983
1984 if (clips->x1 > size->width || clips->x2 > size->width ||
1985 clips->y1 > size->height || clips->y2 > size->height) {
1986 DRM_ERROR("Invalid clips outsize of framebuffer.\n");
1987 return -EINVAL;
1988 }
1989
1990 box->x = clips->x1;
1991 box->y = clips->y1;
1992 box->z = 0;
1993 box->w = clips->x2 - clips->x1;
1994 box->h = clips->y2 - clips->y1;
1995 box->d = 1;
1996
1997 copy_size += sizeof(*cmd);
1998 }
1999
2000 vmw_fifo_commit(dev_priv, copy_size);
2001
2002 return 0;
2003}
Linux kernel - Deliverables
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