Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
[deliverable/linux.git] / drivers / gpu / drm / vmwgfx / vmwgfx_surface.c
CommitLineData
543831cf
TH
1/**************************************************************************
2 *
54fbde8a 3 * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
543831cf
TH
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_drv.h"
29#include "vmwgfx_resource_priv.h"
d80efd5c
TH
30#include "vmwgfx_so.h"
31#include "vmwgfx_binding.h"
543831cf 32#include <ttm/ttm_placement.h>
8ce75f8a 33#include "device_include/svga3d_surfacedefs.h"
543831cf 34
d80efd5c 35
543831cf
TH
36/**
37 * struct vmw_user_surface - User-space visible surface resource
38 *
39 * @base: The TTM base object handling user-space visibility.
40 * @srf: The surface metadata.
41 * @size: TTM accounting size for the surface.
233826a7 42 * @master: master of the creating client. Used for security check.
543831cf
TH
43 */
44struct vmw_user_surface {
79e5f810 45 struct ttm_prime_object prime;
543831cf
TH
46 struct vmw_surface srf;
47 uint32_t size;
6d10aab8 48 struct drm_master *master;
54c12bc3 49 struct ttm_base_object *backup_base;
543831cf
TH
50};
51
52/**
53 * struct vmw_surface_offset - Backing store mip level offset info
54 *
55 * @face: Surface face.
56 * @mip: Mip level.
57 * @bo_offset: Offset into backing store of this mip level.
58 *
59 */
60struct vmw_surface_offset {
61 uint32_t face;
62 uint32_t mip;
63 uint32_t bo_offset;
64};
65
66static void vmw_user_surface_free(struct vmw_resource *res);
67static struct vmw_resource *
68vmw_user_surface_base_to_res(struct ttm_base_object *base);
69static int vmw_legacy_srf_bind(struct vmw_resource *res,
70 struct ttm_validate_buffer *val_buf);
71static int vmw_legacy_srf_unbind(struct vmw_resource *res,
72 bool readback,
73 struct ttm_validate_buffer *val_buf);
74static int vmw_legacy_srf_create(struct vmw_resource *res);
75static int vmw_legacy_srf_destroy(struct vmw_resource *res);
a97e2192
TH
76static int vmw_gb_surface_create(struct vmw_resource *res);
77static int vmw_gb_surface_bind(struct vmw_resource *res,
78 struct ttm_validate_buffer *val_buf);
79static int vmw_gb_surface_unbind(struct vmw_resource *res,
80 bool readback,
81 struct ttm_validate_buffer *val_buf);
82static int vmw_gb_surface_destroy(struct vmw_resource *res);
83
543831cf
TH
84
85static const struct vmw_user_resource_conv user_surface_conv = {
86 .object_type = VMW_RES_SURFACE,
87 .base_obj_to_res = vmw_user_surface_base_to_res,
88 .res_free = vmw_user_surface_free
89};
90
91const struct vmw_user_resource_conv *user_surface_converter =
92 &user_surface_conv;
93
94
95static uint64_t vmw_user_surface_size;
96
97static const struct vmw_res_func vmw_legacy_surface_func = {
98 .res_type = vmw_res_surface,
99 .needs_backup = false,
100 .may_evict = true,
101 .type_name = "legacy surfaces",
102 .backup_placement = &vmw_srf_placement,
103 .create = &vmw_legacy_srf_create,
104 .destroy = &vmw_legacy_srf_destroy,
105 .bind = &vmw_legacy_srf_bind,
106 .unbind = &vmw_legacy_srf_unbind
107};
108
a97e2192
TH
109static const struct vmw_res_func vmw_gb_surface_func = {
110 .res_type = vmw_res_surface,
111 .needs_backup = true,
112 .may_evict = true,
113 .type_name = "guest backed surfaces",
114 .backup_placement = &vmw_mob_placement,
115 .create = vmw_gb_surface_create,
116 .destroy = vmw_gb_surface_destroy,
117 .bind = vmw_gb_surface_bind,
118 .unbind = vmw_gb_surface_unbind
119};
120
543831cf
TH
121/**
122 * struct vmw_surface_dma - SVGA3D DMA command
123 */
124struct vmw_surface_dma {
125 SVGA3dCmdHeader header;
126 SVGA3dCmdSurfaceDMA body;
127 SVGA3dCopyBox cb;
128 SVGA3dCmdSurfaceDMASuffix suffix;
129};
130
131/**
132 * struct vmw_surface_define - SVGA3D Surface Define command
133 */
134struct vmw_surface_define {
135 SVGA3dCmdHeader header;
136 SVGA3dCmdDefineSurface body;
137};
138
139/**
140 * struct vmw_surface_destroy - SVGA3D Surface Destroy command
141 */
142struct vmw_surface_destroy {
143 SVGA3dCmdHeader header;
144 SVGA3dCmdDestroySurface body;
145};
146
147
148/**
149 * vmw_surface_dma_size - Compute fifo size for a dma command.
150 *
151 * @srf: Pointer to a struct vmw_surface
152 *
153 * Computes the required size for a surface dma command for backup or
154 * restoration of the surface represented by @srf.
155 */
156static inline uint32_t vmw_surface_dma_size(const struct vmw_surface *srf)
157{
158 return srf->num_sizes * sizeof(struct vmw_surface_dma);
159}
160
161
162/**
163 * vmw_surface_define_size - Compute fifo size for a surface define command.
164 *
165 * @srf: Pointer to a struct vmw_surface
166 *
167 * Computes the required size for a surface define command for the definition
168 * of the surface represented by @srf.
169 */
170static inline uint32_t vmw_surface_define_size(const struct vmw_surface *srf)
171{
172 return sizeof(struct vmw_surface_define) + srf->num_sizes *
173 sizeof(SVGA3dSize);
174}
175
176
177/**
178 * vmw_surface_destroy_size - Compute fifo size for a surface destroy command.
179 *
180 * Computes the required size for a surface destroy command for the destruction
181 * of a hw surface.
182 */
183static inline uint32_t vmw_surface_destroy_size(void)
184{
185 return sizeof(struct vmw_surface_destroy);
186}
187
188/**
189 * vmw_surface_destroy_encode - Encode a surface_destroy command.
190 *
191 * @id: The surface id
192 * @cmd_space: Pointer to memory area in which the commands should be encoded.
193 */
194static void vmw_surface_destroy_encode(uint32_t id,
195 void *cmd_space)
196{
197 struct vmw_surface_destroy *cmd = (struct vmw_surface_destroy *)
198 cmd_space;
199
200 cmd->header.id = SVGA_3D_CMD_SURFACE_DESTROY;
201 cmd->header.size = sizeof(cmd->body);
202 cmd->body.sid = id;
203}
204
205/**
206 * vmw_surface_define_encode - Encode a surface_define command.
207 *
208 * @srf: Pointer to a struct vmw_surface object.
209 * @cmd_space: Pointer to memory area in which the commands should be encoded.
210 */
211static void vmw_surface_define_encode(const struct vmw_surface *srf,
212 void *cmd_space)
213{
214 struct vmw_surface_define *cmd = (struct vmw_surface_define *)
215 cmd_space;
216 struct drm_vmw_size *src_size;
217 SVGA3dSize *cmd_size;
218 uint32_t cmd_len;
219 int i;
220
221 cmd_len = sizeof(cmd->body) + srf->num_sizes * sizeof(SVGA3dSize);
222
223 cmd->header.id = SVGA_3D_CMD_SURFACE_DEFINE;
224 cmd->header.size = cmd_len;
225 cmd->body.sid = srf->res.id;
226 cmd->body.surfaceFlags = srf->flags;
b9eb1a61 227 cmd->body.format = srf->format;
543831cf
TH
228 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
229 cmd->body.face[i].numMipLevels = srf->mip_levels[i];
230
231 cmd += 1;
232 cmd_size = (SVGA3dSize *) cmd;
233 src_size = srf->sizes;
234
235 for (i = 0; i < srf->num_sizes; ++i, cmd_size++, src_size++) {
236 cmd_size->width = src_size->width;
237 cmd_size->height = src_size->height;
238 cmd_size->depth = src_size->depth;
239 }
240}
241
242/**
243 * vmw_surface_dma_encode - Encode a surface_dma command.
244 *
245 * @srf: Pointer to a struct vmw_surface object.
246 * @cmd_space: Pointer to memory area in which the commands should be encoded.
247 * @ptr: Pointer to an SVGAGuestPtr indicating where the surface contents
248 * should be placed or read from.
249 * @to_surface: Boolean whether to DMA to the surface or from the surface.
250 */
251static void vmw_surface_dma_encode(struct vmw_surface *srf,
252 void *cmd_space,
253 const SVGAGuestPtr *ptr,
254 bool to_surface)
255{
256 uint32_t i;
543831cf 257 struct vmw_surface_dma *cmd = (struct vmw_surface_dma *)cmd_space;
7e8d9da3
TH
258 const struct svga3d_surface_desc *desc =
259 svga3dsurface_get_desc(srf->format);
543831cf
TH
260
261 for (i = 0; i < srf->num_sizes; ++i) {
262 SVGA3dCmdHeader *header = &cmd->header;
263 SVGA3dCmdSurfaceDMA *body = &cmd->body;
264 SVGA3dCopyBox *cb = &cmd->cb;
265 SVGA3dCmdSurfaceDMASuffix *suffix = &cmd->suffix;
266 const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
267 const struct drm_vmw_size *cur_size = &srf->sizes[i];
268
269 header->id = SVGA_3D_CMD_SURFACE_DMA;
270 header->size = sizeof(*body) + sizeof(*cb) + sizeof(*suffix);
271
272 body->guest.ptr = *ptr;
273 body->guest.ptr.offset += cur_offset->bo_offset;
7e8d9da3
TH
274 body->guest.pitch = svga3dsurface_calculate_pitch(desc,
275 cur_size);
543831cf
TH
276 body->host.sid = srf->res.id;
277 body->host.face = cur_offset->face;
278 body->host.mipmap = cur_offset->mip;
279 body->transfer = ((to_surface) ? SVGA3D_WRITE_HOST_VRAM :
280 SVGA3D_READ_HOST_VRAM);
281 cb->x = 0;
282 cb->y = 0;
283 cb->z = 0;
284 cb->srcx = 0;
285 cb->srcy = 0;
286 cb->srcz = 0;
287 cb->w = cur_size->width;
288 cb->h = cur_size->height;
289 cb->d = cur_size->depth;
290
291 suffix->suffixSize = sizeof(*suffix);
7e8d9da3
TH
292 suffix->maximumOffset =
293 svga3dsurface_get_image_buffer_size(desc, cur_size,
294 body->guest.pitch);
543831cf
TH
295 suffix->flags.discard = 0;
296 suffix->flags.unsynchronized = 0;
297 suffix->flags.reserved = 0;
298 ++cmd;
299 }
300};
301
302
303/**
304 * vmw_hw_surface_destroy - destroy a Device surface
305 *
306 * @res: Pointer to a struct vmw_resource embedded in a struct
307 * vmw_surface.
308 *
309 * Destroys a the device surface associated with a struct vmw_surface if
310 * any, and adjusts accounting and resource count accordingly.
311 */
312static void vmw_hw_surface_destroy(struct vmw_resource *res)
313{
314
315 struct vmw_private *dev_priv = res->dev_priv;
316 struct vmw_surface *srf;
317 void *cmd;
318
a97e2192
TH
319 if (res->func->destroy == vmw_gb_surface_destroy) {
320 (void) vmw_gb_surface_destroy(res);
321 return;
322 }
323
543831cf
TH
324 if (res->id != -1) {
325
326 cmd = vmw_fifo_reserve(dev_priv, vmw_surface_destroy_size());
327 if (unlikely(cmd == NULL)) {
328 DRM_ERROR("Failed reserving FIFO space for surface "
329 "destruction.\n");
330 return;
331 }
332
333 vmw_surface_destroy_encode(res->id, cmd);
334 vmw_fifo_commit(dev_priv, vmw_surface_destroy_size());
335
336 /*
337 * used_memory_size_atomic, or separate lock
338 * to avoid taking dev_priv::cmdbuf_mutex in
339 * the destroy path.
340 */
341
342 mutex_lock(&dev_priv->cmdbuf_mutex);
343 srf = vmw_res_to_srf(res);
344 dev_priv->used_memory_size -= res->backup_size;
345 mutex_unlock(&dev_priv->cmdbuf_mutex);
346 }
153b3d5b 347 vmw_fifo_resource_dec(dev_priv);
543831cf
TH
348}
349
350/**
351 * vmw_legacy_srf_create - Create a device surface as part of the
352 * resource validation process.
353 *
354 * @res: Pointer to a struct vmw_surface.
355 *
356 * If the surface doesn't have a hw id.
357 *
358 * Returns -EBUSY if there wasn't sufficient device resources to
359 * complete the validation. Retry after freeing up resources.
360 *
361 * May return other errors if the kernel is out of guest resources.
362 */
363static int vmw_legacy_srf_create(struct vmw_resource *res)
364{
365 struct vmw_private *dev_priv = res->dev_priv;
366 struct vmw_surface *srf;
367 uint32_t submit_size;
368 uint8_t *cmd;
369 int ret;
370
371 if (likely(res->id != -1))
372 return 0;
373
374 srf = vmw_res_to_srf(res);
375 if (unlikely(dev_priv->used_memory_size + res->backup_size >=
376 dev_priv->memory_size))
377 return -EBUSY;
378
379 /*
380 * Alloc id for the resource.
381 */
382
383 ret = vmw_resource_alloc_id(res);
384 if (unlikely(ret != 0)) {
385 DRM_ERROR("Failed to allocate a surface id.\n");
386 goto out_no_id;
387 }
388
389 if (unlikely(res->id >= SVGA3D_MAX_SURFACE_IDS)) {
390 ret = -EBUSY;
391 goto out_no_fifo;
392 }
393
394 /*
395 * Encode surface define- commands.
396 */
397
398 submit_size = vmw_surface_define_size(srf);
399 cmd = vmw_fifo_reserve(dev_priv, submit_size);
400 if (unlikely(cmd == NULL)) {
401 DRM_ERROR("Failed reserving FIFO space for surface "
402 "creation.\n");
403 ret = -ENOMEM;
404 goto out_no_fifo;
405 }
406
407 vmw_surface_define_encode(srf, cmd);
408 vmw_fifo_commit(dev_priv, submit_size);
409 /*
410 * Surface memory usage accounting.
411 */
412
413 dev_priv->used_memory_size += res->backup_size;
414 return 0;
415
416out_no_fifo:
417 vmw_resource_release_id(res);
418out_no_id:
419 return ret;
420}
421
422/**
423 * vmw_legacy_srf_dma - Copy backup data to or from a legacy surface.
424 *
425 * @res: Pointer to a struct vmw_res embedded in a struct
426 * vmw_surface.
427 * @val_buf: Pointer to a struct ttm_validate_buffer containing
428 * information about the backup buffer.
429 * @bind: Boolean wether to DMA to the surface.
430 *
431 * Transfer backup data to or from a legacy surface as part of the
432 * validation process.
433 * May return other errors if the kernel is out of guest resources.
434 * The backup buffer will be fenced or idle upon successful completion,
435 * and if the surface needs persistent backup storage, the backup buffer
436 * will also be returned reserved iff @bind is true.
437 */
438static int vmw_legacy_srf_dma(struct vmw_resource *res,
439 struct ttm_validate_buffer *val_buf,
440 bool bind)
441{
442 SVGAGuestPtr ptr;
443 struct vmw_fence_obj *fence;
444 uint32_t submit_size;
445 struct vmw_surface *srf = vmw_res_to_srf(res);
446 uint8_t *cmd;
447 struct vmw_private *dev_priv = res->dev_priv;
448
449 BUG_ON(val_buf->bo == NULL);
450
451 submit_size = vmw_surface_dma_size(srf);
452 cmd = vmw_fifo_reserve(dev_priv, submit_size);
453 if (unlikely(cmd == NULL)) {
454 DRM_ERROR("Failed reserving FIFO space for surface "
455 "DMA.\n");
456 return -ENOMEM;
457 }
458 vmw_bo_get_guest_ptr(val_buf->bo, &ptr);
459 vmw_surface_dma_encode(srf, cmd, &ptr, bind);
460
461 vmw_fifo_commit(dev_priv, submit_size);
462
463 /*
464 * Create a fence object and fence the backup buffer.
465 */
466
467 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
468 &fence, NULL);
469
470 vmw_fence_single_bo(val_buf->bo, fence);
471
472 if (likely(fence != NULL))
473 vmw_fence_obj_unreference(&fence);
474
475 return 0;
476}
477
478/**
479 * vmw_legacy_srf_bind - Perform a legacy surface bind as part of the
480 * surface validation process.
481 *
482 * @res: Pointer to a struct vmw_res embedded in a struct
483 * vmw_surface.
484 * @val_buf: Pointer to a struct ttm_validate_buffer containing
485 * information about the backup buffer.
486 *
487 * This function will copy backup data to the surface if the
488 * backup buffer is dirty.
489 */
490static int vmw_legacy_srf_bind(struct vmw_resource *res,
491 struct ttm_validate_buffer *val_buf)
492{
493 if (!res->backup_dirty)
494 return 0;
495
496 return vmw_legacy_srf_dma(res, val_buf, true);
497}
498
499
500/**
501 * vmw_legacy_srf_unbind - Perform a legacy surface unbind as part of the
502 * surface eviction process.
503 *
504 * @res: Pointer to a struct vmw_res embedded in a struct
505 * vmw_surface.
506 * @val_buf: Pointer to a struct ttm_validate_buffer containing
507 * information about the backup buffer.
508 *
509 * This function will copy backup data from the surface.
510 */
511static int vmw_legacy_srf_unbind(struct vmw_resource *res,
512 bool readback,
513 struct ttm_validate_buffer *val_buf)
514{
515 if (unlikely(readback))
516 return vmw_legacy_srf_dma(res, val_buf, false);
517 return 0;
518}
519
520/**
521 * vmw_legacy_srf_destroy - Destroy a device surface as part of a
522 * resource eviction process.
523 *
524 * @res: Pointer to a struct vmw_res embedded in a struct
525 * vmw_surface.
526 */
527static int vmw_legacy_srf_destroy(struct vmw_resource *res)
528{
529 struct vmw_private *dev_priv = res->dev_priv;
530 uint32_t submit_size;
531 uint8_t *cmd;
532
533 BUG_ON(res->id == -1);
534
535 /*
536 * Encode the dma- and surface destroy commands.
537 */
538
539 submit_size = vmw_surface_destroy_size();
540 cmd = vmw_fifo_reserve(dev_priv, submit_size);
541 if (unlikely(cmd == NULL)) {
542 DRM_ERROR("Failed reserving FIFO space for surface "
543 "eviction.\n");
544 return -ENOMEM;
545 }
546
547 vmw_surface_destroy_encode(res->id, cmd);
548 vmw_fifo_commit(dev_priv, submit_size);
549
550 /*
551 * Surface memory usage accounting.
552 */
553
554 dev_priv->used_memory_size -= res->backup_size;
555
556 /*
557 * Release the surface ID.
558 */
559
560 vmw_resource_release_id(res);
561
562 return 0;
563}
564
565
566/**
567 * vmw_surface_init - initialize a struct vmw_surface
568 *
569 * @dev_priv: Pointer to a device private struct.
570 * @srf: Pointer to the struct vmw_surface to initialize.
571 * @res_free: Pointer to a resource destructor used to free
572 * the object.
573 */
574static int vmw_surface_init(struct vmw_private *dev_priv,
575 struct vmw_surface *srf,
576 void (*res_free) (struct vmw_resource *res))
577{
578 int ret;
579 struct vmw_resource *res = &srf->res;
580
581 BUG_ON(res_free == NULL);
a97e2192 582 if (!dev_priv->has_mob)
153b3d5b 583 vmw_fifo_resource_inc(dev_priv);
543831cf 584 ret = vmw_resource_init(dev_priv, res, true, res_free,
a97e2192 585 (dev_priv->has_mob) ? &vmw_gb_surface_func :
543831cf
TH
586 &vmw_legacy_surface_func);
587
588 if (unlikely(ret != 0)) {
a97e2192 589 if (!dev_priv->has_mob)
153b3d5b 590 vmw_fifo_resource_dec(dev_priv);
543831cf
TH
591 res_free(res);
592 return ret;
593 }
594
595 /*
596 * The surface won't be visible to hardware until a
597 * surface validate.
598 */
599
d80efd5c 600 INIT_LIST_HEAD(&srf->view_list);
543831cf
TH
601 vmw_resource_activate(res, vmw_hw_surface_destroy);
602 return ret;
603}
604
605/**
606 * vmw_user_surface_base_to_res - TTM base object to resource converter for
607 * user visible surfaces
608 *
609 * @base: Pointer to a TTM base object
610 *
611 * Returns the struct vmw_resource embedded in a struct vmw_surface
612 * for the user-visible object identified by the TTM base object @base.
613 */
614static struct vmw_resource *
615vmw_user_surface_base_to_res(struct ttm_base_object *base)
616{
79e5f810
TH
617 return &(container_of(base, struct vmw_user_surface,
618 prime.base)->srf.res);
543831cf
TH
619}
620
621/**
622 * vmw_user_surface_free - User visible surface resource destructor
623 *
624 * @res: A struct vmw_resource embedded in a struct vmw_surface.
625 */
626static void vmw_user_surface_free(struct vmw_resource *res)
627{
628 struct vmw_surface *srf = vmw_res_to_srf(res);
629 struct vmw_user_surface *user_srf =
630 container_of(srf, struct vmw_user_surface, srf);
631 struct vmw_private *dev_priv = srf->res.dev_priv;
632 uint32_t size = user_srf->size;
633
6d10aab8
TH
634 if (user_srf->master)
635 drm_master_put(&user_srf->master);
543831cf
TH
636 kfree(srf->offsets);
637 kfree(srf->sizes);
638 kfree(srf->snooper.image);
79e5f810 639 ttm_prime_object_kfree(user_srf, prime);
543831cf
TH
640 ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
641}
642
643/**
644 * vmw_user_surface_free - User visible surface TTM base object destructor
645 *
646 * @p_base: Pointer to a pointer to a TTM base object
647 * embedded in a struct vmw_user_surface.
648 *
649 * Drops the base object's reference on its resource, and the
650 * pointer pointed to by *p_base is set to NULL.
651 */
652static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
653{
654 struct ttm_base_object *base = *p_base;
655 struct vmw_user_surface *user_srf =
79e5f810 656 container_of(base, struct vmw_user_surface, prime.base);
543831cf
TH
657 struct vmw_resource *res = &user_srf->srf.res;
658
659 *p_base = NULL;
ed7d78b2
TH
660 if (user_srf->backup_base)
661 ttm_base_object_unref(&user_srf->backup_base);
543831cf
TH
662 vmw_resource_unreference(&res);
663}
664
665/**
666 * vmw_user_surface_destroy_ioctl - Ioctl function implementing
667 * the user surface destroy functionality.
668 *
669 * @dev: Pointer to a struct drm_device.
670 * @data: Pointer to data copied from / to user-space.
671 * @file_priv: Pointer to a drm file private structure.
672 */
673int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
674 struct drm_file *file_priv)
675{
676 struct drm_vmw_surface_arg *arg = (struct drm_vmw_surface_arg *)data;
677 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
678
679 return ttm_ref_object_base_unref(tfile, arg->sid, TTM_REF_USAGE);
680}
681
682/**
683 * vmw_user_surface_define_ioctl - Ioctl function implementing
684 * the user surface define functionality.
685 *
686 * @dev: Pointer to a struct drm_device.
687 * @data: Pointer to data copied from / to user-space.
688 * @file_priv: Pointer to a drm file private structure.
689 */
690int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
691 struct drm_file *file_priv)
692{
693 struct vmw_private *dev_priv = vmw_priv(dev);
694 struct vmw_user_surface *user_srf;
695 struct vmw_surface *srf;
696 struct vmw_resource *res;
697 struct vmw_resource *tmp;
698 union drm_vmw_surface_create_arg *arg =
699 (union drm_vmw_surface_create_arg *)data;
700 struct drm_vmw_surface_create_req *req = &arg->req;
701 struct drm_vmw_surface_arg *rep = &arg->rep;
702 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
703 struct drm_vmw_size __user *user_sizes;
704 int ret;
705 int i, j;
706 uint32_t cur_bo_offset;
707 struct drm_vmw_size *cur_size;
708 struct vmw_surface_offset *cur_offset;
543831cf
TH
709 uint32_t num_sizes;
710 uint32_t size;
7e8d9da3 711 const struct svga3d_surface_desc *desc;
543831cf
TH
712
713 if (unlikely(vmw_user_surface_size == 0))
714 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
715 128;
716
717 num_sizes = 0;
718 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
719 num_sizes += req->mip_levels[i];
720
721 if (num_sizes > DRM_VMW_MAX_SURFACE_FACES *
722 DRM_VMW_MAX_MIP_LEVELS)
723 return -EINVAL;
724
725 size = vmw_user_surface_size + 128 +
726 ttm_round_pot(num_sizes * sizeof(struct drm_vmw_size)) +
727 ttm_round_pot(num_sizes * sizeof(struct vmw_surface_offset));
728
729
7e8d9da3
TH
730 desc = svga3dsurface_get_desc(req->format);
731 if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
732 DRM_ERROR("Invalid surface format for surface creation.\n");
d80efd5c 733 DRM_ERROR("Format requested is: %d\n", req->format);
7e8d9da3
TH
734 return -EINVAL;
735 }
736
294adf7d 737 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
543831cf
TH
738 if (unlikely(ret != 0))
739 return ret;
740
741 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
742 size, false, true);
743 if (unlikely(ret != 0)) {
744 if (ret != -ERESTARTSYS)
745 DRM_ERROR("Out of graphics memory for surface"
746 " creation.\n");
747 goto out_unlock;
748 }
749
750 user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
751 if (unlikely(user_srf == NULL)) {
752 ret = -ENOMEM;
753 goto out_no_user_srf;
754 }
755
756 srf = &user_srf->srf;
757 res = &srf->res;
758
759 srf->flags = req->flags;
760 srf->format = req->format;
761 srf->scanout = req->scanout;
762
763 memcpy(srf->mip_levels, req->mip_levels, sizeof(srf->mip_levels));
764 srf->num_sizes = num_sizes;
765 user_srf->size = size;
766
767 srf->sizes = kmalloc(srf->num_sizes * sizeof(*srf->sizes), GFP_KERNEL);
768 if (unlikely(srf->sizes == NULL)) {
769 ret = -ENOMEM;
770 goto out_no_sizes;
771 }
772 srf->offsets = kmalloc(srf->num_sizes * sizeof(*srf->offsets),
773 GFP_KERNEL);
47ba614b 774 if (unlikely(srf->offsets == NULL)) {
543831cf
TH
775 ret = -ENOMEM;
776 goto out_no_offsets;
777 }
778
779 user_sizes = (struct drm_vmw_size __user *)(unsigned long)
780 req->size_addr;
781
782 ret = copy_from_user(srf->sizes, user_sizes,
783 srf->num_sizes * sizeof(*srf->sizes));
784 if (unlikely(ret != 0)) {
785 ret = -EFAULT;
786 goto out_no_copy;
787 }
788
789 srf->base_size = *srf->sizes;
790 srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
15c6f656 791 srf->multisample_count = 0;
543831cf
TH
792
793 cur_bo_offset = 0;
794 cur_offset = srf->offsets;
795 cur_size = srf->sizes;
796
543831cf
TH
797 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
798 for (j = 0; j < srf->mip_levels[i]; ++j) {
7e8d9da3
TH
799 uint32_t stride = svga3dsurface_calculate_pitch
800 (desc, cur_size);
543831cf
TH
801
802 cur_offset->face = i;
803 cur_offset->mip = j;
804 cur_offset->bo_offset = cur_bo_offset;
7e8d9da3
TH
805 cur_bo_offset += svga3dsurface_get_image_buffer_size
806 (desc, cur_size, stride);
543831cf
TH
807 ++cur_offset;
808 ++cur_size;
809 }
810 }
811 res->backup_size = cur_bo_offset;
543831cf
TH
812 if (srf->scanout &&
813 srf->num_sizes == 1 &&
814 srf->sizes[0].width == 64 &&
815 srf->sizes[0].height == 64 &&
816 srf->format == SVGA3D_A8R8G8B8) {
817
9e266128
RV
818 srf->snooper.image = kzalloc(64 * 64 * 4, GFP_KERNEL);
819 if (!srf->snooper.image) {
543831cf
TH
820 DRM_ERROR("Failed to allocate cursor_image\n");
821 ret = -ENOMEM;
822 goto out_no_copy;
823 }
824 } else {
825 srf->snooper.image = NULL;
826 }
827 srf->snooper.crtc = NULL;
828
79e5f810
TH
829 user_srf->prime.base.shareable = false;
830 user_srf->prime.base.tfile = NULL;
6d10aab8
TH
831 if (drm_is_primary_client(file_priv))
832 user_srf->master = drm_master_get(file_priv->master);
543831cf
TH
833
834 /**
835 * From this point, the generic resource management functions
836 * destroy the object on failure.
837 */
838
839 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
840 if (unlikely(ret != 0))
841 goto out_unlock;
842
4b0c8252
TH
843 /*
844 * A gb-aware client referencing a shared surface will
845 * expect a backup buffer to be present.
846 */
847 if (dev_priv->has_mob && req->shareable) {
848 uint32_t backup_handle;
849
850 ret = vmw_user_dmabuf_alloc(dev_priv, tfile,
851 res->backup_size,
852 true,
853 &backup_handle,
54c12bc3
TH
854 &res->backup,
855 &user_srf->backup_base);
4b0c8252
TH
856 if (unlikely(ret != 0)) {
857 vmw_resource_unreference(&res);
858 goto out_unlock;
859 }
860 }
861
543831cf 862 tmp = vmw_resource_reference(&srf->res);
79e5f810
TH
863 ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
864 req->shareable, VMW_RES_SURFACE,
865 &vmw_user_surface_base_release, NULL);
543831cf
TH
866
867 if (unlikely(ret != 0)) {
868 vmw_resource_unreference(&tmp);
869 vmw_resource_unreference(&res);
870 goto out_unlock;
871 }
872
79e5f810 873 rep->sid = user_srf->prime.base.hash.key;
543831cf
TH
874 vmw_resource_unreference(&res);
875
294adf7d 876 ttm_read_unlock(&dev_priv->reservation_sem);
543831cf
TH
877 return 0;
878out_no_copy:
879 kfree(srf->offsets);
880out_no_offsets:
881 kfree(srf->sizes);
882out_no_sizes:
79e5f810 883 ttm_prime_object_kfree(user_srf, prime);
543831cf
TH
884out_no_user_srf:
885 ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
886out_unlock:
294adf7d 887 ttm_read_unlock(&dev_priv->reservation_sem);
543831cf
TH
888 return ret;
889}
890
adebcb20
TH
891
892static int
893vmw_surface_handle_reference(struct vmw_private *dev_priv,
894 struct drm_file *file_priv,
895 uint32_t u_handle,
896 enum drm_vmw_handle_type handle_type,
897 struct ttm_base_object **base_p)
898{
899 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
6d10aab8 900 struct vmw_user_surface *user_srf;
adebcb20
TH
901 uint32_t handle;
902 struct ttm_base_object *base;
903 int ret;
904
905 if (handle_type == DRM_VMW_HANDLE_PRIME) {
906 ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
907 if (unlikely(ret != 0))
908 return ret;
909 } else {
910 if (unlikely(drm_is_render_client(file_priv))) {
911 DRM_ERROR("Render client refused legacy "
912 "surface reference.\n");
913 return -EACCES;
914 }
aa3469ce
TH
915 if (ACCESS_ONCE(vmw_fpriv(file_priv)->locked_master)) {
916 DRM_ERROR("Locked master refused legacy "
917 "surface reference.\n");
918 return -EACCES;
919 }
920
adebcb20
TH
921 handle = u_handle;
922 }
923
924 ret = -EINVAL;
925 base = ttm_base_object_lookup_for_ref(dev_priv->tdev, handle);
926 if (unlikely(base == NULL)) {
927 DRM_ERROR("Could not find surface to reference.\n");
928 goto out_no_lookup;
929 }
930
931 if (unlikely(ttm_base_object_type(base) != VMW_RES_SURFACE)) {
932 DRM_ERROR("Referenced object is not a surface.\n");
933 goto out_bad_resource;
934 }
935
936 if (handle_type != DRM_VMW_HANDLE_PRIME) {
6d10aab8
TH
937 user_srf = container_of(base, struct vmw_user_surface,
938 prime.base);
939
940 /*
941 * Make sure the surface creator has the same
942 * authenticating master.
943 */
944 if (drm_is_primary_client(file_priv) &&
945 user_srf->master != file_priv->master) {
946 DRM_ERROR("Trying to reference surface outside of"
947 " master domain.\n");
948 ret = -EACCES;
949 goto out_bad_resource;
950 }
951
adebcb20
TH
952 ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL);
953 if (unlikely(ret != 0)) {
954 DRM_ERROR("Could not add a reference to a surface.\n");
955 goto out_bad_resource;
956 }
957 }
958
959 *base_p = base;
960 return 0;
961
962out_bad_resource:
963 ttm_base_object_unref(&base);
964out_no_lookup:
965 if (handle_type == DRM_VMW_HANDLE_PRIME)
966 (void) ttm_ref_object_base_unref(tfile, handle, TTM_REF_USAGE);
967
968 return ret;
969}
970
543831cf
TH
971/**
972 * vmw_user_surface_define_ioctl - Ioctl function implementing
973 * the user surface reference functionality.
974 *
975 * @dev: Pointer to a struct drm_device.
976 * @data: Pointer to data copied from / to user-space.
977 * @file_priv: Pointer to a drm file private structure.
978 */
979int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
980 struct drm_file *file_priv)
981{
05efb1ab 982 struct vmw_private *dev_priv = vmw_priv(dev);
543831cf
TH
983 union drm_vmw_surface_reference_arg *arg =
984 (union drm_vmw_surface_reference_arg *)data;
985 struct drm_vmw_surface_arg *req = &arg->req;
986 struct drm_vmw_surface_create_req *rep = &arg->rep;
987 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
988 struct vmw_surface *srf;
989 struct vmw_user_surface *user_srf;
990 struct drm_vmw_size __user *user_sizes;
991 struct ttm_base_object *base;
adebcb20 992 int ret;
543831cf 993
adebcb20
TH
994 ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
995 req->handle_type, &base);
996 if (unlikely(ret != 0))
997 return ret;
543831cf 998
79e5f810 999 user_srf = container_of(base, struct vmw_user_surface, prime.base);
543831cf
TH
1000 srf = &user_srf->srf;
1001
543831cf
TH
1002 rep->flags = srf->flags;
1003 rep->format = srf->format;
1004 memcpy(rep->mip_levels, srf->mip_levels, sizeof(srf->mip_levels));
1005 user_sizes = (struct drm_vmw_size __user *)(unsigned long)
1006 rep->size_addr;
1007
1008 if (user_sizes)
c1a21373
TH
1009 ret = copy_to_user(user_sizes, &srf->base_size,
1010 sizeof(srf->base_size));
543831cf
TH
1011 if (unlikely(ret != 0)) {
1012 DRM_ERROR("copy_to_user failed %p %u\n",
1013 user_sizes, srf->num_sizes);
adebcb20 1014 ttm_ref_object_base_unref(tfile, base->hash.key, TTM_REF_USAGE);
543831cf
TH
1015 ret = -EFAULT;
1016 }
adebcb20 1017
543831cf
TH
1018 ttm_base_object_unref(&base);
1019
1020 return ret;
1021}
a97e2192
TH
1022
1023/**
1024 * vmw_surface_define_encode - Encode a surface_define command.
1025 *
1026 * @srf: Pointer to a struct vmw_surface object.
1027 * @cmd_space: Pointer to memory area in which the commands should be encoded.
1028 */
1029static int vmw_gb_surface_create(struct vmw_resource *res)
1030{
1031 struct vmw_private *dev_priv = res->dev_priv;
1032 struct vmw_surface *srf = vmw_res_to_srf(res);
d80efd5c 1033 uint32_t cmd_len, cmd_id, submit_len;
a97e2192
TH
1034 int ret;
1035 struct {
1036 SVGA3dCmdHeader header;
1037 SVGA3dCmdDefineGBSurface body;
1038 } *cmd;
d80efd5c
TH
1039 struct {
1040 SVGA3dCmdHeader header;
1041 SVGA3dCmdDefineGBSurface_v2 body;
1042 } *cmd2;
a97e2192
TH
1043
1044 if (likely(res->id != -1))
1045 return 0;
1046
153b3d5b 1047 vmw_fifo_resource_inc(dev_priv);
a97e2192
TH
1048 ret = vmw_resource_alloc_id(res);
1049 if (unlikely(ret != 0)) {
1050 DRM_ERROR("Failed to allocate a surface id.\n");
1051 goto out_no_id;
1052 }
1053
1054 if (unlikely(res->id >= VMWGFX_NUM_GB_SURFACE)) {
1055 ret = -EBUSY;
1056 goto out_no_fifo;
1057 }
1058
d80efd5c
TH
1059 if (srf->array_size > 0) {
1060 /* has_dx checked on creation time. */
1061 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2;
1062 cmd_len = sizeof(cmd2->body);
1063 submit_len = sizeof(*cmd2);
1064 } else {
1065 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE;
1066 cmd_len = sizeof(cmd->body);
1067 submit_len = sizeof(*cmd);
1068 }
1069
a97e2192 1070 cmd = vmw_fifo_reserve(dev_priv, submit_len);
d80efd5c 1071 cmd2 = (typeof(cmd2))cmd;
a97e2192
TH
1072 if (unlikely(cmd == NULL)) {
1073 DRM_ERROR("Failed reserving FIFO space for surface "
1074 "creation.\n");
1075 ret = -ENOMEM;
1076 goto out_no_fifo;
1077 }
1078
d80efd5c
TH
1079 if (srf->array_size > 0) {
1080 cmd2->header.id = cmd_id;
1081 cmd2->header.size = cmd_len;
1082 cmd2->body.sid = srf->res.id;
1083 cmd2->body.surfaceFlags = srf->flags;
1084 cmd2->body.format = cpu_to_le32(srf->format);
1085 cmd2->body.numMipLevels = srf->mip_levels[0];
1086 cmd2->body.multisampleCount = srf->multisample_count;
1087 cmd2->body.autogenFilter = srf->autogen_filter;
1088 cmd2->body.size.width = srf->base_size.width;
1089 cmd2->body.size.height = srf->base_size.height;
1090 cmd2->body.size.depth = srf->base_size.depth;
1091 cmd2->body.arraySize = srf->array_size;
1092 } else {
1093 cmd->header.id = cmd_id;
1094 cmd->header.size = cmd_len;
1095 cmd->body.sid = srf->res.id;
1096 cmd->body.surfaceFlags = srf->flags;
1097 cmd->body.format = cpu_to_le32(srf->format);
1098 cmd->body.numMipLevels = srf->mip_levels[0];
1099 cmd->body.multisampleCount = srf->multisample_count;
1100 cmd->body.autogenFilter = srf->autogen_filter;
1101 cmd->body.size.width = srf->base_size.width;
1102 cmd->body.size.height = srf->base_size.height;
1103 cmd->body.size.depth = srf->base_size.depth;
1104 }
1105
a97e2192
TH
1106 vmw_fifo_commit(dev_priv, submit_len);
1107
1108 return 0;
1109
1110out_no_fifo:
1111 vmw_resource_release_id(res);
1112out_no_id:
153b3d5b 1113 vmw_fifo_resource_dec(dev_priv);
a97e2192
TH
1114 return ret;
1115}
1116
1117
1118static int vmw_gb_surface_bind(struct vmw_resource *res,
1119 struct ttm_validate_buffer *val_buf)
1120{
1121 struct vmw_private *dev_priv = res->dev_priv;
1122 struct {
1123 SVGA3dCmdHeader header;
1124 SVGA3dCmdBindGBSurface body;
1125 } *cmd1;
1126 struct {
1127 SVGA3dCmdHeader header;
1128 SVGA3dCmdUpdateGBSurface body;
1129 } *cmd2;
1130 uint32_t submit_size;
1131 struct ttm_buffer_object *bo = val_buf->bo;
1132
1133 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1134
1135 submit_size = sizeof(*cmd1) + (res->backup_dirty ? sizeof(*cmd2) : 0);
1136
1137 cmd1 = vmw_fifo_reserve(dev_priv, submit_size);
1138 if (unlikely(cmd1 == NULL)) {
1139 DRM_ERROR("Failed reserving FIFO space for surface "
1140 "binding.\n");
1141 return -ENOMEM;
1142 }
1143
1144 cmd1->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1145 cmd1->header.size = sizeof(cmd1->body);
1146 cmd1->body.sid = res->id;
1147 cmd1->body.mobid = bo->mem.start;
1148 if (res->backup_dirty) {
1149 cmd2 = (void *) &cmd1[1];
1150 cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_SURFACE;
1151 cmd2->header.size = sizeof(cmd2->body);
1152 cmd2->body.sid = res->id;
1153 res->backup_dirty = false;
1154 }
1155 vmw_fifo_commit(dev_priv, submit_size);
1156
1157 return 0;
1158}
1159
1160static int vmw_gb_surface_unbind(struct vmw_resource *res,
1161 bool readback,
1162 struct ttm_validate_buffer *val_buf)
1163{
1164 struct vmw_private *dev_priv = res->dev_priv;
1165 struct ttm_buffer_object *bo = val_buf->bo;
1166 struct vmw_fence_obj *fence;
1167
1168 struct {
1169 SVGA3dCmdHeader header;
1170 SVGA3dCmdReadbackGBSurface body;
1171 } *cmd1;
1172 struct {
1173 SVGA3dCmdHeader header;
1985f999 1174 SVGA3dCmdInvalidateGBSurface body;
a97e2192 1175 } *cmd2;
1985f999
JB
1176 struct {
1177 SVGA3dCmdHeader header;
1178 SVGA3dCmdBindGBSurface body;
1179 } *cmd3;
a97e2192
TH
1180 uint32_t submit_size;
1181 uint8_t *cmd;
1182
1183
1184 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1185
1985f999 1186 submit_size = sizeof(*cmd3) + (readback ? sizeof(*cmd1) : sizeof(*cmd2));
a97e2192
TH
1187 cmd = vmw_fifo_reserve(dev_priv, submit_size);
1188 if (unlikely(cmd == NULL)) {
1189 DRM_ERROR("Failed reserving FIFO space for surface "
1190 "unbinding.\n");
1191 return -ENOMEM;
1192 }
1193
a97e2192
TH
1194 if (readback) {
1195 cmd1 = (void *) cmd;
1196 cmd1->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
1197 cmd1->header.size = sizeof(cmd1->body);
1198 cmd1->body.sid = res->id;
1985f999
JB
1199 cmd3 = (void *) &cmd1[1];
1200 } else {
1201 cmd2 = (void *) cmd;
1202 cmd2->header.id = SVGA_3D_CMD_INVALIDATE_GB_SURFACE;
1203 cmd2->header.size = sizeof(cmd2->body);
1204 cmd2->body.sid = res->id;
1205 cmd3 = (void *) &cmd2[1];
a97e2192 1206 }
1985f999
JB
1207
1208 cmd3->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1209 cmd3->header.size = sizeof(cmd3->body);
1210 cmd3->body.sid = res->id;
1211 cmd3->body.mobid = SVGA3D_INVALID_ID;
a97e2192
TH
1212
1213 vmw_fifo_commit(dev_priv, submit_size);
1214
1215 /*
1216 * Create a fence object and fence the backup buffer.
1217 */
1218
1219 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
1220 &fence, NULL);
1221
1222 vmw_fence_single_bo(val_buf->bo, fence);
1223
1224 if (likely(fence != NULL))
1225 vmw_fence_obj_unreference(&fence);
1226
1227 return 0;
1228}
1229
1230static int vmw_gb_surface_destroy(struct vmw_resource *res)
1231{
1232 struct vmw_private *dev_priv = res->dev_priv;
d80efd5c 1233 struct vmw_surface *srf = vmw_res_to_srf(res);
a97e2192
TH
1234 struct {
1235 SVGA3dCmdHeader header;
1236 SVGA3dCmdDestroyGBSurface body;
1237 } *cmd;
1238
1239 if (likely(res->id == -1))
1240 return 0;
1241
173fb7d4 1242 mutex_lock(&dev_priv->binding_mutex);
d80efd5c
TH
1243 vmw_view_surface_list_destroy(dev_priv, &srf->view_list);
1244 vmw_binding_res_list_scrub(&res->binding_head);
173fb7d4 1245
a97e2192
TH
1246 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
1247 if (unlikely(cmd == NULL)) {
1248 DRM_ERROR("Failed reserving FIFO space for surface "
1249 "destruction.\n");
3e894a62 1250 mutex_unlock(&dev_priv->binding_mutex);
a97e2192
TH
1251 return -ENOMEM;
1252 }
1253
1254 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SURFACE;
1255 cmd->header.size = sizeof(cmd->body);
1256 cmd->body.sid = res->id;
1257 vmw_fifo_commit(dev_priv, sizeof(*cmd));
173fb7d4 1258 mutex_unlock(&dev_priv->binding_mutex);
a97e2192 1259 vmw_resource_release_id(res);
153b3d5b 1260 vmw_fifo_resource_dec(dev_priv);
a97e2192
TH
1261
1262 return 0;
1263}
1264
233826a7 1265
a97e2192
TH
1266/**
1267 * vmw_gb_surface_define_ioctl - Ioctl function implementing
1268 * the user surface define functionality.
1269 *
1270 * @dev: Pointer to a struct drm_device.
1271 * @data: Pointer to data copied from / to user-space.
1272 * @file_priv: Pointer to a drm file private structure.
1273 */
1274int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
1275 struct drm_file *file_priv)
1276{
1277 struct vmw_private *dev_priv = vmw_priv(dev);
1278 struct vmw_user_surface *user_srf;
1279 struct vmw_surface *srf;
1280 struct vmw_resource *res;
1281 struct vmw_resource *tmp;
1282 union drm_vmw_gb_surface_create_arg *arg =
1283 (union drm_vmw_gb_surface_create_arg *)data;
1284 struct drm_vmw_gb_surface_create_req *req = &arg->req;
1285 struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1286 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1287 int ret;
1288 uint32_t size;
a97e2192
TH
1289 uint32_t backup_handle;
1290
53c1e535
TH
1291 if (req->multisample_count != 0)
1292 return -EINVAL;
233826a7 1293
a97e2192
TH
1294 if (unlikely(vmw_user_surface_size == 0))
1295 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
1296 128;
1297
1298 size = vmw_user_surface_size + 128;
1299
233826a7
SY
1300 /* Define a surface based on the parameters. */
1301 ret = vmw_surface_gb_priv_define(dev,
1302 size,
1303 req->svga3d_flags,
1304 req->format,
1305 req->drm_surface_flags & drm_vmw_surface_flag_scanout,
1306 req->mip_levels,
1307 req->multisample_count,
d80efd5c 1308 req->array_size,
233826a7
SY
1309 req->base_size,
1310 &srf);
a97e2192
TH
1311 if (unlikely(ret != 0))
1312 return ret;
1313
233826a7 1314 user_srf = container_of(srf, struct vmw_user_surface, srf);
6d10aab8
TH
1315 if (drm_is_primary_client(file_priv))
1316 user_srf->master = drm_master_get(file_priv->master);
a97e2192 1317
233826a7 1318 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
a97e2192 1319 if (unlikely(ret != 0))
233826a7
SY
1320 return ret;
1321
1322 res = &user_srf->srf.res;
a97e2192 1323
233826a7 1324
d80efd5c 1325 if (req->buffer_handle != SVGA3D_INVALID_ID) {
a97e2192 1326 ret = vmw_user_dmabuf_lookup(tfile, req->buffer_handle,
54c12bc3
TH
1327 &res->backup,
1328 &user_srf->backup_base);
d80efd5c
TH
1329 if (ret == 0 && res->backup->base.num_pages * PAGE_SIZE <
1330 res->backup_size) {
1331 DRM_ERROR("Surface backup buffer is too small.\n");
1332 vmw_dmabuf_unreference(&res->backup);
1333 ret = -EINVAL;
1334 goto out_unlock;
1335 }
1336 } else if (req->drm_surface_flags & drm_vmw_surface_flag_create_buffer)
a97e2192
TH
1337 ret = vmw_user_dmabuf_alloc(dev_priv, tfile,
1338 res->backup_size,
1339 req->drm_surface_flags &
1340 drm_vmw_surface_flag_shareable,
1341 &backup_handle,
54c12bc3
TH
1342 &res->backup,
1343 &user_srf->backup_base);
a97e2192
TH
1344
1345 if (unlikely(ret != 0)) {
1346 vmw_resource_unreference(&res);
1347 goto out_unlock;
1348 }
1349
233826a7 1350 tmp = vmw_resource_reference(res);
a97e2192
TH
1351 ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
1352 req->drm_surface_flags &
1353 drm_vmw_surface_flag_shareable,
1354 VMW_RES_SURFACE,
1355 &vmw_user_surface_base_release, NULL);
1356
1357 if (unlikely(ret != 0)) {
1358 vmw_resource_unreference(&tmp);
1359 vmw_resource_unreference(&res);
1360 goto out_unlock;
1361 }
1362
233826a7 1363 rep->handle = user_srf->prime.base.hash.key;
a97e2192
TH
1364 rep->backup_size = res->backup_size;
1365 if (res->backup) {
1366 rep->buffer_map_handle =
1367 drm_vma_node_offset_addr(&res->backup->base.vma_node);
1368 rep->buffer_size = res->backup->base.num_pages * PAGE_SIZE;
1369 rep->buffer_handle = backup_handle;
1370 } else {
1371 rep->buffer_map_handle = 0;
1372 rep->buffer_size = 0;
1373 rep->buffer_handle = SVGA3D_INVALID_ID;
1374 }
1375
1376 vmw_resource_unreference(&res);
1377
a97e2192 1378out_unlock:
294adf7d 1379 ttm_read_unlock(&dev_priv->reservation_sem);
a97e2192
TH
1380 return ret;
1381}
1382
1383/**
1384 * vmw_gb_surface_reference_ioctl - Ioctl function implementing
1385 * the user surface reference functionality.
1386 *
1387 * @dev: Pointer to a struct drm_device.
1388 * @data: Pointer to data copied from / to user-space.
1389 * @file_priv: Pointer to a drm file private structure.
1390 */
1391int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data,
1392 struct drm_file *file_priv)
1393{
1394 struct vmw_private *dev_priv = vmw_priv(dev);
1395 union drm_vmw_gb_surface_reference_arg *arg =
1396 (union drm_vmw_gb_surface_reference_arg *)data;
1397 struct drm_vmw_surface_arg *req = &arg->req;
1398 struct drm_vmw_gb_surface_ref_rep *rep = &arg->rep;
1399 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1400 struct vmw_surface *srf;
1401 struct vmw_user_surface *user_srf;
1402 struct ttm_base_object *base;
1403 uint32_t backup_handle;
1404 int ret = -EINVAL;
1405
adebcb20
TH
1406 ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
1407 req->handle_type, &base);
1408 if (unlikely(ret != 0))
1409 return ret;
a97e2192
TH
1410
1411 user_srf = container_of(base, struct vmw_user_surface, prime.base);
1412 srf = &user_srf->srf;
1413 if (srf->res.backup == NULL) {
1414 DRM_ERROR("Shared GB surface is missing a backup buffer.\n");
1415 goto out_bad_resource;
1416 }
1417
a97e2192
TH
1418 mutex_lock(&dev_priv->cmdbuf_mutex); /* Protect res->backup */
1419 ret = vmw_user_dmabuf_reference(tfile, srf->res.backup,
1420 &backup_handle);
1421 mutex_unlock(&dev_priv->cmdbuf_mutex);
1422
1423 if (unlikely(ret != 0)) {
1424 DRM_ERROR("Could not add a reference to a GB surface "
1425 "backup buffer.\n");
adebcb20 1426 (void) ttm_ref_object_base_unref(tfile, base->hash.key,
a97e2192
TH
1427 TTM_REF_USAGE);
1428 goto out_bad_resource;
1429 }
1430
1431 rep->creq.svga3d_flags = srf->flags;
1432 rep->creq.format = srf->format;
1433 rep->creq.mip_levels = srf->mip_levels[0];
1434 rep->creq.drm_surface_flags = 0;
1435 rep->creq.multisample_count = srf->multisample_count;
1436 rep->creq.autogen_filter = srf->autogen_filter;
d80efd5c 1437 rep->creq.array_size = srf->array_size;
a97e2192
TH
1438 rep->creq.buffer_handle = backup_handle;
1439 rep->creq.base_size = srf->base_size;
1440 rep->crep.handle = user_srf->prime.base.hash.key;
1441 rep->crep.backup_size = srf->res.backup_size;
1442 rep->crep.buffer_handle = backup_handle;
1443 rep->crep.buffer_map_handle =
1444 drm_vma_node_offset_addr(&srf->res.backup->base.vma_node);
1445 rep->crep.buffer_size = srf->res.backup->base.num_pages * PAGE_SIZE;
1446
1447out_bad_resource:
1448 ttm_base_object_unref(&base);
1449
1450 return ret;
1451}
233826a7
SY
1452
1453/**
1454 * vmw_surface_gb_priv_define - Define a private GB surface
1455 *
1456 * @dev: Pointer to a struct drm_device
1457 * @user_accounting_size: Used to track user-space memory usage, set
1458 * to 0 for kernel mode only memory
1459 * @svga3d_flags: SVGA3d surface flags for the device
1460 * @format: requested surface format
1461 * @for_scanout: true if inteded to be used for scanout buffer
1462 * @num_mip_levels: number of MIP levels
1463 * @multisample_count:
d80efd5c 1464 * @array_size: Surface array size.
233826a7
SY
1465 * @size: width, heigh, depth of the surface requested
1466 * @user_srf_out: allocated user_srf. Set to NULL on failure.
1467 *
1468 * GB surfaces allocated by this function will not have a user mode handle, and
1469 * thus will only be visible to vmwgfx. For optimization reasons the
1470 * surface may later be given a user mode handle by another function to make
1471 * it available to user mode drivers.
1472 */
1473int vmw_surface_gb_priv_define(struct drm_device *dev,
1474 uint32_t user_accounting_size,
1475 uint32_t svga3d_flags,
1476 SVGA3dSurfaceFormat format,
1477 bool for_scanout,
1478 uint32_t num_mip_levels,
1479 uint32_t multisample_count,
d80efd5c 1480 uint32_t array_size,
233826a7
SY
1481 struct drm_vmw_size size,
1482 struct vmw_surface **srf_out)
1483{
1484 struct vmw_private *dev_priv = vmw_priv(dev);
1485 struct vmw_user_surface *user_srf;
1486 struct vmw_surface *srf;
1487 int ret;
d80efd5c 1488 u32 num_layers;
233826a7
SY
1489
1490 *srf_out = NULL;
1491
1492 if (for_scanout) {
1493 if (!svga3dsurface_is_screen_target_format(format)) {
1494 DRM_ERROR("Invalid Screen Target surface format.");
1495 return -EINVAL;
1496 }
1497 } else {
1498 const struct svga3d_surface_desc *desc;
1499
1500 desc = svga3dsurface_get_desc(format);
1501 if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
1502 DRM_ERROR("Invalid surface format.\n");
1503 return -EINVAL;
1504 }
1505 }
1506
d80efd5c
TH
1507 /* array_size must be null for non-GL3 host. */
1508 if (array_size > 0 && !dev_priv->has_dx) {
1509 DRM_ERROR("Tried to create DX surface on non-DX host.\n");
1510 return -EINVAL;
1511 }
1512
233826a7
SY
1513 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
1514 if (unlikely(ret != 0))
1515 return ret;
1516
1517 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
1518 user_accounting_size, false, true);
1519 if (unlikely(ret != 0)) {
1520 if (ret != -ERESTARTSYS)
1521 DRM_ERROR("Out of graphics memory for surface"
1522 " creation.\n");
1523 goto out_unlock;
1524 }
1525
1526 user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
1527 if (unlikely(user_srf == NULL)) {
1528 ret = -ENOMEM;
1529 goto out_no_user_srf;
1530 }
1531
1532 *srf_out = &user_srf->srf;
1533 user_srf->size = user_accounting_size;
1534 user_srf->prime.base.shareable = false;
1535 user_srf->prime.base.tfile = NULL;
1536
1537 srf = &user_srf->srf;
1538 srf->flags = svga3d_flags;
1539 srf->format = format;
1540 srf->scanout = for_scanout;
1541 srf->mip_levels[0] = num_mip_levels;
1542 srf->num_sizes = 1;
1543 srf->sizes = NULL;
1544 srf->offsets = NULL;
1545 srf->base_size = size;
1546 srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
2f633e5e 1547 srf->array_size = array_size;
233826a7
SY
1548 srf->multisample_count = multisample_count;
1549
d80efd5c
TH
1550 if (array_size)
1551 num_layers = array_size;
1552 else if (svga3d_flags & SVGA3D_SURFACE_CUBEMAP)
1553 num_layers = SVGA3D_MAX_SURFACE_FACES;
1554 else
1555 num_layers = 1;
1556
1557 srf->res.backup_size =
1558 svga3dsurface_get_serialized_size(srf->format,
1559 srf->base_size,
1560 srf->mip_levels[0],
1561 num_layers);
1562
1563 if (srf->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
1564 srf->res.backup_size += sizeof(SVGA3dDXSOState);
233826a7 1565
35c05125
SY
1566 if (dev_priv->active_display_unit == vmw_du_screen_target &&
1567 for_scanout)
1568 srf->flags |= SVGA3D_SURFACE_SCREENTARGET;
1569
233826a7
SY
1570 /*
1571 * From this point, the generic resource management functions
1572 * destroy the object on failure.
1573 */
1574 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
1575
1576 ttm_read_unlock(&dev_priv->reservation_sem);
1577 return ret;
1578
1579out_no_user_srf:
1580 ttm_mem_global_free(vmw_mem_glob(dev_priv), user_accounting_size);
1581
1582out_unlock:
1583 ttm_read_unlock(&dev_priv->reservation_sem);
1584 return ret;
1585}
This page took 0.29583 seconds and 5 git commands to generate.