[deliverable/linux.git] / drivers / gpu / host1x / dev.c

/*
 * Tegra host1x driver
 *
 * Copyright (c) 2010-2013, NVIDIA Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/module.h>
#include <linux/list.h>
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/clk.h>
#include <linux/io.h>

#define CREATE_TRACE_POINTS
#include <trace/events/host1x.h>

#include "dev.h"
#include "intr.h"
#include "channel.h"
#include "debug.h"
#include "hw/host1x01.h"
#include "host1x_client.h"

void host1x_set_drm_data(struct device *dev, void *data)
{
	struct host1x *host1x = dev_get_drvdata(dev);
	host1x->drm_data = data;
}

void *host1x_get_drm_data(struct device *dev)
{
	struct host1x *host1x = dev_get_drvdata(dev);
	return host1x->drm_data;
}

void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
{
	void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;

	writel(v, sync_regs + r);
}

u32 host1x_sync_readl(struct host1x *host1x, u32 r)
{
	void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;

	return readl(sync_regs + r);
}

void host1x_ch_writel(struct host1x_channel *ch, u32 v, u32 r)
{
	writel(v, ch->regs + r);
}

u32 host1x_ch_readl(struct host1x_channel *ch, u32 r)
{
	return readl(ch->regs + r);
}

static const struct host1x_info host1x01_info = {
	.nb_channels	= 8,
	.nb_pts		= 32,
	.nb_mlocks	= 16,
	.nb_bases	= 8,
	.init		= host1x01_init,
	.sync_offset	= 0x3000,
};

static struct of_device_id host1x_of_match[] = {
	{ .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, },
	{ .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, },
	{ },
};
MODULE_DEVICE_TABLE(of, host1x_of_match);

static int host1x_probe(struct platform_device *pdev)
{
	const struct of_device_id *id;
	struct host1x *host;
	struct resource *regs;
	int syncpt_irq;
	int err;

	id = of_match_device(host1x_of_match, &pdev->dev);
	if (!id)
		return -EINVAL;

	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!regs) {
		dev_err(&pdev->dev, "failed to get registers\n");
		return -ENXIO;
	}

	syncpt_irq = platform_get_irq(pdev, 0);
	if (syncpt_irq < 0) {
		dev_err(&pdev->dev, "failed to get IRQ\n");
		return -ENXIO;
	}

	host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);
	if (!host)
		return -ENOMEM;

	host->dev = &pdev->dev;
	host->info = id->data;

	/* set common host1x device data */
	platform_set_drvdata(pdev, host);

	host->regs = devm_ioremap_resource(&pdev->dev, regs);
	if (IS_ERR(host->regs))
		return PTR_ERR(host->regs);

	if (host->info->init) {
		err = host->info->init(host);
		if (err)
			return err;
	}

	host->clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(host->clk)) {
		dev_err(&pdev->dev, "failed to get clock\n");
		err = PTR_ERR(host->clk);
		return err;
	}

	err = host1x_channel_list_init(host);
	if (err) {
		dev_err(&pdev->dev, "failed to initialize channel list\n");
		return err;
	}

	err = clk_prepare_enable(host->clk);
	if (err < 0) {
		dev_err(&pdev->dev, "failed to enable clock\n");
		return err;
	}

	err = host1x_syncpt_init(host);
	if (err) {
		dev_err(&pdev->dev, "failed to initialize syncpts\n");
		return err;
	}

	err = host1x_intr_init(host, syncpt_irq);
	if (err) {
		dev_err(&pdev->dev, "failed to initialize interrupts\n");
		goto fail_deinit_syncpt;
	}

	host1x_debug_init(host);

	host1x_drm_alloc(pdev);

	return 0;

fail_deinit_syncpt:
	host1x_syncpt_deinit(host);
	return err;
}

static int __exit host1x_remove(struct platform_device *pdev)
{
	struct host1x *host = platform_get_drvdata(pdev);

	host1x_intr_deinit(host);
	host1x_syncpt_deinit(host);
	clk_disable_unprepare(host->clk);

	return 0;
}

static struct platform_driver tegra_host1x_driver = {
	.probe = host1x_probe,
	.remove = __exit_p(host1x_remove),
	.driver = {
		.owner = THIS_MODULE,
		.name = "tegra-host1x",
		.of_match_table = host1x_of_match,
	},
};

static int __init tegra_host1x_init(void)
{
	int err;

	err = platform_driver_register(&tegra_host1x_driver);
	if (err < 0)
		return err;

#ifdef CONFIG_DRM_TEGRA
	err = platform_driver_register(&tegra_dc_driver);
	if (err < 0)
		goto unregister_host1x;

	err = platform_driver_register(&tegra_hdmi_driver);
	if (err < 0)
		goto unregister_dc;
#endif

	return 0;

#ifdef CONFIG_DRM_TEGRA
unregister_dc:
	platform_driver_unregister(&tegra_dc_driver);
unregister_host1x:
	platform_driver_unregister(&tegra_host1x_driver);
	return err;
#endif
}
module_init(tegra_host1x_init);

static void __exit tegra_host1x_exit(void)
{
#ifdef CONFIG_DRM_TEGRA
	platform_driver_unregister(&tegra_hdmi_driver);
	platform_driver_unregister(&tegra_dc_driver);
#endif
	platform_driver_unregister(&tegra_host1x_driver);
}
module_exit(tegra_host1x_exit);

MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
MODULE_AUTHOR("Terje Bergstrom <tbergstrom@nvidia.com>");
MODULE_DESCRIPTION("Host1x driver for Tegra products");
MODULE_LICENSE("GPL");
Commit	Line	Data
75471687 TB	1	/*
	2	* Tegra host1x driver
	3	*
	4	* Copyright (c) 2010-2013, NVIDIA Corporation.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms and conditions of the GNU General Public License,
	8	* version 2, as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope it will be useful, but WITHOUT
	11	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	* more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	17	*/
	18
	19	#include <linux/module.h>
	20	#include <linux/list.h>
	21	#include <linux/slab.h>
	22	#include <linux/of.h>
	23	#include <linux/of_device.h>
	24	#include <linux/clk.h>
	25	#include <linux/io.h>
	26
	27	#define CREATE_TRACE_POINTS
	28	#include <trace/events/host1x.h>
	29
	30	#include "dev.h"
7ede0b0b	31	#include "intr.h"
6579324a	32	#include "channel.h"
6236451d	33	#include "debug.h"
75471687	34	#include "hw/host1x01.h"
692e6d7b TB	35	#include "host1x_client.h"
	36
	37	void host1x_set_drm_data(struct device dev, void data)
	38	{
	39	struct host1x *host1x = dev_get_drvdata(dev);
	40	host1x->drm_data = data;
	41	}
	42
	43	void host1x_get_drm_data(struct device dev)
	44	{
	45	struct host1x *host1x = dev_get_drvdata(dev);
	46	return host1x->drm_data;
	47	}
75471687 TB	48
	49	void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
	50	{
	51	void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;
	52
	53	writel(v, sync_regs + r);
	54	}
	55
	56	u32 host1x_sync_readl(struct host1x *host1x, u32 r)
	57	{
	58	void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;
	59
	60	return readl(sync_regs + r);
	61	}
	62
6579324a TB	63	void host1x_ch_writel(struct host1x_channel *ch, u32 v, u32 r)
	64	{
	65	writel(v, ch->regs + r);
	66	}
	67
	68	u32 host1x_ch_readl(struct host1x_channel *ch, u32 r)
	69	{
	70	return readl(ch->regs + r);
	71	}
	72
75471687 TB	73	static const struct host1x_info host1x01_info = {
	74	.nb_channels = 8,
	75	.nb_pts = 32,
	76	.nb_mlocks = 16,
	77	.nb_bases = 8,
	78	.init = host1x01_init,
	79	.sync_offset = 0x3000,
	80	};
	81
	82	static struct of_device_id host1x_of_match[] = {
	83	{ .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, },
	84	{ .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, },
	85	{ },
	86	};
	87	MODULE_DEVICE_TABLE(of, host1x_of_match);
	88
	89	static int host1x_probe(struct platform_device *pdev)
	90	{
	91	const struct of_device_id *id;
	92	struct host1x *host;
	93	struct resource *regs;
	94	int syncpt_irq;
	95	int err;
	96
	97	id = of_match_device(host1x_of_match, &pdev->dev);
	98	if (!id)
	99	return -EINVAL;
	100
	101	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	102	if (!regs) {
	103	dev_err(&pdev->dev, "failed to get registers\n");
	104	return -ENXIO;
	105	}
	106
	107	syncpt_irq = platform_get_irq(pdev, 0);
	108	if (syncpt_irq < 0) {
	109	dev_err(&pdev->dev, "failed to get IRQ\n");
	110	return -ENXIO;
	111	}
	112
	113	host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);
	114	if (!host)
	115	return -ENOMEM;
	116
	117	host->dev = &pdev->dev;
	118	host->info = id->data;
	119
	120	/* set common host1x device data */
	121	platform_set_drvdata(pdev, host);
	122
	123	host->regs = devm_ioremap_resource(&pdev->dev, regs);
	124	if (IS_ERR(host->regs))
	125	return PTR_ERR(host->regs);
	126
	127	if (host->info->init) {
	128	err = host->info->init(host);
	129	if (err)
	130	return err;
	131	}
	132
	133	host->clk = devm_clk_get(&pdev->dev, NULL);
	134	if (IS_ERR(host->clk)) {
	135	dev_err(&pdev->dev, "failed to get clock\n");
	136	err = PTR_ERR(host->clk);
137	return err;
138	}
139
6579324a TB	140	err = host1x_channel_list_init(host);
	141	if (err) {
	142	dev_err(&pdev->dev, "failed to initialize channel list\n");
	143	return err;
	144	}
	145
75471687 TB	146	err = clk_prepare_enable(host->clk);
	147	if (err < 0) {
	148	dev_err(&pdev->dev, "failed to enable clock\n");
	149	return err;
	150	}
	151
	152	err = host1x_syncpt_init(host);
	153	if (err) {
	154	dev_err(&pdev->dev, "failed to initialize syncpts\n");
	155	return err;
	156	}
	157
7ede0b0b TB	158	err = host1x_intr_init(host, syncpt_irq);
	159	if (err) {
	160	dev_err(&pdev->dev, "failed to initialize interrupts\n");
	161	goto fail_deinit_syncpt;
	162	}
	163
6236451d TB	164	host1x_debug_init(host);
6236451d TB	165
692e6d7b TB	166	host1x_drm_alloc(pdev);
692e6d7b TB	167
75471687	168	return 0;
7ede0b0b TB	169
	170	fail_deinit_syncpt:
	171	host1x_syncpt_deinit(host);
	172	return err;
75471687 TB	173	}
	174
	175	static int __exit host1x_remove(struct platform_device *pdev)
	176	{
	177	struct host1x *host = platform_get_drvdata(pdev);
	178
7ede0b0b	179	host1x_intr_deinit(host);
75471687 TB	180	host1x_syncpt_deinit(host);
	181	clk_disable_unprepare(host->clk);
	182
	183	return 0;
	184	}
	185
692e6d7b	186	static struct platform_driver tegra_host1x_driver = {
75471687 TB	187	.probe = host1x_probe,
	188	.remove = __exit_p(host1x_remove),
	189	.driver = {
	190	.owner = THIS_MODULE,
	191	.name = "tegra-host1x",
	192	.of_match_table = host1x_of_match,
	193	},
	194	};
	195
692e6d7b TB	196	static int __init tegra_host1x_init(void)
	197	{
	198	int err;
	199
	200	err = platform_driver_register(&tegra_host1x_driver);
	201	if (err < 0)
	202	return err;
	203
	204	#ifdef CONFIG_DRM_TEGRA
	205	err = platform_driver_register(&tegra_dc_driver);
	206	if (err < 0)
	207	goto unregister_host1x;
	208
	209	err = platform_driver_register(&tegra_hdmi_driver);
	210	if (err < 0)
	211	goto unregister_dc;
	212	#endif
	213
	214	return 0;
	215
	216	#ifdef CONFIG_DRM_TEGRA
	217	unregister_dc:
	218	platform_driver_unregister(&tegra_dc_driver);
	219	unregister_host1x:
	220	platform_driver_unregister(&tegra_host1x_driver);
	221	return err;
	222	#endif
	223	}
	224	module_init(tegra_host1x_init);
	225
	226	static void __exit tegra_host1x_exit(void)
	227	{
	228	#ifdef CONFIG_DRM_TEGRA
	229	platform_driver_unregister(&tegra_hdmi_driver);
	230	platform_driver_unregister(&tegra_dc_driver);
	231	#endif
	232	platform_driver_unregister(&tegra_host1x_driver);
	233	}
	234	module_exit(tegra_host1x_exit);
75471687	235
692e6d7b	236	MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
75471687 TB	237	MODULE_AUTHOR("Terje Bergstrom <tbergstrom@nvidia.com>");
	238	MODULE_DESCRIPTION("Host1x driver for Tegra products");
	239	MODULE_LICENSE("GPL");