[deliverable/linux.git] / drivers / hsi / controllers / omap_ssi.c

/* OMAP SSI driver.
 *
 * Copyright (C) 2010 Nokia Corporation. All rights reserved.
 * Copyright (C) 2014 Sebastian Reichel <sre@kernel.org>
 *
 * Contact: Carlos Chinea <carlos.chinea@nokia.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 */

#include <linux/compiler.h>
#include <linux/err.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/scatterlist.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/debugfs.h>
#include <linux/pm_runtime.h>
#include <linux/of_platform.h>
#include <linux/hsi/hsi.h>
#include <linux/idr.h>

#include "omap_ssi_regs.h"
#include "omap_ssi.h"

/* For automatically allocated device IDs */
static DEFINE_IDA(platform_omap_ssi_ida);

#ifdef CONFIG_DEBUG_FS
static int ssi_debug_show(struct seq_file *m, void *p __maybe_unused)
{
	struct hsi_controller *ssi = m->private;
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	void __iomem *sys = omap_ssi->sys;

	pm_runtime_get_sync(ssi->device.parent);
	seq_printf(m, "REVISION\t: 0x%08x\n",  readl(sys + SSI_REVISION_REG));
	seq_printf(m, "SYSCONFIG\t: 0x%08x\n", readl(sys + SSI_SYSCONFIG_REG));
	seq_printf(m, "SYSSTATUS\t: 0x%08x\n", readl(sys + SSI_SYSSTATUS_REG));
	pm_runtime_put_sync(ssi->device.parent);

	return 0;
}

static int ssi_debug_gdd_show(struct seq_file *m, void *p __maybe_unused)
{
	struct hsi_controller *ssi = m->private;
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	void __iomem *gdd = omap_ssi->gdd;
	void __iomem *sys = omap_ssi->sys;
	int lch;

	pm_runtime_get_sync(ssi->device.parent);

	seq_printf(m, "GDD_MPU_STATUS\t: 0x%08x\n",
		readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG));
	seq_printf(m, "GDD_MPU_ENABLE\t: 0x%08x\n\n",
		readl(sys + SSI_GDD_MPU_IRQ_ENABLE_REG));
	seq_printf(m, "HW_ID\t\t: 0x%08x\n",
				readl(gdd + SSI_GDD_HW_ID_REG));
	seq_printf(m, "PPORT_ID\t: 0x%08x\n",
				readl(gdd + SSI_GDD_PPORT_ID_REG));
	seq_printf(m, "MPORT_ID\t: 0x%08x\n",
				readl(gdd + SSI_GDD_MPORT_ID_REG));
	seq_printf(m, "TEST\t\t: 0x%08x\n",
				readl(gdd + SSI_GDD_TEST_REG));
	seq_printf(m, "GCR\t\t: 0x%08x\n",
				readl(gdd + SSI_GDD_GCR_REG));

	for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) {
		seq_printf(m, "\nGDD LCH %d\n=========\n", lch);
		seq_printf(m, "CSDP\t\t: 0x%04x\n",
				readw(gdd + SSI_GDD_CSDP_REG(lch)));
		seq_printf(m, "CCR\t\t: 0x%04x\n",
				readw(gdd + SSI_GDD_CCR_REG(lch)));
		seq_printf(m, "CICR\t\t: 0x%04x\n",
				readw(gdd + SSI_GDD_CICR_REG(lch)));
		seq_printf(m, "CSR\t\t: 0x%04x\n",
				readw(gdd + SSI_GDD_CSR_REG(lch)));
		seq_printf(m, "CSSA\t\t: 0x%08x\n",
				readl(gdd + SSI_GDD_CSSA_REG(lch)));
		seq_printf(m, "CDSA\t\t: 0x%08x\n",
				readl(gdd + SSI_GDD_CDSA_REG(lch)));
		seq_printf(m, "CEN\t\t: 0x%04x\n",
				readw(gdd + SSI_GDD_CEN_REG(lch)));
		seq_printf(m, "CSAC\t\t: 0x%04x\n",
				readw(gdd + SSI_GDD_CSAC_REG(lch)));
		seq_printf(m, "CDAC\t\t: 0x%04x\n",
				readw(gdd + SSI_GDD_CDAC_REG(lch)));
		seq_printf(m, "CLNK_CTRL\t: 0x%04x\n",
				readw(gdd + SSI_GDD_CLNK_CTRL_REG(lch)));
	}

	pm_runtime_put_sync(ssi->device.parent);

	return 0;
}

static int ssi_regs_open(struct inode *inode, struct file *file)
{
	return single_open(file, ssi_debug_show, inode->i_private);
}

static int ssi_gdd_regs_open(struct inode *inode, struct file *file)
{
	return single_open(file, ssi_debug_gdd_show, inode->i_private);
}

static const struct file_operations ssi_regs_fops = {
	.open		= ssi_regs_open,
	.read		= seq_read,
	.llseek		= seq_lseek,
	.release	= single_release,
};

static const struct file_operations ssi_gdd_regs_fops = {
	.open		= ssi_gdd_regs_open,
	.read		= seq_read,
	.llseek		= seq_lseek,
	.release	= single_release,
};

static int ssi_debug_add_ctrl(struct hsi_controller *ssi)
{
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	struct dentry *dir;

	/* SSI controller */
	omap_ssi->dir = debugfs_create_dir(dev_name(&ssi->device), NULL);
	if (!omap_ssi->dir)
		return -ENOMEM;

	debugfs_create_file("regs", S_IRUGO, omap_ssi->dir, ssi,
								&ssi_regs_fops);
	/* SSI GDD (DMA) */
	dir = debugfs_create_dir("gdd", omap_ssi->dir);
	if (!dir)
		goto rback;
	debugfs_create_file("regs", S_IRUGO, dir, ssi, &ssi_gdd_regs_fops);

	return 0;
rback:
	debugfs_remove_recursive(omap_ssi->dir);

	return -ENOMEM;
}

static void ssi_debug_remove_ctrl(struct hsi_controller *ssi)
{
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);

	debugfs_remove_recursive(omap_ssi->dir);
}
#endif /* CONFIG_DEBUG_FS */

/*
 * FIXME: Horrible HACK needed until we remove the useless wakeline test
 * in the CMT. To be removed !!!!
 */
void ssi_waketest(struct hsi_client *cl, unsigned int enable)
{
	struct hsi_port *port = hsi_get_port(cl);
	struct omap_ssi_port *omap_port = hsi_port_drvdata(port);
	struct hsi_controller *ssi = to_hsi_controller(port->device.parent);
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);

	omap_port->wktest = !!enable;
	if (omap_port->wktest) {
		pm_runtime_get_sync(ssi->device.parent);
		writel_relaxed(SSI_WAKE(0),
				omap_ssi->sys + SSI_SET_WAKE_REG(port->num));
	} else {
		writel_relaxed(SSI_WAKE(0),
				omap_ssi->sys +	SSI_CLEAR_WAKE_REG(port->num));
		pm_runtime_put_sync(ssi->device.parent);
	}
}
EXPORT_SYMBOL_GPL(ssi_waketest);

static void ssi_gdd_complete(struct hsi_controller *ssi, unsigned int lch)
{
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	struct hsi_msg *msg = omap_ssi->gdd_trn[lch].msg;
	struct hsi_port *port = to_hsi_port(msg->cl->device.parent);
	struct omap_ssi_port *omap_port = hsi_port_drvdata(port);
	unsigned int dir;
	u32 csr;
	u32 val;

	spin_lock(&omap_ssi->lock);

	val = readl(omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
	val &= ~SSI_GDD_LCH(lch);
	writel_relaxed(val, omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);

	if (msg->ttype == HSI_MSG_READ) {
		dir = DMA_FROM_DEVICE;
		val = SSI_DATAAVAILABLE(msg->channel);
		pm_runtime_put_sync(ssi->device.parent);
	} else {
		dir = DMA_TO_DEVICE;
		val = SSI_DATAACCEPT(msg->channel);
		/* Keep clocks reference for write pio event */
	}
	dma_unmap_sg(&ssi->device, msg->sgt.sgl, msg->sgt.nents, dir);
	csr = readw(omap_ssi->gdd + SSI_GDD_CSR_REG(lch));
	omap_ssi->gdd_trn[lch].msg = NULL; /* release GDD lch */
	dev_dbg(&port->device, "DMA completed ch %d ttype %d\n",
				msg->channel, msg->ttype);
	spin_unlock(&omap_ssi->lock);
	if (csr & SSI_CSR_TOUR) { /* Timeout error */
		msg->status = HSI_STATUS_ERROR;
		msg->actual_len = 0;
		spin_lock(&omap_port->lock);
		list_del(&msg->link); /* Dequeue msg */
		spin_unlock(&omap_port->lock);
		msg->complete(msg);
		return;
	}
	spin_lock(&omap_port->lock);
	val |= readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
	writel_relaxed(val, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
	spin_unlock(&omap_port->lock);

	msg->status = HSI_STATUS_COMPLETED;
	msg->actual_len = sg_dma_len(msg->sgt.sgl);
}

static void ssi_gdd_tasklet(unsigned long dev)
{
	struct hsi_controller *ssi = (struct hsi_controller *)dev;
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	void __iomem *sys = omap_ssi->sys;
	unsigned int lch;
	u32 status_reg;

	pm_runtime_get_sync(ssi->device.parent);

	status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);
	for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) {
		if (status_reg & SSI_GDD_LCH(lch))
			ssi_gdd_complete(ssi, lch);
	}
	writel_relaxed(status_reg, sys + SSI_GDD_MPU_IRQ_STATUS_REG);
	status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);

	pm_runtime_put_sync(ssi->device.parent);

	if (status_reg)
		tasklet_hi_schedule(&omap_ssi->gdd_tasklet);
	else
		enable_irq(omap_ssi->gdd_irq);

}

static irqreturn_t ssi_gdd_isr(int irq, void *ssi)
{
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);

	tasklet_hi_schedule(&omap_ssi->gdd_tasklet);
	disable_irq_nosync(irq);

	return IRQ_HANDLED;
}

static unsigned long ssi_get_clk_rate(struct hsi_controller *ssi)
{
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	unsigned long rate = clk_get_rate(omap_ssi->fck);
	return rate;
}

static int ssi_get_iomem(struct platform_device *pd,
		const char *name, void __iomem **pbase, dma_addr_t *phy)
{
	struct resource *mem;
	void __iomem *base;
	struct hsi_controller *ssi = platform_get_drvdata(pd);

	mem = platform_get_resource_byname(pd, IORESOURCE_MEM, name);
	base = devm_ioremap_resource(&ssi->device, mem);
	if (IS_ERR(base))
		return PTR_ERR(base);

	*pbase = base;

	if (phy)
		*phy = mem->start;

	return 0;
}

static int ssi_add_controller(struct hsi_controller *ssi,
						struct platform_device *pd)
{
	struct omap_ssi_controller *omap_ssi;
	int err;

	omap_ssi = devm_kzalloc(&ssi->device, sizeof(*omap_ssi), GFP_KERNEL);
	if (!omap_ssi) {
		dev_err(&pd->dev, "not enough memory for omap ssi\n");
		return -ENOMEM;
	}

	err = ida_simple_get(&platform_omap_ssi_ida, 0, 0, GFP_KERNEL);
	if (err < 0)
		goto out_err;
	ssi->id = err;

	ssi->owner = THIS_MODULE;
	ssi->device.parent = &pd->dev;
	dev_set_name(&ssi->device, "ssi%d", ssi->id);
	hsi_controller_set_drvdata(ssi, omap_ssi);
	omap_ssi->dev = &ssi->device;
	err = ssi_get_iomem(pd, "sys", &omap_ssi->sys, NULL);
	if (err < 0)
		goto out_err;
	err = ssi_get_iomem(pd, "gdd", &omap_ssi->gdd, NULL);
	if (err < 0)
		goto out_err;
	err = platform_get_irq_byname(pd, "gdd_mpu");
	if (err < 0) {
		dev_err(&pd->dev, "GDD IRQ resource missing\n");
		goto out_err;
	}
	omap_ssi->gdd_irq = err;
	tasklet_init(&omap_ssi->gdd_tasklet, ssi_gdd_tasklet,
							(unsigned long)ssi);
	err = devm_request_irq(&ssi->device, omap_ssi->gdd_irq, ssi_gdd_isr,
						0, "gdd_mpu", ssi);
	if (err < 0) {
		dev_err(&ssi->device, "Request GDD IRQ %d failed (%d)",
							omap_ssi->gdd_irq, err);
		goto out_err;
	}

	omap_ssi->port = devm_kzalloc(&ssi->device,
		sizeof(struct omap_ssi_port *) * ssi->num_ports, GFP_KERNEL);
	if (!omap_ssi->port) {
		err = -ENOMEM;
		goto out_err;
	}

	omap_ssi->fck = devm_clk_get(&ssi->device, "ssi_ssr_fck");
	if (IS_ERR(omap_ssi->fck)) {
		dev_err(&pd->dev, "Could not acquire clock \"ssi_ssr_fck\": %li\n",
			PTR_ERR(omap_ssi->fck));
		err = -ENODEV;
		goto out_err;
	}

	/* TODO: find register, which can be used to detect context loss */
	omap_ssi->get_loss = NULL;

	omap_ssi->max_speed = UINT_MAX;
	spin_lock_init(&omap_ssi->lock);
	err = hsi_register_controller(ssi);

	if (err < 0)
		goto out_err;

	return 0;

out_err:
	ida_simple_remove(&platform_omap_ssi_ida, ssi->id);
	return err;
}

static int ssi_hw_init(struct hsi_controller *ssi)
{
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	unsigned int i;
	u32 val;
	int err;

	err = pm_runtime_get_sync(ssi->device.parent);
	if (err < 0) {
		dev_err(&ssi->device, "runtime PM failed %d\n", err);
		return err;
	}
	/* Reseting SSI controller */
	writel_relaxed(SSI_SOFTRESET, omap_ssi->sys + SSI_SYSCONFIG_REG);
	val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG);
	for (i = 0; ((i < 20) && !(val & SSI_RESETDONE)); i++) {
		msleep(20);
		val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG);
	}
	if (!(val & SSI_RESETDONE)) {
		dev_err(&ssi->device, "SSI HW reset failed\n");
		pm_runtime_put_sync(ssi->device.parent);
		return -EIO;
	}
	/* Reseting GDD */
	writel_relaxed(SSI_SWRESET, omap_ssi->gdd + SSI_GDD_GRST_REG);
	/* Get FCK rate in KHz */
	omap_ssi->fck_rate = DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi), 1000);
	dev_dbg(&ssi->device, "SSI fck rate %lu KHz\n", omap_ssi->fck_rate);
	/* Set default PM settings */
	val = SSI_AUTOIDLE | SSI_SIDLEMODE_SMART | SSI_MIDLEMODE_SMART;
	writel_relaxed(val, omap_ssi->sys + SSI_SYSCONFIG_REG);
	omap_ssi->sysconfig = val;
	writel_relaxed(SSI_CLK_AUTOGATING_ON, omap_ssi->sys + SSI_GDD_GCR_REG);
	omap_ssi->gdd_gcr = SSI_CLK_AUTOGATING_ON;
	pm_runtime_put_sync(ssi->device.parent);

	return 0;
}

static void ssi_remove_controller(struct hsi_controller *ssi)
{
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	int id = ssi->id;
	tasklet_kill(&omap_ssi->gdd_tasklet);
	hsi_unregister_controller(ssi);
	ida_simple_remove(&platform_omap_ssi_ida, id);
}

static inline int ssi_of_get_available_ports_count(const struct device_node *np)
{
	struct device_node *child;
	int num = 0;

	for_each_available_child_of_node(np, child)
		if (of_device_is_compatible(child, "ti,omap3-ssi-port"))
			num++;

	return num;
}

static int ssi_remove_ports(struct device *dev, void *c)
{
	struct platform_device *pdev = to_platform_device(dev);

	if (!dev->of_node)
		return 0;

	of_node_clear_flag(dev->of_node, OF_POPULATED);
	of_device_unregister(pdev);

	return 0;
}

static int ssi_probe(struct platform_device *pd)
{
	struct platform_device *childpdev;
	struct device_node *np = pd->dev.of_node;
	struct device_node *child;
	struct hsi_controller *ssi;
	int err;
	int num_ports;

	if (!np) {
		dev_err(&pd->dev, "missing device tree data\n");
		return -EINVAL;
	}

	num_ports = ssi_of_get_available_ports_count(np);

	ssi = hsi_alloc_controller(num_ports, GFP_KERNEL);
	if (!ssi) {
		dev_err(&pd->dev, "No memory for controller\n");
		return -ENOMEM;
	}

	platform_set_drvdata(pd, ssi);

	err = ssi_add_controller(ssi, pd);
	if (err < 0)
		goto out1;

	pm_runtime_irq_safe(&pd->dev);
	pm_runtime_enable(&pd->dev);

	err = ssi_hw_init(ssi);
	if (err < 0)
		goto out2;
#ifdef CONFIG_DEBUG_FS
	err = ssi_debug_add_ctrl(ssi);
	if (err < 0)
		goto out2;
#endif

	for_each_available_child_of_node(np, child) {
		if (!of_device_is_compatible(child, "ti,omap3-ssi-port"))
			continue;

		childpdev = of_platform_device_create(child, NULL, &pd->dev);
		if (!childpdev) {
			err = -ENODEV;
			dev_err(&pd->dev, "failed to create ssi controller port\n");
			goto out3;
		}
	}

	dev_info(&pd->dev, "ssi controller %d initialized (%d ports)!\n",
		ssi->id, num_ports);
	return err;
out3:
	device_for_each_child(&pd->dev, NULL, ssi_remove_ports);
out2:
	ssi_remove_controller(ssi);
out1:
	platform_set_drvdata(pd, NULL);
	pm_runtime_disable(&pd->dev);

	return err;
}

static int ssi_remove(struct platform_device *pd)
{
	struct hsi_controller *ssi = platform_get_drvdata(pd);

	/* cleanup of of_platform_populate() call */
	device_for_each_child(&pd->dev, NULL, ssi_remove_ports);

#ifdef CONFIG_DEBUG_FS
	ssi_debug_remove_ctrl(ssi);
#endif
	ssi_remove_controller(ssi);
	platform_set_drvdata(pd, NULL);

	pm_runtime_disable(&pd->dev);

	return 0;
}

#ifdef CONFIG_PM
static int omap_ssi_runtime_suspend(struct device *dev)
{
	struct hsi_controller *ssi = dev_get_drvdata(dev);
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);

	dev_dbg(dev, "runtime suspend!\n");

	if (omap_ssi->get_loss)
		omap_ssi->loss_count =
				omap_ssi->get_loss(ssi->device.parent);

	return 0;
}

static int omap_ssi_runtime_resume(struct device *dev)
{
	struct hsi_controller *ssi = dev_get_drvdata(dev);
	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);

	dev_dbg(dev, "runtime resume!\n");

	if ((omap_ssi->get_loss) && (omap_ssi->loss_count ==
				omap_ssi->get_loss(ssi->device.parent)))
		return 0;

	writel_relaxed(omap_ssi->gdd_gcr, omap_ssi->gdd + SSI_GDD_GCR_REG);

	return 0;
}

static const struct dev_pm_ops omap_ssi_pm_ops = {
	SET_RUNTIME_PM_OPS(omap_ssi_runtime_suspend, omap_ssi_runtime_resume,
		NULL)
};

#define DEV_PM_OPS     (&omap_ssi_pm_ops)
#else
#define DEV_PM_OPS     NULL
#endif

#ifdef CONFIG_OF
static const struct of_device_id omap_ssi_of_match[] = {
	{ .compatible = "ti,omap3-ssi", },
	{},
};
MODULE_DEVICE_TABLE(of, omap_ssi_of_match);
#else
#define omap_ssi_of_match NULL
#endif

static struct platform_driver ssi_pdriver = {
	.probe = ssi_probe,
	.remove	= ssi_remove,
	.driver	= {
		.name	= "omap_ssi",
		.pm     = DEV_PM_OPS,
		.of_match_table = omap_ssi_of_match,
	},
};

module_platform_driver(ssi_pdriver);

MODULE_ALIAS("platform:omap_ssi");
MODULE_AUTHOR("Carlos Chinea <carlos.chinea@nokia.com>");
MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>");
MODULE_DESCRIPTION("Synchronous Serial Interface Driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
b209e047 SR	1	/* OMAP SSI driver.
	2	*
	3	* Copyright (C) 2010 Nokia Corporation. All rights reserved.
	4	* Copyright (C) 2014 Sebastian Reichel <sre@kernel.org>
	5	*
	6	* Contact: Carlos Chinea <carlos.chinea@nokia.com>
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	20	* 02110-1301 USA
	21	*/
	22
	23	#include <linux/compiler.h>
	24	#include <linux/err.h>
	25	#include <linux/ioport.h>
	26	#include <linux/io.h>
b209e047 SR	27	#include <linux/clk.h>
	28	#include <linux/device.h>
	29	#include <linux/platform_device.h>
	30	#include <linux/dma-mapping.h>
	31	#include <linux/dmaengine.h>
	32	#include <linux/delay.h>
	33	#include <linux/seq_file.h>
	34	#include <linux/scatterlist.h>
	35	#include <linux/interrupt.h>
	36	#include <linux/spinlock.h>
	37	#include <linux/debugfs.h>
	38	#include <linux/pm_runtime.h>
	39	#include <linux/of_platform.h>
	40	#include <linux/hsi/hsi.h>
	41	#include <linux/idr.h>
	42
	43	#include "omap_ssi_regs.h"
	44	#include "omap_ssi.h"
	45
	46	/* For automatically allocated device IDs */
	47	static DEFINE_IDA(platform_omap_ssi_ida);
	48
	49	#ifdef CONFIG_DEBUG_FS
	50	static int ssi_debug_show(struct seq_file m, void p __maybe_unused)
	51	{
	52	struct hsi_controller *ssi = m->private;
	53	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	54	void __iomem *sys = omap_ssi->sys;
	55
	56	pm_runtime_get_sync(ssi->device.parent);
	57	seq_printf(m, "REVISION\t: 0x%08x\n", readl(sys + SSI_REVISION_REG));
	58	seq_printf(m, "SYSCONFIG\t: 0x%08x\n", readl(sys + SSI_SYSCONFIG_REG));
	59	seq_printf(m, "SYSSTATUS\t: 0x%08x\n", readl(sys + SSI_SYSSTATUS_REG));
	60	pm_runtime_put_sync(ssi->device.parent);
	61
	62	return 0;
	63	}
	64
	65	static int ssi_debug_gdd_show(struct seq_file m, void p __maybe_unused)
	66	{
	67	struct hsi_controller *ssi = m->private;
	68	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	69	void __iomem *gdd = omap_ssi->gdd;
	70	void __iomem *sys = omap_ssi->sys;
	71	int lch;
	72
	73	pm_runtime_get_sync(ssi->device.parent);
	74
	75	seq_printf(m, "GDD_MPU_STATUS\t: 0x%08x\n",
	76	readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG));
	77	seq_printf(m, "GDD_MPU_ENABLE\t: 0x%08x\n\n",
	78	readl(sys + SSI_GDD_MPU_IRQ_ENABLE_REG));
	79	seq_printf(m, "HW_ID\t\t: 0x%08x\n",
	80	readl(gdd + SSI_GDD_HW_ID_REG));
	81	seq_printf(m, "PPORT_ID\t: 0x%08x\n",
	82	readl(gdd + SSI_GDD_PPORT_ID_REG));
	83	seq_printf(m, "MPORT_ID\t: 0x%08x\n",
	84	readl(gdd + SSI_GDD_MPORT_ID_REG));
	85	seq_printf(m, "TEST\t\t: 0x%08x\n",
	86	readl(gdd + SSI_GDD_TEST_REG));
	87	seq_printf(m, "GCR\t\t: 0x%08x\n",
	88	readl(gdd + SSI_GDD_GCR_REG));
	89
	90	for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) {
91	seq_printf(m, "\nGDD LCH %d\n=========\n", lch);
92	seq_printf(m, "CSDP\t\t: 0x%04x\n",
93	readw(gdd + SSI_GDD_CSDP_REG(lch)));
94	seq_printf(m, "CCR\t\t: 0x%04x\n",
95	readw(gdd + SSI_GDD_CCR_REG(lch)));
96	seq_printf(m, "CICR\t\t: 0x%04x\n",
97	readw(gdd + SSI_GDD_CICR_REG(lch)));
98	seq_printf(m, "CSR\t\t: 0x%04x\n",
99	readw(gdd + SSI_GDD_CSR_REG(lch)));
100	seq_printf(m, "CSSA\t\t: 0x%08x\n",
101	readl(gdd + SSI_GDD_CSSA_REG(lch)));
102	seq_printf(m, "CDSA\t\t: 0x%08x\n",
103	readl(gdd + SSI_GDD_CDSA_REG(lch)));
104	seq_printf(m, "CEN\t\t: 0x%04x\n",
105	readw(gdd + SSI_GDD_CEN_REG(lch)));
106	seq_printf(m, "CSAC\t\t: 0x%04x\n",
107	readw(gdd + SSI_GDD_CSAC_REG(lch)));
108	seq_printf(m, "CDAC\t\t: 0x%04x\n",
109	readw(gdd + SSI_GDD_CDAC_REG(lch)));
110	seq_printf(m, "CLNK_CTRL\t: 0x%04x\n",
111	readw(gdd + SSI_GDD_CLNK_CTRL_REG(lch)));
112	}
113
114	pm_runtime_put_sync(ssi->device.parent);
115
116	return 0;
117	}
118
119	static int ssi_regs_open(struct inode inode, struct file file)
120	{
121	return single_open(file, ssi_debug_show, inode->i_private);
122	}
123
124	static int ssi_gdd_regs_open(struct inode inode, struct file file)
125	{
126	return single_open(file, ssi_debug_gdd_show, inode->i_private);
127	}
128
129	static const struct file_operations ssi_regs_fops = {
130	.open = ssi_regs_open,
131	.read = seq_read,
132	.llseek = seq_lseek,
133	.release = single_release,
134	};
135
136	static const struct file_operations ssi_gdd_regs_fops = {
137	.open = ssi_gdd_regs_open,
138	.read = seq_read,
139	.llseek = seq_lseek,
140	.release = single_release,
141	};
142
0845e1f2	143	static int ssi_debug_add_ctrl(struct hsi_controller *ssi)
b209e047 SR	144	{
	145	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	146	struct dentry *dir;
	147
	148	/* SSI controller */
	149	omap_ssi->dir = debugfs_create_dir(dev_name(&ssi->device), NULL);
3fd276e9 WY	150	if (!omap_ssi->dir)
3fd276e9 WY	151	return -ENOMEM;
b209e047 SR	152
	153	debugfs_create_file("regs", S_IRUGO, omap_ssi->dir, ssi,
	154	&ssi_regs_fops);
	155	/* SSI GDD (DMA) */
	156	dir = debugfs_create_dir("gdd", omap_ssi->dir);
3fd276e9	157	if (!dir)
b209e047 SR	158	goto rback;
	159	debugfs_create_file("regs", S_IRUGO, dir, ssi, &ssi_gdd_regs_fops);
	160
	161	return 0;
	162	rback:
	163	debugfs_remove_recursive(omap_ssi->dir);
	164
3fd276e9	165	return -ENOMEM;
b209e047 SR	166	}
	167
	168	static void ssi_debug_remove_ctrl(struct hsi_controller *ssi)
	169	{
	170	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	171
	172	debugfs_remove_recursive(omap_ssi->dir);
	173	}
	174	#endif /* CONFIG_DEBUG_FS */
	175
	176	/*
	177	* FIXME: Horrible HACK needed until we remove the useless wakeline test
	178	* in the CMT. To be removed !!!!
	179	*/
	180	void ssi_waketest(struct hsi_client *cl, unsigned int enable)
	181	{
	182	struct hsi_port *port = hsi_get_port(cl);
	183	struct omap_ssi_port *omap_port = hsi_port_drvdata(port);
	184	struct hsi_controller *ssi = to_hsi_controller(port->device.parent);
	185	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	186
	187	omap_port->wktest = !!enable;
	188	if (omap_port->wktest) {
	189	pm_runtime_get_sync(ssi->device.parent);
	190	writel_relaxed(SSI_WAKE(0),
	191	omap_ssi->sys + SSI_SET_WAKE_REG(port->num));
	192	} else {
	193	writel_relaxed(SSI_WAKE(0),
	194	omap_ssi->sys + SSI_CLEAR_WAKE_REG(port->num));
	195	pm_runtime_put_sync(ssi->device.parent);
	196	}
	197	}
	198	EXPORT_SYMBOL_GPL(ssi_waketest);
	199
	200	static void ssi_gdd_complete(struct hsi_controller *ssi, unsigned int lch)
	201	{
	202	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	203	struct hsi_msg *msg = omap_ssi->gdd_trn[lch].msg;
	204	struct hsi_port *port = to_hsi_port(msg->cl->device.parent);
	205	struct omap_ssi_port *omap_port = hsi_port_drvdata(port);
	206	unsigned int dir;
	207	u32 csr;
	208	u32 val;
	209
	210	spin_lock(&omap_ssi->lock);
	211
	212	val = readl(omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
	213	val &= ~SSI_GDD_LCH(lch);
	214	writel_relaxed(val, omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
	215
	216	if (msg->ttype == HSI_MSG_READ) {
	217	dir = DMA_FROM_DEVICE;
	218	val = SSI_DATAAVAILABLE(msg->channel);
	219	pm_runtime_put_sync(ssi->device.parent);
	220	} else {
	221	dir = DMA_TO_DEVICE;
	222	val = SSI_DATAACCEPT(msg->channel);
	223	/* Keep clocks reference for write pio event */
	224	}
	225	dma_unmap_sg(&ssi->device, msg->sgt.sgl, msg->sgt.nents, dir);
	226	csr = readw(omap_ssi->gdd + SSI_GDD_CSR_REG(lch));
	227	omap_ssi->gdd_trn[lch].msg = NULL; /* release GDD lch */
	228	dev_dbg(&port->device, "DMA completed ch %d ttype %d\n",
	229	msg->channel, msg->ttype);
230	spin_unlock(&omap_ssi->lock);
231	if (csr & SSI_CSR_TOUR) { /* Timeout error */
232	msg->status = HSI_STATUS_ERROR;
233	msg->actual_len = 0;
234	spin_lock(&omap_port->lock);
235	list_del(&msg->link); /* Dequeue msg */
236	spin_unlock(&omap_port->lock);
237	msg->complete(msg);
238	return;
239	}
240	spin_lock(&omap_port->lock);
241	val \|= readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
242	writel_relaxed(val, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
243	spin_unlock(&omap_port->lock);
244
245	msg->status = HSI_STATUS_COMPLETED;
246	msg->actual_len = sg_dma_len(msg->sgt.sgl);
247	}
248
249	static void ssi_gdd_tasklet(unsigned long dev)
250	{
251	struct hsi_controller ssi = (struct hsi_controller )dev;
252	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
253	void __iomem *sys = omap_ssi->sys;
254	unsigned int lch;
255	u32 status_reg;
256
257	pm_runtime_get_sync(ssi->device.parent);
258
259	status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);
260	for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) {
261	if (status_reg & SSI_GDD_LCH(lch))
262	ssi_gdd_complete(ssi, lch);
263	}
264	writel_relaxed(status_reg, sys + SSI_GDD_MPU_IRQ_STATUS_REG);
265	status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);
266
267	pm_runtime_put_sync(ssi->device.parent);
268
269	if (status_reg)
270	tasklet_hi_schedule(&omap_ssi->gdd_tasklet);
271	else
272	enable_irq(omap_ssi->gdd_irq);
273
274	}
275
276	static irqreturn_t ssi_gdd_isr(int irq, void *ssi)
277	{
278	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
279
280	tasklet_hi_schedule(&omap_ssi->gdd_tasklet);
281	disable_irq_nosync(irq);
282
283	return IRQ_HANDLED;
284	}
285
286	static unsigned long ssi_get_clk_rate(struct hsi_controller *ssi)
287	{
288	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
289	unsigned long rate = clk_get_rate(omap_ssi->fck);
290	return rate;
291	}
292
0845e1f2	293	static int ssi_get_iomem(struct platform_device *pd,
b209e047 SR	294	const char name, void __iomem pbase, dma_addr_t phy)
	295	{
	296	struct resource *mem;
b209e047 SR	297	void __iomem *base;
	298	struct hsi_controller *ssi = platform_get_drvdata(pd);
	299
	300	mem = platform_get_resource_byname(pd, IORESOURCE_MEM, name);
16bd5865 SS	301	base = devm_ioremap_resource(&ssi->device, mem);
	302	if (IS_ERR(base))
	303	return PTR_ERR(base);
	304
b209e047 SR	305	*pbase = base;
	306
	307	if (phy)
	308	*phy = mem->start;
	309
	310	return 0;
	311	}
	312
0845e1f2	313	static int ssi_add_controller(struct hsi_controller *ssi,
b209e047 SR	314	struct platform_device *pd)
	315	{
	316	struct omap_ssi_controller *omap_ssi;
	317	int err;
	318
	319	omap_ssi = devm_kzalloc(&ssi->device, sizeof(*omap_ssi), GFP_KERNEL);
	320	if (!omap_ssi) {
	321	dev_err(&pd->dev, "not enough memory for omap ssi\n");
	322	return -ENOMEM;
	323	}
	324
6bf6ded3 AH	325	err = ida_simple_get(&platform_omap_ssi_ida, 0, 0, GFP_KERNEL);
6bf6ded3 AH	326	if (err < 0)
b209e047	327	goto out_err;
6bf6ded3	328	ssi->id = err;
b209e047 SR	329
	330	ssi->owner = THIS_MODULE;
	331	ssi->device.parent = &pd->dev;
	332	dev_set_name(&ssi->device, "ssi%d", ssi->id);
	333	hsi_controller_set_drvdata(ssi, omap_ssi);
	334	omap_ssi->dev = &ssi->device;
	335	err = ssi_get_iomem(pd, "sys", &omap_ssi->sys, NULL);
	336	if (err < 0)
	337	goto out_err;
	338	err = ssi_get_iomem(pd, "gdd", &omap_ssi->gdd, NULL);
	339	if (err < 0)
	340	goto out_err;
b74d4954 AU	341	err = platform_get_irq_byname(pd, "gdd_mpu");
b74d4954 AU	342	if (err < 0) {
b209e047	343	dev_err(&pd->dev, "GDD IRQ resource missing\n");
b209e047 SR	344	goto out_err;
b209e047 SR	345	}
b74d4954	346	omap_ssi->gdd_irq = err;
b209e047 SR	347	tasklet_init(&omap_ssi->gdd_tasklet, ssi_gdd_tasklet,
	348	(unsigned long)ssi);
	349	err = devm_request_irq(&ssi->device, omap_ssi->gdd_irq, ssi_gdd_isr,
	350	0, "gdd_mpu", ssi);
	351	if (err < 0) {
	352	dev_err(&ssi->device, "Request GDD IRQ %d failed (%d)",
	353	omap_ssi->gdd_irq, err);
	354	goto out_err;
	355	}
	356
	357	omap_ssi->port = devm_kzalloc(&ssi->device,
	358	sizeof(struct omap_ssi_port ) ssi->num_ports, GFP_KERNEL);
	359	if (!omap_ssi->port) {
	360	err = -ENOMEM;
	361	goto out_err;
	362	}
	363
	364	omap_ssi->fck = devm_clk_get(&ssi->device, "ssi_ssr_fck");
	365	if (IS_ERR(omap_ssi->fck)) {
	366	dev_err(&pd->dev, "Could not acquire clock \"ssi_ssr_fck\": %li\n",
	367	PTR_ERR(omap_ssi->fck));
	368	err = -ENODEV;
	369	goto out_err;
	370	}
	371
	372	/* TODO: find register, which can be used to detect context loss */
	373	omap_ssi->get_loss = NULL;
	374
	375	omap_ssi->max_speed = UINT_MAX;
	376	spin_lock_init(&omap_ssi->lock);
	377	err = hsi_register_controller(ssi);
	378
	379	if (err < 0)
	380	goto out_err;
	381
	382	return 0;
	383
	384	out_err:
	385	ida_simple_remove(&platform_omap_ssi_ida, ssi->id);
	386	return err;
	387	}
	388
0845e1f2	389	static int ssi_hw_init(struct hsi_controller *ssi)
b209e047 SR	390	{
	391	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	392	unsigned int i;
	393	u32 val;
	394	int err;
	395
	396	err = pm_runtime_get_sync(ssi->device.parent);
	397	if (err < 0) {
	398	dev_err(&ssi->device, "runtime PM failed %d\n", err);
	399	return err;
	400	}
	401	/* Reseting SSI controller */
	402	writel_relaxed(SSI_SOFTRESET, omap_ssi->sys + SSI_SYSCONFIG_REG);
	403	val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG);
	404	for (i = 0; ((i < 20) && !(val & SSI_RESETDONE)); i++) {
	405	msleep(20);
	406	val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG);
	407	}
	408	if (!(val & SSI_RESETDONE)) {
	409	dev_err(&ssi->device, "SSI HW reset failed\n");
	410	pm_runtime_put_sync(ssi->device.parent);
	411	return -EIO;
	412	}
	413	/* Reseting GDD */
	414	writel_relaxed(SSI_SWRESET, omap_ssi->gdd + SSI_GDD_GRST_REG);
	415	/* Get FCK rate in KHz */
	416	omap_ssi->fck_rate = DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi), 1000);
	417	dev_dbg(&ssi->device, "SSI fck rate %lu KHz\n", omap_ssi->fck_rate);
	418	/* Set default PM settings */
	419	val = SSI_AUTOIDLE \| SSI_SIDLEMODE_SMART \| SSI_MIDLEMODE_SMART;
	420	writel_relaxed(val, omap_ssi->sys + SSI_SYSCONFIG_REG);
	421	omap_ssi->sysconfig = val;
	422	writel_relaxed(SSI_CLK_AUTOGATING_ON, omap_ssi->sys + SSI_GDD_GCR_REG);
	423	omap_ssi->gdd_gcr = SSI_CLK_AUTOGATING_ON;
	424	pm_runtime_put_sync(ssi->device.parent);
	425
	426	return 0;
	427	}
	428
	429	static void ssi_remove_controller(struct hsi_controller *ssi)
	430	{
	431	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	432	int id = ssi->id;
	433	tasklet_kill(&omap_ssi->gdd_tasklet);
	434	hsi_unregister_controller(ssi);
	435	ida_simple_remove(&platform_omap_ssi_ida, id);
	436	}
	437
	438	static inline int ssi_of_get_available_ports_count(const struct device_node *np)
	439	{
	440	struct device_node *child;
	441	int num = 0;
	442
	443	for_each_available_child_of_node(np, child)
	444	if (of_device_is_compatible(child, "ti,omap3-ssi-port"))
	445	num++;
	446
	447	return num;
	448	}
	449
	450	static int ssi_remove_ports(struct device dev, void c)
	451	{
	452	struct platform_device *pdev = to_platform_device(dev);
	453
2a57aba8 SR	454	if (!dev->of_node)
	455	return 0;
	456
	457	of_node_clear_flag(dev->of_node, OF_POPULATED);
b209e047 SR	458	of_device_unregister(pdev);
	459
	460	return 0;
	461	}
	462
0845e1f2	463	static int ssi_probe(struct platform_device *pd)
b209e047 SR	464	{
	465	struct platform_device *childpdev;
	466	struct device_node *np = pd->dev.of_node;
	467	struct device_node *child;
	468	struct hsi_controller *ssi;
	469	int err;
	470	int num_ports;
	471
	472	if (!np) {
	473	dev_err(&pd->dev, "missing device tree data\n");
	474	return -EINVAL;
	475	}
	476
	477	num_ports = ssi_of_get_available_ports_count(np);
	478
	479	ssi = hsi_alloc_controller(num_ports, GFP_KERNEL);
	480	if (!ssi) {
	481	dev_err(&pd->dev, "No memory for controller\n");
	482	return -ENOMEM;
	483	}
	484
	485	platform_set_drvdata(pd, ssi);
	486
	487	err = ssi_add_controller(ssi, pd);
	488	if (err < 0)
	489	goto out1;
	490
	491	pm_runtime_irq_safe(&pd->dev);
	492	pm_runtime_enable(&pd->dev);
	493
	494	err = ssi_hw_init(ssi);
	495	if (err < 0)
	496	goto out2;
	497	#ifdef CONFIG_DEBUG_FS
	498	err = ssi_debug_add_ctrl(ssi);
	499	if (err < 0)
	500	goto out2;
	501	#endif
	502
	503	for_each_available_child_of_node(np, child) {
	504	if (!of_device_is_compatible(child, "ti,omap3-ssi-port"))
	505	continue;
	506
	507	childpdev = of_platform_device_create(child, NULL, &pd->dev);
	508	if (!childpdev) {
	509	err = -ENODEV;
	510	dev_err(&pd->dev, "failed to create ssi controller port\n");
	511	goto out3;
	512	}
	513	}
	514
	515	dev_info(&pd->dev, "ssi controller %d initialized (%d ports)!\n",
	516	ssi->id, num_ports);
	517	return err;
	518	out3:
	519	device_for_each_child(&pd->dev, NULL, ssi_remove_ports);
	520	out2:
	521	ssi_remove_controller(ssi);
	522	out1:
	523	platform_set_drvdata(pd, NULL);
	524	pm_runtime_disable(&pd->dev);
	525
	526	return err;
	527	}
528
0845e1f2	529	static int ssi_remove(struct platform_device *pd)
b209e047 SR	530	{
	531	struct hsi_controller *ssi = platform_get_drvdata(pd);
	532
f704e110 SR	533	/* cleanup of of_platform_populate() call */
	534	device_for_each_child(&pd->dev, NULL, ssi_remove_ports);
	535
b209e047 SR	536	#ifdef CONFIG_DEBUG_FS
	537	ssi_debug_remove_ctrl(ssi);
	538	#endif
	539	ssi_remove_controller(ssi);
	540	platform_set_drvdata(pd, NULL);
	541
	542	pm_runtime_disable(&pd->dev);
	543
b209e047 SR	544	return 0;
	545	}
	546
96a1c18a	547	#ifdef CONFIG_PM
b209e047 SR	548	static int omap_ssi_runtime_suspend(struct device *dev)
	549	{
	550	struct hsi_controller *ssi = dev_get_drvdata(dev);
	551	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	552
	553	dev_dbg(dev, "runtime suspend!\n");
	554
	555	if (omap_ssi->get_loss)
	556	omap_ssi->loss_count =
	557	omap_ssi->get_loss(ssi->device.parent);
	558
	559	return 0;
	560	}
	561
	562	static int omap_ssi_runtime_resume(struct device *dev)
	563	{
	564	struct hsi_controller *ssi = dev_get_drvdata(dev);
	565	struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
	566
	567	dev_dbg(dev, "runtime resume!\n");
	568
	569	if ((omap_ssi->get_loss) && (omap_ssi->loss_count ==
	570	omap_ssi->get_loss(ssi->device.parent)))
	571	return 0;
	572
	573	writel_relaxed(omap_ssi->gdd_gcr, omap_ssi->gdd + SSI_GDD_GCR_REG);
	574
	575	return 0;
	576	}
	577
	578	static const struct dev_pm_ops omap_ssi_pm_ops = {
	579	SET_RUNTIME_PM_OPS(omap_ssi_runtime_suspend, omap_ssi_runtime_resume,
	580	NULL)
	581	};
	582
	583	#define DEV_PM_OPS (&omap_ssi_pm_ops)
	584	#else
	585	#define DEV_PM_OPS NULL
	586	#endif
	587
	588	#ifdef CONFIG_OF
	589	static const struct of_device_id omap_ssi_of_match[] = {
	590	{ .compatible = "ti,omap3-ssi", },
	591	{},
	592	};
	593	MODULE_DEVICE_TABLE(of, omap_ssi_of_match);
	594	#else
	595	#define omap_ssi_of_match NULL
	596	#endif
	597
	598	static struct platform_driver ssi_pdriver = {
0845e1f2 SR	599	.probe = ssi_probe,
0845e1f2 SR	600	.remove = ssi_remove,
b209e047 SR	601	.driver = {
b209e047 SR	602	.name = "omap_ssi",
b209e047 SR	603	.pm = DEV_PM_OPS,
	604	.of_match_table = omap_ssi_of_match,
	605	},
	606	};
	607
0845e1f2	608	module_platform_driver(ssi_pdriver);
b209e047 SR	609
	610	MODULE_ALIAS("platform:omap_ssi");
	611	MODULE_AUTHOR("Carlos Chinea <carlos.chinea@nokia.com>");
	612	MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>");
	613	MODULE_DESCRIPTION("Synchronous Serial Interface Driver");
	614	MODULE_LICENSE("GPL v2");