Commit | Line | Data |
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b209e047 SR |
1 | /* OMAP SSI driver. |
2 | * | |
3 | * Copyright (C) 2010 Nokia Corporation. All rights reserved. | |
4 | * Copyright (C) 2014 Sebastian Reichel <sre@kernel.org> | |
5 | * | |
6 | * Contact: Carlos Chinea <carlos.chinea@nokia.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * version 2 as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but | |
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA | |
21 | */ | |
22 | ||
23 | #include <linux/compiler.h> | |
24 | #include <linux/err.h> | |
25 | #include <linux/ioport.h> | |
26 | #include <linux/io.h> | |
b209e047 SR |
27 | #include <linux/clk.h> |
28 | #include <linux/device.h> | |
29 | #include <linux/platform_device.h> | |
30 | #include <linux/dma-mapping.h> | |
31 | #include <linux/dmaengine.h> | |
32 | #include <linux/delay.h> | |
33 | #include <linux/seq_file.h> | |
34 | #include <linux/scatterlist.h> | |
35 | #include <linux/interrupt.h> | |
36 | #include <linux/spinlock.h> | |
37 | #include <linux/debugfs.h> | |
ac8e3ff3 | 38 | #include <linux/pinctrl/consumer.h> |
b209e047 SR |
39 | #include <linux/pm_runtime.h> |
40 | #include <linux/of_platform.h> | |
41 | #include <linux/hsi/hsi.h> | |
42 | #include <linux/idr.h> | |
43 | ||
44 | #include "omap_ssi_regs.h" | |
45 | #include "omap_ssi.h" | |
46 | ||
47 | /* For automatically allocated device IDs */ | |
48 | static DEFINE_IDA(platform_omap_ssi_ida); | |
49 | ||
50 | #ifdef CONFIG_DEBUG_FS | |
51 | static int ssi_debug_show(struct seq_file *m, void *p __maybe_unused) | |
52 | { | |
53 | struct hsi_controller *ssi = m->private; | |
54 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
55 | void __iomem *sys = omap_ssi->sys; | |
56 | ||
57 | pm_runtime_get_sync(ssi->device.parent); | |
58 | seq_printf(m, "REVISION\t: 0x%08x\n", readl(sys + SSI_REVISION_REG)); | |
59 | seq_printf(m, "SYSCONFIG\t: 0x%08x\n", readl(sys + SSI_SYSCONFIG_REG)); | |
60 | seq_printf(m, "SYSSTATUS\t: 0x%08x\n", readl(sys + SSI_SYSSTATUS_REG)); | |
ea88f717 | 61 | pm_runtime_put(ssi->device.parent); |
b209e047 SR |
62 | |
63 | return 0; | |
64 | } | |
65 | ||
66 | static int ssi_debug_gdd_show(struct seq_file *m, void *p __maybe_unused) | |
67 | { | |
68 | struct hsi_controller *ssi = m->private; | |
69 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
70 | void __iomem *gdd = omap_ssi->gdd; | |
71 | void __iomem *sys = omap_ssi->sys; | |
72 | int lch; | |
73 | ||
74 | pm_runtime_get_sync(ssi->device.parent); | |
75 | ||
76 | seq_printf(m, "GDD_MPU_STATUS\t: 0x%08x\n", | |
77 | readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG)); | |
78 | seq_printf(m, "GDD_MPU_ENABLE\t: 0x%08x\n\n", | |
79 | readl(sys + SSI_GDD_MPU_IRQ_ENABLE_REG)); | |
80 | seq_printf(m, "HW_ID\t\t: 0x%08x\n", | |
81 | readl(gdd + SSI_GDD_HW_ID_REG)); | |
82 | seq_printf(m, "PPORT_ID\t: 0x%08x\n", | |
83 | readl(gdd + SSI_GDD_PPORT_ID_REG)); | |
84 | seq_printf(m, "MPORT_ID\t: 0x%08x\n", | |
85 | readl(gdd + SSI_GDD_MPORT_ID_REG)); | |
86 | seq_printf(m, "TEST\t\t: 0x%08x\n", | |
87 | readl(gdd + SSI_GDD_TEST_REG)); | |
88 | seq_printf(m, "GCR\t\t: 0x%08x\n", | |
89 | readl(gdd + SSI_GDD_GCR_REG)); | |
90 | ||
91 | for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) { | |
92 | seq_printf(m, "\nGDD LCH %d\n=========\n", lch); | |
93 | seq_printf(m, "CSDP\t\t: 0x%04x\n", | |
94 | readw(gdd + SSI_GDD_CSDP_REG(lch))); | |
95 | seq_printf(m, "CCR\t\t: 0x%04x\n", | |
96 | readw(gdd + SSI_GDD_CCR_REG(lch))); | |
97 | seq_printf(m, "CICR\t\t: 0x%04x\n", | |
98 | readw(gdd + SSI_GDD_CICR_REG(lch))); | |
99 | seq_printf(m, "CSR\t\t: 0x%04x\n", | |
100 | readw(gdd + SSI_GDD_CSR_REG(lch))); | |
101 | seq_printf(m, "CSSA\t\t: 0x%08x\n", | |
102 | readl(gdd + SSI_GDD_CSSA_REG(lch))); | |
103 | seq_printf(m, "CDSA\t\t: 0x%08x\n", | |
104 | readl(gdd + SSI_GDD_CDSA_REG(lch))); | |
105 | seq_printf(m, "CEN\t\t: 0x%04x\n", | |
106 | readw(gdd + SSI_GDD_CEN_REG(lch))); | |
107 | seq_printf(m, "CSAC\t\t: 0x%04x\n", | |
108 | readw(gdd + SSI_GDD_CSAC_REG(lch))); | |
109 | seq_printf(m, "CDAC\t\t: 0x%04x\n", | |
110 | readw(gdd + SSI_GDD_CDAC_REG(lch))); | |
111 | seq_printf(m, "CLNK_CTRL\t: 0x%04x\n", | |
112 | readw(gdd + SSI_GDD_CLNK_CTRL_REG(lch))); | |
113 | } | |
114 | ||
ea88f717 | 115 | pm_runtime_put(ssi->device.parent); |
b209e047 SR |
116 | |
117 | return 0; | |
118 | } | |
119 | ||
120 | static int ssi_regs_open(struct inode *inode, struct file *file) | |
121 | { | |
122 | return single_open(file, ssi_debug_show, inode->i_private); | |
123 | } | |
124 | ||
125 | static int ssi_gdd_regs_open(struct inode *inode, struct file *file) | |
126 | { | |
127 | return single_open(file, ssi_debug_gdd_show, inode->i_private); | |
128 | } | |
129 | ||
130 | static const struct file_operations ssi_regs_fops = { | |
131 | .open = ssi_regs_open, | |
132 | .read = seq_read, | |
133 | .llseek = seq_lseek, | |
134 | .release = single_release, | |
135 | }; | |
136 | ||
137 | static const struct file_operations ssi_gdd_regs_fops = { | |
138 | .open = ssi_gdd_regs_open, | |
139 | .read = seq_read, | |
140 | .llseek = seq_lseek, | |
141 | .release = single_release, | |
142 | }; | |
143 | ||
0845e1f2 | 144 | static int ssi_debug_add_ctrl(struct hsi_controller *ssi) |
b209e047 SR |
145 | { |
146 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
147 | struct dentry *dir; | |
148 | ||
149 | /* SSI controller */ | |
150 | omap_ssi->dir = debugfs_create_dir(dev_name(&ssi->device), NULL); | |
3fd276e9 WY |
151 | if (!omap_ssi->dir) |
152 | return -ENOMEM; | |
b209e047 SR |
153 | |
154 | debugfs_create_file("regs", S_IRUGO, omap_ssi->dir, ssi, | |
155 | &ssi_regs_fops); | |
156 | /* SSI GDD (DMA) */ | |
157 | dir = debugfs_create_dir("gdd", omap_ssi->dir); | |
3fd276e9 | 158 | if (!dir) |
b209e047 SR |
159 | goto rback; |
160 | debugfs_create_file("regs", S_IRUGO, dir, ssi, &ssi_gdd_regs_fops); | |
161 | ||
162 | return 0; | |
163 | rback: | |
164 | debugfs_remove_recursive(omap_ssi->dir); | |
165 | ||
3fd276e9 | 166 | return -ENOMEM; |
b209e047 SR |
167 | } |
168 | ||
169 | static void ssi_debug_remove_ctrl(struct hsi_controller *ssi) | |
170 | { | |
171 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
172 | ||
173 | debugfs_remove_recursive(omap_ssi->dir); | |
174 | } | |
175 | #endif /* CONFIG_DEBUG_FS */ | |
176 | ||
177 | /* | |
178 | * FIXME: Horrible HACK needed until we remove the useless wakeline test | |
179 | * in the CMT. To be removed !!!! | |
180 | */ | |
181 | void ssi_waketest(struct hsi_client *cl, unsigned int enable) | |
182 | { | |
183 | struct hsi_port *port = hsi_get_port(cl); | |
184 | struct omap_ssi_port *omap_port = hsi_port_drvdata(port); | |
185 | struct hsi_controller *ssi = to_hsi_controller(port->device.parent); | |
186 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
187 | ||
188 | omap_port->wktest = !!enable; | |
189 | if (omap_port->wktest) { | |
190 | pm_runtime_get_sync(ssi->device.parent); | |
191 | writel_relaxed(SSI_WAKE(0), | |
192 | omap_ssi->sys + SSI_SET_WAKE_REG(port->num)); | |
193 | } else { | |
194 | writel_relaxed(SSI_WAKE(0), | |
195 | omap_ssi->sys + SSI_CLEAR_WAKE_REG(port->num)); | |
ea88f717 | 196 | pm_runtime_put(ssi->device.parent); |
b209e047 SR |
197 | } |
198 | } | |
199 | EXPORT_SYMBOL_GPL(ssi_waketest); | |
200 | ||
201 | static void ssi_gdd_complete(struct hsi_controller *ssi, unsigned int lch) | |
202 | { | |
203 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
204 | struct hsi_msg *msg = omap_ssi->gdd_trn[lch].msg; | |
205 | struct hsi_port *port = to_hsi_port(msg->cl->device.parent); | |
206 | struct omap_ssi_port *omap_port = hsi_port_drvdata(port); | |
207 | unsigned int dir; | |
208 | u32 csr; | |
209 | u32 val; | |
210 | ||
211 | spin_lock(&omap_ssi->lock); | |
212 | ||
213 | val = readl(omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG); | |
214 | val &= ~SSI_GDD_LCH(lch); | |
215 | writel_relaxed(val, omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG); | |
216 | ||
217 | if (msg->ttype == HSI_MSG_READ) { | |
218 | dir = DMA_FROM_DEVICE; | |
219 | val = SSI_DATAAVAILABLE(msg->channel); | |
ea88f717 | 220 | pm_runtime_put(omap_port->pdev); |
b209e047 SR |
221 | } else { |
222 | dir = DMA_TO_DEVICE; | |
223 | val = SSI_DATAACCEPT(msg->channel); | |
224 | /* Keep clocks reference for write pio event */ | |
225 | } | |
226 | dma_unmap_sg(&ssi->device, msg->sgt.sgl, msg->sgt.nents, dir); | |
227 | csr = readw(omap_ssi->gdd + SSI_GDD_CSR_REG(lch)); | |
228 | omap_ssi->gdd_trn[lch].msg = NULL; /* release GDD lch */ | |
229 | dev_dbg(&port->device, "DMA completed ch %d ttype %d\n", | |
230 | msg->channel, msg->ttype); | |
231 | spin_unlock(&omap_ssi->lock); | |
232 | if (csr & SSI_CSR_TOUR) { /* Timeout error */ | |
233 | msg->status = HSI_STATUS_ERROR; | |
234 | msg->actual_len = 0; | |
235 | spin_lock(&omap_port->lock); | |
236 | list_del(&msg->link); /* Dequeue msg */ | |
237 | spin_unlock(&omap_port->lock); | |
238 | msg->complete(msg); | |
239 | return; | |
240 | } | |
241 | spin_lock(&omap_port->lock); | |
242 | val |= readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0)); | |
243 | writel_relaxed(val, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0)); | |
244 | spin_unlock(&omap_port->lock); | |
245 | ||
246 | msg->status = HSI_STATUS_COMPLETED; | |
247 | msg->actual_len = sg_dma_len(msg->sgt.sgl); | |
248 | } | |
249 | ||
250 | static void ssi_gdd_tasklet(unsigned long dev) | |
251 | { | |
252 | struct hsi_controller *ssi = (struct hsi_controller *)dev; | |
253 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
254 | void __iomem *sys = omap_ssi->sys; | |
255 | unsigned int lch; | |
256 | u32 status_reg; | |
257 | ||
927d3f8f SR |
258 | pm_runtime_get(ssi->device.parent); |
259 | ||
260 | if (!pm_runtime_active(ssi->device.parent)) { | |
261 | dev_warn(ssi->device.parent, "ssi_gdd_tasklet called without runtime PM!\n"); | |
262 | pm_runtime_put(ssi->device.parent); | |
263 | return; | |
264 | } | |
b209e047 SR |
265 | |
266 | status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG); | |
267 | for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) { | |
268 | if (status_reg & SSI_GDD_LCH(lch)) | |
269 | ssi_gdd_complete(ssi, lch); | |
270 | } | |
271 | writel_relaxed(status_reg, sys + SSI_GDD_MPU_IRQ_STATUS_REG); | |
272 | status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG); | |
273 | ||
ea88f717 | 274 | pm_runtime_put(ssi->device.parent); |
b209e047 SR |
275 | |
276 | if (status_reg) | |
277 | tasklet_hi_schedule(&omap_ssi->gdd_tasklet); | |
278 | else | |
279 | enable_irq(omap_ssi->gdd_irq); | |
280 | ||
281 | } | |
282 | ||
283 | static irqreturn_t ssi_gdd_isr(int irq, void *ssi) | |
284 | { | |
285 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
286 | ||
287 | tasklet_hi_schedule(&omap_ssi->gdd_tasklet); | |
288 | disable_irq_nosync(irq); | |
289 | ||
290 | return IRQ_HANDLED; | |
291 | } | |
292 | ||
293 | static unsigned long ssi_get_clk_rate(struct hsi_controller *ssi) | |
294 | { | |
295 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
296 | unsigned long rate = clk_get_rate(omap_ssi->fck); | |
297 | return rate; | |
298 | } | |
299 | ||
4bcf7414 SR |
300 | static int ssi_clk_event(struct notifier_block *nb, unsigned long event, |
301 | void *data) | |
302 | { | |
303 | struct omap_ssi_controller *omap_ssi = container_of(nb, | |
304 | struct omap_ssi_controller, fck_nb); | |
305 | struct hsi_controller *ssi = to_hsi_controller(omap_ssi->dev); | |
306 | struct clk_notifier_data *clk_data = data; | |
307 | struct omap_ssi_port *omap_port; | |
308 | int i; | |
309 | ||
310 | switch (event) { | |
311 | case PRE_RATE_CHANGE: | |
312 | dev_dbg(&ssi->device, "pre rate change\n"); | |
313 | ||
314 | for (i = 0; i < ssi->num_ports; i++) { | |
315 | omap_port = omap_ssi->port[i]; | |
316 | ||
317 | if (!omap_port) | |
318 | continue; | |
319 | ||
320 | /* Workaround for SWBREAK + CAwake down race in CMT */ | |
cb70e4c1 | 321 | disable_irq(omap_port->wake_irq); |
4bcf7414 SR |
322 | |
323 | /* stop all ssi communication */ | |
324 | pinctrl_pm_select_idle_state(omap_port->pdev); | |
325 | udelay(1); /* wait for racing frames */ | |
326 | } | |
327 | ||
328 | break; | |
329 | case ABORT_RATE_CHANGE: | |
330 | dev_dbg(&ssi->device, "abort rate change\n"); | |
331 | /* Fall through */ | |
332 | case POST_RATE_CHANGE: | |
333 | dev_dbg(&ssi->device, "post rate change (%lu -> %lu)\n", | |
334 | clk_data->old_rate, clk_data->new_rate); | |
335 | omap_ssi->fck_rate = DIV_ROUND_CLOSEST(clk_data->new_rate, 1000); /* KHz */ | |
336 | ||
337 | for (i = 0; i < ssi->num_ports; i++) { | |
338 | omap_port = omap_ssi->port[i]; | |
339 | ||
340 | if (!omap_port) | |
341 | continue; | |
342 | ||
343 | omap_ssi_port_update_fclk(ssi, omap_port); | |
344 | ||
345 | /* resume ssi communication */ | |
346 | pinctrl_pm_select_default_state(omap_port->pdev); | |
cb70e4c1 | 347 | enable_irq(omap_port->wake_irq); |
4bcf7414 SR |
348 | } |
349 | ||
350 | break; | |
351 | default: | |
352 | break; | |
353 | } | |
354 | ||
355 | return NOTIFY_DONE; | |
356 | } | |
357 | ||
0845e1f2 | 358 | static int ssi_get_iomem(struct platform_device *pd, |
b209e047 SR |
359 | const char *name, void __iomem **pbase, dma_addr_t *phy) |
360 | { | |
361 | struct resource *mem; | |
b209e047 SR |
362 | void __iomem *base; |
363 | struct hsi_controller *ssi = platform_get_drvdata(pd); | |
364 | ||
365 | mem = platform_get_resource_byname(pd, IORESOURCE_MEM, name); | |
16bd5865 SS |
366 | base = devm_ioremap_resource(&ssi->device, mem); |
367 | if (IS_ERR(base)) | |
368 | return PTR_ERR(base); | |
369 | ||
b209e047 SR |
370 | *pbase = base; |
371 | ||
372 | if (phy) | |
373 | *phy = mem->start; | |
374 | ||
375 | return 0; | |
376 | } | |
377 | ||
0845e1f2 | 378 | static int ssi_add_controller(struct hsi_controller *ssi, |
b209e047 SR |
379 | struct platform_device *pd) |
380 | { | |
381 | struct omap_ssi_controller *omap_ssi; | |
382 | int err; | |
383 | ||
384 | omap_ssi = devm_kzalloc(&ssi->device, sizeof(*omap_ssi), GFP_KERNEL); | |
385 | if (!omap_ssi) { | |
386 | dev_err(&pd->dev, "not enough memory for omap ssi\n"); | |
387 | return -ENOMEM; | |
388 | } | |
389 | ||
6bf6ded3 AH |
390 | err = ida_simple_get(&platform_omap_ssi_ida, 0, 0, GFP_KERNEL); |
391 | if (err < 0) | |
b209e047 | 392 | goto out_err; |
6bf6ded3 | 393 | ssi->id = err; |
b209e047 SR |
394 | |
395 | ssi->owner = THIS_MODULE; | |
396 | ssi->device.parent = &pd->dev; | |
397 | dev_set_name(&ssi->device, "ssi%d", ssi->id); | |
398 | hsi_controller_set_drvdata(ssi, omap_ssi); | |
399 | omap_ssi->dev = &ssi->device; | |
400 | err = ssi_get_iomem(pd, "sys", &omap_ssi->sys, NULL); | |
401 | if (err < 0) | |
402 | goto out_err; | |
403 | err = ssi_get_iomem(pd, "gdd", &omap_ssi->gdd, NULL); | |
404 | if (err < 0) | |
405 | goto out_err; | |
b74d4954 AU |
406 | err = platform_get_irq_byname(pd, "gdd_mpu"); |
407 | if (err < 0) { | |
b209e047 | 408 | dev_err(&pd->dev, "GDD IRQ resource missing\n"); |
b209e047 SR |
409 | goto out_err; |
410 | } | |
b74d4954 | 411 | omap_ssi->gdd_irq = err; |
b209e047 SR |
412 | tasklet_init(&omap_ssi->gdd_tasklet, ssi_gdd_tasklet, |
413 | (unsigned long)ssi); | |
414 | err = devm_request_irq(&ssi->device, omap_ssi->gdd_irq, ssi_gdd_isr, | |
415 | 0, "gdd_mpu", ssi); | |
416 | if (err < 0) { | |
417 | dev_err(&ssi->device, "Request GDD IRQ %d failed (%d)", | |
418 | omap_ssi->gdd_irq, err); | |
419 | goto out_err; | |
420 | } | |
421 | ||
422 | omap_ssi->port = devm_kzalloc(&ssi->device, | |
423 | sizeof(struct omap_ssi_port *) * ssi->num_ports, GFP_KERNEL); | |
424 | if (!omap_ssi->port) { | |
425 | err = -ENOMEM; | |
426 | goto out_err; | |
427 | } | |
428 | ||
429 | omap_ssi->fck = devm_clk_get(&ssi->device, "ssi_ssr_fck"); | |
430 | if (IS_ERR(omap_ssi->fck)) { | |
431 | dev_err(&pd->dev, "Could not acquire clock \"ssi_ssr_fck\": %li\n", | |
432 | PTR_ERR(omap_ssi->fck)); | |
433 | err = -ENODEV; | |
434 | goto out_err; | |
435 | } | |
436 | ||
4bcf7414 SR |
437 | omap_ssi->fck_nb.notifier_call = ssi_clk_event; |
438 | omap_ssi->fck_nb.priority = INT_MAX; | |
439 | clk_notifier_register(omap_ssi->fck, &omap_ssi->fck_nb); | |
440 | ||
b209e047 SR |
441 | /* TODO: find register, which can be used to detect context loss */ |
442 | omap_ssi->get_loss = NULL; | |
443 | ||
444 | omap_ssi->max_speed = UINT_MAX; | |
445 | spin_lock_init(&omap_ssi->lock); | |
446 | err = hsi_register_controller(ssi); | |
447 | ||
448 | if (err < 0) | |
449 | goto out_err; | |
450 | ||
451 | return 0; | |
452 | ||
453 | out_err: | |
454 | ida_simple_remove(&platform_omap_ssi_ida, ssi->id); | |
455 | return err; | |
456 | } | |
457 | ||
0845e1f2 | 458 | static int ssi_hw_init(struct hsi_controller *ssi) |
b209e047 SR |
459 | { |
460 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
b209e047 SR |
461 | int err; |
462 | ||
463 | err = pm_runtime_get_sync(ssi->device.parent); | |
464 | if (err < 0) { | |
465 | dev_err(&ssi->device, "runtime PM failed %d\n", err); | |
466 | return err; | |
467 | } | |
b209e047 SR |
468 | /* Reseting GDD */ |
469 | writel_relaxed(SSI_SWRESET, omap_ssi->gdd + SSI_GDD_GRST_REG); | |
470 | /* Get FCK rate in KHz */ | |
471 | omap_ssi->fck_rate = DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi), 1000); | |
472 | dev_dbg(&ssi->device, "SSI fck rate %lu KHz\n", omap_ssi->fck_rate); | |
b6616be3 | 473 | |
b209e047 SR |
474 | writel_relaxed(SSI_CLK_AUTOGATING_ON, omap_ssi->sys + SSI_GDD_GCR_REG); |
475 | omap_ssi->gdd_gcr = SSI_CLK_AUTOGATING_ON; | |
476 | pm_runtime_put_sync(ssi->device.parent); | |
477 | ||
478 | return 0; | |
479 | } | |
480 | ||
481 | static void ssi_remove_controller(struct hsi_controller *ssi) | |
482 | { | |
483 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
484 | int id = ssi->id; | |
485 | tasklet_kill(&omap_ssi->gdd_tasklet); | |
486 | hsi_unregister_controller(ssi); | |
4bcf7414 | 487 | clk_notifier_unregister(omap_ssi->fck, &omap_ssi->fck_nb); |
b209e047 SR |
488 | ida_simple_remove(&platform_omap_ssi_ida, id); |
489 | } | |
490 | ||
491 | static inline int ssi_of_get_available_ports_count(const struct device_node *np) | |
492 | { | |
493 | struct device_node *child; | |
494 | int num = 0; | |
495 | ||
496 | for_each_available_child_of_node(np, child) | |
497 | if (of_device_is_compatible(child, "ti,omap3-ssi-port")) | |
498 | num++; | |
499 | ||
500 | return num; | |
501 | } | |
502 | ||
503 | static int ssi_remove_ports(struct device *dev, void *c) | |
504 | { | |
505 | struct platform_device *pdev = to_platform_device(dev); | |
506 | ||
2a57aba8 SR |
507 | if (!dev->of_node) |
508 | return 0; | |
509 | ||
510 | of_node_clear_flag(dev->of_node, OF_POPULATED); | |
b209e047 SR |
511 | of_device_unregister(pdev); |
512 | ||
513 | return 0; | |
514 | } | |
515 | ||
0845e1f2 | 516 | static int ssi_probe(struct platform_device *pd) |
b209e047 SR |
517 | { |
518 | struct platform_device *childpdev; | |
519 | struct device_node *np = pd->dev.of_node; | |
520 | struct device_node *child; | |
521 | struct hsi_controller *ssi; | |
522 | int err; | |
523 | int num_ports; | |
524 | ||
525 | if (!np) { | |
526 | dev_err(&pd->dev, "missing device tree data\n"); | |
527 | return -EINVAL; | |
528 | } | |
529 | ||
530 | num_ports = ssi_of_get_available_ports_count(np); | |
531 | ||
532 | ssi = hsi_alloc_controller(num_ports, GFP_KERNEL); | |
533 | if (!ssi) { | |
534 | dev_err(&pd->dev, "No memory for controller\n"); | |
535 | return -ENOMEM; | |
536 | } | |
537 | ||
538 | platform_set_drvdata(pd, ssi); | |
539 | ||
540 | err = ssi_add_controller(ssi, pd); | |
541 | if (err < 0) | |
542 | goto out1; | |
543 | ||
544 | pm_runtime_irq_safe(&pd->dev); | |
545 | pm_runtime_enable(&pd->dev); | |
546 | ||
547 | err = ssi_hw_init(ssi); | |
548 | if (err < 0) | |
549 | goto out2; | |
550 | #ifdef CONFIG_DEBUG_FS | |
551 | err = ssi_debug_add_ctrl(ssi); | |
552 | if (err < 0) | |
553 | goto out2; | |
554 | #endif | |
555 | ||
556 | for_each_available_child_of_node(np, child) { | |
557 | if (!of_device_is_compatible(child, "ti,omap3-ssi-port")) | |
558 | continue; | |
559 | ||
560 | childpdev = of_platform_device_create(child, NULL, &pd->dev); | |
561 | if (!childpdev) { | |
562 | err = -ENODEV; | |
563 | dev_err(&pd->dev, "failed to create ssi controller port\n"); | |
564 | goto out3; | |
565 | } | |
566 | } | |
567 | ||
568 | dev_info(&pd->dev, "ssi controller %d initialized (%d ports)!\n", | |
569 | ssi->id, num_ports); | |
570 | return err; | |
571 | out3: | |
572 | device_for_each_child(&pd->dev, NULL, ssi_remove_ports); | |
573 | out2: | |
574 | ssi_remove_controller(ssi); | |
575 | out1: | |
576 | platform_set_drvdata(pd, NULL); | |
577 | pm_runtime_disable(&pd->dev); | |
578 | ||
579 | return err; | |
580 | } | |
581 | ||
0845e1f2 | 582 | static int ssi_remove(struct platform_device *pd) |
b209e047 SR |
583 | { |
584 | struct hsi_controller *ssi = platform_get_drvdata(pd); | |
585 | ||
f704e110 SR |
586 | /* cleanup of of_platform_populate() call */ |
587 | device_for_each_child(&pd->dev, NULL, ssi_remove_ports); | |
588 | ||
b209e047 SR |
589 | #ifdef CONFIG_DEBUG_FS |
590 | ssi_debug_remove_ctrl(ssi); | |
591 | #endif | |
592 | ssi_remove_controller(ssi); | |
593 | platform_set_drvdata(pd, NULL); | |
594 | ||
595 | pm_runtime_disable(&pd->dev); | |
596 | ||
b209e047 SR |
597 | return 0; |
598 | } | |
599 | ||
96a1c18a | 600 | #ifdef CONFIG_PM |
b209e047 SR |
601 | static int omap_ssi_runtime_suspend(struct device *dev) |
602 | { | |
603 | struct hsi_controller *ssi = dev_get_drvdata(dev); | |
604 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
605 | ||
606 | dev_dbg(dev, "runtime suspend!\n"); | |
607 | ||
608 | if (omap_ssi->get_loss) | |
609 | omap_ssi->loss_count = | |
610 | omap_ssi->get_loss(ssi->device.parent); | |
611 | ||
612 | return 0; | |
613 | } | |
614 | ||
615 | static int omap_ssi_runtime_resume(struct device *dev) | |
616 | { | |
617 | struct hsi_controller *ssi = dev_get_drvdata(dev); | |
618 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
619 | ||
620 | dev_dbg(dev, "runtime resume!\n"); | |
621 | ||
622 | if ((omap_ssi->get_loss) && (omap_ssi->loss_count == | |
623 | omap_ssi->get_loss(ssi->device.parent))) | |
624 | return 0; | |
625 | ||
626 | writel_relaxed(omap_ssi->gdd_gcr, omap_ssi->gdd + SSI_GDD_GCR_REG); | |
627 | ||
628 | return 0; | |
629 | } | |
630 | ||
631 | static const struct dev_pm_ops omap_ssi_pm_ops = { | |
632 | SET_RUNTIME_PM_OPS(omap_ssi_runtime_suspend, omap_ssi_runtime_resume, | |
633 | NULL) | |
634 | }; | |
635 | ||
636 | #define DEV_PM_OPS (&omap_ssi_pm_ops) | |
637 | #else | |
638 | #define DEV_PM_OPS NULL | |
639 | #endif | |
640 | ||
641 | #ifdef CONFIG_OF | |
642 | static const struct of_device_id omap_ssi_of_match[] = { | |
643 | { .compatible = "ti,omap3-ssi", }, | |
644 | {}, | |
645 | }; | |
646 | MODULE_DEVICE_TABLE(of, omap_ssi_of_match); | |
647 | #else | |
648 | #define omap_ssi_of_match NULL | |
649 | #endif | |
650 | ||
651 | static struct platform_driver ssi_pdriver = { | |
0845e1f2 SR |
652 | .probe = ssi_probe, |
653 | .remove = ssi_remove, | |
b209e047 SR |
654 | .driver = { |
655 | .name = "omap_ssi", | |
b209e047 SR |
656 | .pm = DEV_PM_OPS, |
657 | .of_match_table = omap_ssi_of_match, | |
658 | }, | |
659 | }; | |
660 | ||
0fae1989 SR |
661 | static int __init ssi_init(void) { |
662 | int ret; | |
663 | ||
664 | ret = platform_driver_register(&ssi_pdriver); | |
665 | if (ret) | |
666 | return ret; | |
667 | ||
668 | return platform_driver_register(&ssi_port_pdriver); | |
669 | } | |
670 | module_init(ssi_init); | |
671 | ||
672 | static void __exit ssi_exit(void) { | |
673 | platform_driver_unregister(&ssi_port_pdriver); | |
674 | platform_driver_unregister(&ssi_pdriver); | |
675 | } | |
676 | module_exit(ssi_exit); | |
b209e047 SR |
677 | |
678 | MODULE_ALIAS("platform:omap_ssi"); | |
679 | MODULE_AUTHOR("Carlos Chinea <carlos.chinea@nokia.com>"); | |
680 | MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>"); | |
681 | MODULE_DESCRIPTION("Synchronous Serial Interface Driver"); | |
682 | MODULE_LICENSE("GPL v2"); |