Merge tag 'sunxi-drm-fixes-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / drivers / hv / hv.c
CommitLineData
3e7ee490 1/*
3e7ee490
HJ
2 * Copyright (c) 2009, Microsoft Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Authors:
18 * Haiyang Zhang <haiyangz@microsoft.com>
19 * Hank Janssen <hjanssen@microsoft.com>
20 *
21 */
0a46618d
HJ
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
a0086dc5
GKH
24#include <linux/kernel.h>
25#include <linux/mm.h>
5a0e3ad6 26#include <linux/slab.h>
b7c947f0 27#include <linux/vmalloc.h>
46a97191 28#include <linux/hyperv.h>
83ba0c4f 29#include <linux/version.h>
db11f12a 30#include <linux/interrupt.h>
4061ed9e 31#include <linux/clockchips.h>
407dd164 32#include <asm/hyperv.h>
4061ed9e 33#include <asm/mshyperv.h>
0f2a6619 34#include "hyperv_vmbus.h"
3e7ee490 35
454f18a9 36/* The one and only */
6a0aaa18
HZ
37struct hv_context hv_context = {
38 .synic_initialized = false,
39 .hypercall_page = NULL,
3e7ee490
HJ
40};
41
4061ed9e
S
42#define HV_TIMER_FREQUENCY (10 * 1000 * 1000) /* 100ns period */
43#define HV_MAX_MAX_DELTA_TICKS 0xffffffff
44#define HV_MIN_DELTA_TICKS 1
45
3e189519 46/*
d44890c8 47 * query_hypervisor_info - Get version info of the windows hypervisor
0831ad04 48 */
5fbebb2d
S
49unsigned int host_info_eax;
50unsigned int host_info_ebx;
51unsigned int host_info_ecx;
52unsigned int host_info_edx;
53
d44890c8 54static int query_hypervisor_info(void)
0831ad04
GKH
55{
56 unsigned int eax;
57 unsigned int ebx;
58 unsigned int ecx;
59 unsigned int edx;
b8dfb264 60 unsigned int max_leaf;
0831ad04 61 unsigned int op;
3e7ee490 62
0831ad04
GKH
63 /*
64 * Its assumed that this is called after confirming that Viridian
65 * is present. Query id and revision.
66 */
67 eax = 0;
68 ebx = 0;
69 ecx = 0;
70 edx = 0;
f6feebe0 71 op = HVCPUID_VENDOR_MAXFUNCTION;
0831ad04 72 cpuid(op, &eax, &ebx, &ecx, &edx);
3e7ee490 73
b8dfb264 74 max_leaf = eax;
0831ad04 75
b8dfb264 76 if (max_leaf >= HVCPUID_VERSION) {
0831ad04
GKH
77 eax = 0;
78 ebx = 0;
79 ecx = 0;
80 edx = 0;
f6feebe0 81 op = HVCPUID_VERSION;
0831ad04 82 cpuid(op, &eax, &ebx, &ecx, &edx);
5fbebb2d
S
83 host_info_eax = eax;
84 host_info_ebx = ebx;
85 host_info_ecx = ecx;
86 host_info_edx = edx;
0831ad04 87 }
b8dfb264 88 return max_leaf;
0831ad04 89}
3e7ee490 90
3e189519 91/*
a108393d 92 * hv_do_hypercall- Invoke the specified hypercall
0831ad04 93 */
a108393d 94u64 hv_do_hypercall(u64 control, void *input, void *output)
3e7ee490 95{
b8dfb264
HZ
96 u64 input_address = (input) ? virt_to_phys(input) : 0;
97 u64 output_address = (output) ? virt_to_phys(output) : 0;
dec317fd 98 void *hypercall_page = hv_context.hypercall_page;
d7646eaa
VK
99#ifdef CONFIG_X86_64
100 u64 hv_status = 0;
101
102 if (!hypercall_page)
103 return (u64)ULLONG_MAX;
3e7ee490 104
b8dfb264
HZ
105 __asm__ __volatile__("mov %0, %%r8" : : "r" (output_address) : "r8");
106 __asm__ __volatile__("call *%3" : "=a" (hv_status) :
107 "c" (control), "d" (input_address),
108 "m" (hypercall_page));
3e7ee490 109
b8dfb264 110 return hv_status;
3e7ee490
HJ
111
112#else
113
b8dfb264
HZ
114 u32 control_hi = control >> 32;
115 u32 control_lo = control & 0xFFFFFFFF;
116 u32 hv_status_hi = 1;
117 u32 hv_status_lo = 1;
b8dfb264
HZ
118 u32 input_address_hi = input_address >> 32;
119 u32 input_address_lo = input_address & 0xFFFFFFFF;
b8dfb264
HZ
120 u32 output_address_hi = output_address >> 32;
121 u32 output_address_lo = output_address & 0xFFFFFFFF;
d7646eaa
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122
123 if (!hypercall_page)
124 return (u64)ULLONG_MAX;
3e7ee490 125
b8dfb264
HZ
126 __asm__ __volatile__ ("call *%8" : "=d"(hv_status_hi),
127 "=a"(hv_status_lo) : "d" (control_hi),
128 "a" (control_lo), "b" (input_address_hi),
129 "c" (input_address_lo), "D"(output_address_hi),
130 "S"(output_address_lo), "m" (hypercall_page));
3e7ee490 131
b8dfb264 132 return hv_status_lo | ((u64)hv_status_hi << 32);
0831ad04 133#endif /* !x86_64 */
3e7ee490 134}
a108393d 135EXPORT_SYMBOL_GPL(hv_do_hypercall);
3e7ee490 136
ca9357bd
S
137#ifdef CONFIG_X86_64
138static cycle_t read_hv_clock_tsc(struct clocksource *arg)
139{
140 cycle_t current_tick;
141 struct ms_hyperv_tsc_page *tsc_pg = hv_context.tsc_page;
142
c35b82ef 143 if (tsc_pg->tsc_sequence != 0) {
ca9357bd
S
144 /*
145 * Use the tsc page to compute the value.
146 */
147
148 while (1) {
149 cycle_t tmp;
150 u32 sequence = tsc_pg->tsc_sequence;
151 u64 cur_tsc;
152 u64 scale = tsc_pg->tsc_scale;
153 s64 offset = tsc_pg->tsc_offset;
154
155 rdtscll(cur_tsc);
156 /* current_tick = ((cur_tsc *scale) >> 64) + offset */
157 asm("mulq %3"
158 : "=d" (current_tick), "=a" (tmp)
159 : "a" (cur_tsc), "r" (scale));
160
161 current_tick += offset;
162 if (tsc_pg->tsc_sequence == sequence)
163 return current_tick;
164
c35b82ef 165 if (tsc_pg->tsc_sequence != 0)
ca9357bd
S
166 continue;
167 /*
168 * Fallback using MSR method.
169 */
170 break;
171 }
172 }
173 rdmsrl(HV_X64_MSR_TIME_REF_COUNT, current_tick);
174 return current_tick;
175}
176
177static struct clocksource hyperv_cs_tsc = {
178 .name = "hyperv_clocksource_tsc_page",
179 .rating = 425,
180 .read = read_hv_clock_tsc,
181 .mask = CLOCKSOURCE_MASK(64),
182 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
183};
184#endif
185
186
3e189519 187/*
d44890c8 188 * hv_init - Main initialization routine.
0831ad04
GKH
189 *
190 * This routine must be called before any other routines in here are called
191 */
d44890c8 192int hv_init(void)
3e7ee490 193{
b8dfb264
HZ
194 int max_leaf;
195 union hv_x64_msr_hypercall_contents hypercall_msr;
196 void *virtaddr = NULL;
3e7ee490 197
14c1bf8a 198 memset(hv_context.synic_event_page, 0, sizeof(void *) * NR_CPUS);
6a0aaa18 199 memset(hv_context.synic_message_page, 0,
14c1bf8a 200 sizeof(void *) * NR_CPUS);
b29ef354
S
201 memset(hv_context.post_msg_page, 0,
202 sizeof(void *) * NR_CPUS);
917ea427
S
203 memset(hv_context.vp_index, 0,
204 sizeof(int) * NR_CPUS);
db11f12a
S
205 memset(hv_context.event_dpc, 0,
206 sizeof(void *) * NR_CPUS);
d81274aa
S
207 memset(hv_context.msg_dpc, 0,
208 sizeof(void *) * NR_CPUS);
4061ed9e
S
209 memset(hv_context.clk_evt, 0,
210 sizeof(void *) * NR_CPUS);
3e7ee490 211
d44890c8 212 max_leaf = query_hypervisor_info();
3e7ee490 213
83ba0c4f
S
214 /*
215 * Write our OS ID.
216 */
217 hv_context.guestid = generate_guest_id(0, LINUX_VERSION_CODE, 0);
218 wrmsrl(HV_X64_MSR_GUEST_OS_ID, hv_context.guestid);
a73e6b7c 219
454f18a9 220 /* See if the hypercall page is already set */
b8dfb264 221 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
3e7ee490 222
df3493e0 223 virtaddr = __vmalloc(PAGE_SIZE, GFP_KERNEL, PAGE_KERNEL_EXEC);
3e7ee490 224
98e08702 225 if (!virtaddr)
44939d37 226 goto cleanup;
3e7ee490 227
b8dfb264 228 hypercall_msr.enable = 1;
a73e6b7c 229
b8dfb264
HZ
230 hypercall_msr.guest_physical_address = vmalloc_to_pfn(virtaddr);
231 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
a73e6b7c
HJ
232
233 /* Confirm that hypercall page did get setup. */
b8dfb264
HZ
234 hypercall_msr.as_uint64 = 0;
235 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
a73e6b7c 236
98e08702 237 if (!hypercall_msr.enable)
44939d37 238 goto cleanup;
3e7ee490 239
b8dfb264 240 hv_context.hypercall_page = virtaddr;
a73e6b7c 241
ca9357bd
S
242#ifdef CONFIG_X86_64
243 if (ms_hyperv.features & HV_X64_MSR_REFERENCE_TSC_AVAILABLE) {
9220e39b
SM
244 union hv_x64_msr_hypercall_contents tsc_msr;
245 void *va_tsc;
246
ca9357bd
S
247 va_tsc = __vmalloc(PAGE_SIZE, GFP_KERNEL, PAGE_KERNEL);
248 if (!va_tsc)
249 goto cleanup;
250 hv_context.tsc_page = va_tsc;
251
252 rdmsrl(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64);
253
254 tsc_msr.enable = 1;
255 tsc_msr.guest_physical_address = vmalloc_to_pfn(va_tsc);
256
257 wrmsrl(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64);
258 clocksource_register_hz(&hyperv_cs_tsc, NSEC_PER_SEC/100);
259 }
260#endif
5433e003 261 return 0;
3e7ee490 262
44939d37 263cleanup:
b8dfb264
HZ
264 if (virtaddr) {
265 if (hypercall_msr.enable) {
266 hypercall_msr.as_uint64 = 0;
267 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
3e7ee490
HJ
268 }
269
b8dfb264 270 vfree(virtaddr);
3e7ee490 271 }
5433e003
S
272
273 return -ENOTSUPP;
3e7ee490
HJ
274}
275
3e189519 276/*
d44890c8 277 * hv_cleanup - Cleanup routine.
0831ad04
GKH
278 *
279 * This routine is called normally during driver unloading or exiting.
280 */
d44890c8 281void hv_cleanup(void)
3e7ee490 282{
b8dfb264 283 union hv_x64_msr_hypercall_contents hypercall_msr;
3e7ee490 284
93e5bd06
S
285 /* Reset our OS id */
286 wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0);
287
6a0aaa18 288 if (hv_context.hypercall_page) {
b8dfb264
HZ
289 hypercall_msr.as_uint64 = 0;
290 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
6a0aaa18
HZ
291 vfree(hv_context.hypercall_page);
292 hv_context.hypercall_page = NULL;
3e7ee490 293 }
ca9357bd
S
294
295#ifdef CONFIG_X86_64
296 /*
297 * Cleanup the TSC page based CS.
298 */
299 if (ms_hyperv.features & HV_X64_MSR_REFERENCE_TSC_AVAILABLE) {
3ccb4fd8
VK
300 /*
301 * Crash can happen in an interrupt context and unregistering
302 * a clocksource is impossible and redundant in this case.
303 */
304 if (!oops_in_progress) {
305 clocksource_change_rating(&hyperv_cs_tsc, 10);
306 clocksource_unregister(&hyperv_cs_tsc);
307 }
ca9357bd
S
308
309 hypercall_msr.as_uint64 = 0;
310 wrmsrl(HV_X64_MSR_REFERENCE_TSC, hypercall_msr.as_uint64);
311 vfree(hv_context.tsc_page);
312 hv_context.tsc_page = NULL;
313 }
314#endif
3e7ee490
HJ
315}
316
3e189519 317/*
d44890c8 318 * hv_post_message - Post a message using the hypervisor message IPC.
0831ad04
GKH
319 *
320 * This involves a hypercall.
321 */
415f0a02 322int hv_post_message(union hv_connection_id connection_id,
b8dfb264
HZ
323 enum hv_message_type message_type,
324 void *payload, size_t payload_size)
3e7ee490 325{
3e7ee490 326
b8dfb264 327 struct hv_input_post_message *aligned_msg;
a108393d 328 u64 status;
3e7ee490 329
b8dfb264 330 if (payload_size > HV_MESSAGE_PAYLOAD_BYTE_COUNT)
39594abc 331 return -EMSGSIZE;
3e7ee490 332
b8dfb264 333 aligned_msg = (struct hv_input_post_message *)
b29ef354 334 hv_context.post_msg_page[get_cpu()];
3e7ee490 335
b8dfb264 336 aligned_msg->connectionid = connection_id;
b29ef354 337 aligned_msg->reserved = 0;
b8dfb264
HZ
338 aligned_msg->message_type = message_type;
339 aligned_msg->payload_size = payload_size;
340 memcpy((void *)aligned_msg->payload, payload, payload_size);
3e7ee490 341
a108393d 342 status = hv_do_hypercall(HVCALL_POST_MESSAGE, aligned_msg, NULL);
3e7ee490 343
b29ef354 344 put_cpu();
a108393d 345 return status & 0xFFFF;
3e7ee490
HJ
346}
347
4061ed9e
S
348static int hv_ce_set_next_event(unsigned long delta,
349 struct clock_event_device *evt)
350{
351 cycle_t current_tick;
352
bc609cb4 353 WARN_ON(!clockevent_state_oneshot(evt));
4061ed9e
S
354
355 rdmsrl(HV_X64_MSR_TIME_REF_COUNT, current_tick);
356 current_tick += delta;
357 wrmsrl(HV_X64_MSR_STIMER0_COUNT, current_tick);
358 return 0;
359}
360
bc609cb4
VK
361static int hv_ce_shutdown(struct clock_event_device *evt)
362{
363 wrmsrl(HV_X64_MSR_STIMER0_COUNT, 0);
364 wrmsrl(HV_X64_MSR_STIMER0_CONFIG, 0);
365
366 return 0;
367}
368
369static int hv_ce_set_oneshot(struct clock_event_device *evt)
4061ed9e
S
370{
371 union hv_timer_config timer_cfg;
372
bc609cb4
VK
373 timer_cfg.enable = 1;
374 timer_cfg.auto_enable = 1;
375 timer_cfg.sintx = VMBUS_MESSAGE_SINT;
376 wrmsrl(HV_X64_MSR_STIMER0_CONFIG, timer_cfg.as_uint64);
377
378 return 0;
4061ed9e
S
379}
380
381static void hv_init_clockevent_device(struct clock_event_device *dev, int cpu)
382{
383 dev->name = "Hyper-V clockevent";
384 dev->features = CLOCK_EVT_FEAT_ONESHOT;
385 dev->cpumask = cpumask_of(cpu);
386 dev->rating = 1000;
e086748c
VK
387 /*
388 * Avoid settint dev->owner = THIS_MODULE deliberately as doing so will
389 * result in clockevents_config_and_register() taking additional
390 * references to the hv_vmbus module making it impossible to unload.
391 */
4061ed9e 392
bc609cb4
VK
393 dev->set_state_shutdown = hv_ce_shutdown;
394 dev->set_state_oneshot = hv_ce_set_oneshot;
4061ed9e
S
395 dev->set_next_event = hv_ce_set_next_event;
396}
397
2608fb65
JW
398
399int hv_synic_alloc(void)
400{
401 size_t size = sizeof(struct tasklet_struct);
4061ed9e 402 size_t ced_size = sizeof(struct clock_event_device);
2608fb65
JW
403 int cpu;
404
9f01ec53
S
405 hv_context.hv_numa_map = kzalloc(sizeof(struct cpumask) * nr_node_ids,
406 GFP_ATOMIC);
407 if (hv_context.hv_numa_map == NULL) {
408 pr_err("Unable to allocate NUMA map\n");
409 goto err;
410 }
411
2608fb65
JW
412 for_each_online_cpu(cpu) {
413 hv_context.event_dpc[cpu] = kmalloc(size, GFP_ATOMIC);
414 if (hv_context.event_dpc[cpu] == NULL) {
415 pr_err("Unable to allocate event dpc\n");
416 goto err;
417 }
418 tasklet_init(hv_context.event_dpc[cpu], vmbus_on_event, cpu);
419
d81274aa
S
420 hv_context.msg_dpc[cpu] = kmalloc(size, GFP_ATOMIC);
421 if (hv_context.msg_dpc[cpu] == NULL) {
422 pr_err("Unable to allocate event dpc\n");
423 goto err;
424 }
425 tasklet_init(hv_context.msg_dpc[cpu], vmbus_on_msg_dpc, cpu);
426
4061ed9e
S
427 hv_context.clk_evt[cpu] = kzalloc(ced_size, GFP_ATOMIC);
428 if (hv_context.clk_evt[cpu] == NULL) {
429 pr_err("Unable to allocate clock event device\n");
430 goto err;
431 }
9f01ec53 432
4061ed9e
S
433 hv_init_clockevent_device(hv_context.clk_evt[cpu], cpu);
434
2608fb65
JW
435 hv_context.synic_message_page[cpu] =
436 (void *)get_zeroed_page(GFP_ATOMIC);
437
438 if (hv_context.synic_message_page[cpu] == NULL) {
439 pr_err("Unable to allocate SYNIC message page\n");
440 goto err;
441 }
442
443 hv_context.synic_event_page[cpu] =
444 (void *)get_zeroed_page(GFP_ATOMIC);
445
446 if (hv_context.synic_event_page[cpu] == NULL) {
447 pr_err("Unable to allocate SYNIC event page\n");
448 goto err;
449 }
b29ef354
S
450
451 hv_context.post_msg_page[cpu] =
452 (void *)get_zeroed_page(GFP_ATOMIC);
453
454 if (hv_context.post_msg_page[cpu] == NULL) {
455 pr_err("Unable to allocate post msg page\n");
456 goto err;
457 }
2608fb65
JW
458 }
459
460 return 0;
461err:
462 return -ENOMEM;
463}
464
8712954d 465static void hv_synic_free_cpu(int cpu)
2608fb65
JW
466{
467 kfree(hv_context.event_dpc[cpu]);
d81274aa 468 kfree(hv_context.msg_dpc[cpu]);
4061ed9e 469 kfree(hv_context.clk_evt[cpu]);
fdf91dae 470 if (hv_context.synic_event_page[cpu])
2608fb65
JW
471 free_page((unsigned long)hv_context.synic_event_page[cpu]);
472 if (hv_context.synic_message_page[cpu])
473 free_page((unsigned long)hv_context.synic_message_page[cpu]);
b29ef354
S
474 if (hv_context.post_msg_page[cpu])
475 free_page((unsigned long)hv_context.post_msg_page[cpu]);
2608fb65
JW
476}
477
478void hv_synic_free(void)
479{
480 int cpu;
481
9f01ec53 482 kfree(hv_context.hv_numa_map);
2608fb65
JW
483 for_each_online_cpu(cpu)
484 hv_synic_free_cpu(cpu);
485}
486
3e189519 487/*
d44890c8 488 * hv_synic_init - Initialize the Synthethic Interrupt Controller.
0831ad04
GKH
489 *
490 * If it is already initialized by another entity (ie x2v shim), we need to
491 * retrieve the initialized message and event pages. Otherwise, we create and
492 * initialize the message and event pages.
493 */
302a3c0f 494void hv_synic_init(void *arg)
3e7ee490 495{
0831ad04 496 u64 version;
eacb1b4d
GKH
497 union hv_synic_simp simp;
498 union hv_synic_siefp siefp;
b8dfb264 499 union hv_synic_sint shared_sint;
eacb1b4d 500 union hv_synic_scontrol sctrl;
917ea427 501 u64 vp_index;
a73e6b7c 502
7692fd4d 503 int cpu = smp_processor_id();
3e7ee490 504
6a0aaa18 505 if (!hv_context.hypercall_page)
7692fd4d 506 return;
3e7ee490 507
454f18a9 508 /* Check the version */
a51ed7d6 509 rdmsrl(HV_X64_MSR_SVERSION, version);
3e7ee490 510
a73e6b7c 511 /* Setup the Synic's message page */
f6feebe0
HZ
512 rdmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
513 simp.simp_enabled = 1;
6a0aaa18 514 simp.base_simp_gpa = virt_to_phys(hv_context.synic_message_page[cpu])
a73e6b7c 515 >> PAGE_SHIFT;
3e7ee490 516
f6feebe0 517 wrmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
3e7ee490 518
a73e6b7c 519 /* Setup the Synic's event page */
f6feebe0
HZ
520 rdmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
521 siefp.siefp_enabled = 1;
6a0aaa18 522 siefp.base_siefp_gpa = virt_to_phys(hv_context.synic_event_page[cpu])
a73e6b7c
HJ
523 >> PAGE_SHIFT;
524
f6feebe0 525 wrmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
0831ad04 526
0831ad04 527 /* Setup the shared SINT. */
b8dfb264 528 rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 529
b8dfb264 530 shared_sint.as_uint64 = 0;
302a3c0f 531 shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR;
b8dfb264 532 shared_sint.masked = false;
b0209501 533 shared_sint.auto_eoi = true;
3e7ee490 534
b8dfb264 535 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 536
454f18a9 537 /* Enable the global synic bit */
f6feebe0
HZ
538 rdmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
539 sctrl.enable = 1;
3e7ee490 540
f6feebe0 541 wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
3e7ee490 542
6a0aaa18 543 hv_context.synic_initialized = true;
917ea427
S
544
545 /*
546 * Setup the mapping between Hyper-V's notion
547 * of cpuid and Linux' notion of cpuid.
548 * This array will be indexed using Linux cpuid.
549 */
550 rdmsrl(HV_X64_MSR_VP_INDEX, vp_index);
551 hv_context.vp_index[cpu] = (u32)vp_index;
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552
553 INIT_LIST_HEAD(&hv_context.percpu_list[cpu]);
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554
555 /*
556 * Register the per-cpu clockevent source.
557 */
558 if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE)
559 clockevents_config_and_register(hv_context.clk_evt[cpu],
560 HV_TIMER_FREQUENCY,
561 HV_MIN_DELTA_TICKS,
562 HV_MAX_MAX_DELTA_TICKS);
7692fd4d 563 return;
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564}
565
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566/*
567 * hv_synic_clockevents_cleanup - Cleanup clockevent devices
568 */
569void hv_synic_clockevents_cleanup(void)
570{
571 int cpu;
572
573 if (!(ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE))
574 return;
575
576 for_each_online_cpu(cpu)
577 clockevents_unbind_device(hv_context.clk_evt[cpu], cpu);
578}
579
3e189519 580/*
d44890c8 581 * hv_synic_cleanup - Cleanup routine for hv_synic_init().
0831ad04 582 */
d44890c8 583void hv_synic_cleanup(void *arg)
3e7ee490 584{
b8dfb264 585 union hv_synic_sint shared_sint;
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586 union hv_synic_simp simp;
587 union hv_synic_siefp siefp;
e72e7ac5 588 union hv_synic_scontrol sctrl;
7692fd4d 589 int cpu = smp_processor_id();
3e7ee490 590
6a0aaa18 591 if (!hv_context.synic_initialized)
3e7ee490 592 return;
3e7ee490 593
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594 /* Turn off clockevent device */
595 if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE)
bc609cb4 596 hv_ce_shutdown(hv_context.clk_evt[cpu]);
e086748c 597
b8dfb264 598 rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 599
b8dfb264 600 shared_sint.masked = 1;
3e7ee490 601
7692fd4d 602 /* Need to correctly cleanup in the case of SMP!!! */
454f18a9 603 /* Disable the interrupt */
b8dfb264 604 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 605
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606 rdmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
607 simp.simp_enabled = 0;
608 simp.base_simp_gpa = 0;
3e7ee490 609
f6feebe0 610 wrmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
3e7ee490 611
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612 rdmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
613 siefp.siefp_enabled = 0;
614 siefp.base_siefp_gpa = 0;
3e7ee490 615
f6feebe0 616 wrmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
3e7ee490 617
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618 /* Disable the global synic bit */
619 rdmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
620 sctrl.enable = 0;
621 wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
3e7ee490 622}
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