Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / drivers / hwmon / coretemp.c
CommitLineData
bebe4678
RM
1/*
2 * coretemp.c - Linux kernel module for hardware monitoring
3 *
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * Inspired from many hwmon drivers
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA.
21 */
22
f8bb8925
JP
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
bebe4678 25#include <linux/module.h>
bebe4678
RM
26#include <linux/init.h>
27#include <linux/slab.h>
28#include <linux/jiffies.h>
29#include <linux/hwmon.h>
30#include <linux/sysfs.h>
31#include <linux/hwmon-sysfs.h>
32#include <linux/err.h>
33#include <linux/mutex.h>
34#include <linux/list.h>
35#include <linux/platform_device.h>
36#include <linux/cpu.h>
4cc45275 37#include <linux/smp.h>
a45a8c85 38#include <linux/moduleparam.h>
bebe4678
RM
39#include <asm/msr.h>
40#include <asm/processor.h>
9b38096f 41#include <asm/cpu_device_id.h>
bebe4678
RM
42
43#define DRVNAME "coretemp"
44
a45a8c85
JD
45/*
46 * force_tjmax only matters when TjMax can't be read from the CPU itself.
47 * When set, it replaces the driver's suboptimal heuristic.
48 */
49static int force_tjmax;
50module_param_named(tjmax, force_tjmax, int, 0444);
51MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
52
199e0de7 53#define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
bdc71c9a 54#define NUM_REAL_CORES 32 /* Number of Real cores per cpu */
199e0de7 55#define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
c814a4c7 56#define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
f4af6fd6 57#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
199e0de7
D
58#define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
59
780affe0
GR
60#define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
61#define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
141168c3
KW
62#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
63
64#ifdef CONFIG_SMP
bb74e8ca 65#define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
199e0de7 66#else
bb74e8ca 67#define for_each_sibling(i, cpu) for (i = 0; false; )
199e0de7 68#endif
bebe4678
RM
69
70/*
199e0de7
D
71 * Per-Core Temperature Data
72 * @last_updated: The time when the current temperature value was updated
73 * earlier (in jiffies).
74 * @cpu_core_id: The CPU Core from which temperature values should be read
75 * This value is passed as "id" field to rdmsr/wrmsr functions.
76 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
77 * from where the temperature values should be read.
c814a4c7 78 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
199e0de7
D
79 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
80 * Otherwise, temp_data holds coretemp data.
81 * @valid: If this is 1, the current temperature is valid.
bebe4678 82 */
199e0de7 83struct temp_data {
bebe4678 84 int temp;
6369a288 85 int ttarget;
199e0de7
D
86 int tjmax;
87 unsigned long last_updated;
88 unsigned int cpu;
89 u32 cpu_core_id;
90 u32 status_reg;
c814a4c7 91 int attr_size;
199e0de7
D
92 bool is_pkg_data;
93 bool valid;
c814a4c7
D
94 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
95 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
199e0de7 96 struct mutex update_lock;
bebe4678
RM
97};
98
199e0de7
D
99/* Platform Data per Physical CPU */
100struct platform_data {
101 struct device *hwmon_dev;
102 u16 phys_proc_id;
103 struct temp_data *core_data[MAX_CORE_DATA];
104 struct device_attribute name_attr;
105};
bebe4678 106
199e0de7
D
107struct pdev_entry {
108 struct list_head list;
109 struct platform_device *pdev;
199e0de7 110 u16 phys_proc_id;
199e0de7
D
111};
112
113static LIST_HEAD(pdev_list);
114static DEFINE_MUTEX(pdev_list_mutex);
115
116static ssize_t show_name(struct device *dev,
117 struct device_attribute *devattr, char *buf)
118{
119 return sprintf(buf, "%s\n", DRVNAME);
120}
121
122static ssize_t show_label(struct device *dev,
123 struct device_attribute *devattr, char *buf)
bebe4678 124{
bebe4678 125 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
199e0de7
D
126 struct platform_data *pdata = dev_get_drvdata(dev);
127 struct temp_data *tdata = pdata->core_data[attr->index];
128
129 if (tdata->is_pkg_data)
130 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
bebe4678 131
199e0de7 132 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
bebe4678
RM
133}
134
199e0de7
D
135static ssize_t show_crit_alarm(struct device *dev,
136 struct device_attribute *devattr, char *buf)
bebe4678 137{
199e0de7
D
138 u32 eax, edx;
139 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
140 struct platform_data *pdata = dev_get_drvdata(dev);
141 struct temp_data *tdata = pdata->core_data[attr->index];
142
143 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
144
145 return sprintf(buf, "%d\n", (eax >> 5) & 1);
bebe4678
RM
146}
147
199e0de7
D
148static ssize_t show_tjmax(struct device *dev,
149 struct device_attribute *devattr, char *buf)
bebe4678
RM
150{
151 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
199e0de7 152 struct platform_data *pdata = dev_get_drvdata(dev);
bebe4678 153
199e0de7 154 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
bebe4678
RM
155}
156
199e0de7
D
157static ssize_t show_ttarget(struct device *dev,
158 struct device_attribute *devattr, char *buf)
159{
160 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
161 struct platform_data *pdata = dev_get_drvdata(dev);
bebe4678 162
199e0de7
D
163 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
164}
bebe4678 165
199e0de7
D
166static ssize_t show_temp(struct device *dev,
167 struct device_attribute *devattr, char *buf)
bebe4678 168{
199e0de7
D
169 u32 eax, edx;
170 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
171 struct platform_data *pdata = dev_get_drvdata(dev);
172 struct temp_data *tdata = pdata->core_data[attr->index];
bebe4678 173
199e0de7 174 mutex_lock(&tdata->update_lock);
bebe4678 175
199e0de7
D
176 /* Check whether the time interval has elapsed */
177 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
178 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
179 tdata->valid = 0;
180 /* Check whether the data is valid */
bebe4678 181 if (eax & 0x80000000) {
199e0de7 182 tdata->temp = tdata->tjmax -
4cc45275 183 ((eax >> 16) & 0x7f) * 1000;
199e0de7 184 tdata->valid = 1;
bebe4678 185 }
199e0de7 186 tdata->last_updated = jiffies;
bebe4678
RM
187 }
188
199e0de7
D
189 mutex_unlock(&tdata->update_lock);
190 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
bebe4678
RM
191}
192
41e58a1f
GR
193struct tjmax {
194 char const *id;
195 int tjmax;
196};
197
d23e2ae1 198static const struct tjmax tjmax_table[] = {
1102dcab
GR
199 { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
200 { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
9e3970fb 201 { "CPU CE4110", 110000 }, /* Model 0x1c, stepping 10 Sodaville */
1102dcab
GR
202 { "CPU CE4150", 110000 }, /* Model 0x1c, stepping 10 */
203 { "CPU CE4170", 110000 }, /* Model 0x1c, stepping 10 */
41e58a1f
GR
204};
205
2fa5222e
GR
206struct tjmax_model {
207 u8 model;
208 u8 mask;
209 int tjmax;
210};
211
212#define ANY 0xff
213
d23e2ae1 214static const struct tjmax_model tjmax_model_table[] = {
9e3970fb 215 { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
2fa5222e
GR
216 { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others
217 * Note: Also matches 230 and 330,
218 * which are covered by tjmax_table
219 */
220 { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
221 * Note: TjMax for E6xxT is 110C, but CPU type
222 * is undetectable by software
223 */
224 { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
9e3970fb 225 { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z2760) */
2fa5222e
GR
226 { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) */
227};
228
d23e2ae1 229static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
118a8871
RM
230{
231 /* The 100C is default for both mobile and non mobile CPUs */
232
233 int tjmax = 100000;
eccfed42 234 int tjmax_ee = 85000;
708a62bc 235 int usemsr_ee = 1;
118a8871
RM
236 int err;
237 u32 eax, edx;
41e58a1f
GR
238 int i;
239
240 /* explicit tjmax table entries override heuristics */
241 for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
242 if (strstr(c->x86_model_id, tjmax_table[i].id))
243 return tjmax_table[i].tjmax;
244 }
118a8871 245
2fa5222e
GR
246 for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
247 const struct tjmax_model *tm = &tjmax_model_table[i];
248 if (c->x86_model == tm->model &&
249 (tm->mask == ANY || c->x86_mask == tm->mask))
250 return tm->tjmax;
72cbdddc 251 }
1fe63ab4 252
72cbdddc 253 /* Early chips have no MSR for TjMax */
1fe63ab4 254
72cbdddc 255 if (c->x86_model == 0xf && c->x86_mask < 4)
5592906f 256 usemsr_ee = 0;
708a62bc 257
4cc45275 258 if (c->x86_model > 0xe && usemsr_ee) {
eccfed42 259 u8 platform_id;
118a8871 260
4cc45275
GR
261 /*
262 * Now we can detect the mobile CPU using Intel provided table
263 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
264 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
265 */
118a8871
RM
266 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
267 if (err) {
268 dev_warn(dev,
269 "Unable to access MSR 0x17, assuming desktop"
270 " CPU\n");
708a62bc 271 usemsr_ee = 0;
eccfed42 272 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
4cc45275
GR
273 /*
274 * Trust bit 28 up to Penryn, I could not find any
275 * documentation on that; if you happen to know
276 * someone at Intel please ask
277 */
708a62bc 278 usemsr_ee = 0;
eccfed42
RM
279 } else {
280 /* Platform ID bits 52:50 (EDX starts at bit 32) */
281 platform_id = (edx >> 18) & 0x7;
282
4cc45275
GR
283 /*
284 * Mobile Penryn CPU seems to be platform ID 7 or 5
285 * (guesswork)
286 */
287 if (c->x86_model == 0x17 &&
288 (platform_id == 5 || platform_id == 7)) {
289 /*
290 * If MSR EE bit is set, set it to 90 degrees C,
291 * otherwise 105 degrees C
292 */
eccfed42
RM
293 tjmax_ee = 90000;
294 tjmax = 105000;
295 }
118a8871
RM
296 }
297 }
298
708a62bc 299 if (usemsr_ee) {
118a8871
RM
300 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
301 if (err) {
302 dev_warn(dev,
303 "Unable to access MSR 0xEE, for Tjmax, left"
4d7a5644 304 " at default\n");
118a8871 305 } else if (eax & 0x40000000) {
eccfed42 306 tjmax = tjmax_ee;
118a8871 307 }
708a62bc 308 } else if (tjmax == 100000) {
4cc45275
GR
309 /*
310 * If we don't use msr EE it means we are desktop CPU
311 * (with exeception of Atom)
312 */
118a8871
RM
313 dev_warn(dev, "Using relative temperature scale!\n");
314 }
315
316 return tjmax;
317}
318
d23e2ae1 319static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
a321cedb 320{
a321cedb
CE
321 int err;
322 u32 eax, edx;
323 u32 val;
324
4cc45275
GR
325 /*
326 * A new feature of current Intel(R) processors, the
327 * IA32_TEMPERATURE_TARGET contains the TjMax value
328 */
a321cedb
CE
329 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
330 if (err) {
6bf9e9b0
JD
331 if (c->x86_model > 0xe && c->x86_model != 0x1c)
332 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
a321cedb
CE
333 } else {
334 val = (eax >> 16) & 0xff;
335 /*
336 * If the TjMax is not plausible, an assumption
337 * will be used
338 */
bb9973e4 339 if (val) {
6bf9e9b0 340 dev_dbg(dev, "TjMax is %d degrees C\n", val);
a321cedb
CE
341 return val * 1000;
342 }
343 }
344
a45a8c85
JD
345 if (force_tjmax) {
346 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
347 force_tjmax);
348 return force_tjmax * 1000;
349 }
350
a321cedb
CE
351 /*
352 * An assumption is made for early CPUs and unreadable MSR.
4f5f71a7 353 * NOTE: the calculated value may not be correct.
a321cedb 354 */
4f5f71a7 355 return adjust_tjmax(c, id, dev);
a321cedb
CE
356}
357
6c931ae1 358static int create_name_attr(struct platform_data *pdata,
d6db23c7 359 struct device *dev)
199e0de7 360{
4258781a 361 sysfs_attr_init(&pdata->name_attr.attr);
199e0de7
D
362 pdata->name_attr.attr.name = "name";
363 pdata->name_attr.attr.mode = S_IRUGO;
364 pdata->name_attr.show = show_name;
365 return device_create_file(dev, &pdata->name_attr);
366}
bebe4678 367
d23e2ae1
PG
368static int create_core_attrs(struct temp_data *tdata, struct device *dev,
369 int attr_no)
199e0de7
D
370{
371 int err, i;
e3204ed3 372 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
199e0de7 373 struct device_attribute *devattr, char *buf) = {
c814a4c7 374 show_label, show_crit_alarm, show_temp, show_tjmax,
f4af6fd6 375 show_ttarget };
e3204ed3 376 static const char *const names[TOTAL_ATTRS] = {
199e0de7 377 "temp%d_label", "temp%d_crit_alarm",
c814a4c7 378 "temp%d_input", "temp%d_crit",
f4af6fd6 379 "temp%d_max" };
199e0de7 380
c814a4c7 381 for (i = 0; i < tdata->attr_size; i++) {
199e0de7
D
382 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
383 attr_no);
4258781a 384 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
199e0de7
D
385 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
386 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
387 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
199e0de7
D
388 tdata->sd_attrs[i].index = attr_no;
389 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
390 if (err)
391 goto exit_free;
bebe4678 392 }
199e0de7
D
393 return 0;
394
395exit_free:
396 while (--i >= 0)
397 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
398 return err;
399}
400
199e0de7 401
d23e2ae1 402static int chk_ucode_version(unsigned int cpu)
199e0de7 403{
0eb9782a 404 struct cpuinfo_x86 *c = &cpu_data(cpu);
67f363b1 405
199e0de7
D
406 /*
407 * Check if we have problem with errata AE18 of Core processors:
408 * Readings might stop update when processor visited too deep sleep,
409 * fixed for stepping D0 (6EC).
410 */
ca8bc8dc 411 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
b55f3757 412 pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
ca8bc8dc 413 return -ENODEV;
67f363b1 414 }
199e0de7
D
415 return 0;
416}
417
d23e2ae1 418static struct platform_device *coretemp_get_pdev(unsigned int cpu)
199e0de7
D
419{
420 u16 phys_proc_id = TO_PHYS_ID(cpu);
421 struct pdev_entry *p;
422
423 mutex_lock(&pdev_list_mutex);
424
425 list_for_each_entry(p, &pdev_list, list)
426 if (p->phys_proc_id == phys_proc_id) {
427 mutex_unlock(&pdev_list_mutex);
428 return p->pdev;
429 }
430
431 mutex_unlock(&pdev_list_mutex);
432 return NULL;
433}
434
d23e2ae1 435static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
199e0de7
D
436{
437 struct temp_data *tdata;
438
439 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
440 if (!tdata)
441 return NULL;
442
443 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
444 MSR_IA32_THERM_STATUS;
445 tdata->is_pkg_data = pkg_flag;
446 tdata->cpu = cpu;
447 tdata->cpu_core_id = TO_CORE_ID(cpu);
c814a4c7 448 tdata->attr_size = MAX_CORE_ATTRS;
199e0de7
D
449 mutex_init(&tdata->update_lock);
450 return tdata;
451}
67f363b1 452
d23e2ae1
PG
453static int create_core_data(struct platform_device *pdev, unsigned int cpu,
454 int pkg_flag)
199e0de7
D
455{
456 struct temp_data *tdata;
2f1c3db0 457 struct platform_data *pdata = platform_get_drvdata(pdev);
199e0de7
D
458 struct cpuinfo_x86 *c = &cpu_data(cpu);
459 u32 eax, edx;
460 int err, attr_no;
bebe4678 461
a321cedb 462 /*
199e0de7
D
463 * Find attr number for sysfs:
464 * We map the attr number to core id of the CPU
465 * The attr number is always core id + 2
466 * The Pkgtemp will always show up as temp1_*, if available
a321cedb 467 */
199e0de7 468 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
6369a288 469
199e0de7
D
470 if (attr_no > MAX_CORE_DATA - 1)
471 return -ERANGE;
472
f4e0bcf0
GR
473 /*
474 * Provide a single set of attributes for all HT siblings of a core
475 * to avoid duplicate sensors (the processor ID and core ID of all
6777b9e4
GR
476 * HT siblings of a core are the same).
477 * Skip if a HT sibling of this core is already registered.
f4e0bcf0
GR
478 * This is not an error.
479 */
199e0de7
D
480 if (pdata->core_data[attr_no] != NULL)
481 return 0;
6369a288 482
199e0de7
D
483 tdata = init_temp_data(cpu, pkg_flag);
484 if (!tdata)
485 return -ENOMEM;
bebe4678 486
199e0de7
D
487 /* Test if we can access the status register */
488 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
489 if (err)
490 goto exit_free;
491
492 /* We can access status register. Get Critical Temperature */
6bf9e9b0 493 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
199e0de7 494
c814a4c7 495 /*
f4af6fd6
GR
496 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
497 * The target temperature is available on older CPUs but not in this
498 * register. Atoms don't have the register at all.
c814a4c7 499 */
f4af6fd6
GR
500 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
501 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
502 &eax, &edx);
503 if (!err) {
504 tdata->ttarget
505 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
506 tdata->attr_size++;
507 }
c814a4c7
D
508 }
509
199e0de7
D
510 pdata->core_data[attr_no] = tdata;
511
512 /* Create sysfs interfaces */
513 err = create_core_attrs(tdata, &pdev->dev, attr_no);
514 if (err)
515 goto exit_free;
bebe4678
RM
516
517 return 0;
199e0de7 518exit_free:
20ecb499 519 pdata->core_data[attr_no] = NULL;
199e0de7
D
520 kfree(tdata);
521 return err;
522}
523
d23e2ae1 524static void coretemp_add_core(unsigned int cpu, int pkg_flag)
199e0de7 525{
199e0de7
D
526 struct platform_device *pdev = coretemp_get_pdev(cpu);
527 int err;
528
529 if (!pdev)
530 return;
531
2f1c3db0 532 err = create_core_data(pdev, cpu, pkg_flag);
199e0de7
D
533 if (err)
534 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
535}
536
537static void coretemp_remove_core(struct platform_data *pdata,
538 struct device *dev, int indx)
539{
540 int i;
541 struct temp_data *tdata = pdata->core_data[indx];
542
543 /* Remove the sysfs attributes */
c814a4c7 544 for (i = 0; i < tdata->attr_size; i++)
199e0de7
D
545 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
546
547 kfree(pdata->core_data[indx]);
548 pdata->core_data[indx] = NULL;
549}
550
6c931ae1 551static int coretemp_probe(struct platform_device *pdev)
199e0de7
D
552{
553 struct platform_data *pdata;
554 int err;
bebe4678 555
199e0de7
D
556 /* Initialize the per-package data structures */
557 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
558 if (!pdata)
559 return -ENOMEM;
560
561 err = create_name_attr(pdata, &pdev->dev);
562 if (err)
563 goto exit_free;
564
b3a242a6 565 pdata->phys_proc_id = pdev->id;
199e0de7
D
566 platform_set_drvdata(pdev, pdata);
567
568 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
569 if (IS_ERR(pdata->hwmon_dev)) {
570 err = PTR_ERR(pdata->hwmon_dev);
571 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
572 goto exit_name;
573 }
574 return 0;
575
576exit_name:
577 device_remove_file(&pdev->dev, &pdata->name_attr);
bebe4678 578exit_free:
199e0de7 579 kfree(pdata);
bebe4678
RM
580 return err;
581}
582
281dfd0b 583static int coretemp_remove(struct platform_device *pdev)
bebe4678 584{
199e0de7
D
585 struct platform_data *pdata = platform_get_drvdata(pdev);
586 int i;
bebe4678 587
199e0de7
D
588 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
589 if (pdata->core_data[i])
590 coretemp_remove_core(pdata, &pdev->dev, i);
591
592 device_remove_file(&pdev->dev, &pdata->name_attr);
593 hwmon_device_unregister(pdata->hwmon_dev);
199e0de7 594 kfree(pdata);
bebe4678
RM
595 return 0;
596}
597
598static struct platform_driver coretemp_driver = {
599 .driver = {
600 .owner = THIS_MODULE,
601 .name = DRVNAME,
602 },
603 .probe = coretemp_probe,
9e5e9b7a 604 .remove = coretemp_remove,
bebe4678
RM
605};
606
d23e2ae1 607static int coretemp_device_add(unsigned int cpu)
bebe4678
RM
608{
609 int err;
610 struct platform_device *pdev;
611 struct pdev_entry *pdev_entry;
d883b9f0
JD
612
613 mutex_lock(&pdev_list_mutex);
614
b3a242a6 615 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
bebe4678
RM
616 if (!pdev) {
617 err = -ENOMEM;
f8bb8925 618 pr_err("Device allocation failed\n");
bebe4678
RM
619 goto exit;
620 }
621
622 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
623 if (!pdev_entry) {
624 err = -ENOMEM;
625 goto exit_device_put;
626 }
627
628 err = platform_device_add(pdev);
629 if (err) {
f8bb8925 630 pr_err("Device addition failed (%d)\n", err);
bebe4678
RM
631 goto exit_device_free;
632 }
633
634 pdev_entry->pdev = pdev;
0eb9782a 635 pdev_entry->phys_proc_id = pdev->id;
199e0de7 636
bebe4678
RM
637 list_add_tail(&pdev_entry->list, &pdev_list);
638 mutex_unlock(&pdev_list_mutex);
639
640 return 0;
641
642exit_device_free:
643 kfree(pdev_entry);
644exit_device_put:
645 platform_device_put(pdev);
646exit:
d883b9f0 647 mutex_unlock(&pdev_list_mutex);
bebe4678
RM
648 return err;
649}
650
d23e2ae1 651static void coretemp_device_remove(unsigned int cpu)
bebe4678 652{
199e0de7
D
653 struct pdev_entry *p, *n;
654 u16 phys_proc_id = TO_PHYS_ID(cpu);
e40cc4bd 655
bebe4678 656 mutex_lock(&pdev_list_mutex);
199e0de7
D
657 list_for_each_entry_safe(p, n, &pdev_list, list) {
658 if (p->phys_proc_id != phys_proc_id)
e40cc4bd 659 continue;
e40cc4bd
JB
660 platform_device_unregister(p->pdev);
661 list_del(&p->list);
e40cc4bd 662 kfree(p);
bebe4678
RM
663 }
664 mutex_unlock(&pdev_list_mutex);
665}
666
d23e2ae1 667static bool is_any_core_online(struct platform_data *pdata)
199e0de7
D
668{
669 int i;
670
671 /* Find online cores, except pkgtemp data */
672 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
673 if (pdata->core_data[i] &&
674 !pdata->core_data[i]->is_pkg_data) {
675 return true;
676 }
677 }
678 return false;
679}
680
d23e2ae1 681static void get_core_online(unsigned int cpu)
199e0de7
D
682{
683 struct cpuinfo_x86 *c = &cpu_data(cpu);
684 struct platform_device *pdev = coretemp_get_pdev(cpu);
685 int err;
686
687 /*
688 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
689 * sensors. We check this bit only, all the early CPUs
690 * without thermal sensors will be filtered out.
691 */
4ad33411 692 if (!cpu_has(c, X86_FEATURE_DTHERM))
199e0de7
D
693 return;
694
695 if (!pdev) {
0eb9782a
JD
696 /* Check the microcode version of the CPU */
697 if (chk_ucode_version(cpu))
698 return;
699
199e0de7
D
700 /*
701 * Alright, we have DTS support.
702 * We are bringing the _first_ core in this pkg
703 * online. So, initialize per-pkg data structures and
704 * then bring this core online.
705 */
706 err = coretemp_device_add(cpu);
707 if (err)
708 return;
709 /*
710 * Check whether pkgtemp support is available.
711 * If so, add interfaces for pkgtemp.
712 */
713 if (cpu_has(c, X86_FEATURE_PTS))
714 coretemp_add_core(cpu, 1);
715 }
716 /*
717 * Physical CPU device already exists.
718 * So, just add interfaces for this core.
719 */
720 coretemp_add_core(cpu, 0);
721}
722
d23e2ae1 723static void put_core_offline(unsigned int cpu)
199e0de7
D
724{
725 int i, indx;
726 struct platform_data *pdata;
727 struct platform_device *pdev = coretemp_get_pdev(cpu);
728
729 /* If the physical CPU device does not exist, just return */
730 if (!pdev)
731 return;
732
733 pdata = platform_get_drvdata(pdev);
734
735 indx = TO_ATTR_NO(cpu);
736
b7048711
KS
737 /* The core id is too big, just return */
738 if (indx > MAX_CORE_DATA - 1)
739 return;
740
199e0de7
D
741 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
742 coretemp_remove_core(pdata, &pdev->dev, indx);
743
f4e0bcf0 744 /*
6777b9e4
GR
745 * If a HT sibling of a core is taken offline, but another HT sibling
746 * of the same core is still online, register the alternate sibling.
747 * This ensures that exactly one set of attributes is provided as long
748 * as at least one HT sibling of a core is online.
f4e0bcf0 749 */
bb74e8ca 750 for_each_sibling(i, cpu) {
199e0de7
D
751 if (i != cpu) {
752 get_core_online(i);
f4e0bcf0
GR
753 /*
754 * Display temperature sensor data for one HT sibling
755 * per core only, so abort the loop after one such
756 * sibling has been found.
757 */
199e0de7
D
758 break;
759 }
760 }
761 /*
762 * If all cores in this pkg are offline, remove the device.
763 * coretemp_device_remove calls unregister_platform_device,
764 * which in turn calls coretemp_remove. This removes the
765 * pkgtemp entry and does other clean ups.
766 */
767 if (!is_any_core_online(pdata))
768 coretemp_device_remove(cpu);
769}
770
d23e2ae1 771static int coretemp_cpu_callback(struct notifier_block *nfb,
bebe4678
RM
772 unsigned long action, void *hcpu)
773{
774 unsigned int cpu = (unsigned long) hcpu;
775
776 switch (action) {
777 case CPU_ONLINE:
561d9a96 778 case CPU_DOWN_FAILED:
199e0de7 779 get_core_online(cpu);
bebe4678 780 break;
561d9a96 781 case CPU_DOWN_PREPARE:
199e0de7 782 put_core_offline(cpu);
bebe4678
RM
783 break;
784 }
785 return NOTIFY_OK;
786}
787
ba7c1927 788static struct notifier_block coretemp_cpu_notifier __refdata = {
bebe4678
RM
789 .notifier_call = coretemp_cpu_callback,
790};
bebe4678 791
e273bd98 792static const struct x86_cpu_id __initconst coretemp_ids[] = {
4ad33411 793 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
9b38096f
AK
794 {}
795};
796MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
797
bebe4678
RM
798static int __init coretemp_init(void)
799{
1268a172 800 int i, err;
bebe4678 801
9b38096f
AK
802 /*
803 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
804 * sensors. We check this bit only, all the early CPUs
805 * without thermal sensors will be filtered out.
806 */
807 if (!x86_match_cpu(coretemp_ids))
808 return -ENODEV;
bebe4678
RM
809
810 err = platform_driver_register(&coretemp_driver);
811 if (err)
812 goto exit;
813
641f1456 814 get_online_cpus();
a4659053 815 for_each_online_cpu(i)
199e0de7 816 get_core_online(i);
89a3fd35
JB
817
818#ifndef CONFIG_HOTPLUG_CPU
bebe4678 819 if (list_empty(&pdev_list)) {
641f1456 820 put_online_cpus();
bebe4678
RM
821 err = -ENODEV;
822 goto exit_driver_unreg;
823 }
89a3fd35 824#endif
bebe4678 825
bebe4678 826 register_hotcpu_notifier(&coretemp_cpu_notifier);
641f1456 827 put_online_cpus();
bebe4678
RM
828 return 0;
829
0dca94ba 830#ifndef CONFIG_HOTPLUG_CPU
89a3fd35 831exit_driver_unreg:
bebe4678 832 platform_driver_unregister(&coretemp_driver);
0dca94ba 833#endif
bebe4678
RM
834exit:
835 return err;
836}
837
838static void __exit coretemp_exit(void)
839{
840 struct pdev_entry *p, *n;
17c10d61 841
641f1456 842 get_online_cpus();
bebe4678 843 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
bebe4678
RM
844 mutex_lock(&pdev_list_mutex);
845 list_for_each_entry_safe(p, n, &pdev_list, list) {
846 platform_device_unregister(p->pdev);
847 list_del(&p->list);
848 kfree(p);
849 }
850 mutex_unlock(&pdev_list_mutex);
641f1456 851 put_online_cpus();
bebe4678
RM
852 platform_driver_unregister(&coretemp_driver);
853}
854
855MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
856MODULE_DESCRIPTION("Intel Core temperature monitor");
857MODULE_LICENSE("GPL");
858
859module_init(coretemp_init)
860module_exit(coretemp_exit)
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