Commit | Line | Data |
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bebe4678 RM |
1 | /* |
2 | * coretemp.c - Linux kernel module for hardware monitoring | |
3 | * | |
4 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> | |
5 | * | |
6 | * Inspired from many hwmon drivers | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA. | |
21 | */ | |
22 | ||
f8bb8925 JP |
23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
24 | ||
bebe4678 | 25 | #include <linux/module.h> |
bebe4678 RM |
26 | #include <linux/init.h> |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/hwmon.h> | |
30 | #include <linux/sysfs.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/mutex.h> | |
34 | #include <linux/list.h> | |
35 | #include <linux/platform_device.h> | |
36 | #include <linux/cpu.h> | |
1fe63ab4 | 37 | #include <linux/pci.h> |
4cc45275 | 38 | #include <linux/smp.h> |
a45a8c85 | 39 | #include <linux/moduleparam.h> |
bebe4678 RM |
40 | #include <asm/msr.h> |
41 | #include <asm/processor.h> | |
42 | ||
43 | #define DRVNAME "coretemp" | |
44 | ||
a45a8c85 JD |
45 | /* |
46 | * force_tjmax only matters when TjMax can't be read from the CPU itself. | |
47 | * When set, it replaces the driver's suboptimal heuristic. | |
48 | */ | |
49 | static int force_tjmax; | |
50 | module_param_named(tjmax, force_tjmax, int, 0444); | |
51 | MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); | |
52 | ||
199e0de7 D |
53 | #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ |
54 | #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */ | |
55 | #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */ | |
c814a4c7 | 56 | #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ |
f4af6fd6 | 57 | #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) |
199e0de7 D |
58 | #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) |
59 | ||
60 | #ifdef CONFIG_SMP | |
61 | #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id | |
62 | #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id | |
63 | #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) | |
bb74e8ca | 64 | #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu)) |
199e0de7 D |
65 | #else |
66 | #define TO_PHYS_ID(cpu) (cpu) | |
67 | #define TO_CORE_ID(cpu) (cpu) | |
68 | #define TO_ATTR_NO(cpu) (cpu) | |
bb74e8ca | 69 | #define for_each_sibling(i, cpu) for (i = 0; false; ) |
199e0de7 | 70 | #endif |
bebe4678 RM |
71 | |
72 | /* | |
199e0de7 D |
73 | * Per-Core Temperature Data |
74 | * @last_updated: The time when the current temperature value was updated | |
75 | * earlier (in jiffies). | |
76 | * @cpu_core_id: The CPU Core from which temperature values should be read | |
77 | * This value is passed as "id" field to rdmsr/wrmsr functions. | |
78 | * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS, | |
79 | * from where the temperature values should be read. | |
c814a4c7 | 80 | * @attr_size: Total number of pre-core attrs displayed in the sysfs. |
199e0de7 D |
81 | * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. |
82 | * Otherwise, temp_data holds coretemp data. | |
83 | * @valid: If this is 1, the current temperature is valid. | |
bebe4678 | 84 | */ |
199e0de7 | 85 | struct temp_data { |
bebe4678 | 86 | int temp; |
6369a288 | 87 | int ttarget; |
199e0de7 D |
88 | int tjmax; |
89 | unsigned long last_updated; | |
90 | unsigned int cpu; | |
91 | u32 cpu_core_id; | |
92 | u32 status_reg; | |
c814a4c7 | 93 | int attr_size; |
199e0de7 D |
94 | bool is_pkg_data; |
95 | bool valid; | |
c814a4c7 D |
96 | struct sensor_device_attribute sd_attrs[TOTAL_ATTRS]; |
97 | char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH]; | |
199e0de7 | 98 | struct mutex update_lock; |
bebe4678 RM |
99 | }; |
100 | ||
199e0de7 D |
101 | /* Platform Data per Physical CPU */ |
102 | struct platform_data { | |
103 | struct device *hwmon_dev; | |
104 | u16 phys_proc_id; | |
105 | struct temp_data *core_data[MAX_CORE_DATA]; | |
106 | struct device_attribute name_attr; | |
107 | }; | |
bebe4678 | 108 | |
199e0de7 D |
109 | struct pdev_entry { |
110 | struct list_head list; | |
111 | struct platform_device *pdev; | |
199e0de7 | 112 | u16 phys_proc_id; |
199e0de7 D |
113 | }; |
114 | ||
115 | static LIST_HEAD(pdev_list); | |
116 | static DEFINE_MUTEX(pdev_list_mutex); | |
117 | ||
118 | static ssize_t show_name(struct device *dev, | |
119 | struct device_attribute *devattr, char *buf) | |
120 | { | |
121 | return sprintf(buf, "%s\n", DRVNAME); | |
122 | } | |
123 | ||
124 | static ssize_t show_label(struct device *dev, | |
125 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 126 | { |
bebe4678 | 127 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
199e0de7 D |
128 | struct platform_data *pdata = dev_get_drvdata(dev); |
129 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
130 | ||
131 | if (tdata->is_pkg_data) | |
132 | return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id); | |
bebe4678 | 133 | |
199e0de7 | 134 | return sprintf(buf, "Core %u\n", tdata->cpu_core_id); |
bebe4678 RM |
135 | } |
136 | ||
199e0de7 D |
137 | static ssize_t show_crit_alarm(struct device *dev, |
138 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 139 | { |
199e0de7 D |
140 | u32 eax, edx; |
141 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
142 | struct platform_data *pdata = dev_get_drvdata(dev); | |
143 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
144 | ||
145 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
146 | ||
147 | return sprintf(buf, "%d\n", (eax >> 5) & 1); | |
bebe4678 RM |
148 | } |
149 | ||
199e0de7 D |
150 | static ssize_t show_tjmax(struct device *dev, |
151 | struct device_attribute *devattr, char *buf) | |
bebe4678 RM |
152 | { |
153 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
199e0de7 | 154 | struct platform_data *pdata = dev_get_drvdata(dev); |
bebe4678 | 155 | |
199e0de7 | 156 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); |
bebe4678 RM |
157 | } |
158 | ||
199e0de7 D |
159 | static ssize_t show_ttarget(struct device *dev, |
160 | struct device_attribute *devattr, char *buf) | |
161 | { | |
162 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
163 | struct platform_data *pdata = dev_get_drvdata(dev); | |
bebe4678 | 164 | |
199e0de7 D |
165 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); |
166 | } | |
bebe4678 | 167 | |
199e0de7 D |
168 | static ssize_t show_temp(struct device *dev, |
169 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 170 | { |
199e0de7 D |
171 | u32 eax, edx; |
172 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
173 | struct platform_data *pdata = dev_get_drvdata(dev); | |
174 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
bebe4678 | 175 | |
199e0de7 | 176 | mutex_lock(&tdata->update_lock); |
bebe4678 | 177 | |
199e0de7 D |
178 | /* Check whether the time interval has elapsed */ |
179 | if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { | |
180 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
181 | tdata->valid = 0; | |
182 | /* Check whether the data is valid */ | |
bebe4678 | 183 | if (eax & 0x80000000) { |
199e0de7 | 184 | tdata->temp = tdata->tjmax - |
4cc45275 | 185 | ((eax >> 16) & 0x7f) * 1000; |
199e0de7 | 186 | tdata->valid = 1; |
bebe4678 | 187 | } |
199e0de7 | 188 | tdata->last_updated = jiffies; |
bebe4678 RM |
189 | } |
190 | ||
199e0de7 D |
191 | mutex_unlock(&tdata->update_lock); |
192 | return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN; | |
bebe4678 RM |
193 | } |
194 | ||
199e0de7 | 195 | static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
118a8871 RM |
196 | { |
197 | /* The 100C is default for both mobile and non mobile CPUs */ | |
198 | ||
199 | int tjmax = 100000; | |
eccfed42 | 200 | int tjmax_ee = 85000; |
708a62bc | 201 | int usemsr_ee = 1; |
118a8871 RM |
202 | int err; |
203 | u32 eax, edx; | |
1fe63ab4 | 204 | struct pci_dev *host_bridge; |
118a8871 RM |
205 | |
206 | /* Early chips have no MSR for TjMax */ | |
207 | ||
4cc45275 | 208 | if (c->x86_model == 0xf && c->x86_mask < 4) |
708a62bc | 209 | usemsr_ee = 0; |
118a8871 | 210 | |
1fe63ab4 | 211 | /* Atom CPUs */ |
708a62bc RM |
212 | |
213 | if (c->x86_model == 0x1c) { | |
214 | usemsr_ee = 0; | |
1fe63ab4 YW |
215 | |
216 | host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); | |
217 | ||
218 | if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL | |
219 | && (host_bridge->device == 0xa000 /* NM10 based nettop */ | |
220 | || host_bridge->device == 0xa010)) /* NM10 based netbook */ | |
221 | tjmax = 100000; | |
222 | else | |
223 | tjmax = 90000; | |
224 | ||
225 | pci_dev_put(host_bridge); | |
708a62bc RM |
226 | } |
227 | ||
4cc45275 | 228 | if (c->x86_model > 0xe && usemsr_ee) { |
eccfed42 | 229 | u8 platform_id; |
118a8871 | 230 | |
4cc45275 GR |
231 | /* |
232 | * Now we can detect the mobile CPU using Intel provided table | |
233 | * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm | |
234 | * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU | |
235 | */ | |
118a8871 RM |
236 | err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); |
237 | if (err) { | |
238 | dev_warn(dev, | |
239 | "Unable to access MSR 0x17, assuming desktop" | |
240 | " CPU\n"); | |
708a62bc | 241 | usemsr_ee = 0; |
eccfed42 | 242 | } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { |
4cc45275 GR |
243 | /* |
244 | * Trust bit 28 up to Penryn, I could not find any | |
245 | * documentation on that; if you happen to know | |
246 | * someone at Intel please ask | |
247 | */ | |
708a62bc | 248 | usemsr_ee = 0; |
eccfed42 RM |
249 | } else { |
250 | /* Platform ID bits 52:50 (EDX starts at bit 32) */ | |
251 | platform_id = (edx >> 18) & 0x7; | |
252 | ||
4cc45275 GR |
253 | /* |
254 | * Mobile Penryn CPU seems to be platform ID 7 or 5 | |
255 | * (guesswork) | |
256 | */ | |
257 | if (c->x86_model == 0x17 && | |
258 | (platform_id == 5 || platform_id == 7)) { | |
259 | /* | |
260 | * If MSR EE bit is set, set it to 90 degrees C, | |
261 | * otherwise 105 degrees C | |
262 | */ | |
eccfed42 RM |
263 | tjmax_ee = 90000; |
264 | tjmax = 105000; | |
265 | } | |
118a8871 RM |
266 | } |
267 | } | |
268 | ||
708a62bc | 269 | if (usemsr_ee) { |
118a8871 RM |
270 | err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); |
271 | if (err) { | |
272 | dev_warn(dev, | |
273 | "Unable to access MSR 0xEE, for Tjmax, left" | |
4d7a5644 | 274 | " at default\n"); |
118a8871 | 275 | } else if (eax & 0x40000000) { |
eccfed42 | 276 | tjmax = tjmax_ee; |
118a8871 | 277 | } |
708a62bc | 278 | } else if (tjmax == 100000) { |
4cc45275 GR |
279 | /* |
280 | * If we don't use msr EE it means we are desktop CPU | |
281 | * (with exeception of Atom) | |
282 | */ | |
118a8871 RM |
283 | dev_warn(dev, "Using relative temperature scale!\n"); |
284 | } | |
285 | ||
286 | return tjmax; | |
287 | } | |
288 | ||
199e0de7 | 289 | static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
a321cedb | 290 | { |
a321cedb CE |
291 | int err; |
292 | u32 eax, edx; | |
293 | u32 val; | |
294 | ||
4cc45275 GR |
295 | /* |
296 | * A new feature of current Intel(R) processors, the | |
297 | * IA32_TEMPERATURE_TARGET contains the TjMax value | |
298 | */ | |
a321cedb CE |
299 | err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); |
300 | if (err) { | |
6bf9e9b0 JD |
301 | if (c->x86_model > 0xe && c->x86_model != 0x1c) |
302 | dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); | |
a321cedb CE |
303 | } else { |
304 | val = (eax >> 16) & 0xff; | |
305 | /* | |
306 | * If the TjMax is not plausible, an assumption | |
307 | * will be used | |
308 | */ | |
bb9973e4 | 309 | if (val) { |
6bf9e9b0 | 310 | dev_dbg(dev, "TjMax is %d degrees C\n", val); |
a321cedb CE |
311 | return val * 1000; |
312 | } | |
313 | } | |
314 | ||
a45a8c85 JD |
315 | if (force_tjmax) { |
316 | dev_notice(dev, "TjMax forced to %d degrees C by user\n", | |
317 | force_tjmax); | |
318 | return force_tjmax * 1000; | |
319 | } | |
320 | ||
a321cedb CE |
321 | /* |
322 | * An assumption is made for early CPUs and unreadable MSR. | |
4f5f71a7 | 323 | * NOTE: the calculated value may not be correct. |
a321cedb | 324 | */ |
4f5f71a7 | 325 | return adjust_tjmax(c, id, dev); |
a321cedb CE |
326 | } |
327 | ||
32478006 JB |
328 | static void __devinit get_ucode_rev_on_cpu(void *edx) |
329 | { | |
330 | u32 eax; | |
331 | ||
332 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | |
333 | sync_core(); | |
334 | rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx); | |
335 | } | |
336 | ||
199e0de7 D |
337 | static int create_name_attr(struct platform_data *pdata, struct device *dev) |
338 | { | |
4258781a | 339 | sysfs_attr_init(&pdata->name_attr.attr); |
199e0de7 D |
340 | pdata->name_attr.attr.name = "name"; |
341 | pdata->name_attr.attr.mode = S_IRUGO; | |
342 | pdata->name_attr.show = show_name; | |
343 | return device_create_file(dev, &pdata->name_attr); | |
344 | } | |
bebe4678 | 345 | |
199e0de7 D |
346 | static int create_core_attrs(struct temp_data *tdata, struct device *dev, |
347 | int attr_no) | |
348 | { | |
349 | int err, i; | |
e3204ed3 | 350 | static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev, |
199e0de7 | 351 | struct device_attribute *devattr, char *buf) = { |
c814a4c7 | 352 | show_label, show_crit_alarm, show_temp, show_tjmax, |
f4af6fd6 | 353 | show_ttarget }; |
e3204ed3 | 354 | static const char *const names[TOTAL_ATTRS] = { |
199e0de7 | 355 | "temp%d_label", "temp%d_crit_alarm", |
c814a4c7 | 356 | "temp%d_input", "temp%d_crit", |
f4af6fd6 | 357 | "temp%d_max" }; |
199e0de7 | 358 | |
c814a4c7 | 359 | for (i = 0; i < tdata->attr_size; i++) { |
199e0de7 D |
360 | snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i], |
361 | attr_no); | |
4258781a | 362 | sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr); |
199e0de7 D |
363 | tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i]; |
364 | tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO; | |
365 | tdata->sd_attrs[i].dev_attr.show = rd_ptr[i]; | |
199e0de7 D |
366 | tdata->sd_attrs[i].index = attr_no; |
367 | err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr); | |
368 | if (err) | |
369 | goto exit_free; | |
bebe4678 | 370 | } |
199e0de7 D |
371 | return 0; |
372 | ||
373 | exit_free: | |
374 | while (--i >= 0) | |
375 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); | |
376 | return err; | |
377 | } | |
378 | ||
199e0de7 | 379 | |
0eb9782a | 380 | static int __cpuinit chk_ucode_version(unsigned int cpu) |
199e0de7 | 381 | { |
0eb9782a | 382 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
199e0de7 D |
383 | int err; |
384 | u32 edx; | |
67f363b1 | 385 | |
199e0de7 D |
386 | /* |
387 | * Check if we have problem with errata AE18 of Core processors: | |
388 | * Readings might stop update when processor visited too deep sleep, | |
389 | * fixed for stepping D0 (6EC). | |
390 | */ | |
4cc45275 | 391 | if (c->x86_model == 0xe && c->x86_mask < 0xc) { |
67f363b1 | 392 | /* check for microcode update */ |
0eb9782a | 393 | err = smp_call_function_single(cpu, get_ucode_rev_on_cpu, |
32478006 JB |
394 | &edx, 1); |
395 | if (err) { | |
0eb9782a JD |
396 | pr_err("Cannot determine microcode revision of " |
397 | "CPU#%u (%d)!\n", cpu, err); | |
199e0de7 | 398 | return -ENODEV; |
32478006 | 399 | } else if (edx < 0x39) { |
0eb9782a JD |
400 | pr_err("Errata AE18 not fixed, update BIOS or " |
401 | "microcode of the CPU!\n"); | |
199e0de7 | 402 | return -ENODEV; |
67f363b1 RM |
403 | } |
404 | } | |
199e0de7 D |
405 | return 0; |
406 | } | |
407 | ||
408 | static struct platform_device *coretemp_get_pdev(unsigned int cpu) | |
409 | { | |
410 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
411 | struct pdev_entry *p; | |
412 | ||
413 | mutex_lock(&pdev_list_mutex); | |
414 | ||
415 | list_for_each_entry(p, &pdev_list, list) | |
416 | if (p->phys_proc_id == phys_proc_id) { | |
417 | mutex_unlock(&pdev_list_mutex); | |
418 | return p->pdev; | |
419 | } | |
420 | ||
421 | mutex_unlock(&pdev_list_mutex); | |
422 | return NULL; | |
423 | } | |
424 | ||
425 | static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) | |
426 | { | |
427 | struct temp_data *tdata; | |
428 | ||
429 | tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL); | |
430 | if (!tdata) | |
431 | return NULL; | |
432 | ||
433 | tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS : | |
434 | MSR_IA32_THERM_STATUS; | |
435 | tdata->is_pkg_data = pkg_flag; | |
436 | tdata->cpu = cpu; | |
437 | tdata->cpu_core_id = TO_CORE_ID(cpu); | |
c814a4c7 | 438 | tdata->attr_size = MAX_CORE_ATTRS; |
199e0de7 D |
439 | mutex_init(&tdata->update_lock); |
440 | return tdata; | |
441 | } | |
67f363b1 | 442 | |
2f1c3db0 | 443 | static int create_core_data(struct platform_device *pdev, |
199e0de7 D |
444 | unsigned int cpu, int pkg_flag) |
445 | { | |
446 | struct temp_data *tdata; | |
2f1c3db0 | 447 | struct platform_data *pdata = platform_get_drvdata(pdev); |
199e0de7 D |
448 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
449 | u32 eax, edx; | |
450 | int err, attr_no; | |
bebe4678 | 451 | |
a321cedb | 452 | /* |
199e0de7 D |
453 | * Find attr number for sysfs: |
454 | * We map the attr number to core id of the CPU | |
455 | * The attr number is always core id + 2 | |
456 | * The Pkgtemp will always show up as temp1_*, if available | |
a321cedb | 457 | */ |
199e0de7 | 458 | attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu); |
6369a288 | 459 | |
199e0de7 D |
460 | if (attr_no > MAX_CORE_DATA - 1) |
461 | return -ERANGE; | |
462 | ||
f4e0bcf0 GR |
463 | /* |
464 | * Provide a single set of attributes for all HT siblings of a core | |
465 | * to avoid duplicate sensors (the processor ID and core ID of all | |
6777b9e4 GR |
466 | * HT siblings of a core are the same). |
467 | * Skip if a HT sibling of this core is already registered. | |
f4e0bcf0 GR |
468 | * This is not an error. |
469 | */ | |
199e0de7 D |
470 | if (pdata->core_data[attr_no] != NULL) |
471 | return 0; | |
6369a288 | 472 | |
199e0de7 D |
473 | tdata = init_temp_data(cpu, pkg_flag); |
474 | if (!tdata) | |
475 | return -ENOMEM; | |
bebe4678 | 476 | |
199e0de7 D |
477 | /* Test if we can access the status register */ |
478 | err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); | |
479 | if (err) | |
480 | goto exit_free; | |
481 | ||
482 | /* We can access status register. Get Critical Temperature */ | |
6bf9e9b0 | 483 | tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); |
199e0de7 | 484 | |
c814a4c7 | 485 | /* |
f4af6fd6 GR |
486 | * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET. |
487 | * The target temperature is available on older CPUs but not in this | |
488 | * register. Atoms don't have the register at all. | |
c814a4c7 | 489 | */ |
f4af6fd6 GR |
490 | if (c->x86_model > 0xe && c->x86_model != 0x1c) { |
491 | err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, | |
492 | &eax, &edx); | |
493 | if (!err) { | |
494 | tdata->ttarget | |
495 | = tdata->tjmax - ((eax >> 8) & 0xff) * 1000; | |
496 | tdata->attr_size++; | |
497 | } | |
c814a4c7 D |
498 | } |
499 | ||
199e0de7 D |
500 | pdata->core_data[attr_no] = tdata; |
501 | ||
502 | /* Create sysfs interfaces */ | |
503 | err = create_core_attrs(tdata, &pdev->dev, attr_no); | |
504 | if (err) | |
505 | goto exit_free; | |
bebe4678 RM |
506 | |
507 | return 0; | |
199e0de7 | 508 | exit_free: |
20ecb499 | 509 | pdata->core_data[attr_no] = NULL; |
199e0de7 D |
510 | kfree(tdata); |
511 | return err; | |
512 | } | |
513 | ||
514 | static void coretemp_add_core(unsigned int cpu, int pkg_flag) | |
515 | { | |
199e0de7 D |
516 | struct platform_device *pdev = coretemp_get_pdev(cpu); |
517 | int err; | |
518 | ||
519 | if (!pdev) | |
520 | return; | |
521 | ||
2f1c3db0 | 522 | err = create_core_data(pdev, cpu, pkg_flag); |
199e0de7 D |
523 | if (err) |
524 | dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); | |
525 | } | |
526 | ||
527 | static void coretemp_remove_core(struct platform_data *pdata, | |
528 | struct device *dev, int indx) | |
529 | { | |
530 | int i; | |
531 | struct temp_data *tdata = pdata->core_data[indx]; | |
532 | ||
533 | /* Remove the sysfs attributes */ | |
c814a4c7 | 534 | for (i = 0; i < tdata->attr_size; i++) |
199e0de7 D |
535 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); |
536 | ||
537 | kfree(pdata->core_data[indx]); | |
538 | pdata->core_data[indx] = NULL; | |
539 | } | |
540 | ||
541 | static int __devinit coretemp_probe(struct platform_device *pdev) | |
542 | { | |
543 | struct platform_data *pdata; | |
544 | int err; | |
bebe4678 | 545 | |
199e0de7 D |
546 | /* Initialize the per-package data structures */ |
547 | pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL); | |
548 | if (!pdata) | |
549 | return -ENOMEM; | |
550 | ||
551 | err = create_name_attr(pdata, &pdev->dev); | |
552 | if (err) | |
553 | goto exit_free; | |
554 | ||
b3a242a6 | 555 | pdata->phys_proc_id = pdev->id; |
199e0de7 D |
556 | platform_set_drvdata(pdev, pdata); |
557 | ||
558 | pdata->hwmon_dev = hwmon_device_register(&pdev->dev); | |
559 | if (IS_ERR(pdata->hwmon_dev)) { | |
560 | err = PTR_ERR(pdata->hwmon_dev); | |
561 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); | |
562 | goto exit_name; | |
563 | } | |
564 | return 0; | |
565 | ||
566 | exit_name: | |
567 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
568 | platform_set_drvdata(pdev, NULL); | |
bebe4678 | 569 | exit_free: |
199e0de7 | 570 | kfree(pdata); |
bebe4678 RM |
571 | return err; |
572 | } | |
573 | ||
574 | static int __devexit coretemp_remove(struct platform_device *pdev) | |
575 | { | |
199e0de7 D |
576 | struct platform_data *pdata = platform_get_drvdata(pdev); |
577 | int i; | |
bebe4678 | 578 | |
199e0de7 D |
579 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) |
580 | if (pdata->core_data[i]) | |
581 | coretemp_remove_core(pdata, &pdev->dev, i); | |
582 | ||
583 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
584 | hwmon_device_unregister(pdata->hwmon_dev); | |
bebe4678 | 585 | platform_set_drvdata(pdev, NULL); |
199e0de7 | 586 | kfree(pdata); |
bebe4678 RM |
587 | return 0; |
588 | } | |
589 | ||
590 | static struct platform_driver coretemp_driver = { | |
591 | .driver = { | |
592 | .owner = THIS_MODULE, | |
593 | .name = DRVNAME, | |
594 | }, | |
595 | .probe = coretemp_probe, | |
596 | .remove = __devexit_p(coretemp_remove), | |
597 | }; | |
598 | ||
bebe4678 RM |
599 | static int __cpuinit coretemp_device_add(unsigned int cpu) |
600 | { | |
601 | int err; | |
602 | struct platform_device *pdev; | |
603 | struct pdev_entry *pdev_entry; | |
d883b9f0 JD |
604 | |
605 | mutex_lock(&pdev_list_mutex); | |
606 | ||
b3a242a6 | 607 | pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu)); |
bebe4678 RM |
608 | if (!pdev) { |
609 | err = -ENOMEM; | |
f8bb8925 | 610 | pr_err("Device allocation failed\n"); |
bebe4678 RM |
611 | goto exit; |
612 | } | |
613 | ||
614 | pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); | |
615 | if (!pdev_entry) { | |
616 | err = -ENOMEM; | |
617 | goto exit_device_put; | |
618 | } | |
619 | ||
620 | err = platform_device_add(pdev); | |
621 | if (err) { | |
f8bb8925 | 622 | pr_err("Device addition failed (%d)\n", err); |
bebe4678 RM |
623 | goto exit_device_free; |
624 | } | |
625 | ||
626 | pdev_entry->pdev = pdev; | |
0eb9782a | 627 | pdev_entry->phys_proc_id = pdev->id; |
199e0de7 | 628 | |
bebe4678 RM |
629 | list_add_tail(&pdev_entry->list, &pdev_list); |
630 | mutex_unlock(&pdev_list_mutex); | |
631 | ||
632 | return 0; | |
633 | ||
634 | exit_device_free: | |
635 | kfree(pdev_entry); | |
636 | exit_device_put: | |
637 | platform_device_put(pdev); | |
638 | exit: | |
d883b9f0 | 639 | mutex_unlock(&pdev_list_mutex); |
bebe4678 RM |
640 | return err; |
641 | } | |
642 | ||
199e0de7 | 643 | static void coretemp_device_remove(unsigned int cpu) |
bebe4678 | 644 | { |
199e0de7 D |
645 | struct pdev_entry *p, *n; |
646 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
e40cc4bd | 647 | |
bebe4678 | 648 | mutex_lock(&pdev_list_mutex); |
199e0de7 D |
649 | list_for_each_entry_safe(p, n, &pdev_list, list) { |
650 | if (p->phys_proc_id != phys_proc_id) | |
e40cc4bd | 651 | continue; |
e40cc4bd JB |
652 | platform_device_unregister(p->pdev); |
653 | list_del(&p->list); | |
e40cc4bd | 654 | kfree(p); |
bebe4678 RM |
655 | } |
656 | mutex_unlock(&pdev_list_mutex); | |
657 | } | |
658 | ||
199e0de7 D |
659 | static bool is_any_core_online(struct platform_data *pdata) |
660 | { | |
661 | int i; | |
662 | ||
663 | /* Find online cores, except pkgtemp data */ | |
664 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) { | |
665 | if (pdata->core_data[i] && | |
666 | !pdata->core_data[i]->is_pkg_data) { | |
667 | return true; | |
668 | } | |
669 | } | |
670 | return false; | |
671 | } | |
672 | ||
673 | static void __cpuinit get_core_online(unsigned int cpu) | |
674 | { | |
675 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
676 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
677 | int err; | |
678 | ||
679 | /* | |
680 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal | |
681 | * sensors. We check this bit only, all the early CPUs | |
682 | * without thermal sensors will be filtered out. | |
683 | */ | |
684 | if (!cpu_has(c, X86_FEATURE_DTS)) | |
685 | return; | |
686 | ||
687 | if (!pdev) { | |
0eb9782a JD |
688 | /* Check the microcode version of the CPU */ |
689 | if (chk_ucode_version(cpu)) | |
690 | return; | |
691 | ||
199e0de7 D |
692 | /* |
693 | * Alright, we have DTS support. | |
694 | * We are bringing the _first_ core in this pkg | |
695 | * online. So, initialize per-pkg data structures and | |
696 | * then bring this core online. | |
697 | */ | |
698 | err = coretemp_device_add(cpu); | |
699 | if (err) | |
700 | return; | |
701 | /* | |
702 | * Check whether pkgtemp support is available. | |
703 | * If so, add interfaces for pkgtemp. | |
704 | */ | |
705 | if (cpu_has(c, X86_FEATURE_PTS)) | |
706 | coretemp_add_core(cpu, 1); | |
707 | } | |
708 | /* | |
709 | * Physical CPU device already exists. | |
710 | * So, just add interfaces for this core. | |
711 | */ | |
712 | coretemp_add_core(cpu, 0); | |
713 | } | |
714 | ||
715 | static void __cpuinit put_core_offline(unsigned int cpu) | |
716 | { | |
717 | int i, indx; | |
718 | struct platform_data *pdata; | |
719 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
720 | ||
721 | /* If the physical CPU device does not exist, just return */ | |
722 | if (!pdev) | |
723 | return; | |
724 | ||
725 | pdata = platform_get_drvdata(pdev); | |
726 | ||
727 | indx = TO_ATTR_NO(cpu); | |
728 | ||
729 | if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu) | |
730 | coretemp_remove_core(pdata, &pdev->dev, indx); | |
731 | ||
f4e0bcf0 | 732 | /* |
6777b9e4 GR |
733 | * If a HT sibling of a core is taken offline, but another HT sibling |
734 | * of the same core is still online, register the alternate sibling. | |
735 | * This ensures that exactly one set of attributes is provided as long | |
736 | * as at least one HT sibling of a core is online. | |
f4e0bcf0 | 737 | */ |
bb74e8ca | 738 | for_each_sibling(i, cpu) { |
199e0de7 D |
739 | if (i != cpu) { |
740 | get_core_online(i); | |
f4e0bcf0 GR |
741 | /* |
742 | * Display temperature sensor data for one HT sibling | |
743 | * per core only, so abort the loop after one such | |
744 | * sibling has been found. | |
745 | */ | |
199e0de7 D |
746 | break; |
747 | } | |
748 | } | |
749 | /* | |
750 | * If all cores in this pkg are offline, remove the device. | |
751 | * coretemp_device_remove calls unregister_platform_device, | |
752 | * which in turn calls coretemp_remove. This removes the | |
753 | * pkgtemp entry and does other clean ups. | |
754 | */ | |
755 | if (!is_any_core_online(pdata)) | |
756 | coretemp_device_remove(cpu); | |
757 | } | |
758 | ||
ba7c1927 | 759 | static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb, |
bebe4678 RM |
760 | unsigned long action, void *hcpu) |
761 | { | |
762 | unsigned int cpu = (unsigned long) hcpu; | |
763 | ||
764 | switch (action) { | |
765 | case CPU_ONLINE: | |
561d9a96 | 766 | case CPU_DOWN_FAILED: |
199e0de7 | 767 | get_core_online(cpu); |
bebe4678 | 768 | break; |
561d9a96 | 769 | case CPU_DOWN_PREPARE: |
199e0de7 | 770 | put_core_offline(cpu); |
bebe4678 RM |
771 | break; |
772 | } | |
773 | return NOTIFY_OK; | |
774 | } | |
775 | ||
ba7c1927 | 776 | static struct notifier_block coretemp_cpu_notifier __refdata = { |
bebe4678 RM |
777 | .notifier_call = coretemp_cpu_callback, |
778 | }; | |
bebe4678 RM |
779 | |
780 | static int __init coretemp_init(void) | |
781 | { | |
782 | int i, err = -ENODEV; | |
bebe4678 | 783 | |
bebe4678 | 784 | /* quick check if we run Intel */ |
92cb7612 | 785 | if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL) |
bebe4678 RM |
786 | goto exit; |
787 | ||
788 | err = platform_driver_register(&coretemp_driver); | |
789 | if (err) | |
790 | goto exit; | |
791 | ||
a4659053 | 792 | for_each_online_cpu(i) |
199e0de7 | 793 | get_core_online(i); |
89a3fd35 JB |
794 | |
795 | #ifndef CONFIG_HOTPLUG_CPU | |
bebe4678 RM |
796 | if (list_empty(&pdev_list)) { |
797 | err = -ENODEV; | |
798 | goto exit_driver_unreg; | |
799 | } | |
89a3fd35 | 800 | #endif |
bebe4678 | 801 | |
bebe4678 | 802 | register_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
803 | return 0; |
804 | ||
0dca94ba | 805 | #ifndef CONFIG_HOTPLUG_CPU |
89a3fd35 | 806 | exit_driver_unreg: |
bebe4678 | 807 | platform_driver_unregister(&coretemp_driver); |
0dca94ba | 808 | #endif |
bebe4678 RM |
809 | exit: |
810 | return err; | |
811 | } | |
812 | ||
813 | static void __exit coretemp_exit(void) | |
814 | { | |
815 | struct pdev_entry *p, *n; | |
17c10d61 | 816 | |
bebe4678 | 817 | unregister_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
818 | mutex_lock(&pdev_list_mutex); |
819 | list_for_each_entry_safe(p, n, &pdev_list, list) { | |
820 | platform_device_unregister(p->pdev); | |
821 | list_del(&p->list); | |
822 | kfree(p); | |
823 | } | |
824 | mutex_unlock(&pdev_list_mutex); | |
825 | platform_driver_unregister(&coretemp_driver); | |
826 | } | |
827 | ||
828 | MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); | |
829 | MODULE_DESCRIPTION("Intel Core temperature monitor"); | |
830 | MODULE_LICENSE("GPL"); | |
831 | ||
832 | module_init(coretemp_init) | |
833 | module_exit(coretemp_exit) |