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e53004e2 JD |
1 | /* |
2 | * f71805f.c - driver for the Fintek F71805F/FG Super-I/O chip integrated | |
3 | * hardware monitoring features | |
4 | * Copyright (C) 2005 Jean Delvare <khali@linux-fr.org> | |
5 | * | |
6 | * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates | |
7 | * complete hardware monitoring features: voltage, fan and temperature | |
8 | * sensors, and manual and automatic fan speed control. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/platform_device.h> | |
30 | #include <linux/hwmon.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
f0819184 | 33 | #include <linux/mutex.h> |
e53004e2 JD |
34 | #include <asm/io.h> |
35 | ||
36 | static struct platform_device *pdev; | |
37 | ||
38 | #define DRVNAME "f71805f" | |
39 | ||
40 | /* | |
41 | * Super-I/O constants and functions | |
42 | */ | |
43 | ||
44 | #define F71805F_LD_HWM 0x04 | |
45 | ||
46 | #define SIO_REG_LDSEL 0x07 /* Logical device select */ | |
47 | #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ | |
48 | #define SIO_REG_DEVREV 0x22 /* Device revision */ | |
49 | #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ | |
50 | #define SIO_REG_ENABLE 0x30 /* Logical device enable */ | |
51 | #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ | |
52 | ||
53 | #define SIO_FINTEK_ID 0x1934 | |
54 | #define SIO_F71805F_ID 0x0406 | |
55 | ||
56 | static inline int | |
57 | superio_inb(int base, int reg) | |
58 | { | |
59 | outb(reg, base); | |
60 | return inb(base + 1); | |
61 | } | |
62 | ||
63 | static int | |
64 | superio_inw(int base, int reg) | |
65 | { | |
66 | int val; | |
67 | outb(reg++, base); | |
68 | val = inb(base + 1) << 8; | |
69 | outb(reg, base); | |
70 | val |= inb(base + 1); | |
71 | return val; | |
72 | } | |
73 | ||
74 | static inline void | |
75 | superio_select(int base, int ld) | |
76 | { | |
77 | outb(SIO_REG_LDSEL, base); | |
78 | outb(ld, base + 1); | |
79 | } | |
80 | ||
81 | static inline void | |
82 | superio_enter(int base) | |
83 | { | |
84 | outb(0x87, base); | |
85 | outb(0x87, base); | |
86 | } | |
87 | ||
88 | static inline void | |
89 | superio_exit(int base) | |
90 | { | |
91 | outb(0xaa, base); | |
92 | } | |
93 | ||
94 | /* | |
95 | * ISA constants | |
96 | */ | |
97 | ||
98 | #define REGION_LENGTH 2 | |
99 | #define ADDR_REG_OFFSET 0 | |
100 | #define DATA_REG_OFFSET 1 | |
101 | ||
102 | static struct resource f71805f_resource __initdata = { | |
103 | .flags = IORESOURCE_IO, | |
104 | }; | |
105 | ||
106 | /* | |
107 | * Registers | |
108 | */ | |
109 | ||
110 | /* in nr from 0 to 8 (8-bit values) */ | |
111 | #define F71805F_REG_IN(nr) (0x10 + (nr)) | |
112 | #define F71805F_REG_IN_HIGH(nr) (0x40 + 2 * (nr)) | |
113 | #define F71805F_REG_IN_LOW(nr) (0x41 + 2 * (nr)) | |
114 | /* fan nr from 0 to 2 (12-bit values, two registers) */ | |
115 | #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr)) | |
116 | #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr)) | |
117 | #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr)) | |
118 | /* temp nr from 0 to 2 (8-bit values) */ | |
119 | #define F71805F_REG_TEMP(nr) (0x1B + (nr)) | |
120 | #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr)) | |
121 | #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr)) | |
122 | #define F71805F_REG_TEMP_MODE 0x01 | |
123 | ||
124 | #define F71805F_REG_START 0x00 | |
125 | /* status nr from 0 to 2 */ | |
126 | #define F71805F_REG_STATUS(nr) (0x36 + (nr)) | |
127 | ||
128 | /* | |
129 | * Data structures and manipulation thereof | |
130 | */ | |
131 | ||
132 | struct f71805f_data { | |
133 | unsigned short addr; | |
134 | const char *name; | |
f0819184 | 135 | struct mutex lock; |
e53004e2 JD |
136 | struct class_device *class_dev; |
137 | ||
f0819184 | 138 | struct mutex update_lock; |
e53004e2 JD |
139 | char valid; /* !=0 if following fields are valid */ |
140 | unsigned long last_updated; /* In jiffies */ | |
141 | unsigned long last_limits; /* In jiffies */ | |
142 | ||
143 | /* Register values */ | |
144 | u8 in[9]; | |
145 | u8 in_high[9]; | |
146 | u8 in_low[9]; | |
147 | u16 fan[3]; | |
148 | u16 fan_low[3]; | |
149 | u8 fan_enabled; /* Read once at init time */ | |
150 | u8 temp[3]; | |
151 | u8 temp_high[3]; | |
152 | u8 temp_hyst[3]; | |
153 | u8 temp_mode; | |
154 | u8 alarms[3]; | |
155 | }; | |
156 | ||
157 | static inline long in_from_reg(u8 reg) | |
158 | { | |
159 | return (reg * 8); | |
160 | } | |
161 | ||
162 | /* The 2 least significant bits are not used */ | |
163 | static inline u8 in_to_reg(long val) | |
164 | { | |
165 | if (val <= 0) | |
166 | return 0; | |
167 | if (val >= 2016) | |
168 | return 0xfc; | |
169 | return (((val + 16) / 32) << 2); | |
170 | } | |
171 | ||
172 | /* in0 is downscaled by a factor 2 internally */ | |
173 | static inline long in0_from_reg(u8 reg) | |
174 | { | |
175 | return (reg * 16); | |
176 | } | |
177 | ||
178 | static inline u8 in0_to_reg(long val) | |
179 | { | |
180 | if (val <= 0) | |
181 | return 0; | |
182 | if (val >= 4032) | |
183 | return 0xfc; | |
184 | return (((val + 32) / 64) << 2); | |
185 | } | |
186 | ||
187 | /* The 4 most significant bits are not used */ | |
188 | static inline long fan_from_reg(u16 reg) | |
189 | { | |
190 | reg &= 0xfff; | |
191 | if (!reg || reg == 0xfff) | |
192 | return 0; | |
193 | return (1500000 / reg); | |
194 | } | |
195 | ||
196 | static inline u16 fan_to_reg(long rpm) | |
197 | { | |
198 | /* If the low limit is set below what the chip can measure, | |
199 | store the largest possible 12-bit value in the registers, | |
200 | so that no alarm will ever trigger. */ | |
201 | if (rpm < 367) | |
202 | return 0xfff; | |
203 | return (1500000 / rpm); | |
204 | } | |
205 | ||
206 | static inline long temp_from_reg(u8 reg) | |
207 | { | |
208 | return (reg * 1000); | |
209 | } | |
210 | ||
211 | static inline u8 temp_to_reg(long val) | |
212 | { | |
213 | if (val < 0) | |
214 | val = 0; | |
215 | else if (val > 1000 * 0xff) | |
216 | val = 0xff; | |
217 | return ((val + 500) / 1000); | |
218 | } | |
219 | ||
220 | /* | |
221 | * Device I/O access | |
222 | */ | |
223 | ||
224 | static u8 f71805f_read8(struct f71805f_data *data, u8 reg) | |
225 | { | |
226 | u8 val; | |
227 | ||
f0819184 | 228 | mutex_lock(&data->lock); |
e53004e2 JD |
229 | outb(reg, data->addr + ADDR_REG_OFFSET); |
230 | val = inb(data->addr + DATA_REG_OFFSET); | |
f0819184 | 231 | mutex_unlock(&data->lock); |
e53004e2 JD |
232 | |
233 | return val; | |
234 | } | |
235 | ||
236 | static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val) | |
237 | { | |
f0819184 | 238 | mutex_lock(&data->lock); |
e53004e2 JD |
239 | outb(reg, data->addr + ADDR_REG_OFFSET); |
240 | outb(val, data->addr + DATA_REG_OFFSET); | |
f0819184 | 241 | mutex_unlock(&data->lock); |
e53004e2 JD |
242 | } |
243 | ||
244 | /* It is important to read the MSB first, because doing so latches the | |
245 | value of the LSB, so we are sure both bytes belong to the same value. */ | |
246 | static u16 f71805f_read16(struct f71805f_data *data, u8 reg) | |
247 | { | |
248 | u16 val; | |
249 | ||
f0819184 | 250 | mutex_lock(&data->lock); |
e53004e2 JD |
251 | outb(reg, data->addr + ADDR_REG_OFFSET); |
252 | val = inb(data->addr + DATA_REG_OFFSET) << 8; | |
253 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
254 | val |= inb(data->addr + DATA_REG_OFFSET); | |
f0819184 | 255 | mutex_unlock(&data->lock); |
e53004e2 JD |
256 | |
257 | return val; | |
258 | } | |
259 | ||
260 | static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val) | |
261 | { | |
f0819184 | 262 | mutex_lock(&data->lock); |
e53004e2 JD |
263 | outb(reg, data->addr + ADDR_REG_OFFSET); |
264 | outb(val >> 8, data->addr + DATA_REG_OFFSET); | |
265 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
266 | outb(val & 0xff, data->addr + DATA_REG_OFFSET); | |
f0819184 | 267 | mutex_unlock(&data->lock); |
e53004e2 JD |
268 | } |
269 | ||
270 | static struct f71805f_data *f71805f_update_device(struct device *dev) | |
271 | { | |
272 | struct f71805f_data *data = dev_get_drvdata(dev); | |
273 | int nr; | |
274 | ||
f0819184 | 275 | mutex_lock(&data->update_lock); |
e53004e2 JD |
276 | |
277 | /* Limit registers cache is refreshed after 60 seconds */ | |
278 | if (time_after(jiffies, data->last_updated + 60 * HZ) | |
279 | || !data->valid) { | |
280 | for (nr = 0; nr < 9; nr++) { | |
281 | data->in_high[nr] = f71805f_read8(data, | |
282 | F71805F_REG_IN_HIGH(nr)); | |
283 | data->in_low[nr] = f71805f_read8(data, | |
284 | F71805F_REG_IN_LOW(nr)); | |
285 | } | |
286 | for (nr = 0; nr < 3; nr++) { | |
287 | if (data->fan_enabled & (1 << nr)) | |
288 | data->fan_low[nr] = f71805f_read16(data, | |
289 | F71805F_REG_FAN_LOW(nr)); | |
290 | } | |
291 | for (nr = 0; nr < 3; nr++) { | |
292 | data->temp_high[nr] = f71805f_read8(data, | |
293 | F71805F_REG_TEMP_HIGH(nr)); | |
294 | data->temp_hyst[nr] = f71805f_read8(data, | |
295 | F71805F_REG_TEMP_HYST(nr)); | |
296 | } | |
297 | data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE); | |
298 | ||
299 | data->last_limits = jiffies; | |
300 | } | |
301 | ||
302 | /* Measurement registers cache is refreshed after 1 second */ | |
303 | if (time_after(jiffies, data->last_updated + HZ) | |
304 | || !data->valid) { | |
305 | for (nr = 0; nr < 9; nr++) { | |
306 | data->in[nr] = f71805f_read8(data, | |
307 | F71805F_REG_IN(nr)); | |
308 | } | |
309 | for (nr = 0; nr < 3; nr++) { | |
310 | if (data->fan_enabled & (1 << nr)) | |
311 | data->fan[nr] = f71805f_read16(data, | |
312 | F71805F_REG_FAN(nr)); | |
313 | } | |
314 | for (nr = 0; nr < 3; nr++) { | |
315 | data->temp[nr] = f71805f_read8(data, | |
316 | F71805F_REG_TEMP(nr)); | |
317 | } | |
318 | for (nr = 0; nr < 3; nr++) { | |
319 | data->alarms[nr] = f71805f_read8(data, | |
320 | F71805F_REG_STATUS(nr)); | |
321 | } | |
322 | ||
323 | data->last_updated = jiffies; | |
324 | data->valid = 1; | |
325 | } | |
326 | ||
f0819184 | 327 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
328 | |
329 | return data; | |
330 | } | |
331 | ||
332 | /* | |
333 | * Sysfs interface | |
334 | */ | |
335 | ||
336 | static ssize_t show_in0(struct device *dev, struct device_attribute *devattr, | |
337 | char *buf) | |
338 | { | |
339 | struct f71805f_data *data = f71805f_update_device(dev); | |
340 | ||
341 | return sprintf(buf, "%ld\n", in0_from_reg(data->in[0])); | |
342 | } | |
343 | ||
344 | static ssize_t show_in0_max(struct device *dev, struct device_attribute | |
345 | *devattr, char *buf) | |
346 | { | |
347 | struct f71805f_data *data = f71805f_update_device(dev); | |
348 | ||
349 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[0])); | |
350 | } | |
351 | ||
352 | static ssize_t show_in0_min(struct device *dev, struct device_attribute | |
353 | *devattr, char *buf) | |
354 | { | |
355 | struct f71805f_data *data = f71805f_update_device(dev); | |
356 | ||
357 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[0])); | |
358 | } | |
359 | ||
360 | static ssize_t set_in0_max(struct device *dev, struct device_attribute | |
361 | *devattr, const char *buf, size_t count) | |
362 | { | |
363 | struct f71805f_data *data = dev_get_drvdata(dev); | |
364 | long val = simple_strtol(buf, NULL, 10); | |
365 | ||
f0819184 | 366 | mutex_lock(&data->update_lock); |
e53004e2 JD |
367 | data->in_high[0] = in0_to_reg(val); |
368 | f71805f_write8(data, F71805F_REG_IN_HIGH(0), data->in_high[0]); | |
f0819184 | 369 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
370 | |
371 | return count; | |
372 | } | |
373 | ||
374 | static ssize_t set_in0_min(struct device *dev, struct device_attribute | |
375 | *devattr, const char *buf, size_t count) | |
376 | { | |
377 | struct f71805f_data *data = dev_get_drvdata(dev); | |
378 | long val = simple_strtol(buf, NULL, 10); | |
379 | ||
f0819184 | 380 | mutex_lock(&data->update_lock); |
e53004e2 JD |
381 | data->in_low[0] = in0_to_reg(val); |
382 | f71805f_write8(data, F71805F_REG_IN_LOW(0), data->in_low[0]); | |
f0819184 | 383 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
384 | |
385 | return count; | |
386 | } | |
387 | ||
e53004e2 JD |
388 | static ssize_t show_in(struct device *dev, struct device_attribute *devattr, |
389 | char *buf) | |
390 | { | |
391 | struct f71805f_data *data = f71805f_update_device(dev); | |
392 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
393 | int nr = attr->index; | |
394 | ||
395 | return sprintf(buf, "%ld\n", in_from_reg(data->in[nr])); | |
396 | } | |
397 | ||
398 | static ssize_t show_in_max(struct device *dev, struct device_attribute | |
399 | *devattr, char *buf) | |
400 | { | |
401 | struct f71805f_data *data = f71805f_update_device(dev); | |
402 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
403 | int nr = attr->index; | |
404 | ||
405 | return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr])); | |
406 | } | |
407 | ||
408 | static ssize_t show_in_min(struct device *dev, struct device_attribute | |
409 | *devattr, char *buf) | |
410 | { | |
411 | struct f71805f_data *data = f71805f_update_device(dev); | |
412 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
413 | int nr = attr->index; | |
414 | ||
415 | return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr])); | |
416 | } | |
417 | ||
418 | static ssize_t set_in_max(struct device *dev, struct device_attribute | |
419 | *devattr, const char *buf, size_t count) | |
420 | { | |
421 | struct f71805f_data *data = dev_get_drvdata(dev); | |
422 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
423 | int nr = attr->index; | |
424 | long val = simple_strtol(buf, NULL, 10); | |
425 | ||
f0819184 | 426 | mutex_lock(&data->update_lock); |
e53004e2 JD |
427 | data->in_high[nr] = in_to_reg(val); |
428 | f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); | |
f0819184 | 429 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
430 | |
431 | return count; | |
432 | } | |
433 | ||
434 | static ssize_t set_in_min(struct device *dev, struct device_attribute | |
435 | *devattr, const char *buf, size_t count) | |
436 | { | |
437 | struct f71805f_data *data = dev_get_drvdata(dev); | |
438 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
439 | int nr = attr->index; | |
440 | long val = simple_strtol(buf, NULL, 10); | |
441 | ||
f0819184 | 442 | mutex_lock(&data->update_lock); |
e53004e2 JD |
443 | data->in_low[nr] = in_to_reg(val); |
444 | f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); | |
f0819184 | 445 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
446 | |
447 | return count; | |
448 | } | |
449 | ||
e53004e2 JD |
450 | static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, |
451 | char *buf) | |
452 | { | |
453 | struct f71805f_data *data = f71805f_update_device(dev); | |
454 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
455 | int nr = attr->index; | |
456 | ||
457 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr])); | |
458 | } | |
459 | ||
460 | static ssize_t show_fan_min(struct device *dev, struct device_attribute | |
461 | *devattr, char *buf) | |
462 | { | |
463 | struct f71805f_data *data = f71805f_update_device(dev); | |
464 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
465 | int nr = attr->index; | |
466 | ||
467 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr])); | |
468 | } | |
469 | ||
470 | static ssize_t set_fan_min(struct device *dev, struct device_attribute | |
471 | *devattr, const char *buf, size_t count) | |
472 | { | |
473 | struct f71805f_data *data = dev_get_drvdata(dev); | |
474 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
475 | int nr = attr->index; | |
476 | long val = simple_strtol(buf, NULL, 10); | |
477 | ||
f0819184 | 478 | mutex_lock(&data->update_lock); |
e53004e2 JD |
479 | data->fan_low[nr] = fan_to_reg(val); |
480 | f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]); | |
f0819184 | 481 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
482 | |
483 | return count; | |
484 | } | |
485 | ||
e53004e2 JD |
486 | static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, |
487 | char *buf) | |
488 | { | |
489 | struct f71805f_data *data = f71805f_update_device(dev); | |
490 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
491 | int nr = attr->index; | |
492 | ||
493 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr])); | |
494 | } | |
495 | ||
496 | static ssize_t show_temp_max(struct device *dev, struct device_attribute | |
497 | *devattr, char *buf) | |
498 | { | |
499 | struct f71805f_data *data = f71805f_update_device(dev); | |
500 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
501 | int nr = attr->index; | |
502 | ||
503 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr])); | |
504 | } | |
505 | ||
506 | static ssize_t show_temp_hyst(struct device *dev, struct device_attribute | |
507 | *devattr, char *buf) | |
508 | { | |
509 | struct f71805f_data *data = f71805f_update_device(dev); | |
510 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
511 | int nr = attr->index; | |
512 | ||
513 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr])); | |
514 | } | |
515 | ||
516 | static ssize_t show_temp_type(struct device *dev, struct device_attribute | |
517 | *devattr, char *buf) | |
518 | { | |
519 | struct f71805f_data *data = f71805f_update_device(dev); | |
520 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
521 | int nr = attr->index; | |
522 | ||
523 | /* 3 is diode, 4 is thermistor */ | |
524 | return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4); | |
525 | } | |
526 | ||
527 | static ssize_t set_temp_max(struct device *dev, struct device_attribute | |
528 | *devattr, const char *buf, size_t count) | |
529 | { | |
530 | struct f71805f_data *data = dev_get_drvdata(dev); | |
531 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
532 | int nr = attr->index; | |
533 | long val = simple_strtol(buf, NULL, 10); | |
534 | ||
f0819184 | 535 | mutex_lock(&data->update_lock); |
e53004e2 JD |
536 | data->temp_high[nr] = temp_to_reg(val); |
537 | f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]); | |
f0819184 | 538 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
539 | |
540 | return count; | |
541 | } | |
542 | ||
543 | static ssize_t set_temp_hyst(struct device *dev, struct device_attribute | |
544 | *devattr, const char *buf, size_t count) | |
545 | { | |
546 | struct f71805f_data *data = dev_get_drvdata(dev); | |
547 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
548 | int nr = attr->index; | |
549 | long val = simple_strtol(buf, NULL, 10); | |
550 | ||
f0819184 | 551 | mutex_lock(&data->update_lock); |
e53004e2 JD |
552 | data->temp_hyst[nr] = temp_to_reg(val); |
553 | f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]); | |
f0819184 | 554 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
555 | |
556 | return count; | |
557 | } | |
558 | ||
e53004e2 JD |
559 | static ssize_t show_alarms_in(struct device *dev, struct device_attribute |
560 | *devattr, char *buf) | |
561 | { | |
562 | struct f71805f_data *data = f71805f_update_device(dev); | |
563 | ||
564 | return sprintf(buf, "%d\n", data->alarms[0] | | |
565 | ((data->alarms[1] & 0x01) << 8)); | |
566 | } | |
567 | ||
568 | static ssize_t show_alarms_fan(struct device *dev, struct device_attribute | |
569 | *devattr, char *buf) | |
570 | { | |
571 | struct f71805f_data *data = f71805f_update_device(dev); | |
572 | ||
573 | return sprintf(buf, "%d\n", data->alarms[2] & 0x07); | |
574 | } | |
575 | ||
576 | static ssize_t show_alarms_temp(struct device *dev, struct device_attribute | |
577 | *devattr, char *buf) | |
578 | { | |
579 | struct f71805f_data *data = f71805f_update_device(dev); | |
580 | ||
581 | return sprintf(buf, "%d\n", (data->alarms[1] >> 3) & 0x07); | |
582 | } | |
583 | ||
e53004e2 JD |
584 | static ssize_t show_name(struct device *dev, struct device_attribute |
585 | *devattr, char *buf) | |
586 | { | |
587 | struct f71805f_data *data = dev_get_drvdata(dev); | |
588 | ||
589 | return sprintf(buf, "%s\n", data->name); | |
590 | } | |
591 | ||
2488a39d JD |
592 | static struct device_attribute f71805f_dev_attr[] = { |
593 | __ATTR(in0_input, S_IRUGO, show_in0, NULL), | |
594 | __ATTR(in0_max, S_IRUGO| S_IWUSR, show_in0_max, set_in0_max), | |
595 | __ATTR(in0_min, S_IRUGO| S_IWUSR, show_in0_min, set_in0_min), | |
596 | __ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL), | |
597 | __ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL), | |
598 | __ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL), | |
599 | __ATTR(name, S_IRUGO, show_name, NULL), | |
600 | }; | |
601 | ||
602 | static struct sensor_device_attribute f71805f_sensor_attr[] = { | |
603 | SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1), | |
604 | SENSOR_ATTR(in1_max, S_IRUGO | S_IWUSR, | |
605 | show_in_max, set_in_max, 1), | |
606 | SENSOR_ATTR(in1_min, S_IRUGO | S_IWUSR, | |
607 | show_in_min, set_in_min, 1), | |
608 | SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2), | |
609 | SENSOR_ATTR(in2_max, S_IRUGO | S_IWUSR, | |
610 | show_in_max, set_in_max, 2), | |
611 | SENSOR_ATTR(in2_min, S_IRUGO | S_IWUSR, | |
612 | show_in_min, set_in_min, 2), | |
613 | SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3), | |
614 | SENSOR_ATTR(in3_max, S_IRUGO | S_IWUSR, | |
615 | show_in_max, set_in_max, 3), | |
616 | SENSOR_ATTR(in3_min, S_IRUGO | S_IWUSR, | |
617 | show_in_min, set_in_min, 3), | |
618 | SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4), | |
619 | SENSOR_ATTR(in4_max, S_IRUGO | S_IWUSR, | |
620 | show_in_max, set_in_max, 4), | |
621 | SENSOR_ATTR(in4_min, S_IRUGO | S_IWUSR, | |
622 | show_in_min, set_in_min, 4), | |
623 | SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5), | |
624 | SENSOR_ATTR(in5_max, S_IRUGO | S_IWUSR, | |
625 | show_in_max, set_in_max, 5), | |
626 | SENSOR_ATTR(in5_min, S_IRUGO | S_IWUSR, | |
627 | show_in_min, set_in_min, 5), | |
628 | SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6), | |
629 | SENSOR_ATTR(in6_max, S_IRUGO | S_IWUSR, | |
630 | show_in_max, set_in_max, 6), | |
631 | SENSOR_ATTR(in6_min, S_IRUGO | S_IWUSR, | |
632 | show_in_min, set_in_min, 6), | |
633 | SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7), | |
634 | SENSOR_ATTR(in7_max, S_IRUGO | S_IWUSR, | |
635 | show_in_max, set_in_max, 7), | |
636 | SENSOR_ATTR(in7_min, S_IRUGO | S_IWUSR, | |
637 | show_in_min, set_in_min, 7), | |
638 | SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8), | |
639 | SENSOR_ATTR(in8_max, S_IRUGO | S_IWUSR, | |
640 | show_in_max, set_in_max, 8), | |
641 | SENSOR_ATTR(in8_min, S_IRUGO | S_IWUSR, | |
642 | show_in_min, set_in_min, 8), | |
643 | ||
644 | SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0), | |
645 | SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, | |
646 | show_temp_max, set_temp_max, 0), | |
647 | SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, | |
648 | show_temp_hyst, set_temp_hyst, 0), | |
649 | SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0), | |
650 | SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1), | |
651 | SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, | |
652 | show_temp_max, set_temp_max, 1), | |
653 | SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, | |
654 | show_temp_hyst, set_temp_hyst, 1), | |
655 | SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1), | |
656 | SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2), | |
657 | SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, | |
658 | show_temp_max, set_temp_max, 2), | |
659 | SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, | |
660 | show_temp_hyst, set_temp_hyst, 2), | |
661 | SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2), | |
662 | }; | |
663 | ||
664 | static struct sensor_device_attribute f71805f_fan_attr[] = { | |
665 | SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0), | |
666 | SENSOR_ATTR(fan1_min, S_IRUGO | S_IWUSR, | |
667 | show_fan_min, set_fan_min, 0), | |
668 | SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1), | |
669 | SENSOR_ATTR(fan2_min, S_IRUGO | S_IWUSR, | |
670 | show_fan_min, set_fan_min, 1), | |
671 | SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2), | |
672 | SENSOR_ATTR(fan3_min, S_IRUGO | S_IWUSR, | |
673 | show_fan_min, set_fan_min, 2), | |
674 | }; | |
e53004e2 JD |
675 | |
676 | /* | |
677 | * Device registration and initialization | |
678 | */ | |
679 | ||
680 | static void __devinit f71805f_init_device(struct f71805f_data *data) | |
681 | { | |
682 | u8 reg; | |
683 | int i; | |
684 | ||
685 | reg = f71805f_read8(data, F71805F_REG_START); | |
686 | if ((reg & 0x41) != 0x01) { | |
687 | printk(KERN_DEBUG DRVNAME ": Starting monitoring " | |
688 | "operations\n"); | |
689 | f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40); | |
690 | } | |
691 | ||
692 | /* Fan monitoring can be disabled. If it is, we won't be polling | |
693 | the register values, and won't create the related sysfs files. */ | |
694 | for (i = 0; i < 3; i++) { | |
695 | reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(i)); | |
696 | if (!(reg & 0x80)) | |
697 | data->fan_enabled |= (1 << i); | |
698 | } | |
699 | } | |
700 | ||
701 | static int __devinit f71805f_probe(struct platform_device *pdev) | |
702 | { | |
703 | struct f71805f_data *data; | |
704 | struct resource *res; | |
2488a39d | 705 | int i, err; |
e53004e2 JD |
706 | |
707 | if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) { | |
708 | err = -ENOMEM; | |
709 | printk(KERN_ERR DRVNAME ": Out of memory\n"); | |
710 | goto exit; | |
711 | } | |
712 | ||
713 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
714 | data->addr = res->start; | |
f0819184 | 715 | mutex_init(&data->lock); |
e53004e2 | 716 | data->name = "f71805f"; |
f0819184 | 717 | mutex_init(&data->update_lock); |
e53004e2 JD |
718 | |
719 | platform_set_drvdata(pdev, data); | |
720 | ||
721 | data->class_dev = hwmon_device_register(&pdev->dev); | |
722 | if (IS_ERR(data->class_dev)) { | |
723 | err = PTR_ERR(data->class_dev); | |
724 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); | |
725 | goto exit_free; | |
726 | } | |
727 | ||
728 | /* Initialize the F71805F chip */ | |
729 | f71805f_init_device(data); | |
730 | ||
731 | /* Register sysfs interface files */ | |
2488a39d JD |
732 | for (i = 0; i < ARRAY_SIZE(f71805f_dev_attr); i++) { |
733 | err = device_create_file(&pdev->dev, &f71805f_dev_attr[i]); | |
734 | if (err) | |
735 | goto exit_class; | |
e53004e2 | 736 | } |
2488a39d JD |
737 | for (i = 0; i < ARRAY_SIZE(f71805f_sensor_attr); i++) { |
738 | err = device_create_file(&pdev->dev, | |
739 | &f71805f_sensor_attr[i].dev_attr); | |
740 | if (err) | |
741 | goto exit_class; | |
e53004e2 | 742 | } |
2488a39d JD |
743 | for (i = 0; i < ARRAY_SIZE(f71805f_fan_attr); i++) { |
744 | if (!(data->fan_enabled & (1 << (i / 2)))) | |
745 | continue; | |
746 | err = device_create_file(&pdev->dev, | |
747 | &f71805f_fan_attr[i].dev_attr); | |
748 | if (err) | |
749 | goto exit_class; | |
e53004e2 | 750 | } |
e53004e2 JD |
751 | |
752 | return 0; | |
753 | ||
2488a39d JD |
754 | exit_class: |
755 | dev_err(&pdev->dev, "Sysfs interface creation failed\n"); | |
756 | hwmon_device_unregister(data->class_dev); | |
e53004e2 JD |
757 | exit_free: |
758 | kfree(data); | |
759 | exit: | |
760 | return err; | |
761 | } | |
762 | ||
763 | static int __devexit f71805f_remove(struct platform_device *pdev) | |
764 | { | |
765 | struct f71805f_data *data = platform_get_drvdata(pdev); | |
766 | ||
767 | platform_set_drvdata(pdev, NULL); | |
768 | hwmon_device_unregister(data->class_dev); | |
769 | kfree(data); | |
770 | ||
771 | return 0; | |
772 | } | |
773 | ||
774 | static struct platform_driver f71805f_driver = { | |
775 | .driver = { | |
776 | .owner = THIS_MODULE, | |
777 | .name = DRVNAME, | |
778 | }, | |
779 | .probe = f71805f_probe, | |
780 | .remove = __devexit_p(f71805f_remove), | |
781 | }; | |
782 | ||
783 | static int __init f71805f_device_add(unsigned short address) | |
784 | { | |
785 | int err; | |
786 | ||
787 | pdev = platform_device_alloc(DRVNAME, address); | |
788 | if (!pdev) { | |
789 | err = -ENOMEM; | |
790 | printk(KERN_ERR DRVNAME ": Device allocation failed\n"); | |
791 | goto exit; | |
792 | } | |
793 | ||
794 | f71805f_resource.start = address; | |
795 | f71805f_resource.end = address + REGION_LENGTH - 1; | |
796 | f71805f_resource.name = pdev->name; | |
797 | err = platform_device_add_resources(pdev, &f71805f_resource, 1); | |
798 | if (err) { | |
799 | printk(KERN_ERR DRVNAME ": Device resource addition failed " | |
800 | "(%d)\n", err); | |
801 | goto exit_device_put; | |
802 | } | |
803 | ||
804 | err = platform_device_add(pdev); | |
805 | if (err) { | |
806 | printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", | |
807 | err); | |
808 | goto exit_device_put; | |
809 | } | |
810 | ||
811 | return 0; | |
812 | ||
813 | exit_device_put: | |
814 | platform_device_put(pdev); | |
815 | exit: | |
816 | return err; | |
817 | } | |
818 | ||
819 | static int __init f71805f_find(int sioaddr, unsigned short *address) | |
820 | { | |
821 | int err = -ENODEV; | |
822 | u16 devid; | |
823 | ||
824 | superio_enter(sioaddr); | |
825 | ||
826 | devid = superio_inw(sioaddr, SIO_REG_MANID); | |
827 | if (devid != SIO_FINTEK_ID) | |
828 | goto exit; | |
829 | ||
830 | devid = superio_inw(sioaddr, SIO_REG_DEVID); | |
831 | if (devid != SIO_F71805F_ID) { | |
832 | printk(KERN_INFO DRVNAME ": Unsupported Fintek device, " | |
833 | "skipping\n"); | |
834 | goto exit; | |
835 | } | |
836 | ||
837 | superio_select(sioaddr, F71805F_LD_HWM); | |
838 | if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { | |
839 | printk(KERN_WARNING DRVNAME ": Device not activated, " | |
840 | "skipping\n"); | |
841 | goto exit; | |
842 | } | |
843 | ||
844 | *address = superio_inw(sioaddr, SIO_REG_ADDR); | |
845 | if (*address == 0) { | |
846 | printk(KERN_WARNING DRVNAME ": Base address not set, " | |
847 | "skipping\n"); | |
848 | goto exit; | |
849 | } | |
850 | ||
851 | err = 0; | |
852 | printk(KERN_INFO DRVNAME ": Found F71805F chip at %#x, revision %u\n", | |
853 | *address, superio_inb(sioaddr, SIO_REG_DEVREV)); | |
854 | ||
855 | exit: | |
856 | superio_exit(sioaddr); | |
857 | return err; | |
858 | } | |
859 | ||
860 | static int __init f71805f_init(void) | |
861 | { | |
862 | int err; | |
863 | unsigned short address; | |
864 | ||
865 | if (f71805f_find(0x2e, &address) | |
866 | && f71805f_find(0x4e, &address)) | |
867 | return -ENODEV; | |
868 | ||
869 | err = platform_driver_register(&f71805f_driver); | |
870 | if (err) | |
871 | goto exit; | |
872 | ||
873 | /* Sets global pdev as a side effect */ | |
874 | err = f71805f_device_add(address); | |
875 | if (err) | |
876 | goto exit_driver; | |
877 | ||
878 | return 0; | |
879 | ||
880 | exit_driver: | |
881 | platform_driver_unregister(&f71805f_driver); | |
882 | exit: | |
883 | return err; | |
884 | } | |
885 | ||
886 | static void __exit f71805f_exit(void) | |
887 | { | |
888 | platform_device_unregister(pdev); | |
889 | platform_driver_unregister(&f71805f_driver); | |
890 | } | |
891 | ||
892 | MODULE_AUTHOR("Jean Delvare <khali@linux-fr>"); | |
893 | MODULE_LICENSE("GPL"); | |
894 | MODULE_DESCRIPTION("F71805F hardware monitoring driver"); | |
895 | ||
896 | module_init(f71805f_init); | |
897 | module_exit(f71805f_exit); |