hwmon/f71882fg: Only allow negative auto point temps if fan_neg_temp is enabled
[deliverable/linux.git] / drivers / hwmon / f71882fg.c
CommitLineData
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1/***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
44c4dc52 3 * Copyright (C) 2007-2011 Hans de Goede <hdegoede@redhat.com> *
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4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20
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21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
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23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/slab.h>
26#include <linux/jiffies.h>
27#include <linux/platform_device.h>
28#include <linux/hwmon.h>
29#include <linux/hwmon-sysfs.h>
30#include <linux/err.h>
31#include <linux/mutex.h>
77a4a3e2 32#include <linux/io.h>
b9acb64a 33#include <linux/acpi.h>
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34
35#define DRVNAME "f71882fg"
36
09475d32 37#define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
77a4a3e2 38#define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
45fb3669 39#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
14a4019d 40#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
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41
42#define SIO_REG_LDSEL 0x07 /* Logical device select */
43#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
44#define SIO_REG_DEVREV 0x22 /* Device revision */
45#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
46#define SIO_REG_ENABLE 0x30 /* Logical device enable */
47#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
48
49#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
09475d32 50#define SIO_F71858_ID 0x0507 /* Chipset ID */
498be968 51#define SIO_F71862_ID 0x0601 /* Chipset ID */
45fb3669 52#define SIO_F71882_ID 0x0541 /* Chipset ID */
7669896f 53#define SIO_F71889_ID 0x0723 /* Chipset ID */
ed4f7c20 54#define SIO_F8000_ID 0x0581 /* Chipset ID */
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55
56#define REGION_LENGTH 8
57#define ADDR_REG_OFFSET 5
58#define DATA_REG_OFFSET 6
59
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60#define F71882FG_REG_IN_STATUS 0x12 /* f71882fg only */
61#define F71882FG_REG_IN_BEEP 0x13 /* f71882fg only */
45fb3669 62#define F71882FG_REG_IN(nr) (0x20 + (nr))
498be968 63#define F71882FG_REG_IN1_HIGH 0x32 /* f71882fg only */
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64
65#define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
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66#define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
67#define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
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68#define F71882FG_REG_FAN_STATUS 0x92
69#define F71882FG_REG_FAN_BEEP 0x93
70
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71#define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
72#define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
73#define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
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74#define F71882FG_REG_TEMP_STATUS 0x62
75#define F71882FG_REG_TEMP_BEEP 0x63
09475d32 76#define F71882FG_REG_TEMP_CONFIG 0x69
bc27490f 77#define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
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78#define F71882FG_REG_TEMP_TYPE 0x6B
79#define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
80
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81#define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
82#define F71882FG_REG_PWM_TYPE 0x94
83#define F71882FG_REG_PWM_ENABLE 0x96
84
bc27490f 85#define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
9ab796eb 86
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87#define F71882FG_REG_FAN_FAULT_T 0x9F
88#define F71882FG_FAN_NEG_TEMP_EN 0x20
89
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90#define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
91#define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
92#define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
93
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94#define F71882FG_REG_START 0x01
95
96#define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
97
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98static unsigned short force_id;
99module_param(force_id, ushort, 0);
100MODULE_PARM_DESC(force_id, "Override the detected device ID");
101
f2e41e91 102enum chips { f71858fg, f71862fg, f71882fg, f71889fg, f8000 };
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103
104static const char *f71882fg_names[] = {
09475d32 105 "f71858fg",
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106 "f71862fg",
107 "f71882fg",
7669896f 108 "f71889fg",
ed4f7c20 109 "f8000",
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110};
111
77a4a3e2 112static struct platform_device *f71882fg_pdev;
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113
114/* Super-I/O Function prototypes */
115static inline int superio_inb(int base, int reg);
116static inline int superio_inw(int base, int reg);
cadb8657 117static inline int superio_enter(int base);
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118static inline void superio_select(int base, int ld);
119static inline void superio_exit(int base);
120
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121struct f71882fg_sio_data {
122 enum chips type;
123};
124
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125struct f71882fg_data {
126 unsigned short addr;
498be968 127 enum chips type;
1beeffe4 128 struct device *hwmon_dev;
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129
130 struct mutex update_lock;
09475d32 131 int temp_start; /* temp numbering start (0 or 1) */
45fb3669 132 char valid; /* !=0 if following fields are valid */
98f7ba19 133 char auto_point_temp_signed;
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134 unsigned long last_updated; /* In jiffies */
135 unsigned long last_limits; /* In jiffies */
136
137 /* Register Values */
138 u8 in[9];
139 u8 in1_max;
140 u8 in_status;
141 u8 in_beep;
142 u16 fan[4];
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143 u16 fan_target[4];
144 u16 fan_full_speed[4];
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145 u8 fan_status;
146 u8 fan_beep;
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147 /* Note: all models have only 3 temperature channels, but on some
148 they are addressed as 0-2 and on others as 1-3, so for coding
149 convenience we reserve space for 4 channels */
09475d32 150 u16 temp[4];
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151 u8 temp_ovt[4];
152 u8 temp_high[4];
bc27490f 153 u8 temp_hyst[2]; /* 2 hysts stored per reg */
7567a043 154 u8 temp_type[4];
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155 u8 temp_status;
156 u8 temp_beep;
157 u8 temp_diode_open;
09475d32 158 u8 temp_config;
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159 u8 pwm[4];
160 u8 pwm_enable;
161 u8 pwm_auto_point_hyst[2];
162 u8 pwm_auto_point_mapping[4];
163 u8 pwm_auto_point_pwm[4][5];
7669896f 164 s8 pwm_auto_point_temp[4][4];
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165};
166
77a4a3e2 167/* Sysfs in */
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168static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
169 char *buf);
170static ssize_t show_in_max(struct device *dev, struct device_attribute
171 *devattr, char *buf);
172static ssize_t store_in_max(struct device *dev, struct device_attribute
173 *devattr, const char *buf, size_t count);
174static ssize_t show_in_beep(struct device *dev, struct device_attribute
175 *devattr, char *buf);
176static ssize_t store_in_beep(struct device *dev, struct device_attribute
177 *devattr, const char *buf, size_t count);
178static ssize_t show_in_alarm(struct device *dev, struct device_attribute
179 *devattr, char *buf);
180/* Sysfs Fan */
181static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
182 char *buf);
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183static ssize_t show_fan_full_speed(struct device *dev,
184 struct device_attribute *devattr, char *buf);
185static ssize_t store_fan_full_speed(struct device *dev,
186 struct device_attribute *devattr, const char *buf, size_t count);
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187static ssize_t show_fan_beep(struct device *dev, struct device_attribute
188 *devattr, char *buf);
189static ssize_t store_fan_beep(struct device *dev, struct device_attribute
190 *devattr, const char *buf, size_t count);
191static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
192 *devattr, char *buf);
193/* Sysfs Temp */
194static ssize_t show_temp(struct device *dev, struct device_attribute
195 *devattr, char *buf);
196static ssize_t show_temp_max(struct device *dev, struct device_attribute
197 *devattr, char *buf);
198static ssize_t store_temp_max(struct device *dev, struct device_attribute
199 *devattr, const char *buf, size_t count);
200static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
201 *devattr, char *buf);
202static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
203 *devattr, const char *buf, size_t count);
204static ssize_t show_temp_crit(struct device *dev, struct device_attribute
205 *devattr, char *buf);
206static ssize_t store_temp_crit(struct device *dev, struct device_attribute
207 *devattr, const char *buf, size_t count);
208static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
209 *devattr, char *buf);
210static ssize_t show_temp_type(struct device *dev, struct device_attribute
211 *devattr, char *buf);
212static ssize_t show_temp_beep(struct device *dev, struct device_attribute
213 *devattr, char *buf);
214static ssize_t store_temp_beep(struct device *dev, struct device_attribute
215 *devattr, const char *buf, size_t count);
216static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
217 *devattr, char *buf);
218static ssize_t show_temp_fault(struct device *dev, struct device_attribute
219 *devattr, char *buf);
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220/* PWM and Auto point control */
221static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
222 char *buf);
223static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
224 const char *buf, size_t count);
225static ssize_t show_pwm_enable(struct device *dev,
226 struct device_attribute *devattr, char *buf);
227static ssize_t store_pwm_enable(struct device *dev,
228 struct device_attribute *devattr, const char *buf, size_t count);
229static ssize_t show_pwm_interpolate(struct device *dev,
230 struct device_attribute *devattr, char *buf);
231static ssize_t store_pwm_interpolate(struct device *dev,
232 struct device_attribute *devattr, const char *buf, size_t count);
233static ssize_t show_pwm_auto_point_channel(struct device *dev,
234 struct device_attribute *devattr, char *buf);
235static ssize_t store_pwm_auto_point_channel(struct device *dev,
236 struct device_attribute *devattr, const char *buf, size_t count);
237static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
238 struct device_attribute *devattr, char *buf);
239static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
240 struct device_attribute *devattr, const char *buf, size_t count);
241static ssize_t show_pwm_auto_point_pwm(struct device *dev,
242 struct device_attribute *devattr, char *buf);
243static ssize_t store_pwm_auto_point_pwm(struct device *dev,
244 struct device_attribute *devattr, const char *buf, size_t count);
245static ssize_t show_pwm_auto_point_temp(struct device *dev,
246 struct device_attribute *devattr, char *buf);
247static ssize_t store_pwm_auto_point_temp(struct device *dev,
248 struct device_attribute *devattr, const char *buf, size_t count);
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249/* Sysfs misc */
250static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
251 char *buf);
252
253static int __devinit f71882fg_probe(struct platform_device * pdev);
c13548c5 254static int f71882fg_remove(struct platform_device *pdev);
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255
256static struct platform_driver f71882fg_driver = {
257 .driver = {
258 .owner = THIS_MODULE,
259 .name = DRVNAME,
260 },
261 .probe = f71882fg_probe,
cd659fd0 262 .remove = f71882fg_remove,
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263};
264
c13548c5 265static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
45fb3669 266
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267/* Temp and in attr for the f71858fg, the f71858fg is special as it
268 has its temperature indexes start at 0 (the others start at 1) and
269 it only has 3 voltage inputs */
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270static struct sensor_device_attribute_2 f71858fg_in_temp_attr[] = {
271 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
272 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
273 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
274 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
275 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
276 store_temp_max, 0, 0),
277 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
278 store_temp_max_hyst, 0, 0),
279 SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
280 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
281 store_temp_crit, 0, 0),
282 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
283 0, 0),
284 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
285 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
286 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
287 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
288 store_temp_max, 0, 1),
289 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
290 store_temp_max_hyst, 0, 1),
291 SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
292 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
293 store_temp_crit, 0, 1),
294 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
295 0, 1),
296 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
297 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 1),
298 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
299 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
300 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
301 store_temp_max, 0, 2),
302 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
303 store_temp_max_hyst, 0, 2),
304 SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
305 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
306 store_temp_crit, 0, 2),
307 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
308 0, 2),
309 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
310 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
311};
312
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313/* Temp and in attr common to the f71862fg, f71882fg and f71889fg */
314static struct sensor_device_attribute_2 fxxxx_in_temp_attr[] = {
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315 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
316 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
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317 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
318 SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
319 SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
320 SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
321 SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
322 SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
323 SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
7567a043 324 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
bc37ae71 325 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 326 store_temp_max, 0, 1),
bc37ae71 327 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 328 store_temp_max_hyst, 0, 1),
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329 /* Should really be temp1_max_alarm, but older versions did not handle
330 the max and crit alarms separately and lm_sensors v2 depends on the
331 presence of temp#_alarm files. The same goes for temp2/3 _alarm. */
332 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
333 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
334 store_temp_beep, 0, 1),
bc37ae71 335 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 336 store_temp_crit, 0, 1),
bc37ae71 337 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 338 0, 1),
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339 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
340 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
341 store_temp_beep, 0, 5),
7567a043 342 SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
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343 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
344 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
bc37ae71 345 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 346 store_temp_max, 0, 2),
bc37ae71 347 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 348 store_temp_max_hyst, 0, 2),
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349 /* Should be temp2_max_alarm, see temp1_alarm note */
350 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
351 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
352 store_temp_beep, 0, 2),
bc37ae71 353 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 354 store_temp_crit, 0, 2),
bc37ae71 355 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 356 0, 2),
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357 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
358 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
359 store_temp_beep, 0, 6),
7567a043 360 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
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361 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
362 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
bc37ae71 363 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 364 store_temp_max, 0, 3),
bc37ae71 365 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 366 store_temp_max_hyst, 0, 3),
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367 /* Should be temp3_max_alarm, see temp1_alarm note */
368 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
369 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
370 store_temp_beep, 0, 3),
bc37ae71 371 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 372 store_temp_crit, 0, 3),
bc37ae71 373 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 374 0, 3),
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375 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
376 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
377 store_temp_beep, 0, 7),
7567a043 378 SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
7567a043 379 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
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380};
381
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382/* For models with in1 alarm capability */
383static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
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384 SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
385 0, 1),
386 SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
387 0, 1),
388 SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
389};
390
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391/* Temp and in attr for the f8000
392 Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
393 is used as hysteresis value to clear alarms
66344aa6 394 Also like the f71858fg its temperature indexes start at 0
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395 */
396static struct sensor_device_attribute_2 f8000_in_temp_attr[] = {
397 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
398 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
399 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
400 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
401 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
402 store_temp_crit, 0, 0),
403 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
404 store_temp_max, 0, 0),
405 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
b6858bca 406 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
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407 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
408 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
409 store_temp_crit, 0, 1),
410 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
411 store_temp_max, 0, 1),
412 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
413 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 1),
b6858bca 414 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
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415 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
416 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
417 store_temp_crit, 0, 2),
418 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
419 store_temp_max, 0, 2),
420 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
b6858bca 421 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
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422};
423
424/* Fan / PWM attr common to all models */
b69b0399 425static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
bc37ae71 426 SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
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427 SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
428 show_fan_full_speed,
429 store_fan_full_speed, 0, 0),
bc37ae71 430 SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
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431 SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
432 SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
433 store_pwm_enable, 0, 0),
434 SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
435 show_pwm_interpolate, store_pwm_interpolate, 0, 0),
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436}, {
437 SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
438 SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
439 show_fan_full_speed,
440 store_fan_full_speed, 0, 1),
441 SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
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442 SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
443 SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
444 store_pwm_enable, 0, 1),
445 SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
446 show_pwm_interpolate, store_pwm_interpolate, 0, 1),
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447}, {
448 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
449 SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
450 show_fan_full_speed,
451 store_fan_full_speed, 0, 2),
452 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
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453 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
454 SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
455 store_pwm_enable, 0, 2),
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456 SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
457 show_pwm_interpolate, store_pwm_interpolate, 0, 2),
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458}, {
459 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
460 SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
461 show_fan_full_speed,
462 store_fan_full_speed, 0, 3),
463 SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
464 SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
465 SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
466 store_pwm_enable, 0, 3),
467 SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
468 show_pwm_interpolate, store_pwm_interpolate, 0, 3),
469} };
498be968 470
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471/* Attr for models which can beep on Fan alarm */
472static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
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473 SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
474 store_fan_beep, 0, 0),
475 SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
476 store_fan_beep, 0, 1),
477 SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
478 store_fan_beep, 0, 2),
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479 SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
480 store_fan_beep, 0, 3),
66344aa6 481};
ed4f7c20 482
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483/* PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
484 f71858fg / f71882fg / f71889fg */
485static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[] = {
486 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
487 show_pwm_auto_point_channel,
488 store_pwm_auto_point_channel, 0, 0),
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489 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
490 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
491 1, 0),
492 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
493 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
494 4, 0),
495 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
496 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
497 0, 0),
498 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
499 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
500 3, 0),
501 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
502 show_pwm_auto_point_temp_hyst,
503 store_pwm_auto_point_temp_hyst,
504 0, 0),
505 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
506 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
507
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508 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
509 show_pwm_auto_point_channel,
510 store_pwm_auto_point_channel, 0, 1),
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511 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
512 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
513 1, 1),
514 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
515 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
516 4, 1),
517 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
518 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
519 0, 1),
520 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
521 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
522 3, 1),
523 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
524 show_pwm_auto_point_temp_hyst,
525 store_pwm_auto_point_temp_hyst,
526 0, 1),
527 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
528 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
4901062f 529
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530 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
531 show_pwm_auto_point_channel,
532 store_pwm_auto_point_channel, 0, 2),
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533 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
534 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
535 1, 2),
536 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
537 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
538 4, 2),
539 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
540 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
541 0, 2),
542 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
543 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
544 3, 2),
545 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
546 show_pwm_auto_point_temp_hyst,
547 store_pwm_auto_point_temp_hyst,
548 0, 2),
549 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
550 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
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551};
552
66344aa6 553/* PWM attr common to the f71858fg, f71882fg and f71889fg */
b69b0399 554static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
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555 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
556 show_pwm_auto_point_channel,
557 store_pwm_auto_point_channel, 0, 0),
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558 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
559 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
560 0, 0),
561 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
562 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
563 1, 0),
564 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
565 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
566 2, 0),
567 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
568 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
569 3, 0),
570 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
571 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
572 4, 0),
573 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
574 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
575 0, 0),
576 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
577 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
578 1, 0),
579 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
580 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
581 2, 0),
582 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
583 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
584 3, 0),
585 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
586 show_pwm_auto_point_temp_hyst,
587 store_pwm_auto_point_temp_hyst,
588 0, 0),
589 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
590 show_pwm_auto_point_temp_hyst, NULL, 1, 0),
591 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
592 show_pwm_auto_point_temp_hyst, NULL, 2, 0),
593 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
594 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
b69b0399 595}, {
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596 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
597 show_pwm_auto_point_channel,
598 store_pwm_auto_point_channel, 0, 1),
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599 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
600 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
601 0, 1),
602 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
603 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
604 1, 1),
605 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
606 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
607 2, 1),
608 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
609 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
610 3, 1),
611 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
612 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
613 4, 1),
614 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
615 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
616 0, 1),
617 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
618 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
619 1, 1),
620 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
621 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
622 2, 1),
623 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
624 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
625 3, 1),
626 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
627 show_pwm_auto_point_temp_hyst,
628 store_pwm_auto_point_temp_hyst,
629 0, 1),
630 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
631 show_pwm_auto_point_temp_hyst, NULL, 1, 1),
632 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
633 show_pwm_auto_point_temp_hyst, NULL, 2, 1),
634 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
635 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
b69b0399 636}, {
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637 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
638 show_pwm_auto_point_channel,
639 store_pwm_auto_point_channel, 0, 2),
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640 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
641 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
642 0, 2),
643 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
644 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
645 1, 2),
646 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
647 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
648 2, 2),
649 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
650 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
651 3, 2),
652 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
653 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
654 4, 2),
655 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
656 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
657 0, 2),
658 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
659 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
660 1, 2),
661 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
662 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
663 2, 2),
664 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
665 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
666 3, 2),
667 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
668 show_pwm_auto_point_temp_hyst,
669 store_pwm_auto_point_temp_hyst,
670 0, 2),
671 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
672 show_pwm_auto_point_temp_hyst, NULL, 1, 2),
673 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
674 show_pwm_auto_point_temp_hyst, NULL, 2, 2),
675 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
676 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
b69b0399 677}, {
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678 SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
679 show_pwm_auto_point_channel,
680 store_pwm_auto_point_channel, 0, 3),
681 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
682 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
683 0, 3),
684 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
685 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
686 1, 3),
687 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
688 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
689 2, 3),
690 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
691 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
692 3, 3),
693 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
694 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
695 4, 3),
696 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
697 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
698 0, 3),
699 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
700 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
701 1, 3),
702 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
703 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
704 2, 3),
705 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
706 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
707 3, 3),
708 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
709 show_pwm_auto_point_temp_hyst,
710 store_pwm_auto_point_temp_hyst,
711 0, 3),
712 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
713 show_pwm_auto_point_temp_hyst, NULL, 1, 3),
714 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
715 show_pwm_auto_point_temp_hyst, NULL, 2, 3),
716 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
717 show_pwm_auto_point_temp_hyst, NULL, 3, 3),
b69b0399 718} };
45fb3669 719
66344aa6 720/* Fan attr specific to the f8000 (4th fan input can only measure speed) */
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721static struct sensor_device_attribute_2 f8000_fan_attr[] = {
722 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
66344aa6 723};
ed4f7c20 724
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725/* PWM attr for the f8000, zones mapped to temp instead of to pwm!
726 Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
727 F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0 */
728static struct sensor_device_attribute_2 f8000_auto_pwm_attr[] = {
729 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
730 show_pwm_auto_point_channel,
731 store_pwm_auto_point_channel, 0, 0),
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HG
732 SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
733 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
734 0, 2),
735 SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
736 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
737 1, 2),
738 SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
739 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
740 2, 2),
741 SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
742 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
743 3, 2),
744 SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
745 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
746 4, 2),
747 SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
748 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
749 0, 2),
750 SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
751 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
752 1, 2),
753 SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
754 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
755 2, 2),
756 SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
757 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
758 3, 2),
759 SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
760 show_pwm_auto_point_temp_hyst,
761 store_pwm_auto_point_temp_hyst,
762 0, 2),
763 SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
764 show_pwm_auto_point_temp_hyst, NULL, 1, 2),
765 SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
766 show_pwm_auto_point_temp_hyst, NULL, 2, 2),
767 SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
768 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
769
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HG
770 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
771 show_pwm_auto_point_channel,
772 store_pwm_auto_point_channel, 0, 1),
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HG
773 SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
774 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
775 0, 0),
776 SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
777 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
778 1, 0),
779 SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
780 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
781 2, 0),
782 SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
783 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
784 3, 0),
785 SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
786 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
787 4, 0),
788 SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
789 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
790 0, 0),
791 SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
792 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
793 1, 0),
794 SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
795 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
796 2, 0),
797 SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
798 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
799 3, 0),
800 SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
801 show_pwm_auto_point_temp_hyst,
802 store_pwm_auto_point_temp_hyst,
803 0, 0),
804 SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
805 show_pwm_auto_point_temp_hyst, NULL, 1, 0),
806 SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
807 show_pwm_auto_point_temp_hyst, NULL, 2, 0),
808 SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
809 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
810
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HG
811 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
812 show_pwm_auto_point_channel,
813 store_pwm_auto_point_channel, 0, 2),
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HG
814 SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
815 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
816 0, 1),
817 SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
818 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
819 1, 1),
820 SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
821 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
822 2, 1),
823 SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
824 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
825 3, 1),
826 SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
827 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
828 4, 1),
829 SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
830 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
831 0, 1),
832 SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
833 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
834 1, 1),
835 SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
836 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
837 2, 1),
838 SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
839 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
840 3, 1),
841 SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
842 show_pwm_auto_point_temp_hyst,
843 store_pwm_auto_point_temp_hyst,
844 0, 1),
845 SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
846 show_pwm_auto_point_temp_hyst, NULL, 1, 1),
847 SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
848 show_pwm_auto_point_temp_hyst, NULL, 2, 1),
849 SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
850 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
851};
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852
853/* Super I/O functions */
854static inline int superio_inb(int base, int reg)
855{
856 outb(reg, base);
857 return inb(base + 1);
858}
859
860static int superio_inw(int base, int reg)
861{
862 int val;
bd328acd
GS
863 val = superio_inb(base, reg) << 8;
864 val |= superio_inb(base, reg + 1);
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HG
865 return val;
866}
867
cadb8657 868static inline int superio_enter(int base)
45fb3669 869{
cadb8657
GS
870 /* Don't step on other drivers' I/O space by accident */
871 if (!request_muxed_region(base, 2, DRVNAME)) {
22d3b412 872 pr_err("I/O address 0x%04x already in use\n", base);
cadb8657
GS
873 return -EBUSY;
874 }
875
45fb3669 876 /* according to the datasheet the key must be send twice! */
162bb59e
GS
877 outb(SIO_UNLOCK_KEY, base);
878 outb(SIO_UNLOCK_KEY, base);
cadb8657
GS
879
880 return 0;
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HG
881}
882
162bb59e 883static inline void superio_select(int base, int ld)
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HG
884{
885 outb(SIO_REG_LDSEL, base);
886 outb(ld, base + 1);
887}
888
889static inline void superio_exit(int base)
890{
891 outb(SIO_LOCK_KEY, base);
cadb8657 892 release_region(base, 2);
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HG
893}
894
2f650631 895static inline int fan_from_reg(u16 reg)
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HG
896{
897 return reg ? (1500000 / reg) : 0;
898}
899
2f650631 900static inline u16 fan_to_reg(int fan)
9ab796eb
MD
901{
902 return fan ? (1500000 / fan) : 0;
903}
904
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HG
905static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
906{
907 u8 val;
908
909 outb(reg, data->addr + ADDR_REG_OFFSET);
910 val = inb(data->addr + DATA_REG_OFFSET);
911
912 return val;
913}
914
915static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
916{
917 u16 val;
918
bd328acd
GS
919 val = f71882fg_read8(data, reg) << 8;
920 val |= f71882fg_read8(data, reg + 1);
45fb3669
HG
921
922 return val;
923}
924
925static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
926{
927 outb(reg, data->addr + ADDR_REG_OFFSET);
928 outb(val, data->addr + DATA_REG_OFFSET);
929}
930
9ab796eb
MD
931static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
932{
bd328acd
GS
933 f71882fg_write8(data, reg, val >> 8);
934 f71882fg_write8(data, reg + 1, val & 0xff);
9ab796eb
MD
935}
936
09475d32
HG
937static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
938{
939 if (data->type == f71858fg)
940 return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
941 else
942 return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
943}
944
77a4a3e2 945static struct f71882fg_data *f71882fg_update_device(struct device *dev)
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HG
946{
947 struct f71882fg_data *data = dev_get_drvdata(dev);
44c4dc52 948 int nr, reg;
ed4f7c20 949 int nr_fans = (data->type == f71882fg) ? 4 : 3;
09475d32 950 int nr_ins = (data->type == f71858fg || data->type == f8000) ? 3 : 9;
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951
952 mutex_lock(&data->update_lock);
953
954 /* Update once every 60 seconds */
162bb59e 955 if (time_after(jiffies, data->last_limits + 60 * HZ) ||
45fb3669 956 !data->valid) {
7669896f 957 if (data->type == f71882fg || data->type == f71889fg) {
498be968
HG
958 data->in1_max =
959 f71882fg_read8(data, F71882FG_REG_IN1_HIGH);
960 data->in_beep =
961 f71882fg_read8(data, F71882FG_REG_IN_BEEP);
962 }
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HG
963
964 /* Get High & boundary temps*/
09475d32 965 for (nr = data->temp_start; nr < 3 + data->temp_start; nr++) {
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HG
966 data->temp_ovt[nr] = f71882fg_read8(data,
967 F71882FG_REG_TEMP_OVT(nr));
968 data->temp_high[nr] = f71882fg_read8(data,
969 F71882FG_REG_TEMP_HIGH(nr));
970 }
971
ed4f7c20 972 if (data->type != f8000) {
ed4f7c20
HG
973 data->temp_hyst[0] = f71882fg_read8(data,
974 F71882FG_REG_TEMP_HYST(0));
975 data->temp_hyst[1] = f71882fg_read8(data,
976 F71882FG_REG_TEMP_HYST(1));
09475d32
HG
977 }
978
7669896f
HG
979 if (data->type == f71862fg || data->type == f71882fg ||
980 data->type == f71889fg) {
09475d32
HG
981 data->fan_beep = f71882fg_read8(data,
982 F71882FG_REG_FAN_BEEP);
983 data->temp_beep = f71882fg_read8(data,
984 F71882FG_REG_TEMP_BEEP);
ed4f7c20 985 reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
44c4dc52 986 data->temp_type[1] = (reg & 0x02) ? 2 : 4;
ed4f7c20
HG
987 data->temp_type[2] = (reg & 0x04) ? 2 : 4;
988 data->temp_type[3] = (reg & 0x08) ? 2 : 4;
989 }
45fb3669 990
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MD
991 data->pwm_enable = f71882fg_read8(data,
992 F71882FG_REG_PWM_ENABLE);
bc27490f
HG
993 data->pwm_auto_point_hyst[0] =
994 f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
995 data->pwm_auto_point_hyst[1] =
996 f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
997
498be968 998 for (nr = 0; nr < nr_fans; nr++) {
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MD
999 data->pwm_auto_point_mapping[nr] =
1000 f71882fg_read8(data,
1001 F71882FG_REG_POINT_MAPPING(nr));
1002
ed4f7c20 1003 if (data->type != f71862fg) {
498be968
HG
1004 int point;
1005 for (point = 0; point < 5; point++) {
1006 data->pwm_auto_point_pwm[nr][point] =
1007 f71882fg_read8(data,
1008 F71882FG_REG_POINT_PWM
1009 (nr, point));
1010 }
1011 for (point = 0; point < 4; point++) {
1012 data->pwm_auto_point_temp[nr][point] =
1013 f71882fg_read8(data,
1014 F71882FG_REG_POINT_TEMP
1015 (nr, point));
1016 }
1017 } else {
1018 data->pwm_auto_point_pwm[nr][1] =
1019 f71882fg_read8(data,
1020 F71882FG_REG_POINT_PWM
1021 (nr, 1));
1022 data->pwm_auto_point_pwm[nr][4] =
1023 f71882fg_read8(data,
1024 F71882FG_REG_POINT_PWM
1025 (nr, 4));
1026 data->pwm_auto_point_temp[nr][0] =
1027 f71882fg_read8(data,
1028 F71882FG_REG_POINT_TEMP
1029 (nr, 0));
1030 data->pwm_auto_point_temp[nr][3] =
1031 f71882fg_read8(data,
1032 F71882FG_REG_POINT_TEMP
1033 (nr, 3));
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MD
1034 }
1035 }
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HG
1036 data->last_limits = jiffies;
1037 }
1038
1039 /* Update every second */
8afb1049 1040 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
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1041 data->temp_status = f71882fg_read8(data,
1042 F71882FG_REG_TEMP_STATUS);
1043 data->temp_diode_open = f71882fg_read8(data,
1044 F71882FG_REG_TEMP_DIODE_OPEN);
09475d32
HG
1045 for (nr = data->temp_start; nr < 3 + data->temp_start; nr++)
1046 data->temp[nr] = f71882fg_read_temp(data, nr);
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HG
1047
1048 data->fan_status = f71882fg_read8(data,
1049 F71882FG_REG_FAN_STATUS);
498be968 1050 for (nr = 0; nr < nr_fans; nr++) {
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HG
1051 data->fan[nr] = f71882fg_read16(data,
1052 F71882FG_REG_FAN(nr));
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MD
1053 data->fan_target[nr] =
1054 f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
1055 data->fan_full_speed[nr] =
1056 f71882fg_read16(data,
1057 F71882FG_REG_FAN_FULL_SPEED(nr));
1058 data->pwm[nr] =
1059 f71882fg_read8(data, F71882FG_REG_PWM(nr));
1060 }
45fb3669 1061
ed4f7c20
HG
1062 /* The f8000 can monitor 1 more fan, but has no pwm for it */
1063 if (data->type == f8000)
1064 data->fan[3] = f71882fg_read16(data,
1065 F71882FG_REG_FAN(3));
7669896f 1066 if (data->type == f71882fg || data->type == f71889fg)
498be968 1067 data->in_status = f71882fg_read8(data,
45fb3669 1068 F71882FG_REG_IN_STATUS);
ed4f7c20 1069 for (nr = 0; nr < nr_ins; nr++)
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HG
1070 data->in[nr] = f71882fg_read8(data,
1071 F71882FG_REG_IN(nr));
1072
1073 data->last_updated = jiffies;
1074 data->valid = 1;
1075 }
1076
1077 mutex_unlock(&data->update_lock);
1078
1079 return data;
1080}
1081
1082/* Sysfs Interface */
1083static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
1084 char *buf)
1085{
1086 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1087 int nr = to_sensor_dev_attr_2(devattr)->index;
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1088 int speed = fan_from_reg(data->fan[nr]);
1089
1090 if (speed == FAN_MIN_DETECT)
1091 speed = 0;
1092
1093 return sprintf(buf, "%d\n", speed);
1094}
1095
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MD
1096static ssize_t show_fan_full_speed(struct device *dev,
1097 struct device_attribute *devattr, char *buf)
1098{
1099 struct f71882fg_data *data = f71882fg_update_device(dev);
1100 int nr = to_sensor_dev_attr_2(devattr)->index;
1101 int speed = fan_from_reg(data->fan_full_speed[nr]);
1102 return sprintf(buf, "%d\n", speed);
1103}
1104
1105static ssize_t store_fan_full_speed(struct device *dev,
1106 struct device_attribute *devattr,
1107 const char *buf, size_t count)
1108{
1109 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS
1110 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1111 long val;
1112
1113 err = strict_strtol(buf, 10, &val);
1114 if (err)
1115 return err;
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MD
1116
1117 val = SENSORS_LIMIT(val, 23, 1500000);
1118 val = fan_to_reg(val);
1119
1120 mutex_lock(&data->update_lock);
4c82c38a
HG
1121 f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
1122 data->fan_full_speed[nr] = val;
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MD
1123 mutex_unlock(&data->update_lock);
1124
1125 return count;
1126}
1127
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1128static ssize_t show_fan_beep(struct device *dev, struct device_attribute
1129 *devattr, char *buf)
1130{
1131 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1132 int nr = to_sensor_dev_attr_2(devattr)->index;
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1133
1134 if (data->fan_beep & (1 << nr))
1135 return sprintf(buf, "1\n");
1136 else
1137 return sprintf(buf, "0\n");
1138}
1139
1140static ssize_t store_fan_beep(struct device *dev, struct device_attribute
1141 *devattr, const char *buf, size_t count)
1142{
1143 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS
1144 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1145 unsigned long val;
1146
1147 err = strict_strtoul(buf, 10, &val);
1148 if (err)
1149 return err;
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HG
1150
1151 mutex_lock(&data->update_lock);
ce0bfa5e 1152 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
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HG
1153 if (val)
1154 data->fan_beep |= 1 << nr;
1155 else
1156 data->fan_beep &= ~(1 << nr);
1157
1158 f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
1159 mutex_unlock(&data->update_lock);
1160
1161 return count;
1162}
1163
1164static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
1165 *devattr, char *buf)
1166{
1167 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1168 int nr = to_sensor_dev_attr_2(devattr)->index;
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1169
1170 if (data->fan_status & (1 << nr))
1171 return sprintf(buf, "1\n");
1172 else
1173 return sprintf(buf, "0\n");
1174}
1175
1176static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
1177 char *buf)
1178{
1179 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1180 int nr = to_sensor_dev_attr_2(devattr)->index;
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1181
1182 return sprintf(buf, "%d\n", data->in[nr] * 8);
1183}
1184
1185static ssize_t show_in_max(struct device *dev, struct device_attribute
1186 *devattr, char *buf)
1187{
1188 struct f71882fg_data *data = f71882fg_update_device(dev);
1189
1190 return sprintf(buf, "%d\n", data->in1_max * 8);
1191}
1192
1193static ssize_t store_in_max(struct device *dev, struct device_attribute
1194 *devattr, const char *buf, size_t count)
1195{
1196 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS
1197 int err;
1198 long val;
1199
1200 err = strict_strtol(buf, 10, &val);
1201 if (err)
1202 return err;
1203
1204 val /= 8;
ce0bfa5e 1205 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG
1206
1207 mutex_lock(&data->update_lock);
1208 f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
1209 data->in1_max = val;
1210 mutex_unlock(&data->update_lock);
1211
1212 return count;
1213}
1214
1215static ssize_t show_in_beep(struct device *dev, struct device_attribute
1216 *devattr, char *buf)
1217{
1218 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1219 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG
1220
1221 if (data->in_beep & (1 << nr))
1222 return sprintf(buf, "1\n");
1223 else
1224 return sprintf(buf, "0\n");
1225}
1226
1227static ssize_t store_in_beep(struct device *dev, struct device_attribute
1228 *devattr, const char *buf, size_t count)
1229{
1230 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS
1231 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1232 unsigned long val;
1233
1234 err = strict_strtoul(buf, 10, &val);
1235 if (err)
1236 return err;
45fb3669
HG
1237
1238 mutex_lock(&data->update_lock);
ce0bfa5e 1239 data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
45fb3669
HG
1240 if (val)
1241 data->in_beep |= 1 << nr;
1242 else
1243 data->in_beep &= ~(1 << nr);
1244
1245 f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
1246 mutex_unlock(&data->update_lock);
1247
1248 return count;
1249}
1250
1251static ssize_t show_in_alarm(struct device *dev, struct device_attribute
1252 *devattr, char *buf)
1253{
1254 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1255 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG
1256
1257 if (data->in_status & (1 << nr))
1258 return sprintf(buf, "1\n");
1259 else
1260 return sprintf(buf, "0\n");
1261}
1262
1263static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
1264 char *buf)
1265{
1266 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1267 int nr = to_sensor_dev_attr_2(devattr)->index;
09475d32
HG
1268 int sign, temp;
1269
1270 if (data->type == f71858fg) {
1271 /* TEMP_TABLE_SEL 1 or 3 ? */
1272 if (data->temp_config & 1) {
1273 sign = data->temp[nr] & 0x0001;
1274 temp = (data->temp[nr] >> 5) & 0x7ff;
1275 } else {
1276 sign = data->temp[nr] & 0x8000;
1277 temp = (data->temp[nr] >> 5) & 0x3ff;
1278 }
1279 temp *= 125;
1280 if (sign)
1281 temp -= 128000;
1282 } else
1283 temp = data->temp[nr] * 1000;
45fb3669 1284
09475d32 1285 return sprintf(buf, "%d\n", temp);
45fb3669
HG
1286}
1287
1288static ssize_t show_temp_max(struct device *dev, struct device_attribute
1289 *devattr, char *buf)
1290{
1291 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1292 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG
1293
1294 return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
1295}
1296
1297static ssize_t store_temp_max(struct device *dev, struct device_attribute
1298 *devattr, const char *buf, size_t count)
1299{
1300 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS
1301 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1302 long val;
1303
1304 err = strict_strtol(buf, 10, &val);
1305 if (err)
1306 return err;
1307
1308 val /= 1000;
ce0bfa5e 1309 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG
1310
1311 mutex_lock(&data->update_lock);
1312 f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
1313 data->temp_high[nr] = val;
1314 mutex_unlock(&data->update_lock);
1315
1316 return count;
1317}
1318
1319static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
1320 *devattr, char *buf)
1321{
1322 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1323 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1324 int temp_max_hyst;
45fb3669 1325
ce0bfa5e 1326 mutex_lock(&data->update_lock);
bc27490f
HG
1327 if (nr & 1)
1328 temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
1329 else
1330 temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
1331 temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
ce0bfa5e
HG
1332 mutex_unlock(&data->update_lock);
1333
1334 return sprintf(buf, "%d\n", temp_max_hyst);
45fb3669
HG
1335}
1336
1337static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
1338 *devattr, const char *buf, size_t count)
1339{
1340 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca 1341 int err, nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1342 ssize_t ret = count;
ce0bfa5e 1343 u8 reg;
e8a4eaca
GS
1344 long val;
1345
1346 err = strict_strtol(buf, 10, &val);
1347 if (err)
1348 return err;
1349
1350 val /= 1000;
45fb3669
HG
1351
1352 mutex_lock(&data->update_lock);
1353
1354 /* convert abs to relative and check */
ce0bfa5e
HG
1355 data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
1356 val = SENSORS_LIMIT(val, data->temp_high[nr] - 15,
1357 data->temp_high[nr]);
45fb3669 1358 val = data->temp_high[nr] - val;
45fb3669
HG
1359
1360 /* convert value to register contents */
bc27490f
HG
1361 reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
1362 if (nr & 1)
1363 reg = (reg & 0x0f) | (val << 4);
1364 else
1365 reg = (reg & 0xf0) | val;
1366 f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
1367 data->temp_hyst[nr / 2] = reg;
45fb3669 1368
45fb3669
HG
1369 mutex_unlock(&data->update_lock);
1370 return ret;
1371}
1372
1373static ssize_t show_temp_crit(struct device *dev, struct device_attribute
1374 *devattr, char *buf)
1375{
1376 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1377 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG
1378
1379 return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
1380}
1381
1382static ssize_t store_temp_crit(struct device *dev, struct device_attribute
1383 *devattr, const char *buf, size_t count)
1384{
1385 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS
1386 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1387 long val;
1388
1389 err = strict_strtol(buf, 10, &val);
1390 if (err)
1391 return err;
1392
1393 val /= 1000;
ce0bfa5e 1394 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG
1395
1396 mutex_lock(&data->update_lock);
1397 f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
1398 data->temp_ovt[nr] = val;
1399 mutex_unlock(&data->update_lock);
1400
1401 return count;
1402}
1403
1404static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
1405 *devattr, char *buf)
1406{
1407 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1408 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1409 int temp_crit_hyst;
45fb3669 1410
ce0bfa5e 1411 mutex_lock(&data->update_lock);
bc27490f
HG
1412 if (nr & 1)
1413 temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
1414 else
1415 temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
1416 temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
ce0bfa5e
HG
1417 mutex_unlock(&data->update_lock);
1418
1419 return sprintf(buf, "%d\n", temp_crit_hyst);
45fb3669
HG
1420}
1421
1422static ssize_t show_temp_type(struct device *dev, struct device_attribute
1423 *devattr, char *buf)
1424{
1425 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1426 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG
1427
1428 return sprintf(buf, "%d\n", data->temp_type[nr]);
1429}
1430
1431static ssize_t show_temp_beep(struct device *dev, struct device_attribute
1432 *devattr, char *buf)
1433{
1434 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1435 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1436
7567a043 1437 if (data->temp_beep & (1 << nr))
45fb3669
HG
1438 return sprintf(buf, "1\n");
1439 else
1440 return sprintf(buf, "0\n");
1441}
1442
1443static ssize_t store_temp_beep(struct device *dev, struct device_attribute
1444 *devattr, const char *buf, size_t count)
1445{
1446 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS
1447 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1448 unsigned long val;
1449
1450 err = strict_strtoul(buf, 10, &val);
1451 if (err)
1452 return err;
45fb3669
HG
1453
1454 mutex_lock(&data->update_lock);
ce0bfa5e 1455 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
45fb3669 1456 if (val)
7567a043 1457 data->temp_beep |= 1 << nr;
45fb3669 1458 else
7567a043 1459 data->temp_beep &= ~(1 << nr);
45fb3669
HG
1460
1461 f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
1462 mutex_unlock(&data->update_lock);
1463
1464 return count;
1465}
1466
1467static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
1468 *devattr, char *buf)
1469{
1470 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1471 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1472
7567a043 1473 if (data->temp_status & (1 << nr))
45fb3669
HG
1474 return sprintf(buf, "1\n");
1475 else
1476 return sprintf(buf, "0\n");
1477}
1478
1479static ssize_t show_temp_fault(struct device *dev, struct device_attribute
1480 *devattr, char *buf)
1481{
1482 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1483 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1484
7567a043 1485 if (data->temp_diode_open & (1 << nr))
45fb3669
HG
1486 return sprintf(buf, "1\n");
1487 else
1488 return sprintf(buf, "0\n");
1489}
1490
9ab796eb
MD
1491static ssize_t show_pwm(struct device *dev,
1492 struct device_attribute *devattr, char *buf)
1493{
1494 struct f71882fg_data *data = f71882fg_update_device(dev);
1495 int val, nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1496 mutex_lock(&data->update_lock);
9ab796eb
MD
1497 if (data->pwm_enable & (1 << (2 * nr)))
1498 /* PWM mode */
1499 val = data->pwm[nr];
1500 else {
1501 /* RPM mode */
9ab796eb
MD
1502 val = 255 * fan_from_reg(data->fan_target[nr])
1503 / fan_from_reg(data->fan_full_speed[nr]);
9ab796eb 1504 }
ce0bfa5e 1505 mutex_unlock(&data->update_lock);
9ab796eb
MD
1506 return sprintf(buf, "%d\n", val);
1507}
1508
1509static ssize_t store_pwm(struct device *dev,
1510 struct device_attribute *devattr, const char *buf,
1511 size_t count)
1512{
ce0bfa5e 1513 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS
1514 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1515 long val;
1516
1517 err = strict_strtol(buf, 10, &val);
1518 if (err)
1519 return err;
1520
9ab796eb
MD
1521 val = SENSORS_LIMIT(val, 0, 255);
1522
1523 mutex_lock(&data->update_lock);
ce0bfa5e 1524 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
ed4f7c20
HG
1525 if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
1526 (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
1527 count = -EROFS;
1528 goto leave;
1529 }
9ab796eb
MD
1530 if (data->pwm_enable & (1 << (2 * nr))) {
1531 /* PWM mode */
1532 f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1533 data->pwm[nr] = val;
1534 } else {
1535 /* RPM mode */
ce0bfa5e
HG
1536 int target, full_speed;
1537 full_speed = f71882fg_read16(data,
1538 F71882FG_REG_FAN_FULL_SPEED(nr));
1539 target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
1540 f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
1541 data->fan_target[nr] = target;
1542 data->fan_full_speed[nr] = full_speed;
9ab796eb 1543 }
ed4f7c20 1544leave:
9ab796eb
MD
1545 mutex_unlock(&data->update_lock);
1546
1547 return count;
1548}
1549
1550static ssize_t show_pwm_enable(struct device *dev,
1551 struct device_attribute *devattr, char *buf)
1552{
ed4f7c20 1553 int result = 0;
9ab796eb
MD
1554 struct f71882fg_data *data = f71882fg_update_device(dev);
1555 int nr = to_sensor_dev_attr_2(devattr)->index;
1556
ed4f7c20
HG
1557 switch ((data->pwm_enable >> 2 * nr) & 3) {
1558 case 0:
1559 case 1:
1560 result = 2; /* Normal auto mode */
1561 break;
1562 case 2:
1563 result = 1; /* Manual mode */
1564 break;
1565 case 3:
1566 if (data->type == f8000)
1567 result = 3; /* Thermostat mode */
1568 else
1569 result = 1; /* Manual mode */
1570 break;
1571 }
9ab796eb
MD
1572
1573 return sprintf(buf, "%d\n", result);
1574}
1575
1576static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
1577 *devattr, const char *buf, size_t count)
1578{
1579 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS
1580 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1581 long val;
1582
1583 err = strict_strtol(buf, 10, &val);
1584 if (err)
1585 return err;
9ab796eb 1586
3fc7838a
HG
1587 /* Special case for F8000 pwm channel 3 which only does auto mode */
1588 if (data->type == f8000 && nr == 2 && val != 2)
1589 return -EINVAL;
1590
9ab796eb 1591 mutex_lock(&data->update_lock);
ce0bfa5e 1592 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
ed4f7c20
HG
1593 /* Special case for F8000 auto PWM mode / Thermostat mode */
1594 if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
1595 switch (val) {
1596 case 2:
1597 data->pwm_enable &= ~(2 << (2 * nr));
1598 break; /* Normal auto mode */
1599 case 3:
1600 data->pwm_enable |= 2 << (2 * nr);
1601 break; /* Thermostat mode */
1602 default:
1603 count = -EINVAL;
1604 goto leave;
1605 }
1606 } else {
1607 switch (val) {
1608 case 1:
09475d32
HG
1609 /* The f71858fg does not support manual RPM mode */
1610 if (data->type == f71858fg &&
1611 ((data->pwm_enable >> (2 * nr)) & 1)) {
1612 count = -EINVAL;
1613 goto leave;
1614 }
ed4f7c20
HG
1615 data->pwm_enable |= 2 << (2 * nr);
1616 break; /* Manual */
1617 case 2:
1618 data->pwm_enable &= ~(2 << (2 * nr));
1619 break; /* Normal auto mode */
1620 default:
1621 count = -EINVAL;
1622 goto leave;
1623 }
9ab796eb 1624 }
9ab796eb 1625 f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
ed4f7c20 1626leave:
9ab796eb
MD
1627 mutex_unlock(&data->update_lock);
1628
1629 return count;
1630}
1631
1632static ssize_t show_pwm_auto_point_pwm(struct device *dev,
1633 struct device_attribute *devattr,
1634 char *buf)
1635{
1636 int result;
1637 struct f71882fg_data *data = f71882fg_update_device(dev);
1638 int pwm = to_sensor_dev_attr_2(devattr)->index;
1639 int point = to_sensor_dev_attr_2(devattr)->nr;
1640
ce0bfa5e 1641 mutex_lock(&data->update_lock);
9ab796eb
MD
1642 if (data->pwm_enable & (1 << (2 * pwm))) {
1643 /* PWM mode */
1644 result = data->pwm_auto_point_pwm[pwm][point];
1645 } else {
1646 /* RPM mode */
1647 result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
1648 }
ce0bfa5e 1649 mutex_unlock(&data->update_lock);
9ab796eb
MD
1650
1651 return sprintf(buf, "%d\n", result);
1652}
1653
1654static ssize_t store_pwm_auto_point_pwm(struct device *dev,
1655 struct device_attribute *devattr,
1656 const char *buf, size_t count)
1657{
ce0bfa5e 1658 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca 1659 int err, pwm = to_sensor_dev_attr_2(devattr)->index;
9ab796eb 1660 int point = to_sensor_dev_attr_2(devattr)->nr;
e8a4eaca
GS
1661 long val;
1662
1663 err = strict_strtol(buf, 10, &val);
1664 if (err)
1665 return err;
1666
9ab796eb
MD
1667 val = SENSORS_LIMIT(val, 0, 255);
1668
1669 mutex_lock(&data->update_lock);
ce0bfa5e 1670 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
9ab796eb
MD
1671 if (data->pwm_enable & (1 << (2 * pwm))) {
1672 /* PWM mode */
1673 } else {
1674 /* RPM mode */
1675 if (val < 29) /* Prevent negative numbers */
1676 val = 255;
1677 else
1678 val = (255 - val) * 32 / val;
1679 }
1680 f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
1681 data->pwm_auto_point_pwm[pwm][point] = val;
1682 mutex_unlock(&data->update_lock);
1683
1684 return count;
1685}
1686
1687static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
1688 struct device_attribute *devattr,
1689 char *buf)
1690{
1691 int result = 0;
1692 struct f71882fg_data *data = f71882fg_update_device(dev);
1693 int nr = to_sensor_dev_attr_2(devattr)->index;
1694 int point = to_sensor_dev_attr_2(devattr)->nr;
1695
1696 mutex_lock(&data->update_lock);
bc27490f
HG
1697 if (nr & 1)
1698 result = data->pwm_auto_point_hyst[nr / 2] >> 4;
1699 else
1700 result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
9ab796eb
MD
1701 result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
1702 mutex_unlock(&data->update_lock);
1703
1704 return sprintf(buf, "%d\n", result);
1705}
1706
1707static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
1708 struct device_attribute *devattr,
1709 const char *buf, size_t count)
1710{
ce0bfa5e 1711 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca 1712 int err, nr = to_sensor_dev_attr_2(devattr)->index;
9ab796eb 1713 int point = to_sensor_dev_attr_2(devattr)->nr;
bc27490f 1714 u8 reg;
e8a4eaca
GS
1715 long val;
1716
1717 err = strict_strtol(buf, 10, &val);
1718 if (err)
1719 return err;
1720
1721 val /= 1000;
9ab796eb
MD
1722
1723 mutex_lock(&data->update_lock);
ce0bfa5e
HG
1724 data->pwm_auto_point_temp[nr][point] =
1725 f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
9ab796eb
MD
1726 val = SENSORS_LIMIT(val, data->pwm_auto_point_temp[nr][point] - 15,
1727 data->pwm_auto_point_temp[nr][point]);
1728 val = data->pwm_auto_point_temp[nr][point] - val;
1729
bc27490f
HG
1730 reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
1731 if (nr & 1)
1732 reg = (reg & 0x0f) | (val << 4);
1733 else
1734 reg = (reg & 0xf0) | val;
1735
1736 f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
1737 data->pwm_auto_point_hyst[nr / 2] = reg;
9ab796eb
MD
1738 mutex_unlock(&data->update_lock);
1739
1740 return count;
1741}
1742
1743static ssize_t show_pwm_interpolate(struct device *dev,
1744 struct device_attribute *devattr, char *buf)
1745{
1746 int result;
1747 struct f71882fg_data *data = f71882fg_update_device(dev);
1748 int nr = to_sensor_dev_attr_2(devattr)->index;
1749
1750 result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
1751
1752 return sprintf(buf, "%d\n", result);
1753}
1754
1755static ssize_t store_pwm_interpolate(struct device *dev,
1756 struct device_attribute *devattr,
1757 const char *buf, size_t count)
1758{
ce0bfa5e 1759 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS
1760 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1761 unsigned long val;
1762
1763 err = strict_strtoul(buf, 10, &val);
1764 if (err)
1765 return err;
ce0bfa5e 1766
9ab796eb 1767 mutex_lock(&data->update_lock);
ce0bfa5e
HG
1768 data->pwm_auto_point_mapping[nr] =
1769 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
9ab796eb
MD
1770 if (val)
1771 val = data->pwm_auto_point_mapping[nr] | (1 << 4);
1772 else
1773 val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
1774 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1775 data->pwm_auto_point_mapping[nr] = val;
1776 mutex_unlock(&data->update_lock);
1777
1778 return count;
1779}
1780
1781static ssize_t show_pwm_auto_point_channel(struct device *dev,
1782 struct device_attribute *devattr,
1783 char *buf)
1784{
1785 int result;
1786 struct f71882fg_data *data = f71882fg_update_device(dev);
1787 int nr = to_sensor_dev_attr_2(devattr)->index;
1788
09475d32
HG
1789 result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
1790 data->temp_start);
9ab796eb
MD
1791
1792 return sprintf(buf, "%d\n", result);
1793}
1794
1795static ssize_t store_pwm_auto_point_channel(struct device *dev,
1796 struct device_attribute *devattr,
1797 const char *buf, size_t count)
1798{
ce0bfa5e 1799 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS
1800 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1801 long val;
1802
1803 err = strict_strtol(buf, 10, &val);
1804 if (err)
1805 return err;
30453018 1806
9ab796eb
MD
1807 switch (val) {
1808 case 1:
30453018 1809 val = 0;
9ab796eb
MD
1810 break;
1811 case 2:
30453018 1812 val = 1;
9ab796eb
MD
1813 break;
1814 case 4:
30453018 1815 val = 2;
9ab796eb
MD
1816 break;
1817 default:
1818 return -EINVAL;
1819 }
09475d32 1820 val += data->temp_start;
9ab796eb 1821 mutex_lock(&data->update_lock);
ce0bfa5e
HG
1822 data->pwm_auto_point_mapping[nr] =
1823 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
9ab796eb
MD
1824 val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
1825 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1826 data->pwm_auto_point_mapping[nr] = val;
1827 mutex_unlock(&data->update_lock);
1828
1829 return count;
1830}
1831
1832static ssize_t show_pwm_auto_point_temp(struct device *dev,
1833 struct device_attribute *devattr,
1834 char *buf)
1835{
1836 int result;
1837 struct f71882fg_data *data = f71882fg_update_device(dev);
1838 int pwm = to_sensor_dev_attr_2(devattr)->index;
1839 int point = to_sensor_dev_attr_2(devattr)->nr;
1840
1841 result = data->pwm_auto_point_temp[pwm][point];
1842 return sprintf(buf, "%d\n", 1000 * result);
1843}
1844
1845static ssize_t store_pwm_auto_point_temp(struct device *dev,
1846 struct device_attribute *devattr,
1847 const char *buf, size_t count)
1848{
ce0bfa5e 1849 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca 1850 int err, pwm = to_sensor_dev_attr_2(devattr)->index;
9ab796eb 1851 int point = to_sensor_dev_attr_2(devattr)->nr;
e8a4eaca
GS
1852 long val;
1853
1854 err = strict_strtol(buf, 10, &val);
1855 if (err)
1856 return err;
1857
1858 val /= 1000;
7669896f 1859
98f7ba19 1860 if (data->auto_point_temp_signed)
7669896f
HG
1861 val = SENSORS_LIMIT(val, -128, 127);
1862 else
1863 val = SENSORS_LIMIT(val, 0, 127);
9ab796eb
MD
1864
1865 mutex_lock(&data->update_lock);
1866 f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
1867 data->pwm_auto_point_temp[pwm][point] = val;
1868 mutex_unlock(&data->update_lock);
1869
1870 return count;
1871}
1872
45fb3669
HG
1873static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
1874 char *buf)
1875{
498be968
HG
1876 struct f71882fg_data *data = dev_get_drvdata(dev);
1877 return sprintf(buf, "%s\n", f71882fg_names[data->type]);
45fb3669
HG
1878}
1879
c13548c5
HG
1880static int __devinit f71882fg_create_sysfs_files(struct platform_device *pdev,
1881 struct sensor_device_attribute_2 *attr, int count)
1882{
1883 int err, i;
1884
1885 for (i = 0; i < count; i++) {
1886 err = device_create_file(&pdev->dev, &attr[i].dev_attr);
1887 if (err)
1888 return err;
1889 }
1890 return 0;
1891}
45fb3669 1892
fc16c56e
HG
1893static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
1894 struct sensor_device_attribute_2 *attr, int count)
1895{
1896 int i;
1897
1898 for (i = 0; i < count; i++)
1899 device_remove_file(&pdev->dev, &attr[i].dev_attr);
1900}
1901
c13548c5 1902static int __devinit f71882fg_probe(struct platform_device *pdev)
45fb3669
HG
1903{
1904 struct f71882fg_data *data;
498be968 1905 struct f71882fg_sio_data *sio_data = pdev->dev.platform_data;
28ba8587 1906 int err, i, nr_fans = (sio_data->type == f71882fg) ? 4 : 3;
98f7ba19 1907 u8 start_reg, reg;
45fb3669 1908
c13548c5
HG
1909 data = kzalloc(sizeof(struct f71882fg_data), GFP_KERNEL);
1910 if (!data)
45fb3669
HG
1911 return -ENOMEM;
1912
1913 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
498be968 1914 data->type = sio_data->type;
09475d32
HG
1915 data->temp_start =
1916 (data->type == f71858fg || data->type == f8000) ? 0 : 1;
45fb3669
HG
1917 mutex_init(&data->update_lock);
1918 platform_set_drvdata(pdev, data);
1919
3cc74758 1920 start_reg = f71882fg_read8(data, F71882FG_REG_START);
12d66e84
HG
1921 if (start_reg & 0x04) {
1922 dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
1923 err = -ENODEV;
1924 goto exit_free;
1925 }
3cc74758
HG
1926 if (!(start_reg & 0x03)) {
1927 dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
1928 err = -ENODEV;
1929 goto exit_free;
1930 }
1931
45fb3669 1932 /* Register sysfs interface files */
c13548c5
HG
1933 err = device_create_file(&pdev->dev, &dev_attr_name);
1934 if (err)
1935 goto exit_unregister_sysfs;
45fb3669 1936
45fb3669 1937 if (start_reg & 0x01) {
ed4f7c20 1938 switch (data->type) {
09475d32
HG
1939 case f71858fg:
1940 data->temp_config =
1941 f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
1942 if (data->temp_config & 0x10)
1943 /* The f71858fg temperature alarms behave as
1944 the f8000 alarms in this mode */
1945 err = f71882fg_create_sysfs_files(pdev,
1946 f8000_in_temp_attr,
1947 ARRAY_SIZE(f8000_in_temp_attr));
1948 else
1949 err = f71882fg_create_sysfs_files(pdev,
1950 f71858fg_in_temp_attr,
1951 ARRAY_SIZE(f71858fg_in_temp_attr));
1952 break;
ed4f7c20 1953 case f71882fg:
7669896f 1954 case f71889fg:
498be968 1955 err = f71882fg_create_sysfs_files(pdev,
66344aa6
HG
1956 fxxxx_in1_alarm_attr,
1957 ARRAY_SIZE(fxxxx_in1_alarm_attr));
498be968
HG
1958 if (err)
1959 goto exit_unregister_sysfs;
ed4f7c20
HG
1960 /* fall through! */
1961 case f71862fg:
1962 err = f71882fg_create_sysfs_files(pdev,
f2e41e91
AM
1963 fxxxx_in_temp_attr,
1964 ARRAY_SIZE(fxxxx_in_temp_attr));
ed4f7c20
HG
1965 break;
1966 case f8000:
1967 err = f71882fg_create_sysfs_files(pdev,
1968 f8000_in_temp_attr,
1969 ARRAY_SIZE(f8000_in_temp_attr));
1970 break;
498be968 1971 }
ed4f7c20
HG
1972 if (err)
1973 goto exit_unregister_sysfs;
45fb3669
HG
1974 }
1975
1976 if (start_reg & 0x02) {
98f7ba19
HG
1977 switch (data->type) {
1978 case f71889fg:
1979 reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
1980 if (reg & F71882FG_FAN_NEG_TEMP_EN)
1981 data->auto_point_temp_signed = 1;
1982 break;
1983 default:
1984 break;
1985 }
1986
996cadb2
HG
1987 data->pwm_enable =
1988 f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1989
1990 /* Sanity check the pwm settings */
1991 switch (data->type) {
09475d32
HG
1992 case f71858fg:
1993 err = 0;
1994 for (i = 0; i < nr_fans; i++)
1995 if (((data->pwm_enable >> (i * 2)) & 3) == 3)
1996 err = 1;
1997 break;
996cadb2
HG
1998 case f71862fg:
1999 err = (data->pwm_enable & 0x15) != 0x15;
2000 break;
2001 case f71882fg:
7669896f 2002 case f71889fg:
996cadb2
HG
2003 err = 0;
2004 break;
2005 case f8000:
2006 err = data->pwm_enable & 0x20;
2007 break;
2008 }
2009 if (err) {
2010 dev_err(&pdev->dev,
2011 "Invalid (reserved) pwm settings: 0x%02x\n",
2012 (unsigned int)data->pwm_enable);
2013 err = -ENODEV;
2014 goto exit_unregister_sysfs;
2015 }
2016
b69b0399
HG
2017 err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
2018 ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
498be968
HG
2019 if (err)
2020 goto exit_unregister_sysfs;
2021
7669896f
HG
2022 if (data->type == f71862fg || data->type == f71882fg ||
2023 data->type == f71889fg) {
498be968 2024 err = f71882fg_create_sysfs_files(pdev,
b69b0399 2025 fxxxx_fan_beep_attr, nr_fans);
66344aa6
HG
2026 if (err)
2027 goto exit_unregister_sysfs;
b69b0399
HG
2028 }
2029
2030 switch (data->type) {
2031 case f71862fg:
66344aa6
HG
2032 err = f71882fg_create_sysfs_files(pdev,
2033 f71862fg_auto_pwm_attr,
2034 ARRAY_SIZE(f71862fg_auto_pwm_attr));
ed4f7c20 2035 break;
ed4f7c20
HG
2036 case f8000:
2037 err = f71882fg_create_sysfs_files(pdev,
2038 f8000_fan_attr,
2039 ARRAY_SIZE(f8000_fan_attr));
66344aa6
HG
2040 if (err)
2041 goto exit_unregister_sysfs;
2042 err = f71882fg_create_sysfs_files(pdev,
2043 f8000_auto_pwm_attr,
2044 ARRAY_SIZE(f8000_auto_pwm_attr));
ed4f7c20 2045 break;
7669896f
HG
2046 case f71889fg:
2047 for (i = 0; i < nr_fans; i++) {
2048 data->pwm_auto_point_mapping[i] =
2049 f71882fg_read8(data,
2050 F71882FG_REG_POINT_MAPPING(i));
2051 if (data->pwm_auto_point_mapping[i] & 0x80)
2052 break;
2053 }
2054 if (i != nr_fans) {
2055 dev_warn(&pdev->dev,
2056 "Auto pwm controlled by raw digital "
2057 "data, disabling pwm auto_point "
2058 "sysfs attributes\n");
2059 break;
2060 }
2061 /* fall through */
b69b0399
HG
2062 default: /* f71858fg / f71882fg */
2063 err = f71882fg_create_sysfs_files(pdev,
2064 &fxxxx_auto_pwm_attr[0][0],
2065 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
498be968 2066 }
c13548c5
HG
2067 if (err)
2068 goto exit_unregister_sysfs;
28ba8587
HG
2069
2070 for (i = 0; i < nr_fans; i++)
2071 dev_info(&pdev->dev, "Fan: %d is in %s mode\n", i + 1,
2072 (data->pwm_enable & (1 << 2 * i)) ?
2073 "duty-cycle" : "RPM");
45fb3669
HG
2074 }
2075
1beeffe4
TJ
2076 data->hwmon_dev = hwmon_device_register(&pdev->dev);
2077 if (IS_ERR(data->hwmon_dev)) {
2078 err = PTR_ERR(data->hwmon_dev);
c13548c5 2079 data->hwmon_dev = NULL;
45fb3669
HG
2080 goto exit_unregister_sysfs;
2081 }
2082
2083 return 0;
2084
2085exit_unregister_sysfs:
c13548c5 2086 f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
3cc74758
HG
2087 return err; /* f71882fg_remove() also frees our data */
2088exit_free:
2089 kfree(data);
45fb3669
HG
2090 return err;
2091}
2092
c13548c5 2093static int f71882fg_remove(struct platform_device *pdev)
45fb3669 2094{
45fb3669 2095 struct f71882fg_data *data = platform_get_drvdata(pdev);
fc16c56e
HG
2096 int nr_fans = (data->type == f71882fg) ? 4 : 3;
2097 u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
45fb3669 2098
c13548c5
HG
2099 if (data->hwmon_dev)
2100 hwmon_device_unregister(data->hwmon_dev);
45fb3669 2101
c13548c5 2102 device_remove_file(&pdev->dev, &dev_attr_name);
45fb3669 2103
fc16c56e
HG
2104 if (start_reg & 0x01) {
2105 switch (data->type) {
2106 case f71858fg:
2107 if (data->temp_config & 0x10)
2108 f71882fg_remove_sysfs_files(pdev,
2109 f8000_in_temp_attr,
2110 ARRAY_SIZE(f8000_in_temp_attr));
2111 else
2112 f71882fg_remove_sysfs_files(pdev,
2113 f71858fg_in_temp_attr,
2114 ARRAY_SIZE(f71858fg_in_temp_attr));
2115 break;
2116 case f71882fg:
7669896f 2117 case f71889fg:
fc16c56e
HG
2118 f71882fg_remove_sysfs_files(pdev,
2119 fxxxx_in1_alarm_attr,
2120 ARRAY_SIZE(fxxxx_in1_alarm_attr));
2121 /* fall through! */
2122 case f71862fg:
2123 f71882fg_remove_sysfs_files(pdev,
f2e41e91
AM
2124 fxxxx_in_temp_attr,
2125 ARRAY_SIZE(fxxxx_in_temp_attr));
fc16c56e
HG
2126 break;
2127 case f8000:
2128 f71882fg_remove_sysfs_files(pdev,
2129 f8000_in_temp_attr,
2130 ARRAY_SIZE(f8000_in_temp_attr));
2131 break;
2132 }
2133 }
498be968 2134
fc16c56e
HG
2135 if (start_reg & 0x02) {
2136 f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
2137 ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
45fb3669 2138
7669896f
HG
2139 if (data->type == f71862fg || data->type == f71882fg ||
2140 data->type == f71889fg)
fc16c56e
HG
2141 f71882fg_remove_sysfs_files(pdev,
2142 fxxxx_fan_beep_attr, nr_fans);
66344aa6 2143
fc16c56e
HG
2144 switch (data->type) {
2145 case f71862fg:
2146 f71882fg_remove_sysfs_files(pdev,
2147 f71862fg_auto_pwm_attr,
2148 ARRAY_SIZE(f71862fg_auto_pwm_attr));
2149 break;
2150 case f8000:
2151 f71882fg_remove_sysfs_files(pdev,
2152 f8000_fan_attr,
2153 ARRAY_SIZE(f8000_fan_attr));
2154 f71882fg_remove_sysfs_files(pdev,
2155 f8000_auto_pwm_attr,
2156 ARRAY_SIZE(f8000_auto_pwm_attr));
2157 break;
2158 default: /* f71858fg / f71882fg / f71889fg */
2159 f71882fg_remove_sysfs_files(pdev,
2160 &fxxxx_auto_pwm_attr[0][0],
2161 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2162 }
2163 }
ed4f7c20 2164
d9ebaa45 2165 platform_set_drvdata(pdev, NULL);
45fb3669
HG
2166 kfree(data);
2167
2168 return 0;
2169}
2170
498be968
HG
2171static int __init f71882fg_find(int sioaddr, unsigned short *address,
2172 struct f71882fg_sio_data *sio_data)
45fb3669 2173{
45fb3669 2174 u16 devid;
cadb8657
GS
2175 int err = superio_enter(sioaddr);
2176 if (err)
2177 return err;
45fb3669
HG
2178
2179 devid = superio_inw(sioaddr, SIO_REG_MANID);
2180 if (devid != SIO_FINTEK_ID) {
22d3b412 2181 pr_debug("Not a Fintek device\n");
cadb8657 2182 err = -ENODEV;
45fb3669
HG
2183 goto exit;
2184 }
2185
67b671bc 2186 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
498be968 2187 switch (devid) {
09475d32
HG
2188 case SIO_F71858_ID:
2189 sio_data->type = f71858fg;
2190 break;
498be968
HG
2191 case SIO_F71862_ID:
2192 sio_data->type = f71862fg;
2193 break;
2194 case SIO_F71882_ID:
2195 sio_data->type = f71882fg;
2196 break;
7669896f
HG
2197 case SIO_F71889_ID:
2198 sio_data->type = f71889fg;
2199 break;
ed4f7c20
HG
2200 case SIO_F8000_ID:
2201 sio_data->type = f8000;
2202 break;
498be968 2203 default:
22d3b412
JP
2204 pr_info("Unsupported Fintek device: %04x\n",
2205 (unsigned int)devid);
cadb8657 2206 err = -ENODEV;
45fb3669
HG
2207 goto exit;
2208 }
2209
09475d32
HG
2210 if (sio_data->type == f71858fg)
2211 superio_select(sioaddr, SIO_F71858FG_LD_HWM);
2212 else
2213 superio_select(sioaddr, SIO_F71882FG_LD_HWM);
2214
8afb1049 2215 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
22d3b412 2216 pr_warn("Device not activated\n");
cadb8657 2217 err = -ENODEV;
45fb3669
HG
2218 goto exit;
2219 }
2220
2221 *address = superio_inw(sioaddr, SIO_REG_ADDR);
162bb59e 2222 if (*address == 0) {
22d3b412 2223 pr_warn("Base address not set\n");
cadb8657 2224 err = -ENODEV;
45fb3669
HG
2225 goto exit;
2226 }
2227 *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
2228
45fb3669 2229 err = 0;
22d3b412 2230 pr_info("Found %s chip at %#x, revision %d\n",
498be968 2231 f71882fg_names[sio_data->type], (unsigned int)*address,
45fb3669
HG
2232 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
2233exit:
2234 superio_exit(sioaddr);
2235 return err;
2236}
2237
498be968
HG
2238static int __init f71882fg_device_add(unsigned short address,
2239 const struct f71882fg_sio_data *sio_data)
45fb3669
HG
2240{
2241 struct resource res = {
2242 .start = address,
2243 .end = address + REGION_LENGTH - 1,
2244 .flags = IORESOURCE_IO,
2245 };
2246 int err;
2247
2248 f71882fg_pdev = platform_device_alloc(DRVNAME, address);
8afb1049 2249 if (!f71882fg_pdev)
45fb3669
HG
2250 return -ENOMEM;
2251
2252 res.name = f71882fg_pdev->name;
b9acb64a
JD
2253 err = acpi_check_resource_conflict(&res);
2254 if (err)
18632f84 2255 goto exit_device_put;
b9acb64a 2256
45fb3669 2257 err = platform_device_add_resources(f71882fg_pdev, &res, 1);
8afb1049 2258 if (err) {
22d3b412 2259 pr_err("Device resource addition failed\n");
45fb3669
HG
2260 goto exit_device_put;
2261 }
2262
498be968
HG
2263 err = platform_device_add_data(f71882fg_pdev, sio_data,
2264 sizeof(struct f71882fg_sio_data));
2265 if (err) {
22d3b412 2266 pr_err("Platform data allocation failed\n");
498be968
HG
2267 goto exit_device_put;
2268 }
2269
45fb3669 2270 err = platform_device_add(f71882fg_pdev);
8afb1049 2271 if (err) {
22d3b412 2272 pr_err("Device addition failed\n");
45fb3669
HG
2273 goto exit_device_put;
2274 }
2275
2276 return 0;
2277
2278exit_device_put:
2279 platform_device_put(f71882fg_pdev);
2280
2281 return err;
2282}
2283
2284static int __init f71882fg_init(void)
2285{
2286 int err = -ENODEV;
2287 unsigned short address;
498be968
HG
2288 struct f71882fg_sio_data sio_data;
2289
2290 memset(&sio_data, 0, sizeof(sio_data));
45fb3669 2291
498be968
HG
2292 if (f71882fg_find(0x2e, &address, &sio_data) &&
2293 f71882fg_find(0x4e, &address, &sio_data))
45fb3669
HG
2294 goto exit;
2295
c13548c5
HG
2296 err = platform_driver_register(&f71882fg_driver);
2297 if (err)
45fb3669
HG
2298 goto exit;
2299
498be968 2300 err = f71882fg_device_add(address, &sio_data);
c13548c5 2301 if (err)
45fb3669
HG
2302 goto exit_driver;
2303
2304 return 0;
2305
2306exit_driver:
2307 platform_driver_unregister(&f71882fg_driver);
2308exit:
2309 return err;
2310}
2311
2312static void __exit f71882fg_exit(void)
2313{
2314 platform_device_unregister(f71882fg_pdev);
2315 platform_driver_unregister(&f71882fg_driver);
2316}
2317
2318MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
c13548c5 2319MODULE_AUTHOR("Hans Edgington, Hans de Goede (hdegoede@redhat.com)");
45fb3669
HG
2320MODULE_LICENSE("GPL");
2321
2322module_init(f71882fg_init);
2323module_exit(f71882fg_exit);
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