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hwmon: (sht15) avoid CamelCase
[deliverable/linux.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4 1/*
5f2dc798
JD		 2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
44c1bcd4 18 * IT8721F Super I/O chip w/LPC interface
5f2dc798 19 * IT8726F Super I/O chip w/LPC interface
16b5dda2 20 * IT8728F Super I/O chip w/LPC interface
44c1bcd4 21 * IT8758E Super I/O chip w/LPC interface
0531d98b
GR		 22 * IT8782F Super I/O chip w/LPC interface
23 * IT8783E/F Super I/O chip w/LPC interface
5f2dc798
JD		 24 * Sis950 A clone of the IT8705F
25 *
26 * Copyright (C) 2001 Chris Gauthron
27 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
28 *
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License as published by
31 * the Free Software Foundation; either version 2 of the License, or
32 * (at your option) any later version.
33 *
34 * This program is distributed in the hope that it will be useful,
35 * but WITHOUT ANY WARRANTY; without even the implied warranty of
36 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 * GNU General Public License for more details.
38 *
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
42 */
1da177e4 43
a8ca1037
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
1da177e4
LT		 46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
b74f3fdd 50#include <linux/platform_device.h>
943b0830 51#include <linux/hwmon.h>
303760b4
JD		 52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
943b0830 54#include <linux/err.h>
9a61bf63 55#include <linux/mutex.h>
87808be4 56#include <linux/sysfs.h>
98dd22c3
JD		 57#include <linux/string.h>
58#include <linux/dmi.h>
b9acb64a 59#include <linux/acpi.h>
6055fae8 60#include <linux/io.h>
1da177e4 61
b74f3fdd 62#define DRVNAME "it87"
1da177e4 63
0531d98b
GR		 64enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,
65 it8783 };
1da177e4 66
67b671bc
JD		 67static unsigned short force_id;
68module_param(force_id, ushort, 0);
69MODULE_PARM_DESC(force_id, "Override the detected device ID");
70
b74f3fdd 71static struct platform_device *pdev;
72
1da177e4
LT		 73#define REG 0x2e /* The register to read/write */
74#define DEV 0x07 /* Register: Logical device select */
75#define VAL 0x2f /* The value to read/write */
76#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS		 77
78/* The device with the IT8718F/IT8720F VID value in it */
79#define GPIO 0x07
80
1da177e4
LT		 81#define DEVID 0x20 /* Register: Device ID */
82#define DEVREV 0x22 /* Register: Device Revision */
83
5b0380c9 84static inline int superio_inb(int reg)
1da177e4
LT		 85{
86 outb(reg, REG);
87 return inb(VAL);
88}
89
5b0380c9 90static inline void superio_outb(int reg, int val)
436cad2a
JD		 91{
92 outb(reg, REG);
93 outb(val, VAL);
94}
95
1da177e4
LT		 96static int superio_inw(int reg)
97{
98 int val;
99 outb(reg++, REG);
100 val = inb(VAL) << 8;
101 outb(reg, REG);
102 val |= inb(VAL);
103 return val;
104}
105
5b0380c9 106static inline void superio_select(int ldn)
1da177e4
LT		 107{
108 outb(DEV, REG);
87673dd7 109 outb(ldn, VAL);
1da177e4
LT		 110}
111
5b0380c9 112static inline int superio_enter(void)
1da177e4 113{
5b0380c9
NG		 114 /*
115 * Try to reserve REG and REG + 1 for exclusive access.
116 */
117 if (!request_muxed_region(REG, 2, DRVNAME))
118 return -EBUSY;
119
1da177e4
LT		 120 outb(0x87, REG);
121 outb(0x01, REG);
122 outb(0x55, REG);
123 outb(0x55, REG);
5b0380c9 124 return 0;
1da177e4
LT		 125}
126
5b0380c9 127static inline void superio_exit(void)
1da177e4
LT		 128{
129 outb(0x02, REG);
130 outb(0x02, VAL);
5b0380c9 131 release_region(REG, 2);
1da177e4
LT		 132}
133
87673dd7 134/* Logical device 4 registers */
1da177e4
LT		 135#define IT8712F_DEVID 0x8712
136#define IT8705F_DEVID 0x8705
17d648bf 137#define IT8716F_DEVID 0x8716
87673dd7 138#define IT8718F_DEVID 0x8718
b4da93e4 139#define IT8720F_DEVID 0x8720
44c1bcd4 140#define IT8721F_DEVID 0x8721
08a8f6e9 141#define IT8726F_DEVID 0x8726
16b5dda2 142#define IT8728F_DEVID 0x8728
0531d98b
GR		 143#define IT8782F_DEVID 0x8782
144#define IT8783E_DEVID 0x8783
1da177e4
LT		 145#define IT87_ACT_REG 0x30
146#define IT87_BASE_REG 0x60
147
87673dd7 148/* Logical device 7 registers (IT8712F and later) */
0531d98b 149#define IT87_SIO_GPIO1_REG 0x25
895ff267 150#define IT87_SIO_GPIO3_REG 0x27
591ec650 151#define IT87_SIO_GPIO5_REG 0x29
0531d98b 152#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
87673dd7 153#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
0531d98b 154#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
87673dd7 155#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 156#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 157
1da177e4 158/* Update battery voltage after every reading if true */
90ab5ee9 159static bool update_vbat;
1da177e4
LT		 160
161/* Not all BIOSes properly configure the PWM registers */
90ab5ee9 162static bool fix_pwm_polarity;
1da177e4 163
1da177e4
LT		 164/* Many IT87 constants specified below */
165
166/* Length of ISA address segment */
167#define IT87_EXTENT 8
168
87b4b663
BH		 169/* Length of ISA address segment for Environmental Controller */
170#define IT87_EC_EXTENT 2
171
172/* Offset of EC registers from ISA base address */
173#define IT87_EC_OFFSET 5
174
175/* Where are the ISA address/data registers relative to the EC base address */
176#define IT87_ADDR_REG_OFFSET 0
177#define IT87_DATA_REG_OFFSET 1
1da177e4
LT		 178
179/*----- The IT87 registers -----*/
180
181#define IT87_REG_CONFIG 0x00
182
183#define IT87_REG_ALARM1 0x01
184#define IT87_REG_ALARM2 0x02
185#define IT87_REG_ALARM3 0x03
186
4a0d71cf
GR		 187/*
188 * The IT8718F and IT8720F have the VID value in a different register, in
189 * Super-I/O configuration space.
190 */
1da177e4 191#define IT87_REG_VID 0x0a
4a0d71cf
GR		 192/*
193 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
194 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
195 * mode.
196 */
1da177e4 197#define IT87_REG_FAN_DIV 0x0b
17d648bf 198#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT		 199
200/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
201
c7f1f716
JD		 202static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
203static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
204static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
205static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
161d898a
GR		 206static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
207
1da177e4
LT		 208#define IT87_REG_FAN_MAIN_CTRL 0x13
209#define IT87_REG_FAN_CTL 0x14
210#define IT87_REG_PWM(nr) (0x15 + (nr))
6229cdb2 211#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
1da177e4
LT		 212
213#define IT87_REG_VIN(nr) (0x20 + (nr))
214#define IT87_REG_TEMP(nr) (0x29 + (nr))
215
216#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
217#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
218#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
219#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
220
1da177e4
LT		 221#define IT87_REG_VIN_ENABLE 0x50
222#define IT87_REG_TEMP_ENABLE 0x51
4573acbc 223#define IT87_REG_TEMP_EXTRA 0x55
d9b327c3 224#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT		 225
226#define IT87_REG_CHIPID 0x58
227
4f3f51bc
JD		 228#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
229#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
230
483db43e
GR		 231struct it87_devices {
232 const char *name;
233 u16 features;
19529784
GR		 234 u8 peci_mask;
235 u8 old_peci_mask;
483db43e
GR		 236};
237
238#define FEAT_12MV_ADC (1 << 0)
239#define FEAT_NEWER_AUTOPWM (1 << 1)
240#define FEAT_OLD_AUTOPWM (1 << 2)
241#define FEAT_16BIT_FANS (1 << 3)
242#define FEAT_TEMP_OFFSET (1 << 4)
5d8d2f2b 243#define FEAT_TEMP_PECI (1 << 5)
19529784 244#define FEAT_TEMP_OLD_PECI (1 << 6)
483db43e
GR		 245
246static const struct it87_devices it87_devices[] = {
247 [it87] = {
248 .name = "it87",
249 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
250 },
251 [it8712] = {
252 .name = "it8712",
253 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
254 },
255 [it8716] = {
256 .name = "it8716",
257 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET,
258 },
259 [it8718] = {
260 .name = "it8718",
19529784
GR		 261 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
262 | FEAT_TEMP_OLD_PECI,
263 .old_peci_mask = 0x4,
483db43e
GR		 264 },
265 [it8720] = {
266 .name = "it8720",
19529784
GR		 267 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
268 | FEAT_TEMP_OLD_PECI,
269 .old_peci_mask = 0x4,
483db43e
GR		 270 },
271 [it8721] = {
272 .name = "it8721",
273 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
19529784 274 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI,
5d8d2f2b 275 .peci_mask = 0x05,
19529784 276 .old_peci_mask = 0x02, /* Actually reports PCH */
483db43e
GR		 277 },
278 [it8728] = {
279 .name = "it8728",
280 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
5d8d2f2b
GR		 281 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI,
282 .peci_mask = 0x07,
483db43e
GR		 283 },
284 [it8782] = {
285 .name = "it8782",
19529784
GR		 286 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
287 | FEAT_TEMP_OLD_PECI,
288 .old_peci_mask = 0x4,
483db43e
GR		 289 },
290 [it8783] = {
291 .name = "it8783",
19529784
GR		 292 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
293 | FEAT_TEMP_OLD_PECI,
294 .old_peci_mask = 0x4,
483db43e
GR		 295 },
296};
297
298#define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
299#define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
300#define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
301#define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
302#define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
5d8d2f2b
GR		 303#define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
304 ((data)->peci_mask & (1 << nr)))
19529784
GR		 305#define has_temp_old_peci(data, nr) \
306 (((data)->features & FEAT_TEMP_OLD_PECI) && \
307 ((data)->old_peci_mask & (1 << nr)))
1da177e4 308
b74f3fdd 309struct it87_sio_data {
310 enum chips type;
311 /* Values read from Super-I/O config space */
0475169c 312 u8 revision;
b74f3fdd 313 u8 vid_value;
d9b327c3 314 u8 beep_pin;
738e5e05 315 u8 internal; /* Internal sensors can be labeled */
591ec650 316 /* Features skipped based on config or DMI */
9172b5d1 317 u16 skip_in;
895ff267 318 u8 skip_vid;
591ec650 319 u8 skip_fan;
98dd22c3 320 u8 skip_pwm;
4573acbc 321 u8 skip_temp;
b74f3fdd 322};
323
4a0d71cf
GR		 324/*
325 * For each registered chip, we need to keep some data in memory.
326 * The structure is dynamically allocated.
327 */
1da177e4 328struct it87_data {
1beeffe4 329 struct device *hwmon_dev;
1da177e4 330 enum chips type;
483db43e 331 u16 features;
19529784
GR		 332 u8 peci_mask;
333 u8 old_peci_mask;
1da177e4 334
b74f3fdd 335 unsigned short addr;
336 const char *name;
9a61bf63 337 struct mutex update_lock;
1da177e4
LT		 338 char valid; /* !=0 if following fields are valid */
339 unsigned long last_updated; /* In jiffies */
340
44c1bcd4 341 u16 in_scaled; /* Internal voltage sensors are scaled */
929c6a56 342 u8 in[9][3]; /* [nr][0]=in, [1]=min, [2]=max */
9060f8bd 343 u8 has_fan; /* Bitfield, fans enabled */
e1169ba0 344 u16 fan[5][2]; /* Register values, [nr][0]=fan, [1]=min */
4573acbc 345 u8 has_temp; /* Bitfield, temp sensors enabled */
161d898a 346 s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
19529784
GR		 347 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
348 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
1da177e4
LT		 349 u8 fan_div[3]; /* Register encoding, shifted right */
350 u8 vid; /* Register encoding, combined */
a7be58a1 351 u8 vrm;
1da177e4 352 u32 alarms; /* Register encoding, combined */
d9b327c3 353 u8 beeps; /* Register encoding */
1da177e4 354 u8 fan_main_ctrl; /* Register value */
f8d0c19a 355 u8 fan_ctl; /* Register value */
b99883dc 356
4a0d71cf
GR		 357 /*
358 * The following 3 arrays correspond to the same registers up to
6229cdb2
JD		 359 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
360 * 7, and we want to preserve settings on mode changes, so we have
361 * to track all values separately.
362 * Starting with the IT8721F, the manual PWM duty cycles are stored
363 * in separate registers (8-bit values), so the separate tracking
364 * is no longer needed, but it is still done to keep the driver
4a0d71cf
GR		 365 * simple.
366 */
b99883dc 367 u8 pwm_ctrl[3]; /* Register value */
6229cdb2 368 u8 pwm_duty[3]; /* Manual PWM value set by user */
b99883dc 369 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD		 370
371 /* Automatic fan speed control registers */
372 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
373 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4 374};
0df6454d 375
0531d98b 376static int adc_lsb(const struct it87_data *data, int nr)
44c1bcd4 377{
0531d98b
GR		 378 int lsb = has_12mv_adc(data) ? 12 : 16;
379 if (data->in_scaled & (1 << nr))
380 lsb <<= 1;
381 return lsb;
382}
44c1bcd4 383
0531d98b
GR		 384static u8 in_to_reg(const struct it87_data *data, int nr, long val)
385{
386 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
44c1bcd4
JD		 387 return SENSORS_LIMIT(val, 0, 255);
388}
389
390static int in_from_reg(const struct it87_data *data, int nr, int val)
391{
0531d98b 392 return val * adc_lsb(data, nr);
44c1bcd4 393}
0df6454d
JD		 394
395static inline u8 FAN_TO_REG(long rpm, int div)
396{
397 if (rpm == 0)
398 return 255;
399 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
400 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
401 254);
402}
403
404static inline u16 FAN16_TO_REG(long rpm)
405{
406 if (rpm == 0)
407 return 0xffff;
408 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
409}
410
411#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
412 1350000 / ((val) * (div)))
413/* The divider is fixed to 2 in 16-bit mode */
414#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
415 1350000 / ((val) * 2))
416
417#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
418 ((val) + 500) / 1000), -128, 127))
419#define TEMP_FROM_REG(val) ((val) * 1000)
420
44c1bcd4
JD		 421static u8 pwm_to_reg(const struct it87_data *data, long val)
422{
16b5dda2 423 if (has_newer_autopwm(data))
44c1bcd4
JD		 424 return val;
425 else
426 return val >> 1;
427}
428
429static int pwm_from_reg(const struct it87_data *data, u8 reg)
430{
16b5dda2 431 if (has_newer_autopwm(data))
44c1bcd4
JD		 432 return reg;
433 else
434 return (reg & 0x7f) << 1;
435}
436
0df6454d
JD		 437
438static int DIV_TO_REG(int val)
439{
440 int answer = 0;
441 while (answer < 7 && (val >>= 1))
442 answer++;
443 return answer;
444}
445#define DIV_FROM_REG(val) (1 << (val))
446
447static const unsigned int pwm_freq[8] = {
448 48000000 / 128,
449 24000000 / 128,
450 12000000 / 128,
451 8000000 / 128,
452 6000000 / 128,
453 3000000 / 128,
454 1500000 / 128,
455 750000 / 128,
456};
1da177e4 457
b74f3fdd 458static int it87_probe(struct platform_device *pdev);
281dfd0b 459static int it87_remove(struct platform_device *pdev);
1da177e4 460
b74f3fdd 461static int it87_read_value(struct it87_data *data, u8 reg);
462static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 463static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 464static int it87_check_pwm(struct device *dev);
465static void it87_init_device(struct platform_device *pdev);
1da177e4
LT		 466
467
b74f3fdd 468static struct platform_driver it87_driver = {
cdaf7934 469 .driver = {
87218842 470 .owner = THIS_MODULE,
b74f3fdd 471 .name = DRVNAME,
cdaf7934 472 },
b74f3fdd 473 .probe = it87_probe,
9e5e9b7a 474 .remove = it87_remove,
fde09509
JD		 475};
476
20ad93d4 477static ssize_t show_in(struct device *dev, struct device_attribute *attr,
929c6a56 478 char *buf)
1da177e4 479{
929c6a56
GR		 480 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
481 int nr = sattr->nr;
482 int index = sattr->index;
20ad93d4 483
1da177e4 484 struct it87_data *data = it87_update_device(dev);
929c6a56 485 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1da177e4
LT		 486}
487
929c6a56
GR		 488static ssize_t set_in(struct device *dev, struct device_attribute *attr,
489 const char *buf, size_t count)
1da177e4 490{
929c6a56
GR		 491 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
492 int nr = sattr->nr;
493 int index = sattr->index;
20ad93d4 494
b74f3fdd 495 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 496 unsigned long val;
497
179c4fdb 498 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 499 return -EINVAL;
1da177e4 500
9a61bf63 501 mutex_lock(&data->update_lock);
929c6a56
GR		 502 data->in[nr][index] = in_to_reg(data, nr, val);
503 it87_write_value(data,
504 index == 1 ? IT87_REG_VIN_MIN(nr)
505 : IT87_REG_VIN_MAX(nr),
506 data->in[nr][index]);
9a61bf63 507 mutex_unlock(&data->update_lock);
1da177e4
LT		 508 return count;
509}
20ad93d4 510
929c6a56
GR		 511static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
512static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
513 0, 1);
514static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
515 0, 2);
f5f64501 516
929c6a56
GR		 517static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
518static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
519 1, 1);
520static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
521 1, 2);
1da177e4 522
929c6a56
GR		 523static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
524static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
525 2, 1);
526static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
527 2, 2);
1da177e4 528
929c6a56
GR		 529static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
530static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
531 3, 1);
532static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
533 3, 2);
534
535static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
536static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
537 4, 1);
538static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
539 4, 2);
540
541static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
542static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
543 5, 1);
544static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
545 5, 2);
546
547static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
548static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
549 6, 1);
550static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
551 6, 2);
552
553static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
554static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
555 7, 1);
556static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
557 7, 2);
558
559static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1da177e4
LT		 560
561/* 3 temperatures */
20ad93d4 562static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
60ca385a 563 char *buf)
1da177e4 564{
60ca385a
GR		 565 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
566 int nr = sattr->nr;
567 int index = sattr->index;
1da177e4 568 struct it87_data *data = it87_update_device(dev);
20ad93d4 569
60ca385a 570 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1da177e4 571}
20ad93d4 572
60ca385a
GR		 573static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
574 const char *buf, size_t count)
1da177e4 575{
60ca385a
GR		 576 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
577 int nr = sattr->nr;
578 int index = sattr->index;
b74f3fdd 579 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 580 long val;
161d898a 581 u8 reg, regval;
f5f64501 582
179c4fdb 583 if (kstrtol(buf, 10, &val) < 0)
f5f64501 584 return -EINVAL;
1da177e4 585
9a61bf63 586 mutex_lock(&data->update_lock);
161d898a
GR		 587
588 switch (index) {
589 default:
590 case 1:
591 reg = IT87_REG_TEMP_LOW(nr);
592 break;
593 case 2:
594 reg = IT87_REG_TEMP_HIGH(nr);
595 break;
596 case 3:
597 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
598 if (!(regval & 0x80)) {
599 regval |= 0x80;
600 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
601 }
602 data->valid = 0;
603 reg = IT87_REG_TEMP_OFFSET[nr];
604 break;
605 }
606
60ca385a 607 data->temp[nr][index] = TEMP_TO_REG(val);
161d898a 608 it87_write_value(data, reg, data->temp[nr][index]);
9a61bf63 609 mutex_unlock(&data->update_lock);
1da177e4
LT		 610 return count;
611}
1da177e4 612
60ca385a
GR		 613static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
614static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
615 0, 1);
616static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
617 0, 2);
161d898a
GR		 618static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
619 set_temp, 0, 3);
60ca385a
GR		 620static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
621static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
622 1, 1);
623static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
624 1, 2);
161d898a
GR		 625static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
626 set_temp, 1, 3);
60ca385a
GR		 627static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
628static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
629 2, 1);
630static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
631 2, 2);
161d898a
GR		 632static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
633 set_temp, 2, 3);
1da177e4 634
2cece01f
GR		 635static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
636 char *buf)
1da177e4 637{
20ad93d4
JD		 638 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
639 int nr = sensor_attr->index;
1da177e4 640 struct it87_data *data = it87_update_device(dev);
4a0d71cf 641 u8 reg = data->sensor; /* In case value is updated while used */
19529784 642 u8 extra = data->extra;
5f2dc798 643
19529784
GR		 644 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1))
645 || (has_temp_old_peci(data, nr) && (extra & 0x80)))
5d8d2f2b 646 return sprintf(buf, "6\n"); /* Intel PECI */
1da177e4
LT		 647 if (reg & (1 << nr))
648 return sprintf(buf, "3\n"); /* thermal diode */
649 if (reg & (8 << nr))
4ed10779 650 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT		 651 return sprintf(buf, "0\n"); /* disabled */
652}
2cece01f
GR		 653
654static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
655 const char *buf, size_t count)
1da177e4 656{
20ad93d4
JD		 657 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
658 int nr = sensor_attr->index;
659
b74f3fdd 660 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 661 long val;
19529784 662 u8 reg, extra;
f5f64501 663
179c4fdb 664 if (kstrtol(buf, 10, &val) < 0)
f5f64501 665 return -EINVAL;
1da177e4 666
8acf07c5
JD		 667 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
668 reg &= ~(1 << nr);
669 reg &= ~(8 << nr);
5d8d2f2b
GR		 670 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
671 reg &= 0x3f;
19529784
GR		 672 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
673 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
674 extra &= 0x7f;
4ed10779 675 if (val == 2) { /* backwards compatibility */
1d9bcf6a
GR		 676 dev_warn(dev,
677 "Sensor type 2 is deprecated, please use 4 instead\n");
4ed10779
JD		 678 val = 4;
679 }
5d8d2f2b 680 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1da177e4 681 if (val == 3)
8acf07c5 682 reg |= 1 << nr;
4ed10779 683 else if (val == 4)
8acf07c5 684 reg |= 8 << nr;
5d8d2f2b
GR		 685 else if (has_temp_peci(data, nr) && val == 6)
686 reg |= (nr + 1) << 6;
19529784
GR		 687 else if (has_temp_old_peci(data, nr) && val == 6)
688 extra |= 0x80;
8acf07c5 689 else if (val != 0)
1da177e4 690 return -EINVAL;
8acf07c5
JD		 691
692 mutex_lock(&data->update_lock);
693 data->sensor = reg;
19529784 694 data->extra = extra;
b74f3fdd 695 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
19529784
GR		 696 if (has_temp_old_peci(data, nr))
697 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
2b3d1d87 698 data->valid = 0; /* Force cache refresh */
9a61bf63 699 mutex_unlock(&data->update_lock);
1da177e4
LT		 700 return count;
701}
1da177e4 702
2cece01f
GR		 703static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
704 set_temp_type, 0);
705static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
706 set_temp_type, 1);
707static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
708 set_temp_type, 2);
1da177e4
LT		 709
710/* 3 Fans */
b99883dc
JD		 711
712static int pwm_mode(const struct it87_data *data, int nr)
713{
714 int ctrl = data->fan_main_ctrl & (1 << nr);
715
716 if (ctrl == 0) /* Full speed */
717 return 0;
718 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
719 return 2;
720 else /* Manual mode */
721 return 1;
722}
723
20ad93d4 724static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
e1169ba0 725 char *buf)
1da177e4 726{
e1169ba0
GR		 727 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
728 int nr = sattr->nr;
729 int index = sattr->index;
730 int speed;
1da177e4 731 struct it87_data *data = it87_update_device(dev);
20ad93d4 732
e1169ba0
GR		 733 speed = has_16bit_fans(data) ?
734 FAN16_FROM_REG(data->fan[nr][index]) :
735 FAN_FROM_REG(data->fan[nr][index],
736 DIV_FROM_REG(data->fan_div[nr]));
737 return sprintf(buf, "%d\n", speed);
1da177e4 738}
e1169ba0 739
20ad93d4
JD		 740static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
741 char *buf)
1da177e4 742{
20ad93d4
JD		 743 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
744 int nr = sensor_attr->index;
745
1da177e4
LT		 746 struct it87_data *data = it87_update_device(dev);
747 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
748}
5f2dc798
JD		 749static ssize_t show_pwm_enable(struct device *dev,
750 struct device_attribute *attr, char *buf)
1da177e4 751{
20ad93d4
JD		 752 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
753 int nr = sensor_attr->index;
754
1da177e4 755 struct it87_data *data = it87_update_device(dev);
b99883dc 756 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 757}
20ad93d4
JD		 758static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
759 char *buf)
1da177e4 760{
20ad93d4
JD		 761 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
762 int nr = sensor_attr->index;
763
1da177e4 764 struct it87_data *data = it87_update_device(dev);
44c1bcd4
JD		 765 return sprintf(buf, "%d\n",
766 pwm_from_reg(data, data->pwm_duty[nr]));
1da177e4 767}
f8d0c19a
JD		 768static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
769 char *buf)
770{
771 struct it87_data *data = it87_update_device(dev);
772 int index = (data->fan_ctl >> 4) & 0x07;
773
774 return sprintf(buf, "%u\n", pwm_freq[index]);
775}
e1169ba0
GR		 776
777static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
778 const char *buf, size_t count)
1da177e4 779{
e1169ba0
GR		 780 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
781 int nr = sattr->nr;
782 int index = sattr->index;
20ad93d4 783
b74f3fdd 784 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 785 long val;
7f999aa7 786 u8 reg;
1da177e4 787
179c4fdb 788 if (kstrtol(buf, 10, &val) < 0)
f5f64501
JD		 789 return -EINVAL;
790
9a61bf63 791 mutex_lock(&data->update_lock);
e1169ba0
GR		 792
793 if (has_16bit_fans(data)) {
794 data->fan[nr][index] = FAN16_TO_REG(val);
795 it87_write_value(data, IT87_REG_FAN_MIN[nr],
796 data->fan[nr][index] & 0xff);
797 it87_write_value(data, IT87_REG_FANX_MIN[nr],
798 data->fan[nr][index] >> 8);
799 } else {
800 reg = it87_read_value(data, IT87_REG_FAN_DIV);
801 switch (nr) {
802 case 0:
803 data->fan_div[nr] = reg & 0x07;
804 break;
805 case 1:
806 data->fan_div[nr] = (reg >> 3) & 0x07;
807 break;
808 case 2:
809 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
810 break;
811 }
812 data->fan[nr][index] =
813 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
814 it87_write_value(data, IT87_REG_FAN_MIN[nr],
815 data->fan[nr][index]);
07eab46d
JD		 816 }
817
9a61bf63 818 mutex_unlock(&data->update_lock);
1da177e4
LT		 819 return count;
820}
e1169ba0 821
20ad93d4
JD		 822static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
823 const char *buf, size_t count)
1da177e4 824{
20ad93d4
JD		 825 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
826 int nr = sensor_attr->index;
827
b74f3fdd 828 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 829 unsigned long val;
8ab4ec3e 830 int min;
1da177e4
LT		 831 u8 old;
832
179c4fdb 833 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 834 return -EINVAL;
835
9a61bf63 836 mutex_lock(&data->update_lock);
b74f3fdd 837 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 838
8ab4ec3e 839 /* Save fan min limit */
e1169ba0 840 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT		 841
842 switch (nr) {
843 case 0:
844 case 1:
845 data->fan_div[nr] = DIV_TO_REG(val);
846 break;
847 case 2:
848 if (val < 8)
849 data->fan_div[nr] = 1;
850 else
851 data->fan_div[nr] = 3;
852 }
853 val = old & 0x80;
854 val |= (data->fan_div[0] & 0x07);
855 val |= (data->fan_div[1] & 0x07) << 3;
856 if (data->fan_div[2] == 3)
857 val |= 0x1 << 6;
b74f3fdd 858 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 859
8ab4ec3e 860 /* Restore fan min limit */
e1169ba0
GR		 861 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
862 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
8ab4ec3e 863
9a61bf63 864 mutex_unlock(&data->update_lock);
1da177e4
LT		 865 return count;
866}
cccfc9c4
JD		 867
868/* Returns 0 if OK, -EINVAL otherwise */
869static int check_trip_points(struct device *dev, int nr)
870{
871 const struct it87_data *data = dev_get_drvdata(dev);
872 int i, err = 0;
873
874 if (has_old_autopwm(data)) {
875 for (i = 0; i < 3; i++) {
876 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
877 err = -EINVAL;
878 }
879 for (i = 0; i < 2; i++) {
880 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
881 err = -EINVAL;
882 }
883 }
884
885 if (err) {
1d9bcf6a
GR		 886 dev_err(dev,
887 "Inconsistent trip points, not switching to automatic mode\n");
cccfc9c4
JD		 888 dev_err(dev, "Adjust the trip points and try again\n");
889 }
890 return err;
891}
892
20ad93d4
JD		 893static ssize_t set_pwm_enable(struct device *dev,
894 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 895{
20ad93d4
JD		 896 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
897 int nr = sensor_attr->index;
898
b74f3fdd 899 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 900 long val;
1da177e4 901
179c4fdb 902 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD		 903 return -EINVAL;
904
cccfc9c4
JD		 905 /* Check trip points before switching to automatic mode */
906 if (val == 2) {
907 if (check_trip_points(dev, nr) < 0)
908 return -EINVAL;
909 }
910
9a61bf63 911 mutex_lock(&data->update_lock);
1da177e4
LT		 912
913 if (val == 0) {
914 int tmp;
915 /* make sure the fan is on when in on/off mode */
b74f3fdd 916 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
917 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT		 918 /* set on/off mode */
919 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD		 920 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
921 data->fan_main_ctrl);
b99883dc
JD		 922 } else {
923 if (val == 1) /* Manual mode */
16b5dda2 924 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
6229cdb2
JD		 925 data->pwm_temp_map[nr] :
926 data->pwm_duty[nr];
b99883dc
JD		 927 else /* Automatic mode */
928 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
929 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT		 930 /* set SmartGuardian mode */
931 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD		 932 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
933 data->fan_main_ctrl);
1da177e4
LT		 934 }
935
9a61bf63 936 mutex_unlock(&data->update_lock);
1da177e4
LT		 937 return count;
938}
20ad93d4
JD		 939static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
940 const char *buf, size_t count)
1da177e4 941{
20ad93d4
JD		 942 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
943 int nr = sensor_attr->index;
944
b74f3fdd 945 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 946 long val;
1da177e4 947
179c4fdb 948 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT		 949 return -EINVAL;
950
9a61bf63 951 mutex_lock(&data->update_lock);
16b5dda2 952 if (has_newer_autopwm(data)) {
4a0d71cf
GR		 953 /*
954 * If we are in automatic mode, the PWM duty cycle register
955 * is read-only so we can't write the value.
956 */
6229cdb2
JD		 957 if (data->pwm_ctrl[nr] & 0x80) {
958 mutex_unlock(&data->update_lock);
959 return -EBUSY;
960 }
961 data->pwm_duty[nr] = pwm_to_reg(data, val);
962 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
963 data->pwm_duty[nr]);
964 } else {
965 data->pwm_duty[nr] = pwm_to_reg(data, val);
4a0d71cf
GR		 966 /*
967 * If we are in manual mode, write the duty cycle immediately;
968 * otherwise, just store it for later use.
969 */
6229cdb2
JD		 970 if (!(data->pwm_ctrl[nr] & 0x80)) {
971 data->pwm_ctrl[nr] = data->pwm_duty[nr];
972 it87_write_value(data, IT87_REG_PWM(nr),
973 data->pwm_ctrl[nr]);
974 }
b99883dc 975 }
9a61bf63 976 mutex_unlock(&data->update_lock);
1da177e4
LT		 977 return count;
978}
f8d0c19a
JD		 979static ssize_t set_pwm_freq(struct device *dev,
980 struct device_attribute *attr, const char *buf, size_t count)
981{
b74f3fdd 982 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 983 unsigned long val;
f8d0c19a
JD		 984 int i;
985
179c4fdb 986 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 987 return -EINVAL;
988
f8d0c19a
JD		 989 /* Search for the nearest available frequency */
990 for (i = 0; i < 7; i++) {
991 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
992 break;
993 }
994
995 mutex_lock(&data->update_lock);
b74f3fdd 996 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 997 data->fan_ctl |= i << 4;
b74f3fdd 998 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD		 999 mutex_unlock(&data->update_lock);
1000
1001 return count;
1002}
94ac7ee6
JD		 1003static ssize_t show_pwm_temp_map(struct device *dev,
1004 struct device_attribute *attr, char *buf)
1005{
1006 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1007 int nr = sensor_attr->index;
1008
1009 struct it87_data *data = it87_update_device(dev);
1010 int map;
1011
1012 if (data->pwm_temp_map[nr] < 3)
1013 map = 1 << data->pwm_temp_map[nr];
1014 else
1015 map = 0; /* Should never happen */
1016 return sprintf(buf, "%d\n", map);
1017}
1018static ssize_t set_pwm_temp_map(struct device *dev,
1019 struct device_attribute *attr, const char *buf, size_t count)
1020{
1021 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1022 int nr = sensor_attr->index;
1023
1024 struct it87_data *data = dev_get_drvdata(dev);
1025 long val;
1026 u8 reg;
1027
4a0d71cf
GR		 1028 /*
1029 * This check can go away if we ever support automatic fan speed
1030 * control on newer chips.
1031 */
4f3f51bc
JD		 1032 if (!has_old_autopwm(data)) {
1033 dev_notice(dev, "Mapping change disabled for safety reasons\n");
1034 return -EINVAL;
1035 }
1036
179c4fdb 1037 if (kstrtol(buf, 10, &val) < 0)
94ac7ee6
JD		 1038 return -EINVAL;
1039
1040 switch (val) {
1041 case (1 << 0):
1042 reg = 0x00;
1043 break;
1044 case (1 << 1):
1045 reg = 0x01;
1046 break;
1047 case (1 << 2):
1048 reg = 0x02;
1049 break;
1050 default:
1051 return -EINVAL;
1052 }
1053
1054 mutex_lock(&data->update_lock);
1055 data->pwm_temp_map[nr] = reg;
4a0d71cf
GR		 1056 /*
1057 * If we are in automatic mode, write the temp mapping immediately;
1058 * otherwise, just store it for later use.
1059 */
94ac7ee6
JD		 1060 if (data->pwm_ctrl[nr] & 0x80) {
1061 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1062 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1063 }
1064 mutex_unlock(&data->update_lock);
1065 return count;
1066}
1da177e4 1067
4f3f51bc
JD		 1068static ssize_t show_auto_pwm(struct device *dev,
1069 struct device_attribute *attr, char *buf)
1070{
1071 struct it87_data *data = it87_update_device(dev);
1072 struct sensor_device_attribute_2 *sensor_attr =
1073 to_sensor_dev_attr_2(attr);
1074 int nr = sensor_attr->nr;
1075 int point = sensor_attr->index;
1076
44c1bcd4
JD		 1077 return sprintf(buf, "%d\n",
1078 pwm_from_reg(data, data->auto_pwm[nr][point]));
4f3f51bc
JD		 1079}
1080
1081static ssize_t set_auto_pwm(struct device *dev,
1082 struct device_attribute *attr, const char *buf, size_t count)
1083{
1084 struct it87_data *data = dev_get_drvdata(dev);
1085 struct sensor_device_attribute_2 *sensor_attr =
1086 to_sensor_dev_attr_2(attr);
1087 int nr = sensor_attr->nr;
1088 int point = sensor_attr->index;
1089 long val;
1090
179c4fdb 1091 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
4f3f51bc
JD		 1092 return -EINVAL;
1093
1094 mutex_lock(&data->update_lock);
44c1bcd4 1095 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
4f3f51bc
JD		 1096 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1097 data->auto_pwm[nr][point]);
1098 mutex_unlock(&data->update_lock);
1099 return count;
1100}
1101
1102static ssize_t show_auto_temp(struct device *dev,
1103 struct device_attribute *attr, char *buf)
1104{
1105 struct it87_data *data = it87_update_device(dev);
1106 struct sensor_device_attribute_2 *sensor_attr =
1107 to_sensor_dev_attr_2(attr);
1108 int nr = sensor_attr->nr;
1109 int point = sensor_attr->index;
1110
1111 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1112}
1113
1114static ssize_t set_auto_temp(struct device *dev,
1115 struct device_attribute *attr, const char *buf, size_t count)
1116{
1117 struct it87_data *data = dev_get_drvdata(dev);
1118 struct sensor_device_attribute_2 *sensor_attr =
1119 to_sensor_dev_attr_2(attr);
1120 int nr = sensor_attr->nr;
1121 int point = sensor_attr->index;
1122 long val;
1123
179c4fdb 1124 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
4f3f51bc
JD		 1125 return -EINVAL;
1126
1127 mutex_lock(&data->update_lock);
1128 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1129 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1130 data->auto_temp[nr][point]);
1131 mutex_unlock(&data->update_lock);
1132 return count;
1133}
1134
e1169ba0
GR		 1135static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1136static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1137 0, 1);
1138static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1139 set_fan_div, 0);
1140
1141static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1142static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1143 1, 1);
1144static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1145 set_fan_div, 1);
1146
1147static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1148static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1149 2, 1);
1150static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1151 set_fan_div, 2);
1152
1153static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1154static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1155 3, 1);
1da177e4 1156
e1169ba0
GR		 1157static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1158static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1159 4, 1);
1da177e4 1160
c4458db3
GR		 1161static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1162 show_pwm_enable, set_pwm_enable, 0);
1163static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1164static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
1165static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR,
1166 show_pwm_temp_map, set_pwm_temp_map, 0);
1167static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1168 show_auto_pwm, set_auto_pwm, 0, 0);
1169static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1170 show_auto_pwm, set_auto_pwm, 0, 1);
1171static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1172 show_auto_pwm, set_auto_pwm, 0, 2);
1173static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1174 show_auto_pwm, NULL, 0, 3);
1175static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1176 show_auto_temp, set_auto_temp, 0, 1);
1177static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1178 show_auto_temp, set_auto_temp, 0, 0);
1179static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1180 show_auto_temp, set_auto_temp, 0, 2);
1181static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1182 show_auto_temp, set_auto_temp, 0, 3);
1183static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1184 show_auto_temp, set_auto_temp, 0, 4);
1185
1186static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1187 show_pwm_enable, set_pwm_enable, 1);
1188static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1189static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL);
1190static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR,
1191 show_pwm_temp_map, set_pwm_temp_map, 1);
1192static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1193 show_auto_pwm, set_auto_pwm, 1, 0);
1194static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1195 show_auto_pwm, set_auto_pwm, 1, 1);
1196static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1197 show_auto_pwm, set_auto_pwm, 1, 2);
1198static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1199 show_auto_pwm, NULL, 1, 3);
1200static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1201 show_auto_temp, set_auto_temp, 1, 1);
1202static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1203 show_auto_temp, set_auto_temp, 1, 0);
1204static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1205 show_auto_temp, set_auto_temp, 1, 2);
1206static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1207 show_auto_temp, set_auto_temp, 1, 3);
1208static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1209 show_auto_temp, set_auto_temp, 1, 4);
1210
1211static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1212 show_pwm_enable, set_pwm_enable, 2);
1213static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1214static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL);
1215static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR,
1216 show_pwm_temp_map, set_pwm_temp_map, 2);
1217static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1218 show_auto_pwm, set_auto_pwm, 2, 0);
1219static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1220 show_auto_pwm, set_auto_pwm, 2, 1);
1221static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1222 show_auto_pwm, set_auto_pwm, 2, 2);
1223static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1224 show_auto_pwm, NULL, 2, 3);
1225static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1226 show_auto_temp, set_auto_temp, 2, 1);
1227static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1228 show_auto_temp, set_auto_temp, 2, 0);
1229static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1230 show_auto_temp, set_auto_temp, 2, 2);
1231static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1232 show_auto_temp, set_auto_temp, 2, 3);
1233static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1234 show_auto_temp, set_auto_temp, 2, 4);
1da177e4
LT		 1235
1236/* Alarms */
5f2dc798
JD		 1237static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1238 char *buf)
1da177e4
LT		 1239{
1240 struct it87_data *data = it87_update_device(dev);
68188ba7 1241 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1242}
1d66c64c 1243static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1244
0124dd78
JD		 1245static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1246 char *buf)
1247{
1248 int bitnr = to_sensor_dev_attr(attr)->index;
1249 struct it87_data *data = it87_update_device(dev);
1250 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1251}
3d30f9e6
JD		 1252
1253static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1254 *attr, const char *buf, size_t count)
1255{
1256 struct it87_data *data = dev_get_drvdata(dev);
1257 long val;
1258 int config;
1259
179c4fdb 1260 if (kstrtol(buf, 10, &val) < 0 || val != 0)
3d30f9e6
JD		 1261 return -EINVAL;
1262
1263 mutex_lock(&data->update_lock);
1264 config = it87_read_value(data, IT87_REG_CONFIG);
1265 if (config < 0) {
1266 count = config;
1267 } else {
1268 config |= 1 << 5;
1269 it87_write_value(data, IT87_REG_CONFIG, config);
1270 /* Invalidate cache to force re-read */
1271 data->valid = 0;
1272 }
1273 mutex_unlock(&data->update_lock);
1274
1275 return count;
1276}
1277
0124dd78
JD		 1278static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1279static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1280static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1281static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1282static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1283static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1284static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1285static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1286static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1287static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1288static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1289static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1290static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1291static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1292static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1293static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
3d30f9e6
JD		 1294static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1295 show_alarm, clear_intrusion, 4);
0124dd78 1296
d9b327c3
JD		 1297static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1298 char *buf)
1299{
1300 int bitnr = to_sensor_dev_attr(attr)->index;
1301 struct it87_data *data = it87_update_device(dev);
1302 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1303}
1304static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1305 const char *buf, size_t count)
1306{
1307 int bitnr = to_sensor_dev_attr(attr)->index;
1308 struct it87_data *data = dev_get_drvdata(dev);
1309 long val;
1310
179c4fdb 1311 if (kstrtol(buf, 10, &val) < 0
d9b327c3
JD		 1312 || (val != 0 && val != 1))
1313 return -EINVAL;
1314
1315 mutex_lock(&data->update_lock);
1316 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1317 if (val)
1318 data->beeps |= (1 << bitnr);
1319 else
1320 data->beeps &= ~(1 << bitnr);
1321 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1322 mutex_unlock(&data->update_lock);
1323 return count;
1324}
1325
1326static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1327 show_beep, set_beep, 1);
1328static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1329static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1330static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1331static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1332static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1333static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1334static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1335/* fanX_beep writability is set later */
1336static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1337static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1338static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1339static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1340static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1341static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1342 show_beep, set_beep, 2);
1343static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1344static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1345
5f2dc798
JD		 1346static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1347 char *buf)
1da177e4 1348{
90d6619a 1349 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1350 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1351}
5f2dc798
JD		 1352static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1353 const char *buf, size_t count)
1da177e4 1354{
b74f3fdd 1355 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1356 unsigned long val;
1357
179c4fdb 1358 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 1359 return -EINVAL;
1da177e4 1360
1da177e4
LT		 1361 data->vrm = val;
1362
1363 return count;
1364}
1365static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1366
5f2dc798
JD		 1367static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1368 char *buf)
1da177e4
LT		 1369{
1370 struct it87_data *data = it87_update_device(dev);
1371 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1372}
1373static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1374
738e5e05
JD		 1375static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1376 char *buf)
1377{
3c4c4971 1378 static const char * const labels[] = {
738e5e05
JD		 1379 "+5V",
1380 "5VSB",
1381 "Vbat",
1382 };
3c4c4971 1383 static const char * const labels_it8721[] = {
44c1bcd4
JD		 1384 "+3.3V",
1385 "3VSB",
1386 "Vbat",
1387 };
1388 struct it87_data *data = dev_get_drvdata(dev);
738e5e05
JD		 1389 int nr = to_sensor_dev_attr(attr)->index;
1390
16b5dda2
JD		 1391 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1392 : labels[nr]);
738e5e05
JD		 1393}
1394static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1395static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1396static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1397
b74f3fdd 1398static ssize_t show_name(struct device *dev, struct device_attribute
1399 *devattr, char *buf)
1400{
1401 struct it87_data *data = dev_get_drvdata(dev);
1402 return sprintf(buf, "%s\n", data->name);
1403}
1404static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1405
9172b5d1
GR		 1406static struct attribute *it87_attributes_in[9][5] = {
1407{
87808be4 1408 &sensor_dev_attr_in0_input.dev_attr.attr,
87808be4 1409 &sensor_dev_attr_in0_min.dev_attr.attr,
87808be4 1410 &sensor_dev_attr_in0_max.dev_attr.attr,
0124dd78 1411 &sensor_dev_attr_in0_alarm.dev_attr.attr,
9172b5d1
GR		 1412 NULL
1413}, {
1414 &sensor_dev_attr_in1_input.dev_attr.attr,
1415 &sensor_dev_attr_in1_min.dev_attr.attr,
1416 &sensor_dev_attr_in1_max.dev_attr.attr,
0124dd78 1417 &sensor_dev_attr_in1_alarm.dev_attr.attr,
9172b5d1
GR		 1418 NULL
1419}, {
1420 &sensor_dev_attr_in2_input.dev_attr.attr,
1421 &sensor_dev_attr_in2_min.dev_attr.attr,
1422 &sensor_dev_attr_in2_max.dev_attr.attr,
0124dd78 1423 &sensor_dev_attr_in2_alarm.dev_attr.attr,
9172b5d1
GR		 1424 NULL
1425}, {
1426 &sensor_dev_attr_in3_input.dev_attr.attr,
1427 &sensor_dev_attr_in3_min.dev_attr.attr,
1428 &sensor_dev_attr_in3_max.dev_attr.attr,
0124dd78 1429 &sensor_dev_attr_in3_alarm.dev_attr.attr,
9172b5d1
GR		 1430 NULL
1431}, {
1432 &sensor_dev_attr_in4_input.dev_attr.attr,
1433 &sensor_dev_attr_in4_min.dev_attr.attr,
1434 &sensor_dev_attr_in4_max.dev_attr.attr,
0124dd78 1435 &sensor_dev_attr_in4_alarm.dev_attr.attr,
9172b5d1
GR		 1436 NULL
1437}, {
1438 &sensor_dev_attr_in5_input.dev_attr.attr,
1439 &sensor_dev_attr_in5_min.dev_attr.attr,
1440 &sensor_dev_attr_in5_max.dev_attr.attr,
0124dd78 1441 &sensor_dev_attr_in5_alarm.dev_attr.attr,
9172b5d1
GR		 1442 NULL
1443}, {
1444 &sensor_dev_attr_in6_input.dev_attr.attr,
1445 &sensor_dev_attr_in6_min.dev_attr.attr,
1446 &sensor_dev_attr_in6_max.dev_attr.attr,
0124dd78 1447 &sensor_dev_attr_in6_alarm.dev_attr.attr,
9172b5d1
GR		 1448 NULL
1449}, {
1450 &sensor_dev_attr_in7_input.dev_attr.attr,
1451 &sensor_dev_attr_in7_min.dev_attr.attr,
1452 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78 1453 &sensor_dev_attr_in7_alarm.dev_attr.attr,
9172b5d1
GR		 1454 NULL
1455}, {
1456 &sensor_dev_attr_in8_input.dev_attr.attr,
1457 NULL
1458} };
87808be4 1459
9172b5d1
GR		 1460static const struct attribute_group it87_group_in[9] = {
1461 { .attrs = it87_attributes_in[0] },
1462 { .attrs = it87_attributes_in[1] },
1463 { .attrs = it87_attributes_in[2] },
1464 { .attrs = it87_attributes_in[3] },
1465 { .attrs = it87_attributes_in[4] },
1466 { .attrs = it87_attributes_in[5] },
1467 { .attrs = it87_attributes_in[6] },
1468 { .attrs = it87_attributes_in[7] },
1469 { .attrs = it87_attributes_in[8] },
1470};
1471
4573acbc
GR		 1472static struct attribute *it87_attributes_temp[3][6] = {
1473{
87808be4 1474 &sensor_dev_attr_temp1_input.dev_attr.attr,
87808be4 1475 &sensor_dev_attr_temp1_max.dev_attr.attr,
87808be4 1476 &sensor_dev_attr_temp1_min.dev_attr.attr,
87808be4 1477 &sensor_dev_attr_temp1_type.dev_attr.attr,
0124dd78 1478 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
4573acbc
GR		 1479 NULL
1480} , {
1481 &sensor_dev_attr_temp2_input.dev_attr.attr,
1482 &sensor_dev_attr_temp2_max.dev_attr.attr,
1483 &sensor_dev_attr_temp2_min.dev_attr.attr,
1484 &sensor_dev_attr_temp2_type.dev_attr.attr,
0124dd78 1485 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
4573acbc
GR		 1486 NULL
1487} , {
1488 &sensor_dev_attr_temp3_input.dev_attr.attr,
1489 &sensor_dev_attr_temp3_max.dev_attr.attr,
1490 &sensor_dev_attr_temp3_min.dev_attr.attr,
1491 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78 1492 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
4573acbc
GR		 1493 NULL
1494} };
1495
1496static const struct attribute_group it87_group_temp[3] = {
1497 { .attrs = it87_attributes_temp[0] },
1498 { .attrs = it87_attributes_temp[1] },
1499 { .attrs = it87_attributes_temp[2] },
1500};
87808be4 1501
161d898a
GR		 1502static struct attribute *it87_attributes_temp_offset[] = {
1503 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1504 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1505 &sensor_dev_attr_temp3_offset.dev_attr.attr,
1506};
1507
4573acbc 1508static struct attribute *it87_attributes[] = {
87808be4 1509 &dev_attr_alarms.attr,
3d30f9e6 1510 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
b74f3fdd 1511 &dev_attr_name.attr,
87808be4
JD		 1512 NULL
1513};
1514
1515static const struct attribute_group it87_group = {
1516 .attrs = it87_attributes,
1517};
1518
9172b5d1 1519static struct attribute *it87_attributes_in_beep[] = {
d9b327c3
JD		 1520 &sensor_dev_attr_in0_beep.dev_attr.attr,
1521 &sensor_dev_attr_in1_beep.dev_attr.attr,
1522 &sensor_dev_attr_in2_beep.dev_attr.attr,
1523 &sensor_dev_attr_in3_beep.dev_attr.attr,
1524 &sensor_dev_attr_in4_beep.dev_attr.attr,
1525 &sensor_dev_attr_in5_beep.dev_attr.attr,
1526 &sensor_dev_attr_in6_beep.dev_attr.attr,
1527 &sensor_dev_attr_in7_beep.dev_attr.attr,
9172b5d1
GR		 1528 NULL
1529};
d9b327c3 1530
4573acbc 1531static struct attribute *it87_attributes_temp_beep[] = {
d9b327c3
JD		 1532 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1533 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1534 &sensor_dev_attr_temp3_beep.dev_attr.attr,
d9b327c3
JD		 1535};
1536
e1169ba0
GR		 1537static struct attribute *it87_attributes_fan[5][3+1] = { {
1538 &sensor_dev_attr_fan1_input.dev_attr.attr,
1539 &sensor_dev_attr_fan1_min.dev_attr.attr,
723a0aa0
JD		 1540 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1541 NULL
1542}, {
e1169ba0
GR		 1543 &sensor_dev_attr_fan2_input.dev_attr.attr,
1544 &sensor_dev_attr_fan2_min.dev_attr.attr,
723a0aa0
JD		 1545 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1546 NULL
1547}, {
e1169ba0
GR		 1548 &sensor_dev_attr_fan3_input.dev_attr.attr,
1549 &sensor_dev_attr_fan3_min.dev_attr.attr,
723a0aa0
JD		 1550 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1551 NULL
1552}, {
e1169ba0
GR		 1553 &sensor_dev_attr_fan4_input.dev_attr.attr,
1554 &sensor_dev_attr_fan4_min.dev_attr.attr,
723a0aa0
JD		 1555 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1556 NULL
1557}, {
e1169ba0
GR		 1558 &sensor_dev_attr_fan5_input.dev_attr.attr,
1559 &sensor_dev_attr_fan5_min.dev_attr.attr,
723a0aa0
JD		 1560 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1561 NULL
1562} };
1563
e1169ba0
GR		 1564static const struct attribute_group it87_group_fan[5] = {
1565 { .attrs = it87_attributes_fan[0] },
1566 { .attrs = it87_attributes_fan[1] },
1567 { .attrs = it87_attributes_fan[2] },
1568 { .attrs = it87_attributes_fan[3] },
1569 { .attrs = it87_attributes_fan[4] },
723a0aa0 1570};
87808be4 1571
e1169ba0 1572static const struct attribute *it87_attributes_fan_div[] = {
87808be4 1573 &sensor_dev_attr_fan1_div.dev_attr.attr,
87808be4 1574 &sensor_dev_attr_fan2_div.dev_attr.attr,
87808be4 1575 &sensor_dev_attr_fan3_div.dev_attr.attr,
723a0aa0
JD		 1576};
1577
723a0aa0 1578static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1579 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1580 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1581 &dev_attr_pwm1_freq.attr,
94ac7ee6 1582 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1583 NULL
1584}, {
1585 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1586 &sensor_dev_attr_pwm2.dev_attr.attr,
1587 &dev_attr_pwm2_freq.attr,
94ac7ee6 1588 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1589 NULL
1590}, {
1591 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1592 &sensor_dev_attr_pwm3.dev_attr.attr,
1593 &dev_attr_pwm3_freq.attr,
94ac7ee6 1594 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1595 NULL
1596} };
87808be4 1597
723a0aa0
JD		 1598static const struct attribute_group it87_group_pwm[3] = {
1599 { .attrs = it87_attributes_pwm[0] },
1600 { .attrs = it87_attributes_pwm[1] },
1601 { .attrs = it87_attributes_pwm[2] },
1602};
1603
4f3f51bc
JD		 1604static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1605 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1606 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1607 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1608 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1609 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1610 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1611 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1612 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1613 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1614 NULL
1615}, {
1616 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1617 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1618 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1619 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1620 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1621 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1622 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1623 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1624 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1625 NULL
1626}, {
1627 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1628 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1629 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1630 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1631 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1632 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1633 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1634 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1635 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1636 NULL
1637} };
1638
1639static const struct attribute_group it87_group_autopwm[3] = {
1640 { .attrs = it87_attributes_autopwm[0] },
1641 { .attrs = it87_attributes_autopwm[1] },
1642 { .attrs = it87_attributes_autopwm[2] },
1643};
1644
d9b327c3
JD		 1645static struct attribute *it87_attributes_fan_beep[] = {
1646 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1647 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1648 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1649 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1650 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1651};
1652
6a8d7acf 1653static struct attribute *it87_attributes_vid[] = {
87808be4
JD		 1654 &dev_attr_vrm.attr,
1655 &dev_attr_cpu0_vid.attr,
1656 NULL
1657};
1658
6a8d7acf
JD		 1659static const struct attribute_group it87_group_vid = {
1660 .attrs = it87_attributes_vid,
87808be4 1661};
1da177e4 1662
738e5e05
JD		 1663static struct attribute *it87_attributes_label[] = {
1664 &sensor_dev_attr_in3_label.dev_attr.attr,
1665 &sensor_dev_attr_in7_label.dev_attr.attr,
1666 &sensor_dev_attr_in8_label.dev_attr.attr,
1667 NULL
1668};
1669
1670static const struct attribute_group it87_group_label = {
fa8b6975 1671 .attrs = it87_attributes_label,
738e5e05
JD		 1672};
1673
2d8672c5 1674/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1675static int __init it87_find(unsigned short *address,
1676 struct it87_sio_data *sio_data)
1da177e4 1677{
5b0380c9 1678 int err;
b74f3fdd 1679 u16 chip_type;
98dd22c3 1680 const char *board_vendor, *board_name;
1da177e4 1681
5b0380c9
NG		 1682 err = superio_enter();
1683 if (err)
1684 return err;
1685
1686 err = -ENODEV;
67b671bc 1687 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1688
1689 switch (chip_type) {
1690 case IT8705F_DEVID:
1691 sio_data->type = it87;
1692 break;
1693 case IT8712F_DEVID:
1694 sio_data->type = it8712;
1695 break;
1696 case IT8716F_DEVID:
1697 case IT8726F_DEVID:
1698 sio_data->type = it8716;
1699 break;
1700 case IT8718F_DEVID:
1701 sio_data->type = it8718;
1702 break;
b4da93e4
JMS		 1703 case IT8720F_DEVID:
1704 sio_data->type = it8720;
1705 break;
44c1bcd4
JD		 1706 case IT8721F_DEVID:
1707 sio_data->type = it8721;
1708 break;
16b5dda2
JD		 1709 case IT8728F_DEVID:
1710 sio_data->type = it8728;
1711 break;
0531d98b
GR		 1712 case IT8782F_DEVID:
1713 sio_data->type = it8782;
1714 break;
1715 case IT8783E_DEVID:
1716 sio_data->type = it8783;
1717 break;
b74f3fdd 1718 case 0xffff: /* No device at all */
1719 goto exit;
1720 default:
a8ca1037 1721 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
b74f3fdd 1722 goto exit;
1723 }
1da177e4 1724
87673dd7 1725 superio_select(PME);
1da177e4 1726 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
a8ca1037 1727 pr_info("Device not activated, skipping\n");
1da177e4
LT		 1728 goto exit;
1729 }
1730
1731 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1732 if (*address == 0) {
a8ca1037 1733 pr_info("Base address not set, skipping\n");
1da177e4
LT		 1734 goto exit;
1735 }
1736
1737 err = 0;
0475169c 1738 sio_data->revision = superio_inb(DEVREV) & 0x0f;
a8ca1037 1739 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1740 chip_type, *address, sio_data->revision);
1da177e4 1741
738e5e05
JD		 1742 /* in8 (Vbat) is always internal */
1743 sio_data->internal = (1 << 2);
1744
87673dd7 1745 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD		 1746 if (sio_data->type == it87) {
1747 /* The IT8705F doesn't have VID pins at all */
1748 sio_data->skip_vid = 1;
d9b327c3
JD		 1749
1750 /* The IT8705F has a different LD number for GPIO */
1751 superio_select(5);
1752 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
0531d98b
GR		 1753 } else if (sio_data->type == it8783) {
1754 int reg25, reg27, reg2A, reg2C, regEF;
0531d98b
GR		 1755
1756 sio_data->skip_vid = 1; /* No VID */
1757
1758 superio_select(GPIO);
1759
1760 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1761 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1762 reg2A = superio_inb(IT87_SIO_PINX1_REG);
1763 reg2C = superio_inb(IT87_SIO_PINX2_REG);
1764 regEF = superio_inb(IT87_SIO_SPI_REG);
1765
0531d98b 1766 /* Check if fan3 is there or not */
9172b5d1 1767 if ((reg27 & (1 << 0)) || !(reg2C & (1 << 2)))
0531d98b
GR		 1768 sio_data->skip_fan |= (1 << 2);
1769 if ((reg25 & (1 << 4))
1770 || (!(reg2A & (1 << 1)) && (regEF & (1 << 0))))
1771 sio_data->skip_pwm |= (1 << 2);
1772
1773 /* Check if fan2 is there or not */
1774 if (reg27 & (1 << 7))
1775 sio_data->skip_fan |= (1 << 1);
1776 if (reg27 & (1 << 3))
1777 sio_data->skip_pwm |= (1 << 1);
1778
1779 /* VIN5 */
9172b5d1
GR		 1780 if ((reg27 & (1 << 0)) || (reg2C & (1 << 2)))
1781 sio_data->skip_in |= (1 << 5); /* No VIN5 */
0531d98b
GR		 1782
1783 /* VIN6 */
9172b5d1
GR		 1784 if (reg27 & (1 << 1))
1785 sio_data->skip_in |= (1 << 6); /* No VIN6 */
0531d98b
GR		 1786
1787 /*
1788 * VIN7
1789 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1790 */
9172b5d1
GR		 1791 if (reg27 & (1 << 2)) {
1792 /*
1793 * The data sheet is a bit unclear regarding the
1794 * internal voltage divider for VCCH5V. It says
1795 * "This bit enables and switches VIN7 (pin 91) to the
1796 * internal voltage divider for VCCH5V".
1797 * This is different to other chips, where the internal
1798 * voltage divider would connect VIN7 to an internal
1799 * voltage source. Maybe that is the case here as well.
1800 *
1801 * Since we don't know for sure, re-route it if that is
1802 * not the case, and ask the user to report if the
1803 * resulting voltage is sane.
1804 */
1805 if (!(reg2C & (1 << 1))) {
1806 reg2C |= (1 << 1);
1807 superio_outb(IT87_SIO_PINX2_REG, reg2C);
1808 pr_notice("Routing internal VCCH5V to in7.\n");
1809 }
1810 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
1811 pr_notice("Please report if it displays a reasonable voltage.\n");
1812 }
0531d98b
GR		 1813
1814 if (reg2C & (1 << 0))
1815 sio_data->internal |= (1 << 0);
1816 if (reg2C & (1 << 1))
1817 sio_data->internal |= (1 << 1);
1818
1819 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1820
895ff267 1821 } else {
87673dd7 1822 int reg;
9172b5d1 1823 bool uart6;
87673dd7
JD		 1824
1825 superio_select(GPIO);
44c1bcd4 1826
895ff267 1827 reg = superio_inb(IT87_SIO_GPIO3_REG);
0531d98b
GR		 1828 if (sio_data->type == it8721 || sio_data->type == it8728 ||
1829 sio_data->type == it8782) {
16b5dda2 1830 /*
0531d98b
GR		 1831 * IT8721F/IT8758E, and IT8782F don't have VID pins
1832 * at all, not sure about the IT8728F.
16b5dda2 1833 */
895ff267 1834 sio_data->skip_vid = 1;
44c1bcd4
JD		 1835 } else {
1836 /* We need at least 4 VID pins */
1837 if (reg & 0x0f) {
a8ca1037 1838 pr_info("VID is disabled (pins used for GPIO)\n");
44c1bcd4
JD		 1839 sio_data->skip_vid = 1;
1840 }
895ff267
JD		 1841 }
1842
591ec650
JD		 1843 /* Check if fan3 is there or not */
1844 if (reg & (1 << 6))
1845 sio_data->skip_pwm |= (1 << 2);
1846 if (reg & (1 << 7))
1847 sio_data->skip_fan |= (1 << 2);
1848
1849 /* Check if fan2 is there or not */
1850 reg = superio_inb(IT87_SIO_GPIO5_REG);
1851 if (reg & (1 << 1))
1852 sio_data->skip_pwm |= (1 << 1);
1853 if (reg & (1 << 2))
1854 sio_data->skip_fan |= (1 << 1);
1855
895ff267
JD		 1856 if ((sio_data->type == it8718 || sio_data->type == it8720)
1857 && !(sio_data->skip_vid))
b74f3fdd 1858 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD		 1859
1860 reg = superio_inb(IT87_SIO_PINX2_REG);
9172b5d1
GR		 1861
1862 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
1863
436cad2a
JD		 1864 /*
1865 * The IT8720F has no VIN7 pin, so VCCH should always be
1866 * routed internally to VIN7 with an internal divider.
1867 * Curiously, there still is a configuration bit to control
1868 * this, which means it can be set incorrectly. And even
1869 * more curiously, many boards out there are improperly
1870 * configured, even though the IT8720F datasheet claims
1871 * that the internal routing of VCCH to VIN7 is the default
1872 * setting. So we force the internal routing in this case.
0531d98b
GR		 1873 *
1874 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
9172b5d1
GR		 1875 * If UART6 is enabled, re-route VIN7 to the internal divider
1876 * if that is not already the case.
436cad2a 1877 */
9172b5d1 1878 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
436cad2a
JD		 1879 reg |= (1 << 1);
1880 superio_outb(IT87_SIO_PINX2_REG, reg);
a8ca1037 1881 pr_notice("Routing internal VCCH to in7\n");
436cad2a 1882 }
87673dd7 1883 if (reg & (1 << 0))
738e5e05 1884 sio_data->internal |= (1 << 0);
16b5dda2
JD		 1885 if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1886 sio_data->type == it8728)
738e5e05 1887 sio_data->internal |= (1 << 1);
d9b327c3 1888
9172b5d1
GR		 1889 /*
1890 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
1891 * While VIN7 can be routed to the internal voltage divider,
1892 * VIN5 and VIN6 are not available if UART6 is enabled.
4573acbc
GR		 1893 *
1894 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
1895 * is the temperature source. Since we can not read the
1896 * temperature source here, skip_temp is preliminary.
9172b5d1 1897 */
4573acbc 1898 if (uart6) {
9172b5d1 1899 sio_data->skip_in |= (1 << 5) | (1 << 6);
4573acbc
GR		 1900 sio_data->skip_temp |= (1 << 2);
1901 }
9172b5d1 1902
d9b327c3 1903 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1904 }
d9b327c3 1905 if (sio_data->beep_pin)
a8ca1037 1906 pr_info("Beeping is supported\n");
87673dd7 1907
98dd22c3
JD		 1908 /* Disable specific features based on DMI strings */
1909 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1910 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1911 if (board_vendor && board_name) {
1912 if (strcmp(board_vendor, "nVIDIA") == 0
1913 && strcmp(board_name, "FN68PT") == 0) {
4a0d71cf
GR		 1914 /*
1915 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
1916 * connected to a fan, but to something else. One user
1917 * has reported instant system power-off when changing
1918 * the PWM2 duty cycle, so we disable it.
1919 * I use the board name string as the trigger in case
1920 * the same board is ever used in other systems.
1921 */
a8ca1037 1922 pr_info("Disabling pwm2 due to hardware constraints\n");
98dd22c3
JD		 1923 sio_data->skip_pwm = (1 << 1);
1924 }
1925 }
1926
1da177e4
LT		 1927exit:
1928 superio_exit();
1929 return err;
1930}
1931
723a0aa0
JD		 1932static void it87_remove_files(struct device *dev)
1933{
1934 struct it87_data *data = platform_get_drvdata(pdev);
1935 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD		 1936 int i;
1937
1938 sysfs_remove_group(&dev->kobj, &it87_group);
9172b5d1
GR		 1939 for (i = 0; i < 9; i++) {
1940 if (sio_data->skip_in & (1 << i))
1941 continue;
1942 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
1943 if (it87_attributes_in_beep[i])
1944 sysfs_remove_file(&dev->kobj,
1945 it87_attributes_in_beep[i]);
1946 }
4573acbc
GR		 1947 for (i = 0; i < 3; i++) {
1948 if (!(data->has_temp & (1 << i)))
1949 continue;
1950 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
161d898a
GR		 1951 if (has_temp_offset(data))
1952 sysfs_remove_file(&dev->kobj,
1953 it87_attributes_temp_offset[i]);
4573acbc
GR		 1954 if (sio_data->beep_pin)
1955 sysfs_remove_file(&dev->kobj,
1956 it87_attributes_temp_beep[i]);
1957 }
723a0aa0
JD		 1958 for (i = 0; i < 5; i++) {
1959 if (!(data->has_fan & (1 << i)))
1960 continue;
e1169ba0 1961 sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
d9b327c3
JD		 1962 if (sio_data->beep_pin)
1963 sysfs_remove_file(&dev->kobj,
1964 it87_attributes_fan_beep[i]);
e1169ba0
GR		 1965 if (i < 3 && !has_16bit_fans(data))
1966 sysfs_remove_file(&dev->kobj,
1967 it87_attributes_fan_div[i]);
723a0aa0
JD		 1968 }
1969 for (i = 0; i < 3; i++) {
1970 if (sio_data->skip_pwm & (1 << 0))
1971 continue;
1972 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD		 1973 if (has_old_autopwm(data))
1974 sysfs_remove_group(&dev->kobj,
1975 &it87_group_autopwm[i]);
723a0aa0 1976 }
6a8d7acf
JD		 1977 if (!sio_data->skip_vid)
1978 sysfs_remove_group(&dev->kobj, &it87_group_vid);
738e5e05 1979 sysfs_remove_group(&dev->kobj, &it87_group_label);
723a0aa0
JD		 1980}
1981
6c931ae1 1982static int it87_probe(struct platform_device *pdev)
1da177e4 1983{
1da177e4 1984 struct it87_data *data;
b74f3fdd 1985 struct resource *res;
1986 struct device *dev = &pdev->dev;
1987 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0 1988 int err = 0, i;
1da177e4 1989 int enable_pwm_interface;
d9b327c3 1990 int fan_beep_need_rw;
b74f3fdd 1991
1992 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
62a1d05f
GR		 1993 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
1994 DRVNAME)) {
b74f3fdd 1995 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1996 (unsigned long)res->start,
87b4b663 1997 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
62a1d05f 1998 return -EBUSY;
8e9afcbb 1999 }
1da177e4 2000
62a1d05f
GR		 2001 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2002 if (!data)
2003 return -ENOMEM;
1da177e4 2004
b74f3fdd 2005 data->addr = res->start;
2006 data->type = sio_data->type;
483db43e 2007 data->features = it87_devices[sio_data->type].features;
5d8d2f2b 2008 data->peci_mask = it87_devices[sio_data->type].peci_mask;
19529784 2009 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
483db43e
GR		 2010 data->name = it87_devices[sio_data->type].name;
2011 /*
2012 * IT8705F Datasheet 0.4.1, 3h == Version G.
2013 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2014 * These are the first revisions with 16-bit tachometer support.
2015 */
2016 switch (data->type) {
2017 case it87:
2018 if (sio_data->revision >= 0x03) {
2019 data->features &= ~FEAT_OLD_AUTOPWM;
2020 data->features |= FEAT_16BIT_FANS;
2021 }
2022 break;
2023 case it8712:
2024 if (sio_data->revision >= 0x08) {
2025 data->features &= ~FEAT_OLD_AUTOPWM;
2026 data->features |= FEAT_16BIT_FANS;
2027 }
2028 break;
2029 default:
2030 break;
2031 }
1da177e4
LT		 2032
2033 /* Now, we do the remaining detection. */
b74f3fdd 2034 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
62a1d05f
GR		 2035 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2036 return -ENODEV;
1da177e4 2037
b74f3fdd 2038 platform_set_drvdata(pdev, data);
1da177e4 2039
9a61bf63 2040 mutex_init(&data->update_lock);
1da177e4 2041
1da177e4 2042 /* Check PWM configuration */
b74f3fdd 2043 enable_pwm_interface = it87_check_pwm(dev);
1da177e4 2044
44c1bcd4 2045 /* Starting with IT8721F, we handle scaling of internal voltages */
16b5dda2 2046 if (has_12mv_adc(data)) {
44c1bcd4
JD		 2047 if (sio_data->internal & (1 << 0))
2048 data->in_scaled |= (1 << 3); /* in3 is AVCC */
2049 if (sio_data->internal & (1 << 1))
2050 data->in_scaled |= (1 << 7); /* in7 is VSB */
2051 if (sio_data->internal & (1 << 2))
2052 data->in_scaled |= (1 << 8); /* in8 is Vbat */
0531d98b
GR		 2053 } else if (sio_data->type == it8782 || sio_data->type == it8783) {
2054 if (sio_data->internal & (1 << 0))
2055 data->in_scaled |= (1 << 3); /* in3 is VCC5V */
2056 if (sio_data->internal & (1 << 1))
2057 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
44c1bcd4
JD		 2058 }
2059
4573acbc
GR		 2060 data->has_temp = 0x07;
2061 if (sio_data->skip_temp & (1 << 2)) {
2062 if (sio_data->type == it8782
2063 && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2064 data->has_temp &= ~(1 << 2);
2065 }
2066
1da177e4 2067 /* Initialize the IT87 chip */
b74f3fdd 2068 it87_init_device(pdev);
1da177e4
LT		 2069
2070 /* Register sysfs hooks */
5f2dc798
JD		 2071 err = sysfs_create_group(&dev->kobj, &it87_group);
2072 if (err)
62a1d05f 2073 return err;
17d648bf 2074
9172b5d1
GR		 2075 for (i = 0; i < 9; i++) {
2076 if (sio_data->skip_in & (1 << i))
2077 continue;
2078 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2079 if (err)
62a1d05f 2080 goto error;
9172b5d1
GR		 2081 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2082 err = sysfs_create_file(&dev->kobj,
2083 it87_attributes_in_beep[i]);
2084 if (err)
62a1d05f 2085 goto error;
9172b5d1
GR		 2086 }
2087 }
2088
4573acbc
GR		 2089 for (i = 0; i < 3; i++) {
2090 if (!(data->has_temp & (1 << i)))
2091 continue;
2092 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
d9b327c3 2093 if (err)
62a1d05f 2094 goto error;
161d898a
GR		 2095 if (has_temp_offset(data)) {
2096 err = sysfs_create_file(&dev->kobj,
2097 it87_attributes_temp_offset[i]);
2098 if (err)
2099 goto error;
2100 }
4573acbc
GR		 2101 if (sio_data->beep_pin) {
2102 err = sysfs_create_file(&dev->kobj,
2103 it87_attributes_temp_beep[i]);
2104 if (err)
2105 goto error;
2106 }
d9b327c3
JD		 2107 }
2108
9060f8bd 2109 /* Do not create fan files for disabled fans */
d9b327c3 2110 fan_beep_need_rw = 1;
723a0aa0
JD		 2111 for (i = 0; i < 5; i++) {
2112 if (!(data->has_fan & (1 << i)))
2113 continue;
e1169ba0 2114 err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
723a0aa0 2115 if (err)
62a1d05f 2116 goto error;
d9b327c3 2117
e1169ba0
GR		 2118 if (i < 3 && !has_16bit_fans(data)) {
2119 err = sysfs_create_file(&dev->kobj,
2120 it87_attributes_fan_div[i]);
2121 if (err)
2122 goto error;
2123 }
2124
d9b327c3
JD		 2125 if (sio_data->beep_pin) {
2126 err = sysfs_create_file(&dev->kobj,
2127 it87_attributes_fan_beep[i]);
2128 if (err)
62a1d05f 2129 goto error;
d9b327c3
JD		 2130 if (!fan_beep_need_rw)
2131 continue;
2132
4a0d71cf
GR		 2133 /*
2134 * As we have a single beep enable bit for all fans,
d9b327c3 2135 * only the first enabled fan has a writable attribute
4a0d71cf
GR		 2136 * for it.
2137 */
d9b327c3
JD		 2138 if (sysfs_chmod_file(&dev->kobj,
2139 it87_attributes_fan_beep[i],
2140 S_IRUGO | S_IWUSR))
2141 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2142 i + 1);
2143 fan_beep_need_rw = 0;
2144 }
17d648bf
JD		 2145 }
2146
1da177e4 2147 if (enable_pwm_interface) {
723a0aa0
JD		 2148 for (i = 0; i < 3; i++) {
2149 if (sio_data->skip_pwm & (1 << i))
2150 continue;
2151 err = sysfs_create_group(&dev->kobj,
2152 &it87_group_pwm[i]);
2153 if (err)
62a1d05f 2154 goto error;
4f3f51bc
JD		 2155
2156 if (!has_old_autopwm(data))
2157 continue;
2158 err = sysfs_create_group(&dev->kobj,
2159 &it87_group_autopwm[i]);
2160 if (err)
62a1d05f 2161 goto error;
98dd22c3 2162 }
1da177e4
LT		 2163 }
2164
895ff267 2165 if (!sio_data->skip_vid) {
303760b4 2166 data->vrm = vid_which_vrm();
87673dd7 2167 /* VID reading from Super-I/O config space if available */
b74f3fdd 2168 data->vid = sio_data->vid_value;
6a8d7acf
JD		 2169 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2170 if (err)
62a1d05f 2171 goto error;
87808be4
JD		 2172 }
2173
738e5e05
JD		 2174 /* Export labels for internal sensors */
2175 for (i = 0; i < 3; i++) {
2176 if (!(sio_data->internal & (1 << i)))
2177 continue;
2178 err = sysfs_create_file(&dev->kobj,
2179 it87_attributes_label[i]);
2180 if (err)
62a1d05f 2181 goto error;
738e5e05
JD		 2182 }
2183
1beeffe4
TJ		 2184 data->hwmon_dev = hwmon_device_register(dev);
2185 if (IS_ERR(data->hwmon_dev)) {
2186 err = PTR_ERR(data->hwmon_dev);
62a1d05f 2187 goto error;
1da177e4
LT		 2188 }
2189
2190 return 0;
2191
62a1d05f 2192error:
723a0aa0 2193 it87_remove_files(dev);
1da177e4
LT		 2194 return err;
2195}
2196
281dfd0b 2197static int it87_remove(struct platform_device *pdev)
1da177e4 2198{
b74f3fdd 2199 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2200
1beeffe4 2201 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 2202 it87_remove_files(&pdev->dev);
943b0830 2203
1da177e4
LT		 2204 return 0;
2205}
2206
4a0d71cf
GR		 2207/*
2208 * Must be called with data->update_lock held, except during initialization.
2209 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2210 * would slow down the IT87 access and should not be necessary.
2211 */
b74f3fdd 2212static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 2213{
b74f3fdd 2214 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2215 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2216}
2217
4a0d71cf
GR		 2218/*
2219 * Must be called with data->update_lock held, except during initialization.
2220 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2221 * would slow down the IT87 access and should not be necessary.
2222 */
b74f3fdd 2223static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 2224{
b74f3fdd 2225 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2226 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2227}
2228
2229/* Return 1 if and only if the PWM interface is safe to use */
6c931ae1 2230static int it87_check_pwm(struct device *dev)
1da177e4 2231{
b74f3fdd 2232 struct it87_data *data = dev_get_drvdata(dev);
4a0d71cf
GR		 2233 /*
2234 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
1da177e4 2235 * and polarity set to active low is sign that this is the case so we
4a0d71cf
GR		 2236 * disable pwm control to protect the user.
2237 */
b74f3fdd 2238 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT		 2239 if ((tmp & 0x87) == 0) {
2240 if (fix_pwm_polarity) {
4a0d71cf
GR		 2241 /*
2242 * The user asks us to attempt a chip reconfiguration.
1da177e4 2243 * This means switching to active high polarity and
4a0d71cf
GR		 2244 * inverting all fan speed values.
2245 */
1da177e4
LT		 2246 int i;
2247 u8 pwm[3];
2248
2249 for (i = 0; i < 3; i++)
b74f3fdd 2250 pwm[i] = it87_read_value(data,
1da177e4
LT		 2251 IT87_REG_PWM(i));
2252
4a0d71cf
GR		 2253 /*
2254 * If any fan is in automatic pwm mode, the polarity
1da177e4
LT		 2255 * might be correct, as suspicious as it seems, so we
2256 * better don't change anything (but still disable the
4a0d71cf
GR		 2257 * PWM interface).
2258 */
1da177e4 2259 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
1d9bcf6a
GR		 2260 dev_info(dev,
2261 "Reconfiguring PWM to active high polarity\n");
b74f3fdd 2262 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT		 2263 tmp | 0x87);
2264 for (i = 0; i < 3; i++)
b74f3fdd 2265 it87_write_value(data,
1da177e4
LT		 2266 IT87_REG_PWM(i),
2267 0x7f & ~pwm[i]);
2268 return 1;
2269 }
2270
1d9bcf6a
GR		 2271 dev_info(dev,
2272 "PWM configuration is too broken to be fixed\n");
1da177e4
LT		 2273 }
2274
1d9bcf6a
GR		 2275 dev_info(dev,
2276 "Detected broken BIOS defaults, disabling PWM interface\n");
1da177e4
LT		 2277 return 0;
2278 } else if (fix_pwm_polarity) {
1d9bcf6a
GR		 2279 dev_info(dev,
2280 "PWM configuration looks sane, won't touch\n");
1da177e4
LT		 2281 }
2282
2283 return 1;
2284}
2285
2286/* Called when we have found a new IT87. */
6c931ae1 2287static void it87_init_device(struct platform_device *pdev)
1da177e4 2288{
591ec650 2289 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 2290 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2291 int tmp, i;
591ec650 2292 u8 mask;
1da177e4 2293
4a0d71cf
GR		 2294 /*
2295 * For each PWM channel:
b99883dc
JD		 2296 * - If it is in automatic mode, setting to manual mode should set
2297 * the fan to full speed by default.
2298 * - If it is in manual mode, we need a mapping to temperature
2299 * channels to use when later setting to automatic mode later.
2300 * Use a 1:1 mapping by default (we are clueless.)
2301 * In both cases, the value can (and should) be changed by the user
6229cdb2
JD		 2302 * prior to switching to a different mode.
2303 * Note that this is no longer needed for the IT8721F and later, as
2304 * these have separate registers for the temperature mapping and the
4a0d71cf
GR		 2305 * manual duty cycle.
2306 */
1da177e4 2307 for (i = 0; i < 3; i++) {
b99883dc
JD		 2308 data->pwm_temp_map[i] = i;
2309 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 2310 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT		 2311 }
2312
4a0d71cf
GR		 2313 /*
2314 * Some chips seem to have default value 0xff for all limit
c5df9b7a
JD		 2315 * registers. For low voltage limits it makes no sense and triggers
2316 * alarms, so change to 0 instead. For high temperature limits, it
2317 * means -1 degree C, which surprisingly doesn't trigger an alarm,
4a0d71cf
GR		 2318 * but is still confusing, so change to 127 degrees C.
2319 */
c5df9b7a 2320 for (i = 0; i < 8; i++) {
b74f3fdd 2321 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 2322 if (tmp == 0xff)
b74f3fdd 2323 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD		 2324 }
2325 for (i = 0; i < 3; i++) {
b74f3fdd 2326 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 2327 if (tmp == 0xff)
b74f3fdd 2328 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD		 2329 }
2330
4a0d71cf
GR		 2331 /*
2332 * Temperature channels are not forcibly enabled, as they can be
a00afb97
JD		 2333 * set to two different sensor types and we can't guess which one
2334 * is correct for a given system. These channels can be enabled at
4a0d71cf
GR		 2335 * run-time through the temp{1-3}_type sysfs accessors if needed.
2336 */
1da177e4
LT		 2337
2338 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 2339 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT		 2340 if ((tmp & 0xff) == 0) {
2341 /* Enable all voltage monitors */
b74f3fdd 2342 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT		 2343 }
2344
2345 /* Check if tachometers are reset manually or by some reason */
591ec650 2346 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 2347 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 2348 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 2349 /* Enable all fan tachometers */
591ec650 2350 data->fan_main_ctrl |= mask;
5f2dc798
JD		 2351 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2352 data->fan_main_ctrl);
1da177e4 2353 }
9060f8bd 2354 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 2355
17d648bf 2356 /* Set tachometers to 16-bit mode if needed */
0475169c 2357 if (has_16bit_fans(data)) {
b74f3fdd 2358 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 2359 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 2360 dev_dbg(&pdev->dev,
17d648bf 2361 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 2362 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD		 2363 tmp | 0x07);
2364 }
0531d98b
GR		 2365 /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
2366 if (data->type != it87 && data->type != it8782 &&
2367 data->type != it8783) {
816d8c6a
AP		 2368 if (tmp & (1 << 4))
2369 data->has_fan |= (1 << 3); /* fan4 enabled */
2370 if (tmp & (1 << 5))
2371 data->has_fan |= (1 << 4); /* fan5 enabled */
2372 }
17d648bf
JD		 2373 }
2374
591ec650
JD		 2375 /* Fan input pins may be used for alternative functions */
2376 data->has_fan &= ~sio_data->skip_fan;
2377
1da177e4 2378 /* Start monitoring */
b74f3fdd 2379 it87_write_value(data, IT87_REG_CONFIG,
41002f8d 2380 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
1da177e4
LT		 2381 | (update_vbat ? 0x41 : 0x01));
2382}
2383
b99883dc
JD		 2384static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2385{
2386 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
16b5dda2 2387 if (has_newer_autopwm(data)) {
b99883dc 2388 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
6229cdb2
JD		 2389 data->pwm_duty[nr] = it87_read_value(data,
2390 IT87_REG_PWM_DUTY(nr));
2391 } else {
2392 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2393 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2394 else /* Manual mode */
2395 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2396 }
4f3f51bc
JD		 2397
2398 if (has_old_autopwm(data)) {
2399 int i;
2400
2401 for (i = 0; i < 5 ; i++)
2402 data->auto_temp[nr][i] = it87_read_value(data,
2403 IT87_REG_AUTO_TEMP(nr, i));
2404 for (i = 0; i < 3 ; i++)
2405 data->auto_pwm[nr][i] = it87_read_value(data,
2406 IT87_REG_AUTO_PWM(nr, i));
2407 }
b99883dc
JD		 2408}
2409
1da177e4
LT		 2410static struct it87_data *it87_update_device(struct device *dev)
2411{
b74f3fdd 2412 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 2413 int i;
2414
9a61bf63 2415 mutex_lock(&data->update_lock);
1da177e4
LT		 2416
2417 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2418 || !data->valid) {
1da177e4 2419 if (update_vbat) {
4a0d71cf
GR		 2420 /*
2421 * Cleared after each update, so reenable. Value
2422 * returned by this read will be previous value
2423 */
b74f3fdd 2424 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 2425 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT		 2426 }
2427 for (i = 0; i <= 7; i++) {
929c6a56 2428 data->in[i][0] =
5f2dc798 2429 it87_read_value(data, IT87_REG_VIN(i));
929c6a56 2430 data->in[i][1] =
5f2dc798 2431 it87_read_value(data, IT87_REG_VIN_MIN(i));
929c6a56 2432 data->in[i][2] =
5f2dc798 2433 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 2434 }
3543a53f 2435 /* in8 (battery) has no limit registers */
929c6a56 2436 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 2437
c7f1f716 2438 for (i = 0; i < 5; i++) {
9060f8bd
JD		 2439 /* Skip disabled fans */
2440 if (!(data->has_fan & (1 << i)))
2441 continue;
2442
e1169ba0 2443 data->fan[i][1] =
5f2dc798 2444 it87_read_value(data, IT87_REG_FAN_MIN[i]);
e1169ba0 2445 data->fan[i][0] = it87_read_value(data,
c7f1f716 2446 IT87_REG_FAN[i]);
17d648bf 2447 /* Add high byte if in 16-bit mode */
0475169c 2448 if (has_16bit_fans(data)) {
e1169ba0 2449 data->fan[i][0] |= it87_read_value(data,
c7f1f716 2450 IT87_REG_FANX[i]) << 8;
e1169ba0 2451 data->fan[i][1] |= it87_read_value(data,
c7f1f716 2452 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 2453 }
1da177e4
LT		 2454 }
2455 for (i = 0; i < 3; i++) {
4573acbc
GR		 2456 if (!(data->has_temp & (1 << i)))
2457 continue;
60ca385a 2458 data->temp[i][0] =
5f2dc798 2459 it87_read_value(data, IT87_REG_TEMP(i));
60ca385a 2460 data->temp[i][1] =
5f2dc798 2461 it87_read_value(data, IT87_REG_TEMP_LOW(i));
60ca385a
GR		 2462 data->temp[i][2] =
2463 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
161d898a
GR		 2464 if (has_temp_offset(data))
2465 data->temp[i][3] =
2466 it87_read_value(data,
2467 IT87_REG_TEMP_OFFSET[i]);
1da177e4
LT		 2468 }
2469
17d648bf 2470 /* Newer chips don't have clock dividers */
0475169c 2471 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 2472 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD		 2473 data->fan_div[0] = i & 0x07;
2474 data->fan_div[1] = (i >> 3) & 0x07;
2475 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2476 }
1da177e4
LT		 2477
2478 data->alarms =
b74f3fdd 2479 it87_read_value(data, IT87_REG_ALARM1) |
2480 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2481 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2482 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2483
b74f3fdd 2484 data->fan_main_ctrl = it87_read_value(data,
2485 IT87_REG_FAN_MAIN_CTRL);
2486 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD		 2487 for (i = 0; i < 3; i++)
2488 it87_update_pwm_ctrl(data, i);
b74f3fdd 2489
2490 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
19529784 2491 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
4a0d71cf
GR		 2492 /*
2493 * The IT8705F does not have VID capability.
2494 * The IT8718F and later don't use IT87_REG_VID for the
2495 * same purpose.
2496 */
17d648bf 2497 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2498 data->vid = it87_read_value(data, IT87_REG_VID);
4a0d71cf
GR		 2499 /*
2500 * The older IT8712F revisions had only 5 VID pins,
2501 * but we assume it is always safe to read 6 bits.
2502 */
17d648bf 2503 data->vid &= 0x3f;
1da177e4
LT		 2504 }
2505 data->last_updated = jiffies;
2506 data->valid = 1;
2507 }
2508
9a61bf63 2509 mutex_unlock(&data->update_lock);
1da177e4
LT		 2510
2511 return data;
2512}
2513
b74f3fdd 2514static int __init it87_device_add(unsigned short address,
2515 const struct it87_sio_data *sio_data)
2516{
2517 struct resource res = {
87b4b663
BH		 2518 .start = address + IT87_EC_OFFSET,
2519 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2520 .name = DRVNAME,
2521 .flags = IORESOURCE_IO,
2522 };
2523 int err;
2524
b9acb64a
JD		 2525 err = acpi_check_resource_conflict(&res);
2526 if (err)
2527 goto exit;
2528
b74f3fdd 2529 pdev = platform_device_alloc(DRVNAME, address);
2530 if (!pdev) {
2531 err = -ENOMEM;
a8ca1037 2532 pr_err("Device allocation failed\n");
b74f3fdd 2533 goto exit;
2534 }
2535
2536 err = platform_device_add_resources(pdev, &res, 1);
2537 if (err) {
a8ca1037 2538 pr_err("Device resource addition failed (%d)\n", err);
b74f3fdd 2539 goto exit_device_put;
2540 }
2541
2542 err = platform_device_add_data(pdev, sio_data,
2543 sizeof(struct it87_sio_data));
2544 if (err) {
a8ca1037 2545 pr_err("Platform data allocation failed\n");
b74f3fdd 2546 goto exit_device_put;
2547 }
2548
2549 err = platform_device_add(pdev);
2550 if (err) {
a8ca1037 2551 pr_err("Device addition failed (%d)\n", err);
b74f3fdd 2552 goto exit_device_put;
2553 }
2554
2555 return 0;
2556
2557exit_device_put:
2558 platform_device_put(pdev);
2559exit:
2560 return err;
2561}
2562
1da177e4
LT		 2563static int __init sm_it87_init(void)
2564{
b74f3fdd 2565 int err;
5f2dc798 2566 unsigned short isa_address = 0;
b74f3fdd 2567 struct it87_sio_data sio_data;
2568
98dd22c3 2569 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2570 err = it87_find(&isa_address, &sio_data);
2571 if (err)
2572 return err;
2573 err = platform_driver_register(&it87_driver);
2574 if (err)
2575 return err;
fde09509 2576
b74f3fdd 2577 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2578 if (err) {
b74f3fdd 2579 platform_driver_unregister(&it87_driver);
2580 return err;
2581 }
2582
2583 return 0;
1da177e4
LT		 2584}
2585
2586static void __exit sm_it87_exit(void)
2587{
b74f3fdd 2588 platform_device_unregister(pdev);
2589 platform_driver_unregister(&it87_driver);
1da177e4
LT		 2590}
2591
2592
1d9bcf6a 2593MODULE_AUTHOR("Chris Gauthron, Jean Delvare <khali@linux-fr.org>");
44c1bcd4 2594MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
1da177e4
LT		 2595module_param(update_vbat, bool, 0);
2596MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2597module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD		 2598MODULE_PARM_DESC(fix_pwm_polarity,
2599 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT		 2600MODULE_LICENSE("GPL");
2601
2602module_init(sm_it87_init);
2603module_exit(sm_it87_exit);
Linux kernel - Deliverables
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