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hwmon: (it87) Introduce support for tempX_offset sysfs attribute
[deliverable/linux.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4 1/*
5f2dc798
JD		 2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
44c1bcd4 18 * IT8721F Super I/O chip w/LPC interface
5f2dc798 19 * IT8726F Super I/O chip w/LPC interface
16b5dda2 20 * IT8728F Super I/O chip w/LPC interface
44c1bcd4 21 * IT8758E Super I/O chip w/LPC interface
0531d98b
GR		 22 * IT8782F Super I/O chip w/LPC interface
23 * IT8783E/F Super I/O chip w/LPC interface
5f2dc798
JD		 24 * Sis950 A clone of the IT8705F
25 *
26 * Copyright (C) 2001 Chris Gauthron
27 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
28 *
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License as published by
31 * the Free Software Foundation; either version 2 of the License, or
32 * (at your option) any later version.
33 *
34 * This program is distributed in the hope that it will be useful,
35 * but WITHOUT ANY WARRANTY; without even the implied warranty of
36 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 * GNU General Public License for more details.
38 *
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
42 */
1da177e4 43
a8ca1037
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
1da177e4
LT		 46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
b74f3fdd 50#include <linux/platform_device.h>
943b0830 51#include <linux/hwmon.h>
303760b4
JD		 52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
943b0830 54#include <linux/err.h>
9a61bf63 55#include <linux/mutex.h>
87808be4 56#include <linux/sysfs.h>
98dd22c3
JD		 57#include <linux/string.h>
58#include <linux/dmi.h>
b9acb64a 59#include <linux/acpi.h>
6055fae8 60#include <linux/io.h>
1da177e4 61
b74f3fdd 62#define DRVNAME "it87"
1da177e4 63
0531d98b
GR		 64enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,
65 it8783 };
1da177e4 66
67b671bc
JD		 67static unsigned short force_id;
68module_param(force_id, ushort, 0);
69MODULE_PARM_DESC(force_id, "Override the detected device ID");
70
b74f3fdd 71static struct platform_device *pdev;
72
1da177e4
LT		 73#define REG 0x2e /* The register to read/write */
74#define DEV 0x07 /* Register: Logical device select */
75#define VAL 0x2f /* The value to read/write */
76#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS		 77
78/* The device with the IT8718F/IT8720F VID value in it */
79#define GPIO 0x07
80
1da177e4
LT		 81#define DEVID 0x20 /* Register: Device ID */
82#define DEVREV 0x22 /* Register: Device Revision */
83
5b0380c9 84static inline int superio_inb(int reg)
1da177e4
LT		 85{
86 outb(reg, REG);
87 return inb(VAL);
88}
89
5b0380c9 90static inline void superio_outb(int reg, int val)
436cad2a
JD		 91{
92 outb(reg, REG);
93 outb(val, VAL);
94}
95
1da177e4
LT		 96static int superio_inw(int reg)
97{
98 int val;
99 outb(reg++, REG);
100 val = inb(VAL) << 8;
101 outb(reg, REG);
102 val |= inb(VAL);
103 return val;
104}
105
5b0380c9 106static inline void superio_select(int ldn)
1da177e4
LT		 107{
108 outb(DEV, REG);
87673dd7 109 outb(ldn, VAL);
1da177e4
LT		 110}
111
5b0380c9 112static inline int superio_enter(void)
1da177e4 113{
5b0380c9
NG		 114 /*
115 * Try to reserve REG and REG + 1 for exclusive access.
116 */
117 if (!request_muxed_region(REG, 2, DRVNAME))
118 return -EBUSY;
119
1da177e4
LT		 120 outb(0x87, REG);
121 outb(0x01, REG);
122 outb(0x55, REG);
123 outb(0x55, REG);
5b0380c9 124 return 0;
1da177e4
LT		 125}
126
5b0380c9 127static inline void superio_exit(void)
1da177e4
LT		 128{
129 outb(0x02, REG);
130 outb(0x02, VAL);
5b0380c9 131 release_region(REG, 2);
1da177e4
LT		 132}
133
87673dd7 134/* Logical device 4 registers */
1da177e4
LT		 135#define IT8712F_DEVID 0x8712
136#define IT8705F_DEVID 0x8705
17d648bf 137#define IT8716F_DEVID 0x8716
87673dd7 138#define IT8718F_DEVID 0x8718
b4da93e4 139#define IT8720F_DEVID 0x8720
44c1bcd4 140#define IT8721F_DEVID 0x8721
08a8f6e9 141#define IT8726F_DEVID 0x8726
16b5dda2 142#define IT8728F_DEVID 0x8728
0531d98b
GR		 143#define IT8782F_DEVID 0x8782
144#define IT8783E_DEVID 0x8783
1da177e4
LT		 145#define IT87_ACT_REG 0x30
146#define IT87_BASE_REG 0x60
147
87673dd7 148/* Logical device 7 registers (IT8712F and later) */
0531d98b 149#define IT87_SIO_GPIO1_REG 0x25
895ff267 150#define IT87_SIO_GPIO3_REG 0x27
591ec650 151#define IT87_SIO_GPIO5_REG 0x29
0531d98b 152#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
87673dd7 153#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
0531d98b 154#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
87673dd7 155#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 156#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 157
1da177e4 158/* Update battery voltage after every reading if true */
90ab5ee9 159static bool update_vbat;
1da177e4
LT		 160
161/* Not all BIOSes properly configure the PWM registers */
90ab5ee9 162static bool fix_pwm_polarity;
1da177e4 163
1da177e4
LT		 164/* Many IT87 constants specified below */
165
166/* Length of ISA address segment */
167#define IT87_EXTENT 8
168
87b4b663
BH		 169/* Length of ISA address segment for Environmental Controller */
170#define IT87_EC_EXTENT 2
171
172/* Offset of EC registers from ISA base address */
173#define IT87_EC_OFFSET 5
174
175/* Where are the ISA address/data registers relative to the EC base address */
176#define IT87_ADDR_REG_OFFSET 0
177#define IT87_DATA_REG_OFFSET 1
1da177e4
LT		 178
179/*----- The IT87 registers -----*/
180
181#define IT87_REG_CONFIG 0x00
182
183#define IT87_REG_ALARM1 0x01
184#define IT87_REG_ALARM2 0x02
185#define IT87_REG_ALARM3 0x03
186
4a0d71cf
GR		 187/*
188 * The IT8718F and IT8720F have the VID value in a different register, in
189 * Super-I/O configuration space.
190 */
1da177e4 191#define IT87_REG_VID 0x0a
4a0d71cf
GR		 192/*
193 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
194 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
195 * mode.
196 */
1da177e4 197#define IT87_REG_FAN_DIV 0x0b
17d648bf 198#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT		 199
200/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
201
c7f1f716
JD		 202static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
203static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
204static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
205static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
161d898a
GR		 206static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
207
1da177e4
LT		 208#define IT87_REG_FAN_MAIN_CTRL 0x13
209#define IT87_REG_FAN_CTL 0x14
210#define IT87_REG_PWM(nr) (0x15 + (nr))
6229cdb2 211#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
1da177e4
LT		 212
213#define IT87_REG_VIN(nr) (0x20 + (nr))
214#define IT87_REG_TEMP(nr) (0x29 + (nr))
215
216#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
217#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
218#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
219#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
220
1da177e4
LT		 221#define IT87_REG_VIN_ENABLE 0x50
222#define IT87_REG_TEMP_ENABLE 0x51
4573acbc 223#define IT87_REG_TEMP_EXTRA 0x55
d9b327c3 224#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT		 225
226#define IT87_REG_CHIPID 0x58
227
4f3f51bc
JD		 228#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
229#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
230
1da177e4 231
b74f3fdd 232struct it87_sio_data {
233 enum chips type;
234 /* Values read from Super-I/O config space */
0475169c 235 u8 revision;
b74f3fdd 236 u8 vid_value;
d9b327c3 237 u8 beep_pin;
738e5e05 238 u8 internal; /* Internal sensors can be labeled */
591ec650 239 /* Features skipped based on config or DMI */
9172b5d1 240 u16 skip_in;
895ff267 241 u8 skip_vid;
591ec650 242 u8 skip_fan;
98dd22c3 243 u8 skip_pwm;
4573acbc 244 u8 skip_temp;
b74f3fdd 245};
246
4a0d71cf
GR		 247/*
248 * For each registered chip, we need to keep some data in memory.
249 * The structure is dynamically allocated.
250 */
1da177e4 251struct it87_data {
1beeffe4 252 struct device *hwmon_dev;
1da177e4 253 enum chips type;
0475169c 254 u8 revision;
1da177e4 255
b74f3fdd 256 unsigned short addr;
257 const char *name;
9a61bf63 258 struct mutex update_lock;
1da177e4
LT		 259 char valid; /* !=0 if following fields are valid */
260 unsigned long last_updated; /* In jiffies */
261
44c1bcd4 262 u16 in_scaled; /* Internal voltage sensors are scaled */
929c6a56 263 u8 in[9][3]; /* [nr][0]=in, [1]=min, [2]=max */
9060f8bd 264 u8 has_fan; /* Bitfield, fans enabled */
c7f1f716
JD		 265 u16 fan[5]; /* Register values, possibly combined */
266 u16 fan_min[5]; /* Register values, possibly combined */
4573acbc 267 u8 has_temp; /* Bitfield, temp sensors enabled */
161d898a 268 s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
1da177e4
LT		 269 u8 sensor; /* Register value */
270 u8 fan_div[3]; /* Register encoding, shifted right */
271 u8 vid; /* Register encoding, combined */
a7be58a1 272 u8 vrm;
1da177e4 273 u32 alarms; /* Register encoding, combined */
d9b327c3 274 u8 beeps; /* Register encoding */
1da177e4 275 u8 fan_main_ctrl; /* Register value */
f8d0c19a 276 u8 fan_ctl; /* Register value */
b99883dc 277
4a0d71cf
GR		 278 /*
279 * The following 3 arrays correspond to the same registers up to
6229cdb2
JD		 280 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
281 * 7, and we want to preserve settings on mode changes, so we have
282 * to track all values separately.
283 * Starting with the IT8721F, the manual PWM duty cycles are stored
284 * in separate registers (8-bit values), so the separate tracking
285 * is no longer needed, but it is still done to keep the driver
4a0d71cf
GR		 286 * simple.
287 */
b99883dc 288 u8 pwm_ctrl[3]; /* Register value */
6229cdb2 289 u8 pwm_duty[3]; /* Manual PWM value set by user */
b99883dc 290 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD		 291
292 /* Automatic fan speed control registers */
293 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
294 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4 295};
0df6454d 296
16b5dda2
JD		 297static inline int has_12mv_adc(const struct it87_data *data)
298{
299 /*
300 * IT8721F and later have a 12 mV ADC, also with internal scaling
301 * on selected inputs.
302 */
303 return data->type == it8721
304 || data->type == it8728;
305}
306
307static inline int has_newer_autopwm(const struct it87_data *data)
308{
309 /*
310 * IT8721F and later have separate registers for the temperature
311 * mapping and the manual duty cycle.
312 */
313 return data->type == it8721
314 || data->type == it8728;
315}
316
161d898a
GR		 317static inline int has_temp_offset(const struct it87_data *data)
318{
319 return data->type == it8716
320 || data->type == it8718
321 || data->type == it8720
322 || data->type == it8721
323 || data->type == it8728
324 || data->type == it8782
325 || data->type == it8783;
326}
327
0531d98b 328static int adc_lsb(const struct it87_data *data, int nr)
44c1bcd4 329{
0531d98b
GR		 330 int lsb = has_12mv_adc(data) ? 12 : 16;
331 if (data->in_scaled & (1 << nr))
332 lsb <<= 1;
333 return lsb;
334}
44c1bcd4 335
0531d98b
GR		 336static u8 in_to_reg(const struct it87_data *data, int nr, long val)
337{
338 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
44c1bcd4
JD		 339 return SENSORS_LIMIT(val, 0, 255);
340}
341
342static int in_from_reg(const struct it87_data *data, int nr, int val)
343{
0531d98b 344 return val * adc_lsb(data, nr);
44c1bcd4 345}
0df6454d
JD		 346
347static inline u8 FAN_TO_REG(long rpm, int div)
348{
349 if (rpm == 0)
350 return 255;
351 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
352 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
353 254);
354}
355
356static inline u16 FAN16_TO_REG(long rpm)
357{
358 if (rpm == 0)
359 return 0xffff;
360 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
361}
362
363#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
364 1350000 / ((val) * (div)))
365/* The divider is fixed to 2 in 16-bit mode */
366#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
367 1350000 / ((val) * 2))
368
369#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
370 ((val) + 500) / 1000), -128, 127))
371#define TEMP_FROM_REG(val) ((val) * 1000)
372
44c1bcd4
JD		 373static u8 pwm_to_reg(const struct it87_data *data, long val)
374{
16b5dda2 375 if (has_newer_autopwm(data))
44c1bcd4
JD		 376 return val;
377 else
378 return val >> 1;
379}
380
381static int pwm_from_reg(const struct it87_data *data, u8 reg)
382{
16b5dda2 383 if (has_newer_autopwm(data))
44c1bcd4
JD		 384 return reg;
385 else
386 return (reg & 0x7f) << 1;
387}
388
0df6454d
JD		 389
390static int DIV_TO_REG(int val)
391{
392 int answer = 0;
393 while (answer < 7 && (val >>= 1))
394 answer++;
395 return answer;
396}
397#define DIV_FROM_REG(val) (1 << (val))
398
399static const unsigned int pwm_freq[8] = {
400 48000000 / 128,
401 24000000 / 128,
402 12000000 / 128,
403 8000000 / 128,
404 6000000 / 128,
405 3000000 / 128,
406 1500000 / 128,
407 750000 / 128,
408};
1da177e4 409
0475169c
AP		 410static inline int has_16bit_fans(const struct it87_data *data)
411{
4a0d71cf
GR		 412 /*
413 * IT8705F Datasheet 0.4.1, 3h == Version G.
414 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
415 * These are the first revisions with 16-bit tachometer support.
416 */
816d8c6a 417 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 418 || (data->type == it8712 && data->revision >= 0x08)
0475169c 419 || data->type == it8716
b4da93e4 420 || data->type == it8718
44c1bcd4 421 || data->type == it8720
16b5dda2 422 || data->type == it8721
0531d98b
GR		 423 || data->type == it8728
424 || data->type == it8782
425 || data->type == it8783;
0475169c 426}
1da177e4 427
4f3f51bc
JD		 428static inline int has_old_autopwm(const struct it87_data *data)
429{
4a0d71cf
GR		 430 /*
431 * The old automatic fan speed control interface is implemented
432 * by IT8705F chips up to revision F and IT8712F chips up to
433 * revision G.
434 */
4f3f51bc
JD		 435 return (data->type == it87 && data->revision < 0x03)
436 || (data->type == it8712 && data->revision < 0x08);
437}
438
b74f3fdd 439static int it87_probe(struct platform_device *pdev);
281dfd0b 440static int it87_remove(struct platform_device *pdev);
1da177e4 441
b74f3fdd 442static int it87_read_value(struct it87_data *data, u8 reg);
443static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 444static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 445static int it87_check_pwm(struct device *dev);
446static void it87_init_device(struct platform_device *pdev);
1da177e4
LT		 447
448
b74f3fdd 449static struct platform_driver it87_driver = {
cdaf7934 450 .driver = {
87218842 451 .owner = THIS_MODULE,
b74f3fdd 452 .name = DRVNAME,
cdaf7934 453 },
b74f3fdd 454 .probe = it87_probe,
9e5e9b7a 455 .remove = it87_remove,
fde09509
JD		 456};
457
20ad93d4 458static ssize_t show_in(struct device *dev, struct device_attribute *attr,
929c6a56 459 char *buf)
1da177e4 460{
929c6a56
GR		 461 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
462 int nr = sattr->nr;
463 int index = sattr->index;
20ad93d4 464
1da177e4 465 struct it87_data *data = it87_update_device(dev);
929c6a56 466 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1da177e4
LT		 467}
468
929c6a56
GR		 469static ssize_t set_in(struct device *dev, struct device_attribute *attr,
470 const char *buf, size_t count)
1da177e4 471{
929c6a56
GR		 472 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
473 int nr = sattr->nr;
474 int index = sattr->index;
20ad93d4 475
b74f3fdd 476 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 477 unsigned long val;
478
179c4fdb 479 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 480 return -EINVAL;
1da177e4 481
9a61bf63 482 mutex_lock(&data->update_lock);
929c6a56
GR		 483 data->in[nr][index] = in_to_reg(data, nr, val);
484 it87_write_value(data,
485 index == 1 ? IT87_REG_VIN_MIN(nr)
486 : IT87_REG_VIN_MAX(nr),
487 data->in[nr][index]);
9a61bf63 488 mutex_unlock(&data->update_lock);
1da177e4
LT		 489 return count;
490}
20ad93d4 491
929c6a56
GR		 492static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
493static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
494 0, 1);
495static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
496 0, 2);
f5f64501 497
929c6a56
GR		 498static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
499static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
500 1, 1);
501static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
502 1, 2);
1da177e4 503
929c6a56
GR		 504static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
505static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
506 2, 1);
507static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
508 2, 2);
1da177e4 509
929c6a56
GR		 510static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
511static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
512 3, 1);
513static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
514 3, 2);
515
516static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
517static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
518 4, 1);
519static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
520 4, 2);
521
522static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
523static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
524 5, 1);
525static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
526 5, 2);
527
528static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
529static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
530 6, 1);
531static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
532 6, 2);
533
534static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
535static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
536 7, 1);
537static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
538 7, 2);
539
540static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1da177e4
LT		 541
542/* 3 temperatures */
20ad93d4 543static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
60ca385a 544 char *buf)
1da177e4 545{
60ca385a
GR		 546 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
547 int nr = sattr->nr;
548 int index = sattr->index;
1da177e4 549 struct it87_data *data = it87_update_device(dev);
20ad93d4 550
60ca385a 551 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1da177e4 552}
20ad93d4 553
60ca385a
GR		 554static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
555 const char *buf, size_t count)
1da177e4 556{
60ca385a
GR		 557 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
558 int nr = sattr->nr;
559 int index = sattr->index;
b74f3fdd 560 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 561 long val;
161d898a 562 u8 reg, regval;
f5f64501 563
179c4fdb 564 if (kstrtol(buf, 10, &val) < 0)
f5f64501 565 return -EINVAL;
1da177e4 566
9a61bf63 567 mutex_lock(&data->update_lock);
161d898a
GR		 568
569 switch (index) {
570 default:
571 case 1:
572 reg = IT87_REG_TEMP_LOW(nr);
573 break;
574 case 2:
575 reg = IT87_REG_TEMP_HIGH(nr);
576 break;
577 case 3:
578 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
579 if (!(regval & 0x80)) {
580 regval |= 0x80;
581 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
582 }
583 data->valid = 0;
584 reg = IT87_REG_TEMP_OFFSET[nr];
585 break;
586 }
587
60ca385a 588 data->temp[nr][index] = TEMP_TO_REG(val);
161d898a 589 it87_write_value(data, reg, data->temp[nr][index]);
9a61bf63 590 mutex_unlock(&data->update_lock);
1da177e4
LT		 591 return count;
592}
1da177e4 593
60ca385a
GR		 594static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
595static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
596 0, 1);
597static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
598 0, 2);
161d898a
GR		 599static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
600 set_temp, 0, 3);
60ca385a
GR		 601static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
602static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
603 1, 1);
604static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
605 1, 2);
161d898a
GR		 606static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
607 set_temp, 1, 3);
60ca385a
GR		 608static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
609static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
610 2, 1);
611static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
612 2, 2);
161d898a
GR		 613static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
614 set_temp, 2, 3);
1da177e4 615
2cece01f
GR		 616static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
617 char *buf)
1da177e4 618{
20ad93d4
JD		 619 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
620 int nr = sensor_attr->index;
1da177e4 621 struct it87_data *data = it87_update_device(dev);
4a0d71cf 622 u8 reg = data->sensor; /* In case value is updated while used */
5f2dc798 623
1da177e4
LT		 624 if (reg & (1 << nr))
625 return sprintf(buf, "3\n"); /* thermal diode */
626 if (reg & (8 << nr))
4ed10779 627 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT		 628 return sprintf(buf, "0\n"); /* disabled */
629}
2cece01f
GR		 630
631static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
632 const char *buf, size_t count)
1da177e4 633{
20ad93d4
JD		 634 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
635 int nr = sensor_attr->index;
636
b74f3fdd 637 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 638 long val;
8acf07c5 639 u8 reg;
f5f64501 640
179c4fdb 641 if (kstrtol(buf, 10, &val) < 0)
f5f64501 642 return -EINVAL;
1da177e4 643
8acf07c5
JD		 644 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
645 reg &= ~(1 << nr);
646 reg &= ~(8 << nr);
4ed10779
JD		 647 if (val == 2) { /* backwards compatibility */
648 dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
649 "instead\n");
650 val = 4;
651 }
652 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4 653 if (val == 3)
8acf07c5 654 reg |= 1 << nr;
4ed10779 655 else if (val == 4)
8acf07c5
JD		 656 reg |= 8 << nr;
657 else if (val != 0)
1da177e4 658 return -EINVAL;
8acf07c5
JD		 659
660 mutex_lock(&data->update_lock);
661 data->sensor = reg;
b74f3fdd 662 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
2b3d1d87 663 data->valid = 0; /* Force cache refresh */
9a61bf63 664 mutex_unlock(&data->update_lock);
1da177e4
LT		 665 return count;
666}
1da177e4 667
2cece01f
GR		 668static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
669 set_temp_type, 0);
670static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
671 set_temp_type, 1);
672static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
673 set_temp_type, 2);
1da177e4
LT		 674
675/* 3 Fans */
b99883dc
JD		 676
677static int pwm_mode(const struct it87_data *data, int nr)
678{
679 int ctrl = data->fan_main_ctrl & (1 << nr);
680
681 if (ctrl == 0) /* Full speed */
682 return 0;
683 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
684 return 2;
685 else /* Manual mode */
686 return 1;
687}
688
20ad93d4
JD		 689static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
690 char *buf)
1da177e4 691{
20ad93d4
JD		 692 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
693 int nr = sensor_attr->index;
694
1da177e4 695 struct it87_data *data = it87_update_device(dev);
5f2dc798 696 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
1da177e4
LT		 697 DIV_FROM_REG(data->fan_div[nr])));
698}
20ad93d4
JD		 699static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
700 char *buf)
1da177e4 701{
20ad93d4
JD		 702 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
703 int nr = sensor_attr->index;
704
1da177e4 705 struct it87_data *data = it87_update_device(dev);
5f2dc798
JD		 706 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
707 DIV_FROM_REG(data->fan_div[nr])));
1da177e4 708}
20ad93d4
JD		 709static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
710 char *buf)
1da177e4 711{
20ad93d4
JD		 712 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
713 int nr = sensor_attr->index;
714
1da177e4
LT		 715 struct it87_data *data = it87_update_device(dev);
716 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
717}
5f2dc798
JD		 718static ssize_t show_pwm_enable(struct device *dev,
719 struct device_attribute *attr, char *buf)
1da177e4 720{
20ad93d4
JD		 721 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
722 int nr = sensor_attr->index;
723
1da177e4 724 struct it87_data *data = it87_update_device(dev);
b99883dc 725 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 726}
20ad93d4
JD		 727static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
728 char *buf)
1da177e4 729{
20ad93d4
JD		 730 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
731 int nr = sensor_attr->index;
732
1da177e4 733 struct it87_data *data = it87_update_device(dev);
44c1bcd4
JD		 734 return sprintf(buf, "%d\n",
735 pwm_from_reg(data, data->pwm_duty[nr]));
1da177e4 736}
f8d0c19a
JD		 737static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
738 char *buf)
739{
740 struct it87_data *data = it87_update_device(dev);
741 int index = (data->fan_ctl >> 4) & 0x07;
742
743 return sprintf(buf, "%u\n", pwm_freq[index]);
744}
20ad93d4
JD		 745static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
746 const char *buf, size_t count)
1da177e4 747{
20ad93d4
JD		 748 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
749 int nr = sensor_attr->index;
750
b74f3fdd 751 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 752 long val;
7f999aa7 753 u8 reg;
1da177e4 754
179c4fdb 755 if (kstrtol(buf, 10, &val) < 0)
f5f64501
JD		 756 return -EINVAL;
757
9a61bf63 758 mutex_lock(&data->update_lock);
b74f3fdd 759 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d 760 switch (nr) {
5f2dc798
JD		 761 case 0:
762 data->fan_div[nr] = reg & 0x07;
763 break;
764 case 1:
765 data->fan_div[nr] = (reg >> 3) & 0x07;
766 break;
767 case 2:
768 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
769 break;
07eab46d
JD		 770 }
771
1da177e4 772 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 773 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
9a61bf63 774 mutex_unlock(&data->update_lock);
1da177e4
LT		 775 return count;
776}
20ad93d4
JD		 777static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
778 const char *buf, size_t count)
1da177e4 779{
20ad93d4
JD		 780 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
781 int nr = sensor_attr->index;
782
b74f3fdd 783 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 784 unsigned long val;
8ab4ec3e 785 int min;
1da177e4
LT		 786 u8 old;
787
179c4fdb 788 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 789 return -EINVAL;
790
9a61bf63 791 mutex_lock(&data->update_lock);
b74f3fdd 792 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 793
8ab4ec3e
JD		 794 /* Save fan min limit */
795 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT		 796
797 switch (nr) {
798 case 0:
799 case 1:
800 data->fan_div[nr] = DIV_TO_REG(val);
801 break;
802 case 2:
803 if (val < 8)
804 data->fan_div[nr] = 1;
805 else
806 data->fan_div[nr] = 3;
807 }
808 val = old & 0x80;
809 val |= (data->fan_div[0] & 0x07);
810 val |= (data->fan_div[1] & 0x07) << 3;
811 if (data->fan_div[2] == 3)
812 val |= 0x1 << 6;
b74f3fdd 813 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 814
8ab4ec3e
JD		 815 /* Restore fan min limit */
816 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 817 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
8ab4ec3e 818
9a61bf63 819 mutex_unlock(&data->update_lock);
1da177e4
LT		 820 return count;
821}
cccfc9c4
JD		 822
823/* Returns 0 if OK, -EINVAL otherwise */
824static int check_trip_points(struct device *dev, int nr)
825{
826 const struct it87_data *data = dev_get_drvdata(dev);
827 int i, err = 0;
828
829 if (has_old_autopwm(data)) {
830 for (i = 0; i < 3; i++) {
831 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
832 err = -EINVAL;
833 }
834 for (i = 0; i < 2; i++) {
835 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
836 err = -EINVAL;
837 }
838 }
839
840 if (err) {
841 dev_err(dev, "Inconsistent trip points, not switching to "
842 "automatic mode\n");
843 dev_err(dev, "Adjust the trip points and try again\n");
844 }
845 return err;
846}
847
20ad93d4
JD		 848static ssize_t set_pwm_enable(struct device *dev,
849 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 850{
20ad93d4
JD		 851 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
852 int nr = sensor_attr->index;
853
b74f3fdd 854 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 855 long val;
1da177e4 856
179c4fdb 857 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD		 858 return -EINVAL;
859
cccfc9c4
JD		 860 /* Check trip points before switching to automatic mode */
861 if (val == 2) {
862 if (check_trip_points(dev, nr) < 0)
863 return -EINVAL;
864 }
865
9a61bf63 866 mutex_lock(&data->update_lock);
1da177e4
LT		 867
868 if (val == 0) {
869 int tmp;
870 /* make sure the fan is on when in on/off mode */
b74f3fdd 871 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
872 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT		 873 /* set on/off mode */
874 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD		 875 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
876 data->fan_main_ctrl);
b99883dc
JD		 877 } else {
878 if (val == 1) /* Manual mode */
16b5dda2 879 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
6229cdb2
JD		 880 data->pwm_temp_map[nr] :
881 data->pwm_duty[nr];
b99883dc
JD		 882 else /* Automatic mode */
883 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
884 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT		 885 /* set SmartGuardian mode */
886 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD		 887 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
888 data->fan_main_ctrl);
1da177e4
LT		 889 }
890
9a61bf63 891 mutex_unlock(&data->update_lock);
1da177e4
LT		 892 return count;
893}
20ad93d4
JD		 894static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
895 const char *buf, size_t count)
1da177e4 896{
20ad93d4
JD		 897 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
898 int nr = sensor_attr->index;
899
b74f3fdd 900 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 901 long val;
1da177e4 902
179c4fdb 903 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT		 904 return -EINVAL;
905
9a61bf63 906 mutex_lock(&data->update_lock);
16b5dda2 907 if (has_newer_autopwm(data)) {
4a0d71cf
GR		 908 /*
909 * If we are in automatic mode, the PWM duty cycle register
910 * is read-only so we can't write the value.
911 */
6229cdb2
JD		 912 if (data->pwm_ctrl[nr] & 0x80) {
913 mutex_unlock(&data->update_lock);
914 return -EBUSY;
915 }
916 data->pwm_duty[nr] = pwm_to_reg(data, val);
917 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
918 data->pwm_duty[nr]);
919 } else {
920 data->pwm_duty[nr] = pwm_to_reg(data, val);
4a0d71cf
GR		 921 /*
922 * If we are in manual mode, write the duty cycle immediately;
923 * otherwise, just store it for later use.
924 */
6229cdb2
JD		 925 if (!(data->pwm_ctrl[nr] & 0x80)) {
926 data->pwm_ctrl[nr] = data->pwm_duty[nr];
927 it87_write_value(data, IT87_REG_PWM(nr),
928 data->pwm_ctrl[nr]);
929 }
b99883dc 930 }
9a61bf63 931 mutex_unlock(&data->update_lock);
1da177e4
LT		 932 return count;
933}
f8d0c19a
JD		 934static ssize_t set_pwm_freq(struct device *dev,
935 struct device_attribute *attr, const char *buf, size_t count)
936{
b74f3fdd 937 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 938 unsigned long val;
f8d0c19a
JD		 939 int i;
940
179c4fdb 941 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 942 return -EINVAL;
943
f8d0c19a
JD		 944 /* Search for the nearest available frequency */
945 for (i = 0; i < 7; i++) {
946 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
947 break;
948 }
949
950 mutex_lock(&data->update_lock);
b74f3fdd 951 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 952 data->fan_ctl |= i << 4;
b74f3fdd 953 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD		 954 mutex_unlock(&data->update_lock);
955
956 return count;
957}
94ac7ee6
JD		 958static ssize_t show_pwm_temp_map(struct device *dev,
959 struct device_attribute *attr, char *buf)
960{
961 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
962 int nr = sensor_attr->index;
963
964 struct it87_data *data = it87_update_device(dev);
965 int map;
966
967 if (data->pwm_temp_map[nr] < 3)
968 map = 1 << data->pwm_temp_map[nr];
969 else
970 map = 0; /* Should never happen */
971 return sprintf(buf, "%d\n", map);
972}
973static ssize_t set_pwm_temp_map(struct device *dev,
974 struct device_attribute *attr, const char *buf, size_t count)
975{
976 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
977 int nr = sensor_attr->index;
978
979 struct it87_data *data = dev_get_drvdata(dev);
980 long val;
981 u8 reg;
982
4a0d71cf
GR		 983 /*
984 * This check can go away if we ever support automatic fan speed
985 * control on newer chips.
986 */
4f3f51bc
JD		 987 if (!has_old_autopwm(data)) {
988 dev_notice(dev, "Mapping change disabled for safety reasons\n");
989 return -EINVAL;
990 }
991
179c4fdb 992 if (kstrtol(buf, 10, &val) < 0)
94ac7ee6
JD		 993 return -EINVAL;
994
995 switch (val) {
996 case (1 << 0):
997 reg = 0x00;
998 break;
999 case (1 << 1):
1000 reg = 0x01;
1001 break;
1002 case (1 << 2):
1003 reg = 0x02;
1004 break;
1005 default:
1006 return -EINVAL;
1007 }
1008
1009 mutex_lock(&data->update_lock);
1010 data->pwm_temp_map[nr] = reg;
4a0d71cf
GR		 1011 /*
1012 * If we are in automatic mode, write the temp mapping immediately;
1013 * otherwise, just store it for later use.
1014 */
94ac7ee6
JD		 1015 if (data->pwm_ctrl[nr] & 0x80) {
1016 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1017 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1018 }
1019 mutex_unlock(&data->update_lock);
1020 return count;
1021}
1da177e4 1022
4f3f51bc
JD		 1023static ssize_t show_auto_pwm(struct device *dev,
1024 struct device_attribute *attr, char *buf)
1025{
1026 struct it87_data *data = it87_update_device(dev);
1027 struct sensor_device_attribute_2 *sensor_attr =
1028 to_sensor_dev_attr_2(attr);
1029 int nr = sensor_attr->nr;
1030 int point = sensor_attr->index;
1031
44c1bcd4
JD		 1032 return sprintf(buf, "%d\n",
1033 pwm_from_reg(data, data->auto_pwm[nr][point]));
4f3f51bc
JD		 1034}
1035
1036static ssize_t set_auto_pwm(struct device *dev,
1037 struct device_attribute *attr, const char *buf, size_t count)
1038{
1039 struct it87_data *data = dev_get_drvdata(dev);
1040 struct sensor_device_attribute_2 *sensor_attr =
1041 to_sensor_dev_attr_2(attr);
1042 int nr = sensor_attr->nr;
1043 int point = sensor_attr->index;
1044 long val;
1045
179c4fdb 1046 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
4f3f51bc
JD		 1047 return -EINVAL;
1048
1049 mutex_lock(&data->update_lock);
44c1bcd4 1050 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
4f3f51bc
JD		 1051 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1052 data->auto_pwm[nr][point]);
1053 mutex_unlock(&data->update_lock);
1054 return count;
1055}
1056
1057static ssize_t show_auto_temp(struct device *dev,
1058 struct device_attribute *attr, char *buf)
1059{
1060 struct it87_data *data = it87_update_device(dev);
1061 struct sensor_device_attribute_2 *sensor_attr =
1062 to_sensor_dev_attr_2(attr);
1063 int nr = sensor_attr->nr;
1064 int point = sensor_attr->index;
1065
1066 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1067}
1068
1069static ssize_t set_auto_temp(struct device *dev,
1070 struct device_attribute *attr, const char *buf, size_t count)
1071{
1072 struct it87_data *data = dev_get_drvdata(dev);
1073 struct sensor_device_attribute_2 *sensor_attr =
1074 to_sensor_dev_attr_2(attr);
1075 int nr = sensor_attr->nr;
1076 int point = sensor_attr->index;
1077 long val;
1078
179c4fdb 1079 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
4f3f51bc
JD		 1080 return -EINVAL;
1081
1082 mutex_lock(&data->update_lock);
1083 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1084 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1085 data->auto_temp[nr][point]);
1086 mutex_unlock(&data->update_lock);
1087 return count;
1088}
1089
20ad93d4
JD		 1090#define show_fan_offset(offset) \
1091static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
1092 show_fan, NULL, offset - 1); \
1093static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1094 show_fan_min, set_fan_min, offset - 1); \
1095static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
1096 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT		 1097
1098show_fan_offset(1);
1099show_fan_offset(2);
1100show_fan_offset(3);
1101
1102#define show_pwm_offset(offset) \
20ad93d4
JD		 1103static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
1104 show_pwm_enable, set_pwm_enable, offset - 1); \
1105static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD		 1106 show_pwm, set_pwm, offset - 1); \
1107static DEVICE_ATTR(pwm##offset##_freq, \
1108 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
94ac7ee6
JD		 1109 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
1110static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
4f3f51bc
JD		 1111 S_IRUGO | S_IWUSR, show_pwm_temp_map, set_pwm_temp_map, \
1112 offset - 1); \
1113static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_pwm, \
1114 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1115 offset - 1, 0); \
1116static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_pwm, \
1117 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1118 offset - 1, 1); \
1119static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_pwm, \
1120 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1121 offset - 1, 2); \
1122static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_pwm, \
1123 S_IRUGO, show_auto_pwm, NULL, offset - 1, 3); \
1124static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp, \
1125 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1126 offset - 1, 1); \
1127static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp_hyst, \
1128 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1129 offset - 1, 0); \
1130static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_temp, \
1131 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1132 offset - 1, 2); \
1133static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_temp, \
1134 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1135 offset - 1, 3); \
1136static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_temp, \
1137 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1138 offset - 1, 4);
1da177e4
LT		 1139
1140show_pwm_offset(1);
1141show_pwm_offset(2);
1142show_pwm_offset(3);
1143
17d648bf
JD		 1144/* A different set of callbacks for 16-bit fans */
1145static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
1146 char *buf)
1147{
1148 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1149 int nr = sensor_attr->index;
1150 struct it87_data *data = it87_update_device(dev);
1151 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
1152}
1153
1154static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
1155 char *buf)
1156{
1157 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1158 int nr = sensor_attr->index;
1159 struct it87_data *data = it87_update_device(dev);
1160 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
1161}
1162
1163static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
1164 const char *buf, size_t count)
1165{
1166 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1167 int nr = sensor_attr->index;
b74f3fdd 1168 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1169 long val;
1170
179c4fdb 1171 if (kstrtol(buf, 10, &val) < 0)
f5f64501 1172 return -EINVAL;
17d648bf
JD		 1173
1174 mutex_lock(&data->update_lock);
1175 data->fan_min[nr] = FAN16_TO_REG(val);
c7f1f716 1176 it87_write_value(data, IT87_REG_FAN_MIN[nr],
17d648bf 1177 data->fan_min[nr] & 0xff);
c7f1f716 1178 it87_write_value(data, IT87_REG_FANX_MIN[nr],
17d648bf
JD		 1179 data->fan_min[nr] >> 8);
1180 mutex_unlock(&data->update_lock);
1181 return count;
1182}
1183
4a0d71cf
GR		 1184/*
1185 * We want to use the same sysfs file names as 8-bit fans, but we need
1186 * different variable names, so we have to use SENSOR_ATTR instead of
1187 * SENSOR_DEVICE_ATTR.
1188 */
17d648bf
JD		 1189#define show_fan16_offset(offset) \
1190static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
1191 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
1192 show_fan16, NULL, offset - 1); \
1193static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
1194 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1195 show_fan16_min, set_fan16_min, offset - 1)
1196
1197show_fan16_offset(1);
1198show_fan16_offset(2);
1199show_fan16_offset(3);
c7f1f716
JD		 1200show_fan16_offset(4);
1201show_fan16_offset(5);
17d648bf 1202
1da177e4 1203/* Alarms */
5f2dc798
JD		 1204static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1205 char *buf)
1da177e4
LT		 1206{
1207 struct it87_data *data = it87_update_device(dev);
68188ba7 1208 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1209}
1d66c64c 1210static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1211
0124dd78
JD		 1212static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1213 char *buf)
1214{
1215 int bitnr = to_sensor_dev_attr(attr)->index;
1216 struct it87_data *data = it87_update_device(dev);
1217 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1218}
3d30f9e6
JD		 1219
1220static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1221 *attr, const char *buf, size_t count)
1222{
1223 struct it87_data *data = dev_get_drvdata(dev);
1224 long val;
1225 int config;
1226
179c4fdb 1227 if (kstrtol(buf, 10, &val) < 0 || val != 0)
3d30f9e6
JD		 1228 return -EINVAL;
1229
1230 mutex_lock(&data->update_lock);
1231 config = it87_read_value(data, IT87_REG_CONFIG);
1232 if (config < 0) {
1233 count = config;
1234 } else {
1235 config |= 1 << 5;
1236 it87_write_value(data, IT87_REG_CONFIG, config);
1237 /* Invalidate cache to force re-read */
1238 data->valid = 0;
1239 }
1240 mutex_unlock(&data->update_lock);
1241
1242 return count;
1243}
1244
0124dd78
JD		 1245static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1246static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1247static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1248static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1249static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1250static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1251static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1252static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1253static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1254static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1255static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1256static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1257static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1258static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1259static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1260static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
3d30f9e6
JD		 1261static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1262 show_alarm, clear_intrusion, 4);
0124dd78 1263
d9b327c3
JD		 1264static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1265 char *buf)
1266{
1267 int bitnr = to_sensor_dev_attr(attr)->index;
1268 struct it87_data *data = it87_update_device(dev);
1269 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1270}
1271static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1272 const char *buf, size_t count)
1273{
1274 int bitnr = to_sensor_dev_attr(attr)->index;
1275 struct it87_data *data = dev_get_drvdata(dev);
1276 long val;
1277
179c4fdb 1278 if (kstrtol(buf, 10, &val) < 0
d9b327c3
JD		 1279 || (val != 0 && val != 1))
1280 return -EINVAL;
1281
1282 mutex_lock(&data->update_lock);
1283 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1284 if (val)
1285 data->beeps |= (1 << bitnr);
1286 else
1287 data->beeps &= ~(1 << bitnr);
1288 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1289 mutex_unlock(&data->update_lock);
1290 return count;
1291}
1292
1293static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1294 show_beep, set_beep, 1);
1295static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1296static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1297static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1298static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1299static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1300static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1301static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1302/* fanX_beep writability is set later */
1303static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1304static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1305static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1306static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1307static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1308static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1309 show_beep, set_beep, 2);
1310static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1311static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1312
5f2dc798
JD		 1313static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1314 char *buf)
1da177e4 1315{
90d6619a 1316 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1317 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1318}
5f2dc798
JD		 1319static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1320 const char *buf, size_t count)
1da177e4 1321{
b74f3fdd 1322 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1323 unsigned long val;
1324
179c4fdb 1325 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 1326 return -EINVAL;
1da177e4 1327
1da177e4
LT		 1328 data->vrm = val;
1329
1330 return count;
1331}
1332static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1333
5f2dc798
JD		 1334static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1335 char *buf)
1da177e4
LT		 1336{
1337 struct it87_data *data = it87_update_device(dev);
1338 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1339}
1340static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1341
738e5e05
JD		 1342static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1343 char *buf)
1344{
3c4c4971 1345 static const char * const labels[] = {
738e5e05
JD		 1346 "+5V",
1347 "5VSB",
1348 "Vbat",
1349 };
3c4c4971 1350 static const char * const labels_it8721[] = {
44c1bcd4
JD		 1351 "+3.3V",
1352 "3VSB",
1353 "Vbat",
1354 };
1355 struct it87_data *data = dev_get_drvdata(dev);
738e5e05
JD		 1356 int nr = to_sensor_dev_attr(attr)->index;
1357
16b5dda2
JD		 1358 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1359 : labels[nr]);
738e5e05
JD		 1360}
1361static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1362static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1363static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1364
b74f3fdd 1365static ssize_t show_name(struct device *dev, struct device_attribute
1366 *devattr, char *buf)
1367{
1368 struct it87_data *data = dev_get_drvdata(dev);
1369 return sprintf(buf, "%s\n", data->name);
1370}
1371static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1372
9172b5d1
GR		 1373static struct attribute *it87_attributes_in[9][5] = {
1374{
87808be4 1375 &sensor_dev_attr_in0_input.dev_attr.attr,
87808be4 1376 &sensor_dev_attr_in0_min.dev_attr.attr,
87808be4 1377 &sensor_dev_attr_in0_max.dev_attr.attr,
0124dd78 1378 &sensor_dev_attr_in0_alarm.dev_attr.attr,
9172b5d1
GR		 1379 NULL
1380}, {
1381 &sensor_dev_attr_in1_input.dev_attr.attr,
1382 &sensor_dev_attr_in1_min.dev_attr.attr,
1383 &sensor_dev_attr_in1_max.dev_attr.attr,
0124dd78 1384 &sensor_dev_attr_in1_alarm.dev_attr.attr,
9172b5d1
GR		 1385 NULL
1386}, {
1387 &sensor_dev_attr_in2_input.dev_attr.attr,
1388 &sensor_dev_attr_in2_min.dev_attr.attr,
1389 &sensor_dev_attr_in2_max.dev_attr.attr,
0124dd78 1390 &sensor_dev_attr_in2_alarm.dev_attr.attr,
9172b5d1
GR		 1391 NULL
1392}, {
1393 &sensor_dev_attr_in3_input.dev_attr.attr,
1394 &sensor_dev_attr_in3_min.dev_attr.attr,
1395 &sensor_dev_attr_in3_max.dev_attr.attr,
0124dd78 1396 &sensor_dev_attr_in3_alarm.dev_attr.attr,
9172b5d1
GR		 1397 NULL
1398}, {
1399 &sensor_dev_attr_in4_input.dev_attr.attr,
1400 &sensor_dev_attr_in4_min.dev_attr.attr,
1401 &sensor_dev_attr_in4_max.dev_attr.attr,
0124dd78 1402 &sensor_dev_attr_in4_alarm.dev_attr.attr,
9172b5d1
GR		 1403 NULL
1404}, {
1405 &sensor_dev_attr_in5_input.dev_attr.attr,
1406 &sensor_dev_attr_in5_min.dev_attr.attr,
1407 &sensor_dev_attr_in5_max.dev_attr.attr,
0124dd78 1408 &sensor_dev_attr_in5_alarm.dev_attr.attr,
9172b5d1
GR		 1409 NULL
1410}, {
1411 &sensor_dev_attr_in6_input.dev_attr.attr,
1412 &sensor_dev_attr_in6_min.dev_attr.attr,
1413 &sensor_dev_attr_in6_max.dev_attr.attr,
0124dd78 1414 &sensor_dev_attr_in6_alarm.dev_attr.attr,
9172b5d1
GR		 1415 NULL
1416}, {
1417 &sensor_dev_attr_in7_input.dev_attr.attr,
1418 &sensor_dev_attr_in7_min.dev_attr.attr,
1419 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78 1420 &sensor_dev_attr_in7_alarm.dev_attr.attr,
9172b5d1
GR		 1421 NULL
1422}, {
1423 &sensor_dev_attr_in8_input.dev_attr.attr,
1424 NULL
1425} };
87808be4 1426
9172b5d1
GR		 1427static const struct attribute_group it87_group_in[9] = {
1428 { .attrs = it87_attributes_in[0] },
1429 { .attrs = it87_attributes_in[1] },
1430 { .attrs = it87_attributes_in[2] },
1431 { .attrs = it87_attributes_in[3] },
1432 { .attrs = it87_attributes_in[4] },
1433 { .attrs = it87_attributes_in[5] },
1434 { .attrs = it87_attributes_in[6] },
1435 { .attrs = it87_attributes_in[7] },
1436 { .attrs = it87_attributes_in[8] },
1437};
1438
4573acbc
GR		 1439static struct attribute *it87_attributes_temp[3][6] = {
1440{
87808be4 1441 &sensor_dev_attr_temp1_input.dev_attr.attr,
87808be4 1442 &sensor_dev_attr_temp1_max.dev_attr.attr,
87808be4 1443 &sensor_dev_attr_temp1_min.dev_attr.attr,
87808be4 1444 &sensor_dev_attr_temp1_type.dev_attr.attr,
0124dd78 1445 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
4573acbc
GR		 1446 NULL
1447} , {
1448 &sensor_dev_attr_temp2_input.dev_attr.attr,
1449 &sensor_dev_attr_temp2_max.dev_attr.attr,
1450 &sensor_dev_attr_temp2_min.dev_attr.attr,
1451 &sensor_dev_attr_temp2_type.dev_attr.attr,
0124dd78 1452 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
4573acbc
GR		 1453 NULL
1454} , {
1455 &sensor_dev_attr_temp3_input.dev_attr.attr,
1456 &sensor_dev_attr_temp3_max.dev_attr.attr,
1457 &sensor_dev_attr_temp3_min.dev_attr.attr,
1458 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78 1459 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
4573acbc
GR		 1460 NULL
1461} };
1462
1463static const struct attribute_group it87_group_temp[3] = {
1464 { .attrs = it87_attributes_temp[0] },
1465 { .attrs = it87_attributes_temp[1] },
1466 { .attrs = it87_attributes_temp[2] },
1467};
87808be4 1468
161d898a
GR		 1469static struct attribute *it87_attributes_temp_offset[] = {
1470 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1471 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1472 &sensor_dev_attr_temp3_offset.dev_attr.attr,
1473};
1474
4573acbc 1475static struct attribute *it87_attributes[] = {
87808be4 1476 &dev_attr_alarms.attr,
3d30f9e6 1477 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
b74f3fdd 1478 &dev_attr_name.attr,
87808be4
JD		 1479 NULL
1480};
1481
1482static const struct attribute_group it87_group = {
1483 .attrs = it87_attributes,
1484};
1485
9172b5d1 1486static struct attribute *it87_attributes_in_beep[] = {
d9b327c3
JD		 1487 &sensor_dev_attr_in0_beep.dev_attr.attr,
1488 &sensor_dev_attr_in1_beep.dev_attr.attr,
1489 &sensor_dev_attr_in2_beep.dev_attr.attr,
1490 &sensor_dev_attr_in3_beep.dev_attr.attr,
1491 &sensor_dev_attr_in4_beep.dev_attr.attr,
1492 &sensor_dev_attr_in5_beep.dev_attr.attr,
1493 &sensor_dev_attr_in6_beep.dev_attr.attr,
1494 &sensor_dev_attr_in7_beep.dev_attr.attr,
9172b5d1
GR		 1495 NULL
1496};
d9b327c3 1497
4573acbc 1498static struct attribute *it87_attributes_temp_beep[] = {
d9b327c3
JD		 1499 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1500 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1501 &sensor_dev_attr_temp3_beep.dev_attr.attr,
d9b327c3
JD		 1502};
1503
723a0aa0 1504static struct attribute *it87_attributes_fan16[5][3+1] = { {
87808be4
JD		 1505 &sensor_dev_attr_fan1_input16.dev_attr.attr,
1506 &sensor_dev_attr_fan1_min16.dev_attr.attr,
723a0aa0
JD		 1507 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1508 NULL
1509}, {
87808be4
JD		 1510 &sensor_dev_attr_fan2_input16.dev_attr.attr,
1511 &sensor_dev_attr_fan2_min16.dev_attr.attr,
723a0aa0
JD		 1512 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1513 NULL
1514}, {
87808be4
JD		 1515 &sensor_dev_attr_fan3_input16.dev_attr.attr,
1516 &sensor_dev_attr_fan3_min16.dev_attr.attr,
723a0aa0
JD		 1517 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1518 NULL
1519}, {
c7f1f716
JD		 1520 &sensor_dev_attr_fan4_input16.dev_attr.attr,
1521 &sensor_dev_attr_fan4_min16.dev_attr.attr,
723a0aa0
JD		 1522 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1523 NULL
1524}, {
c7f1f716
JD		 1525 &sensor_dev_attr_fan5_input16.dev_attr.attr,
1526 &sensor_dev_attr_fan5_min16.dev_attr.attr,
723a0aa0
JD		 1527 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1528 NULL
1529} };
1530
1531static const struct attribute_group it87_group_fan16[5] = {
1532 { .attrs = it87_attributes_fan16[0] },
1533 { .attrs = it87_attributes_fan16[1] },
1534 { .attrs = it87_attributes_fan16[2] },
1535 { .attrs = it87_attributes_fan16[3] },
1536 { .attrs = it87_attributes_fan16[4] },
1537};
87808be4 1538
723a0aa0 1539static struct attribute *it87_attributes_fan[3][4+1] = { {
87808be4
JD		 1540 &sensor_dev_attr_fan1_input.dev_attr.attr,
1541 &sensor_dev_attr_fan1_min.dev_attr.attr,
1542 &sensor_dev_attr_fan1_div.dev_attr.attr,
723a0aa0
JD		 1543 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1544 NULL
1545}, {
87808be4
JD		 1546 &sensor_dev_attr_fan2_input.dev_attr.attr,
1547 &sensor_dev_attr_fan2_min.dev_attr.attr,
1548 &sensor_dev_attr_fan2_div.dev_attr.attr,
723a0aa0
JD		 1549 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1550 NULL
1551}, {
87808be4
JD		 1552 &sensor_dev_attr_fan3_input.dev_attr.attr,
1553 &sensor_dev_attr_fan3_min.dev_attr.attr,
1554 &sensor_dev_attr_fan3_div.dev_attr.attr,
0124dd78 1555 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
723a0aa0
JD		 1556 NULL
1557} };
1558
1559static const struct attribute_group it87_group_fan[3] = {
1560 { .attrs = it87_attributes_fan[0] },
1561 { .attrs = it87_attributes_fan[1] },
1562 { .attrs = it87_attributes_fan[2] },
1563};
1564
1565static const struct attribute_group *
1566it87_get_fan_group(const struct it87_data *data)
1567{
1568 return has_16bit_fans(data) ? it87_group_fan16 : it87_group_fan;
1569}
0124dd78 1570
723a0aa0 1571static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1572 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1573 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1574 &dev_attr_pwm1_freq.attr,
94ac7ee6 1575 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1576 NULL
1577}, {
1578 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1579 &sensor_dev_attr_pwm2.dev_attr.attr,
1580 &dev_attr_pwm2_freq.attr,
94ac7ee6 1581 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1582 NULL
1583}, {
1584 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1585 &sensor_dev_attr_pwm3.dev_attr.attr,
1586 &dev_attr_pwm3_freq.attr,
94ac7ee6 1587 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1588 NULL
1589} };
87808be4 1590
723a0aa0
JD		 1591static const struct attribute_group it87_group_pwm[3] = {
1592 { .attrs = it87_attributes_pwm[0] },
1593 { .attrs = it87_attributes_pwm[1] },
1594 { .attrs = it87_attributes_pwm[2] },
1595};
1596
4f3f51bc
JD		 1597static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1598 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1599 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1600 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1601 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1602 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1603 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1604 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1605 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1606 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1607 NULL
1608}, {
1609 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1610 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1611 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1612 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1613 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1614 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1615 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1616 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1617 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1618 NULL
1619}, {
1620 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1621 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1622 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1623 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1624 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1625 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1626 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1627 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1628 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1629 NULL
1630} };
1631
1632static const struct attribute_group it87_group_autopwm[3] = {
1633 { .attrs = it87_attributes_autopwm[0] },
1634 { .attrs = it87_attributes_autopwm[1] },
1635 { .attrs = it87_attributes_autopwm[2] },
1636};
1637
d9b327c3
JD		 1638static struct attribute *it87_attributes_fan_beep[] = {
1639 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1640 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1641 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1642 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1643 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1644};
1645
6a8d7acf 1646static struct attribute *it87_attributes_vid[] = {
87808be4
JD		 1647 &dev_attr_vrm.attr,
1648 &dev_attr_cpu0_vid.attr,
1649 NULL
1650};
1651
6a8d7acf
JD		 1652static const struct attribute_group it87_group_vid = {
1653 .attrs = it87_attributes_vid,
87808be4 1654};
1da177e4 1655
738e5e05
JD		 1656static struct attribute *it87_attributes_label[] = {
1657 &sensor_dev_attr_in3_label.dev_attr.attr,
1658 &sensor_dev_attr_in7_label.dev_attr.attr,
1659 &sensor_dev_attr_in8_label.dev_attr.attr,
1660 NULL
1661};
1662
1663static const struct attribute_group it87_group_label = {
fa8b6975 1664 .attrs = it87_attributes_label,
738e5e05
JD		 1665};
1666
2d8672c5 1667/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1668static int __init it87_find(unsigned short *address,
1669 struct it87_sio_data *sio_data)
1da177e4 1670{
5b0380c9 1671 int err;
b74f3fdd 1672 u16 chip_type;
98dd22c3 1673 const char *board_vendor, *board_name;
1da177e4 1674
5b0380c9
NG		 1675 err = superio_enter();
1676 if (err)
1677 return err;
1678
1679 err = -ENODEV;
67b671bc 1680 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1681
1682 switch (chip_type) {
1683 case IT8705F_DEVID:
1684 sio_data->type = it87;
1685 break;
1686 case IT8712F_DEVID:
1687 sio_data->type = it8712;
1688 break;
1689 case IT8716F_DEVID:
1690 case IT8726F_DEVID:
1691 sio_data->type = it8716;
1692 break;
1693 case IT8718F_DEVID:
1694 sio_data->type = it8718;
1695 break;
b4da93e4
JMS		 1696 case IT8720F_DEVID:
1697 sio_data->type = it8720;
1698 break;
44c1bcd4
JD		 1699 case IT8721F_DEVID:
1700 sio_data->type = it8721;
1701 break;
16b5dda2
JD		 1702 case IT8728F_DEVID:
1703 sio_data->type = it8728;
1704 break;
0531d98b
GR		 1705 case IT8782F_DEVID:
1706 sio_data->type = it8782;
1707 break;
1708 case IT8783E_DEVID:
1709 sio_data->type = it8783;
1710 break;
b74f3fdd 1711 case 0xffff: /* No device at all */
1712 goto exit;
1713 default:
a8ca1037 1714 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
b74f3fdd 1715 goto exit;
1716 }
1da177e4 1717
87673dd7 1718 superio_select(PME);
1da177e4 1719 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
a8ca1037 1720 pr_info("Device not activated, skipping\n");
1da177e4
LT		 1721 goto exit;
1722 }
1723
1724 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1725 if (*address == 0) {
a8ca1037 1726 pr_info("Base address not set, skipping\n");
1da177e4
LT		 1727 goto exit;
1728 }
1729
1730 err = 0;
0475169c 1731 sio_data->revision = superio_inb(DEVREV) & 0x0f;
a8ca1037 1732 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1733 chip_type, *address, sio_data->revision);
1da177e4 1734
738e5e05
JD		 1735 /* in8 (Vbat) is always internal */
1736 sio_data->internal = (1 << 2);
1737
87673dd7 1738 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD		 1739 if (sio_data->type == it87) {
1740 /* The IT8705F doesn't have VID pins at all */
1741 sio_data->skip_vid = 1;
d9b327c3
JD		 1742
1743 /* The IT8705F has a different LD number for GPIO */
1744 superio_select(5);
1745 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
0531d98b
GR		 1746 } else if (sio_data->type == it8783) {
1747 int reg25, reg27, reg2A, reg2C, regEF;
0531d98b
GR		 1748
1749 sio_data->skip_vid = 1; /* No VID */
1750
1751 superio_select(GPIO);
1752
1753 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1754 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1755 reg2A = superio_inb(IT87_SIO_PINX1_REG);
1756 reg2C = superio_inb(IT87_SIO_PINX2_REG);
1757 regEF = superio_inb(IT87_SIO_SPI_REG);
1758
0531d98b 1759 /* Check if fan3 is there or not */
9172b5d1 1760 if ((reg27 & (1 << 0)) || !(reg2C & (1 << 2)))
0531d98b
GR		 1761 sio_data->skip_fan |= (1 << 2);
1762 if ((reg25 & (1 << 4))
1763 || (!(reg2A & (1 << 1)) && (regEF & (1 << 0))))
1764 sio_data->skip_pwm |= (1 << 2);
1765
1766 /* Check if fan2 is there or not */
1767 if (reg27 & (1 << 7))
1768 sio_data->skip_fan |= (1 << 1);
1769 if (reg27 & (1 << 3))
1770 sio_data->skip_pwm |= (1 << 1);
1771
1772 /* VIN5 */
9172b5d1
GR		 1773 if ((reg27 & (1 << 0)) || (reg2C & (1 << 2)))
1774 sio_data->skip_in |= (1 << 5); /* No VIN5 */
0531d98b
GR		 1775
1776 /* VIN6 */
9172b5d1
GR		 1777 if (reg27 & (1 << 1))
1778 sio_data->skip_in |= (1 << 6); /* No VIN6 */
0531d98b
GR		 1779
1780 /*
1781 * VIN7
1782 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1783 */
9172b5d1
GR		 1784 if (reg27 & (1 << 2)) {
1785 /*
1786 * The data sheet is a bit unclear regarding the
1787 * internal voltage divider for VCCH5V. It says
1788 * "This bit enables and switches VIN7 (pin 91) to the
1789 * internal voltage divider for VCCH5V".
1790 * This is different to other chips, where the internal
1791 * voltage divider would connect VIN7 to an internal
1792 * voltage source. Maybe that is the case here as well.
1793 *
1794 * Since we don't know for sure, re-route it if that is
1795 * not the case, and ask the user to report if the
1796 * resulting voltage is sane.
1797 */
1798 if (!(reg2C & (1 << 1))) {
1799 reg2C |= (1 << 1);
1800 superio_outb(IT87_SIO_PINX2_REG, reg2C);
1801 pr_notice("Routing internal VCCH5V to in7.\n");
1802 }
1803 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
1804 pr_notice("Please report if it displays a reasonable voltage.\n");
1805 }
0531d98b
GR		 1806
1807 if (reg2C & (1 << 0))
1808 sio_data->internal |= (1 << 0);
1809 if (reg2C & (1 << 1))
1810 sio_data->internal |= (1 << 1);
1811
1812 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1813
895ff267 1814 } else {
87673dd7 1815 int reg;
9172b5d1 1816 bool uart6;
87673dd7
JD		 1817
1818 superio_select(GPIO);
44c1bcd4 1819
895ff267 1820 reg = superio_inb(IT87_SIO_GPIO3_REG);
0531d98b
GR		 1821 if (sio_data->type == it8721 || sio_data->type == it8728 ||
1822 sio_data->type == it8782) {
16b5dda2 1823 /*
0531d98b
GR		 1824 * IT8721F/IT8758E, and IT8782F don't have VID pins
1825 * at all, not sure about the IT8728F.
16b5dda2 1826 */
895ff267 1827 sio_data->skip_vid = 1;
44c1bcd4
JD		 1828 } else {
1829 /* We need at least 4 VID pins */
1830 if (reg & 0x0f) {
a8ca1037 1831 pr_info("VID is disabled (pins used for GPIO)\n");
44c1bcd4
JD		 1832 sio_data->skip_vid = 1;
1833 }
895ff267
JD		 1834 }
1835
591ec650
JD		 1836 /* Check if fan3 is there or not */
1837 if (reg & (1 << 6))
1838 sio_data->skip_pwm |= (1 << 2);
1839 if (reg & (1 << 7))
1840 sio_data->skip_fan |= (1 << 2);
1841
1842 /* Check if fan2 is there or not */
1843 reg = superio_inb(IT87_SIO_GPIO5_REG);
1844 if (reg & (1 << 1))
1845 sio_data->skip_pwm |= (1 << 1);
1846 if (reg & (1 << 2))
1847 sio_data->skip_fan |= (1 << 1);
1848
895ff267
JD		 1849 if ((sio_data->type == it8718 || sio_data->type == it8720)
1850 && !(sio_data->skip_vid))
b74f3fdd 1851 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD		 1852
1853 reg = superio_inb(IT87_SIO_PINX2_REG);
9172b5d1
GR		 1854
1855 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
1856
436cad2a
JD		 1857 /*
1858 * The IT8720F has no VIN7 pin, so VCCH should always be
1859 * routed internally to VIN7 with an internal divider.
1860 * Curiously, there still is a configuration bit to control
1861 * this, which means it can be set incorrectly. And even
1862 * more curiously, many boards out there are improperly
1863 * configured, even though the IT8720F datasheet claims
1864 * that the internal routing of VCCH to VIN7 is the default
1865 * setting. So we force the internal routing in this case.
0531d98b
GR		 1866 *
1867 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
9172b5d1
GR		 1868 * If UART6 is enabled, re-route VIN7 to the internal divider
1869 * if that is not already the case.
436cad2a 1870 */
9172b5d1 1871 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
436cad2a
JD		 1872 reg |= (1 << 1);
1873 superio_outb(IT87_SIO_PINX2_REG, reg);
a8ca1037 1874 pr_notice("Routing internal VCCH to in7\n");
436cad2a 1875 }
87673dd7 1876 if (reg & (1 << 0))
738e5e05 1877 sio_data->internal |= (1 << 0);
16b5dda2
JD		 1878 if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1879 sio_data->type == it8728)
738e5e05 1880 sio_data->internal |= (1 << 1);
d9b327c3 1881
9172b5d1
GR		 1882 /*
1883 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
1884 * While VIN7 can be routed to the internal voltage divider,
1885 * VIN5 and VIN6 are not available if UART6 is enabled.
4573acbc
GR		 1886 *
1887 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
1888 * is the temperature source. Since we can not read the
1889 * temperature source here, skip_temp is preliminary.
9172b5d1 1890 */
4573acbc 1891 if (uart6) {
9172b5d1 1892 sio_data->skip_in |= (1 << 5) | (1 << 6);
4573acbc
GR		 1893 sio_data->skip_temp |= (1 << 2);
1894 }
9172b5d1 1895
d9b327c3 1896 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1897 }
d9b327c3 1898 if (sio_data->beep_pin)
a8ca1037 1899 pr_info("Beeping is supported\n");
87673dd7 1900
98dd22c3
JD		 1901 /* Disable specific features based on DMI strings */
1902 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1903 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1904 if (board_vendor && board_name) {
1905 if (strcmp(board_vendor, "nVIDIA") == 0
1906 && strcmp(board_name, "FN68PT") == 0) {
4a0d71cf
GR		 1907 /*
1908 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
1909 * connected to a fan, but to something else. One user
1910 * has reported instant system power-off when changing
1911 * the PWM2 duty cycle, so we disable it.
1912 * I use the board name string as the trigger in case
1913 * the same board is ever used in other systems.
1914 */
a8ca1037 1915 pr_info("Disabling pwm2 due to hardware constraints\n");
98dd22c3
JD		 1916 sio_data->skip_pwm = (1 << 1);
1917 }
1918 }
1919
1da177e4
LT		 1920exit:
1921 superio_exit();
1922 return err;
1923}
1924
723a0aa0
JD		 1925static void it87_remove_files(struct device *dev)
1926{
1927 struct it87_data *data = platform_get_drvdata(pdev);
1928 struct it87_sio_data *sio_data = dev->platform_data;
1929 const struct attribute_group *fan_group = it87_get_fan_group(data);
1930 int i;
1931
1932 sysfs_remove_group(&dev->kobj, &it87_group);
9172b5d1
GR		 1933 for (i = 0; i < 9; i++) {
1934 if (sio_data->skip_in & (1 << i))
1935 continue;
1936 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
1937 if (it87_attributes_in_beep[i])
1938 sysfs_remove_file(&dev->kobj,
1939 it87_attributes_in_beep[i]);
1940 }
4573acbc
GR		 1941 for (i = 0; i < 3; i++) {
1942 if (!(data->has_temp & (1 << i)))
1943 continue;
1944 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
161d898a
GR		 1945 if (has_temp_offset(data))
1946 sysfs_remove_file(&dev->kobj,
1947 it87_attributes_temp_offset[i]);
4573acbc
GR		 1948 if (sio_data->beep_pin)
1949 sysfs_remove_file(&dev->kobj,
1950 it87_attributes_temp_beep[i]);
1951 }
723a0aa0
JD		 1952 for (i = 0; i < 5; i++) {
1953 if (!(data->has_fan & (1 << i)))
1954 continue;
1955 sysfs_remove_group(&dev->kobj, &fan_group[i]);
d9b327c3
JD		 1956 if (sio_data->beep_pin)
1957 sysfs_remove_file(&dev->kobj,
1958 it87_attributes_fan_beep[i]);
723a0aa0
JD		 1959 }
1960 for (i = 0; i < 3; i++) {
1961 if (sio_data->skip_pwm & (1 << 0))
1962 continue;
1963 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD		 1964 if (has_old_autopwm(data))
1965 sysfs_remove_group(&dev->kobj,
1966 &it87_group_autopwm[i]);
723a0aa0 1967 }
6a8d7acf
JD		 1968 if (!sio_data->skip_vid)
1969 sysfs_remove_group(&dev->kobj, &it87_group_vid);
738e5e05 1970 sysfs_remove_group(&dev->kobj, &it87_group_label);
723a0aa0
JD		 1971}
1972
6c931ae1 1973static int it87_probe(struct platform_device *pdev)
1da177e4 1974{
1da177e4 1975 struct it87_data *data;
b74f3fdd 1976 struct resource *res;
1977 struct device *dev = &pdev->dev;
1978 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD		 1979 const struct attribute_group *fan_group;
1980 int err = 0, i;
1da177e4 1981 int enable_pwm_interface;
d9b327c3 1982 int fan_beep_need_rw;
3c4c4971 1983 static const char * const names[] = {
b74f3fdd 1984 "it87",
1985 "it8712",
1986 "it8716",
1987 "it8718",
b4da93e4 1988 "it8720",
44c1bcd4 1989 "it8721",
16b5dda2 1990 "it8728",
0531d98b
GR		 1991 "it8782",
1992 "it8783",
b74f3fdd 1993 };
1994
1995 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
62a1d05f
GR		 1996 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
1997 DRVNAME)) {
b74f3fdd 1998 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1999 (unsigned long)res->start,
87b4b663 2000 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
62a1d05f 2001 return -EBUSY;
8e9afcbb 2002 }
1da177e4 2003
62a1d05f
GR		 2004 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2005 if (!data)
2006 return -ENOMEM;
1da177e4 2007
b74f3fdd 2008 data->addr = res->start;
2009 data->type = sio_data->type;
0475169c 2010 data->revision = sio_data->revision;
b74f3fdd 2011 data->name = names[sio_data->type];
1da177e4
LT		 2012
2013 /* Now, we do the remaining detection. */
b74f3fdd 2014 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
62a1d05f
GR		 2015 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2016 return -ENODEV;
1da177e4 2017
b74f3fdd 2018 platform_set_drvdata(pdev, data);
1da177e4 2019
9a61bf63 2020 mutex_init(&data->update_lock);
1da177e4 2021
1da177e4 2022 /* Check PWM configuration */
b74f3fdd 2023 enable_pwm_interface = it87_check_pwm(dev);
1da177e4 2024
44c1bcd4 2025 /* Starting with IT8721F, we handle scaling of internal voltages */
16b5dda2 2026 if (has_12mv_adc(data)) {
44c1bcd4
JD		 2027 if (sio_data->internal & (1 << 0))
2028 data->in_scaled |= (1 << 3); /* in3 is AVCC */
2029 if (sio_data->internal & (1 << 1))
2030 data->in_scaled |= (1 << 7); /* in7 is VSB */
2031 if (sio_data->internal & (1 << 2))
2032 data->in_scaled |= (1 << 8); /* in8 is Vbat */
0531d98b
GR		 2033 } else if (sio_data->type == it8782 || sio_data->type == it8783) {
2034 if (sio_data->internal & (1 << 0))
2035 data->in_scaled |= (1 << 3); /* in3 is VCC5V */
2036 if (sio_data->internal & (1 << 1))
2037 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
44c1bcd4
JD		 2038 }
2039
4573acbc
GR		 2040 data->has_temp = 0x07;
2041 if (sio_data->skip_temp & (1 << 2)) {
2042 if (sio_data->type == it8782
2043 && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2044 data->has_temp &= ~(1 << 2);
2045 }
2046
1da177e4 2047 /* Initialize the IT87 chip */
b74f3fdd 2048 it87_init_device(pdev);
1da177e4
LT		 2049
2050 /* Register sysfs hooks */
5f2dc798
JD		 2051 err = sysfs_create_group(&dev->kobj, &it87_group);
2052 if (err)
62a1d05f 2053 return err;
17d648bf 2054
9172b5d1
GR		 2055 for (i = 0; i < 9; i++) {
2056 if (sio_data->skip_in & (1 << i))
2057 continue;
2058 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2059 if (err)
62a1d05f 2060 goto error;
9172b5d1
GR		 2061 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2062 err = sysfs_create_file(&dev->kobj,
2063 it87_attributes_in_beep[i]);
2064 if (err)
62a1d05f 2065 goto error;
9172b5d1
GR		 2066 }
2067 }
2068
4573acbc
GR		 2069 for (i = 0; i < 3; i++) {
2070 if (!(data->has_temp & (1 << i)))
2071 continue;
2072 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
d9b327c3 2073 if (err)
62a1d05f 2074 goto error;
161d898a
GR		 2075 if (has_temp_offset(data)) {
2076 err = sysfs_create_file(&dev->kobj,
2077 it87_attributes_temp_offset[i]);
2078 if (err)
2079 goto error;
2080 }
4573acbc
GR		 2081 if (sio_data->beep_pin) {
2082 err = sysfs_create_file(&dev->kobj,
2083 it87_attributes_temp_beep[i]);
2084 if (err)
2085 goto error;
2086 }
d9b327c3
JD		 2087 }
2088
9060f8bd 2089 /* Do not create fan files for disabled fans */
723a0aa0 2090 fan_group = it87_get_fan_group(data);
d9b327c3 2091 fan_beep_need_rw = 1;
723a0aa0
JD		 2092 for (i = 0; i < 5; i++) {
2093 if (!(data->has_fan & (1 << i)))
2094 continue;
2095 err = sysfs_create_group(&dev->kobj, &fan_group[i]);
2096 if (err)
62a1d05f 2097 goto error;
d9b327c3
JD		 2098
2099 if (sio_data->beep_pin) {
2100 err = sysfs_create_file(&dev->kobj,
2101 it87_attributes_fan_beep[i]);
2102 if (err)
62a1d05f 2103 goto error;
d9b327c3
JD		 2104 if (!fan_beep_need_rw)
2105 continue;
2106
4a0d71cf
GR		 2107 /*
2108 * As we have a single beep enable bit for all fans,
d9b327c3 2109 * only the first enabled fan has a writable attribute
4a0d71cf
GR		 2110 * for it.
2111 */
d9b327c3
JD		 2112 if (sysfs_chmod_file(&dev->kobj,
2113 it87_attributes_fan_beep[i],
2114 S_IRUGO | S_IWUSR))
2115 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2116 i + 1);
2117 fan_beep_need_rw = 0;
2118 }
17d648bf
JD		 2119 }
2120
1da177e4 2121 if (enable_pwm_interface) {
723a0aa0
JD		 2122 for (i = 0; i < 3; i++) {
2123 if (sio_data->skip_pwm & (1 << i))
2124 continue;
2125 err = sysfs_create_group(&dev->kobj,
2126 &it87_group_pwm[i]);
2127 if (err)
62a1d05f 2128 goto error;
4f3f51bc
JD		 2129
2130 if (!has_old_autopwm(data))
2131 continue;
2132 err = sysfs_create_group(&dev->kobj,
2133 &it87_group_autopwm[i]);
2134 if (err)
62a1d05f 2135 goto error;
98dd22c3 2136 }
1da177e4
LT		 2137 }
2138
895ff267 2139 if (!sio_data->skip_vid) {
303760b4 2140 data->vrm = vid_which_vrm();
87673dd7 2141 /* VID reading from Super-I/O config space if available */
b74f3fdd 2142 data->vid = sio_data->vid_value;
6a8d7acf
JD		 2143 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2144 if (err)
62a1d05f 2145 goto error;
87808be4
JD		 2146 }
2147
738e5e05
JD		 2148 /* Export labels for internal sensors */
2149 for (i = 0; i < 3; i++) {
2150 if (!(sio_data->internal & (1 << i)))
2151 continue;
2152 err = sysfs_create_file(&dev->kobj,
2153 it87_attributes_label[i]);
2154 if (err)
62a1d05f 2155 goto error;
738e5e05
JD		 2156 }
2157
1beeffe4
TJ		 2158 data->hwmon_dev = hwmon_device_register(dev);
2159 if (IS_ERR(data->hwmon_dev)) {
2160 err = PTR_ERR(data->hwmon_dev);
62a1d05f 2161 goto error;
1da177e4
LT		 2162 }
2163
2164 return 0;
2165
62a1d05f 2166error:
723a0aa0 2167 it87_remove_files(dev);
1da177e4
LT		 2168 return err;
2169}
2170
281dfd0b 2171static int it87_remove(struct platform_device *pdev)
1da177e4 2172{
b74f3fdd 2173 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2174
1beeffe4 2175 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 2176 it87_remove_files(&pdev->dev);
943b0830 2177
1da177e4
LT		 2178 return 0;
2179}
2180
4a0d71cf
GR		 2181/*
2182 * Must be called with data->update_lock held, except during initialization.
2183 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2184 * would slow down the IT87 access and should not be necessary.
2185 */
b74f3fdd 2186static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 2187{
b74f3fdd 2188 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2189 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2190}
2191
4a0d71cf
GR		 2192/*
2193 * Must be called with data->update_lock held, except during initialization.
2194 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2195 * would slow down the IT87 access and should not be necessary.
2196 */
b74f3fdd 2197static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 2198{
b74f3fdd 2199 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2200 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2201}
2202
2203/* Return 1 if and only if the PWM interface is safe to use */
6c931ae1 2204static int it87_check_pwm(struct device *dev)
1da177e4 2205{
b74f3fdd 2206 struct it87_data *data = dev_get_drvdata(dev);
4a0d71cf
GR		 2207 /*
2208 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
1da177e4 2209 * and polarity set to active low is sign that this is the case so we
4a0d71cf
GR		 2210 * disable pwm control to protect the user.
2211 */
b74f3fdd 2212 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT		 2213 if ((tmp & 0x87) == 0) {
2214 if (fix_pwm_polarity) {
4a0d71cf
GR		 2215 /*
2216 * The user asks us to attempt a chip reconfiguration.
1da177e4 2217 * This means switching to active high polarity and
4a0d71cf
GR		 2218 * inverting all fan speed values.
2219 */
1da177e4
LT		 2220 int i;
2221 u8 pwm[3];
2222
2223 for (i = 0; i < 3; i++)
b74f3fdd 2224 pwm[i] = it87_read_value(data,
1da177e4
LT		 2225 IT87_REG_PWM(i));
2226
4a0d71cf
GR		 2227 /*
2228 * If any fan is in automatic pwm mode, the polarity
1da177e4
LT		 2229 * might be correct, as suspicious as it seems, so we
2230 * better don't change anything (but still disable the
4a0d71cf
GR		 2231 * PWM interface).
2232 */
1da177e4 2233 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 2234 dev_info(dev, "Reconfiguring PWM to "
1da177e4 2235 "active high polarity\n");
b74f3fdd 2236 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT		 2237 tmp | 0x87);
2238 for (i = 0; i < 3; i++)
b74f3fdd 2239 it87_write_value(data,
1da177e4
LT		 2240 IT87_REG_PWM(i),
2241 0x7f & ~pwm[i]);
2242 return 1;
2243 }
2244
b74f3fdd 2245 dev_info(dev, "PWM configuration is "
1da177e4
LT		 2246 "too broken to be fixed\n");
2247 }
2248
b74f3fdd 2249 dev_info(dev, "Detected broken BIOS "
1da177e4
LT		 2250 "defaults, disabling PWM interface\n");
2251 return 0;
2252 } else if (fix_pwm_polarity) {
b74f3fdd 2253 dev_info(dev, "PWM configuration looks "
1da177e4
LT		 2254 "sane, won't touch\n");
2255 }
2256
2257 return 1;
2258}
2259
2260/* Called when we have found a new IT87. */
6c931ae1 2261static void it87_init_device(struct platform_device *pdev)
1da177e4 2262{
591ec650 2263 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 2264 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2265 int tmp, i;
591ec650 2266 u8 mask;
1da177e4 2267
4a0d71cf
GR		 2268 /*
2269 * For each PWM channel:
b99883dc
JD		 2270 * - If it is in automatic mode, setting to manual mode should set
2271 * the fan to full speed by default.
2272 * - If it is in manual mode, we need a mapping to temperature
2273 * channels to use when later setting to automatic mode later.
2274 * Use a 1:1 mapping by default (we are clueless.)
2275 * In both cases, the value can (and should) be changed by the user
6229cdb2
JD		 2276 * prior to switching to a different mode.
2277 * Note that this is no longer needed for the IT8721F and later, as
2278 * these have separate registers for the temperature mapping and the
4a0d71cf
GR		 2279 * manual duty cycle.
2280 */
1da177e4 2281 for (i = 0; i < 3; i++) {
b99883dc
JD		 2282 data->pwm_temp_map[i] = i;
2283 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 2284 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT		 2285 }
2286
4a0d71cf
GR		 2287 /*
2288 * Some chips seem to have default value 0xff for all limit
c5df9b7a
JD		 2289 * registers. For low voltage limits it makes no sense and triggers
2290 * alarms, so change to 0 instead. For high temperature limits, it
2291 * means -1 degree C, which surprisingly doesn't trigger an alarm,
4a0d71cf
GR		 2292 * but is still confusing, so change to 127 degrees C.
2293 */
c5df9b7a 2294 for (i = 0; i < 8; i++) {
b74f3fdd 2295 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 2296 if (tmp == 0xff)
b74f3fdd 2297 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD		 2298 }
2299 for (i = 0; i < 3; i++) {
b74f3fdd 2300 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 2301 if (tmp == 0xff)
b74f3fdd 2302 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD		 2303 }
2304
4a0d71cf
GR		 2305 /*
2306 * Temperature channels are not forcibly enabled, as they can be
a00afb97
JD		 2307 * set to two different sensor types and we can't guess which one
2308 * is correct for a given system. These channels can be enabled at
4a0d71cf
GR		 2309 * run-time through the temp{1-3}_type sysfs accessors if needed.
2310 */
1da177e4
LT		 2311
2312 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 2313 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT		 2314 if ((tmp & 0xff) == 0) {
2315 /* Enable all voltage monitors */
b74f3fdd 2316 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT		 2317 }
2318
2319 /* Check if tachometers are reset manually or by some reason */
591ec650 2320 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 2321 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 2322 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 2323 /* Enable all fan tachometers */
591ec650 2324 data->fan_main_ctrl |= mask;
5f2dc798
JD		 2325 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2326 data->fan_main_ctrl);
1da177e4 2327 }
9060f8bd 2328 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 2329
17d648bf 2330 /* Set tachometers to 16-bit mode if needed */
0475169c 2331 if (has_16bit_fans(data)) {
b74f3fdd 2332 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 2333 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 2334 dev_dbg(&pdev->dev,
17d648bf 2335 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 2336 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD		 2337 tmp | 0x07);
2338 }
0531d98b
GR		 2339 /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
2340 if (data->type != it87 && data->type != it8782 &&
2341 data->type != it8783) {
816d8c6a
AP		 2342 if (tmp & (1 << 4))
2343 data->has_fan |= (1 << 3); /* fan4 enabled */
2344 if (tmp & (1 << 5))
2345 data->has_fan |= (1 << 4); /* fan5 enabled */
2346 }
17d648bf
JD		 2347 }
2348
591ec650
JD		 2349 /* Fan input pins may be used for alternative functions */
2350 data->has_fan &= ~sio_data->skip_fan;
2351
1da177e4 2352 /* Start monitoring */
b74f3fdd 2353 it87_write_value(data, IT87_REG_CONFIG,
41002f8d 2354 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
1da177e4
LT		 2355 | (update_vbat ? 0x41 : 0x01));
2356}
2357
b99883dc
JD		 2358static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2359{
2360 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
16b5dda2 2361 if (has_newer_autopwm(data)) {
b99883dc 2362 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
6229cdb2
JD		 2363 data->pwm_duty[nr] = it87_read_value(data,
2364 IT87_REG_PWM_DUTY(nr));
2365 } else {
2366 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2367 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2368 else /* Manual mode */
2369 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2370 }
4f3f51bc
JD		 2371
2372 if (has_old_autopwm(data)) {
2373 int i;
2374
2375 for (i = 0; i < 5 ; i++)
2376 data->auto_temp[nr][i] = it87_read_value(data,
2377 IT87_REG_AUTO_TEMP(nr, i));
2378 for (i = 0; i < 3 ; i++)
2379 data->auto_pwm[nr][i] = it87_read_value(data,
2380 IT87_REG_AUTO_PWM(nr, i));
2381 }
b99883dc
JD		 2382}
2383
1da177e4
LT		 2384static struct it87_data *it87_update_device(struct device *dev)
2385{
b74f3fdd 2386 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 2387 int i;
2388
9a61bf63 2389 mutex_lock(&data->update_lock);
1da177e4
LT		 2390
2391 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2392 || !data->valid) {
1da177e4 2393 if (update_vbat) {
4a0d71cf
GR		 2394 /*
2395 * Cleared after each update, so reenable. Value
2396 * returned by this read will be previous value
2397 */
b74f3fdd 2398 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 2399 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT		 2400 }
2401 for (i = 0; i <= 7; i++) {
929c6a56 2402 data->in[i][0] =
5f2dc798 2403 it87_read_value(data, IT87_REG_VIN(i));
929c6a56 2404 data->in[i][1] =
5f2dc798 2405 it87_read_value(data, IT87_REG_VIN_MIN(i));
929c6a56 2406 data->in[i][2] =
5f2dc798 2407 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 2408 }
3543a53f 2409 /* in8 (battery) has no limit registers */
929c6a56 2410 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 2411
c7f1f716 2412 for (i = 0; i < 5; i++) {
9060f8bd
JD		 2413 /* Skip disabled fans */
2414 if (!(data->has_fan & (1 << i)))
2415 continue;
2416
1da177e4 2417 data->fan_min[i] =
5f2dc798 2418 it87_read_value(data, IT87_REG_FAN_MIN[i]);
b74f3fdd 2419 data->fan[i] = it87_read_value(data,
c7f1f716 2420 IT87_REG_FAN[i]);
17d648bf 2421 /* Add high byte if in 16-bit mode */
0475169c 2422 if (has_16bit_fans(data)) {
b74f3fdd 2423 data->fan[i] |= it87_read_value(data,
c7f1f716 2424 IT87_REG_FANX[i]) << 8;
b74f3fdd 2425 data->fan_min[i] |= it87_read_value(data,
c7f1f716 2426 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 2427 }
1da177e4
LT		 2428 }
2429 for (i = 0; i < 3; i++) {
4573acbc
GR		 2430 if (!(data->has_temp & (1 << i)))
2431 continue;
60ca385a 2432 data->temp[i][0] =
5f2dc798 2433 it87_read_value(data, IT87_REG_TEMP(i));
60ca385a 2434 data->temp[i][1] =
5f2dc798 2435 it87_read_value(data, IT87_REG_TEMP_LOW(i));
60ca385a
GR		 2436 data->temp[i][2] =
2437 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
161d898a
GR		 2438 if (has_temp_offset(data))
2439 data->temp[i][3] =
2440 it87_read_value(data,
2441 IT87_REG_TEMP_OFFSET[i]);
1da177e4
LT		 2442 }
2443
17d648bf 2444 /* Newer chips don't have clock dividers */
0475169c 2445 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 2446 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD		 2447 data->fan_div[0] = i & 0x07;
2448 data->fan_div[1] = (i >> 3) & 0x07;
2449 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2450 }
1da177e4
LT		 2451
2452 data->alarms =
b74f3fdd 2453 it87_read_value(data, IT87_REG_ALARM1) |
2454 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2455 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2456 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2457
b74f3fdd 2458 data->fan_main_ctrl = it87_read_value(data,
2459 IT87_REG_FAN_MAIN_CTRL);
2460 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD		 2461 for (i = 0; i < 3; i++)
2462 it87_update_pwm_ctrl(data, i);
b74f3fdd 2463
2464 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
4a0d71cf
GR		 2465 /*
2466 * The IT8705F does not have VID capability.
2467 * The IT8718F and later don't use IT87_REG_VID for the
2468 * same purpose.
2469 */
17d648bf 2470 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2471 data->vid = it87_read_value(data, IT87_REG_VID);
4a0d71cf
GR		 2472 /*
2473 * The older IT8712F revisions had only 5 VID pins,
2474 * but we assume it is always safe to read 6 bits.
2475 */
17d648bf 2476 data->vid &= 0x3f;
1da177e4
LT		 2477 }
2478 data->last_updated = jiffies;
2479 data->valid = 1;
2480 }
2481
9a61bf63 2482 mutex_unlock(&data->update_lock);
1da177e4
LT		 2483
2484 return data;
2485}
2486
b74f3fdd 2487static int __init it87_device_add(unsigned short address,
2488 const struct it87_sio_data *sio_data)
2489{
2490 struct resource res = {
87b4b663
BH		 2491 .start = address + IT87_EC_OFFSET,
2492 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2493 .name = DRVNAME,
2494 .flags = IORESOURCE_IO,
2495 };
2496 int err;
2497
b9acb64a
JD		 2498 err = acpi_check_resource_conflict(&res);
2499 if (err)
2500 goto exit;
2501
b74f3fdd 2502 pdev = platform_device_alloc(DRVNAME, address);
2503 if (!pdev) {
2504 err = -ENOMEM;
a8ca1037 2505 pr_err("Device allocation failed\n");
b74f3fdd 2506 goto exit;
2507 }
2508
2509 err = platform_device_add_resources(pdev, &res, 1);
2510 if (err) {
a8ca1037 2511 pr_err("Device resource addition failed (%d)\n", err);
b74f3fdd 2512 goto exit_device_put;
2513 }
2514
2515 err = platform_device_add_data(pdev, sio_data,
2516 sizeof(struct it87_sio_data));
2517 if (err) {
a8ca1037 2518 pr_err("Platform data allocation failed\n");
b74f3fdd 2519 goto exit_device_put;
2520 }
2521
2522 err = platform_device_add(pdev);
2523 if (err) {
a8ca1037 2524 pr_err("Device addition failed (%d)\n", err);
b74f3fdd 2525 goto exit_device_put;
2526 }
2527
2528 return 0;
2529
2530exit_device_put:
2531 platform_device_put(pdev);
2532exit:
2533 return err;
2534}
2535
1da177e4
LT		 2536static int __init sm_it87_init(void)
2537{
b74f3fdd 2538 int err;
5f2dc798 2539 unsigned short isa_address = 0;
b74f3fdd 2540 struct it87_sio_data sio_data;
2541
98dd22c3 2542 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2543 err = it87_find(&isa_address, &sio_data);
2544 if (err)
2545 return err;
2546 err = platform_driver_register(&it87_driver);
2547 if (err)
2548 return err;
fde09509 2549
b74f3fdd 2550 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2551 if (err) {
b74f3fdd 2552 platform_driver_unregister(&it87_driver);
2553 return err;
2554 }
2555
2556 return 0;
1da177e4
LT		 2557}
2558
2559static void __exit sm_it87_exit(void)
2560{
b74f3fdd 2561 platform_device_unregister(pdev);
2562 platform_driver_unregister(&it87_driver);
1da177e4
LT		 2563}
2564
2565
f1d8e332 2566MODULE_AUTHOR("Chris Gauthron, "
b19367c6 2567 "Jean Delvare <khali@linux-fr.org>");
44c1bcd4 2568MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
1da177e4
LT		 2569module_param(update_vbat, bool, 0);
2570MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2571module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD		 2572MODULE_PARM_DESC(fix_pwm_polarity,
2573 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT		 2574MODULE_LICENSE("GPL");
2575
2576module_init(sm_it87_init);
2577module_exit(sm_it87_exit);
Linux kernel - Deliverables
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