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hwmon: (it87) Replace macro defining tempX_type sensors with direct definitions
[deliverable/linux.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4 1/*
5f2dc798
JD		 2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
44c1bcd4 18 * IT8721F Super I/O chip w/LPC interface
5f2dc798 19 * IT8726F Super I/O chip w/LPC interface
16b5dda2 20 * IT8728F Super I/O chip w/LPC interface
44c1bcd4 21 * IT8758E Super I/O chip w/LPC interface
0531d98b
GR		 22 * IT8782F Super I/O chip w/LPC interface
23 * IT8783E/F Super I/O chip w/LPC interface
5f2dc798
JD		 24 * Sis950 A clone of the IT8705F
25 *
26 * Copyright (C) 2001 Chris Gauthron
27 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
28 *
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License as published by
31 * the Free Software Foundation; either version 2 of the License, or
32 * (at your option) any later version.
33 *
34 * This program is distributed in the hope that it will be useful,
35 * but WITHOUT ANY WARRANTY; without even the implied warranty of
36 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 * GNU General Public License for more details.
38 *
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
42 */
1da177e4 43
a8ca1037
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
1da177e4
LT		 46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
b74f3fdd 50#include <linux/platform_device.h>
943b0830 51#include <linux/hwmon.h>
303760b4
JD		 52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
943b0830 54#include <linux/err.h>
9a61bf63 55#include <linux/mutex.h>
87808be4 56#include <linux/sysfs.h>
98dd22c3
JD		 57#include <linux/string.h>
58#include <linux/dmi.h>
b9acb64a 59#include <linux/acpi.h>
6055fae8 60#include <linux/io.h>
1da177e4 61
b74f3fdd 62#define DRVNAME "it87"
1da177e4 63
0531d98b
GR		 64enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,
65 it8783 };
1da177e4 66
67b671bc
JD		 67static unsigned short force_id;
68module_param(force_id, ushort, 0);
69MODULE_PARM_DESC(force_id, "Override the detected device ID");
70
b74f3fdd 71static struct platform_device *pdev;
72
1da177e4
LT		 73#define REG 0x2e /* The register to read/write */
74#define DEV 0x07 /* Register: Logical device select */
75#define VAL 0x2f /* The value to read/write */
76#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS		 77
78/* The device with the IT8718F/IT8720F VID value in it */
79#define GPIO 0x07
80
1da177e4
LT		 81#define DEVID 0x20 /* Register: Device ID */
82#define DEVREV 0x22 /* Register: Device Revision */
83
5b0380c9 84static inline int superio_inb(int reg)
1da177e4
LT		 85{
86 outb(reg, REG);
87 return inb(VAL);
88}
89
5b0380c9 90static inline void superio_outb(int reg, int val)
436cad2a
JD		 91{
92 outb(reg, REG);
93 outb(val, VAL);
94}
95
1da177e4
LT		 96static int superio_inw(int reg)
97{
98 int val;
99 outb(reg++, REG);
100 val = inb(VAL) << 8;
101 outb(reg, REG);
102 val |= inb(VAL);
103 return val;
104}
105
5b0380c9 106static inline void superio_select(int ldn)
1da177e4
LT		 107{
108 outb(DEV, REG);
87673dd7 109 outb(ldn, VAL);
1da177e4
LT		 110}
111
5b0380c9 112static inline int superio_enter(void)
1da177e4 113{
5b0380c9
NG		 114 /*
115 * Try to reserve REG and REG + 1 for exclusive access.
116 */
117 if (!request_muxed_region(REG, 2, DRVNAME))
118 return -EBUSY;
119
1da177e4
LT		 120 outb(0x87, REG);
121 outb(0x01, REG);
122 outb(0x55, REG);
123 outb(0x55, REG);
5b0380c9 124 return 0;
1da177e4
LT		 125}
126
5b0380c9 127static inline void superio_exit(void)
1da177e4
LT		 128{
129 outb(0x02, REG);
130 outb(0x02, VAL);
5b0380c9 131 release_region(REG, 2);
1da177e4
LT		 132}
133
87673dd7 134/* Logical device 4 registers */
1da177e4
LT		 135#define IT8712F_DEVID 0x8712
136#define IT8705F_DEVID 0x8705
17d648bf 137#define IT8716F_DEVID 0x8716
87673dd7 138#define IT8718F_DEVID 0x8718
b4da93e4 139#define IT8720F_DEVID 0x8720
44c1bcd4 140#define IT8721F_DEVID 0x8721
08a8f6e9 141#define IT8726F_DEVID 0x8726
16b5dda2 142#define IT8728F_DEVID 0x8728
0531d98b
GR		 143#define IT8782F_DEVID 0x8782
144#define IT8783E_DEVID 0x8783
1da177e4
LT		 145#define IT87_ACT_REG 0x30
146#define IT87_BASE_REG 0x60
147
87673dd7 148/* Logical device 7 registers (IT8712F and later) */
0531d98b 149#define IT87_SIO_GPIO1_REG 0x25
895ff267 150#define IT87_SIO_GPIO3_REG 0x27
591ec650 151#define IT87_SIO_GPIO5_REG 0x29
0531d98b 152#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
87673dd7 153#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
0531d98b 154#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
87673dd7 155#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 156#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 157
1da177e4 158/* Update battery voltage after every reading if true */
90ab5ee9 159static bool update_vbat;
1da177e4
LT		 160
161/* Not all BIOSes properly configure the PWM registers */
90ab5ee9 162static bool fix_pwm_polarity;
1da177e4 163
1da177e4
LT		 164/* Many IT87 constants specified below */
165
166/* Length of ISA address segment */
167#define IT87_EXTENT 8
168
87b4b663
BH		 169/* Length of ISA address segment for Environmental Controller */
170#define IT87_EC_EXTENT 2
171
172/* Offset of EC registers from ISA base address */
173#define IT87_EC_OFFSET 5
174
175/* Where are the ISA address/data registers relative to the EC base address */
176#define IT87_ADDR_REG_OFFSET 0
177#define IT87_DATA_REG_OFFSET 1
1da177e4
LT		 178
179/*----- The IT87 registers -----*/
180
181#define IT87_REG_CONFIG 0x00
182
183#define IT87_REG_ALARM1 0x01
184#define IT87_REG_ALARM2 0x02
185#define IT87_REG_ALARM3 0x03
186
4a0d71cf
GR		 187/*
188 * The IT8718F and IT8720F have the VID value in a different register, in
189 * Super-I/O configuration space.
190 */
1da177e4 191#define IT87_REG_VID 0x0a
4a0d71cf
GR		 192/*
193 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
194 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
195 * mode.
196 */
1da177e4 197#define IT87_REG_FAN_DIV 0x0b
17d648bf 198#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT		 199
200/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
201
c7f1f716
JD		 202static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
203static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
204static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
205static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
1da177e4
LT		 206#define IT87_REG_FAN_MAIN_CTRL 0x13
207#define IT87_REG_FAN_CTL 0x14
208#define IT87_REG_PWM(nr) (0x15 + (nr))
6229cdb2 209#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
1da177e4
LT		 210
211#define IT87_REG_VIN(nr) (0x20 + (nr))
212#define IT87_REG_TEMP(nr) (0x29 + (nr))
213
214#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
215#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
216#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
217#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
218
1da177e4
LT		 219#define IT87_REG_VIN_ENABLE 0x50
220#define IT87_REG_TEMP_ENABLE 0x51
4573acbc 221#define IT87_REG_TEMP_EXTRA 0x55
d9b327c3 222#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT		 223
224#define IT87_REG_CHIPID 0x58
225
4f3f51bc
JD		 226#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
227#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
228
1da177e4 229
b74f3fdd 230struct it87_sio_data {
231 enum chips type;
232 /* Values read from Super-I/O config space */
0475169c 233 u8 revision;
b74f3fdd 234 u8 vid_value;
d9b327c3 235 u8 beep_pin;
738e5e05 236 u8 internal; /* Internal sensors can be labeled */
591ec650 237 /* Features skipped based on config or DMI */
9172b5d1 238 u16 skip_in;
895ff267 239 u8 skip_vid;
591ec650 240 u8 skip_fan;
98dd22c3 241 u8 skip_pwm;
4573acbc 242 u8 skip_temp;
b74f3fdd 243};
244
4a0d71cf
GR		 245/*
246 * For each registered chip, we need to keep some data in memory.
247 * The structure is dynamically allocated.
248 */
1da177e4 249struct it87_data {
1beeffe4 250 struct device *hwmon_dev;
1da177e4 251 enum chips type;
0475169c 252 u8 revision;
1da177e4 253
b74f3fdd 254 unsigned short addr;
255 const char *name;
9a61bf63 256 struct mutex update_lock;
1da177e4
LT		 257 char valid; /* !=0 if following fields are valid */
258 unsigned long last_updated; /* In jiffies */
259
44c1bcd4 260 u16 in_scaled; /* Internal voltage sensors are scaled */
929c6a56 261 u8 in[9][3]; /* [nr][0]=in, [1]=min, [2]=max */
9060f8bd 262 u8 has_fan; /* Bitfield, fans enabled */
c7f1f716
JD		 263 u16 fan[5]; /* Register values, possibly combined */
264 u16 fan_min[5]; /* Register values, possibly combined */
4573acbc 265 u8 has_temp; /* Bitfield, temp sensors enabled */
60ca385a 266 s8 temp[3][3]; /* [nr][0]=temp, [1]=min, [2]=max */
1da177e4
LT		 267 u8 sensor; /* Register value */
268 u8 fan_div[3]; /* Register encoding, shifted right */
269 u8 vid; /* Register encoding, combined */
a7be58a1 270 u8 vrm;
1da177e4 271 u32 alarms; /* Register encoding, combined */
d9b327c3 272 u8 beeps; /* Register encoding */
1da177e4 273 u8 fan_main_ctrl; /* Register value */
f8d0c19a 274 u8 fan_ctl; /* Register value */
b99883dc 275
4a0d71cf
GR		 276 /*
277 * The following 3 arrays correspond to the same registers up to
6229cdb2
JD		 278 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
279 * 7, and we want to preserve settings on mode changes, so we have
280 * to track all values separately.
281 * Starting with the IT8721F, the manual PWM duty cycles are stored
282 * in separate registers (8-bit values), so the separate tracking
283 * is no longer needed, but it is still done to keep the driver
4a0d71cf
GR		 284 * simple.
285 */
b99883dc 286 u8 pwm_ctrl[3]; /* Register value */
6229cdb2 287 u8 pwm_duty[3]; /* Manual PWM value set by user */
b99883dc 288 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD		 289
290 /* Automatic fan speed control registers */
291 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
292 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4 293};
0df6454d 294
16b5dda2
JD		 295static inline int has_12mv_adc(const struct it87_data *data)
296{
297 /*
298 * IT8721F and later have a 12 mV ADC, also with internal scaling
299 * on selected inputs.
300 */
301 return data->type == it8721
302 || data->type == it8728;
303}
304
305static inline int has_newer_autopwm(const struct it87_data *data)
306{
307 /*
308 * IT8721F and later have separate registers for the temperature
309 * mapping and the manual duty cycle.
310 */
311 return data->type == it8721
312 || data->type == it8728;
313}
314
0531d98b 315static int adc_lsb(const struct it87_data *data, int nr)
44c1bcd4 316{
0531d98b
GR		 317 int lsb = has_12mv_adc(data) ? 12 : 16;
318 if (data->in_scaled & (1 << nr))
319 lsb <<= 1;
320 return lsb;
321}
44c1bcd4 322
0531d98b
GR		 323static u8 in_to_reg(const struct it87_data *data, int nr, long val)
324{
325 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
44c1bcd4
JD		 326 return SENSORS_LIMIT(val, 0, 255);
327}
328
329static int in_from_reg(const struct it87_data *data, int nr, int val)
330{
0531d98b 331 return val * adc_lsb(data, nr);
44c1bcd4 332}
0df6454d
JD		 333
334static inline u8 FAN_TO_REG(long rpm, int div)
335{
336 if (rpm == 0)
337 return 255;
338 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
339 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
340 254);
341}
342
343static inline u16 FAN16_TO_REG(long rpm)
344{
345 if (rpm == 0)
346 return 0xffff;
347 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
348}
349
350#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
351 1350000 / ((val) * (div)))
352/* The divider is fixed to 2 in 16-bit mode */
353#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
354 1350000 / ((val) * 2))
355
356#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
357 ((val) + 500) / 1000), -128, 127))
358#define TEMP_FROM_REG(val) ((val) * 1000)
359
44c1bcd4
JD		 360static u8 pwm_to_reg(const struct it87_data *data, long val)
361{
16b5dda2 362 if (has_newer_autopwm(data))
44c1bcd4
JD		 363 return val;
364 else
365 return val >> 1;
366}
367
368static int pwm_from_reg(const struct it87_data *data, u8 reg)
369{
16b5dda2 370 if (has_newer_autopwm(data))
44c1bcd4
JD		 371 return reg;
372 else
373 return (reg & 0x7f) << 1;
374}
375
0df6454d
JD		 376
377static int DIV_TO_REG(int val)
378{
379 int answer = 0;
380 while (answer < 7 && (val >>= 1))
381 answer++;
382 return answer;
383}
384#define DIV_FROM_REG(val) (1 << (val))
385
386static const unsigned int pwm_freq[8] = {
387 48000000 / 128,
388 24000000 / 128,
389 12000000 / 128,
390 8000000 / 128,
391 6000000 / 128,
392 3000000 / 128,
393 1500000 / 128,
394 750000 / 128,
395};
1da177e4 396
0475169c
AP		 397static inline int has_16bit_fans(const struct it87_data *data)
398{
4a0d71cf
GR		 399 /*
400 * IT8705F Datasheet 0.4.1, 3h == Version G.
401 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
402 * These are the first revisions with 16-bit tachometer support.
403 */
816d8c6a 404 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 405 || (data->type == it8712 && data->revision >= 0x08)
0475169c 406 || data->type == it8716
b4da93e4 407 || data->type == it8718
44c1bcd4 408 || data->type == it8720
16b5dda2 409 || data->type == it8721
0531d98b
GR		 410 || data->type == it8728
411 || data->type == it8782
412 || data->type == it8783;
0475169c 413}
1da177e4 414
4f3f51bc
JD		 415static inline int has_old_autopwm(const struct it87_data *data)
416{
4a0d71cf
GR		 417 /*
418 * The old automatic fan speed control interface is implemented
419 * by IT8705F chips up to revision F and IT8712F chips up to
420 * revision G.
421 */
4f3f51bc
JD		 422 return (data->type == it87 && data->revision < 0x03)
423 || (data->type == it8712 && data->revision < 0x08);
424}
425
b74f3fdd 426static int it87_probe(struct platform_device *pdev);
281dfd0b 427static int it87_remove(struct platform_device *pdev);
1da177e4 428
b74f3fdd 429static int it87_read_value(struct it87_data *data, u8 reg);
430static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 431static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 432static int it87_check_pwm(struct device *dev);
433static void it87_init_device(struct platform_device *pdev);
1da177e4
LT		 434
435
b74f3fdd 436static struct platform_driver it87_driver = {
cdaf7934 437 .driver = {
87218842 438 .owner = THIS_MODULE,
b74f3fdd 439 .name = DRVNAME,
cdaf7934 440 },
b74f3fdd 441 .probe = it87_probe,
9e5e9b7a 442 .remove = it87_remove,
fde09509
JD		 443};
444
20ad93d4 445static ssize_t show_in(struct device *dev, struct device_attribute *attr,
929c6a56 446 char *buf)
1da177e4 447{
929c6a56
GR		 448 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
449 int nr = sattr->nr;
450 int index = sattr->index;
20ad93d4 451
1da177e4 452 struct it87_data *data = it87_update_device(dev);
929c6a56 453 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1da177e4
LT		 454}
455
929c6a56
GR		 456static ssize_t set_in(struct device *dev, struct device_attribute *attr,
457 const char *buf, size_t count)
1da177e4 458{
929c6a56
GR		 459 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
460 int nr = sattr->nr;
461 int index = sattr->index;
20ad93d4 462
b74f3fdd 463 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 464 unsigned long val;
465
179c4fdb 466 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 467 return -EINVAL;
1da177e4 468
9a61bf63 469 mutex_lock(&data->update_lock);
929c6a56
GR		 470 data->in[nr][index] = in_to_reg(data, nr, val);
471 it87_write_value(data,
472 index == 1 ? IT87_REG_VIN_MIN(nr)
473 : IT87_REG_VIN_MAX(nr),
474 data->in[nr][index]);
9a61bf63 475 mutex_unlock(&data->update_lock);
1da177e4
LT		 476 return count;
477}
20ad93d4 478
929c6a56
GR		 479static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
480static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
481 0, 1);
482static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
483 0, 2);
f5f64501 484
929c6a56
GR		 485static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
486static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
487 1, 1);
488static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
489 1, 2);
1da177e4 490
929c6a56
GR		 491static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
492static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
493 2, 1);
494static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
495 2, 2);
1da177e4 496
929c6a56
GR		 497static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
498static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
499 3, 1);
500static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
501 3, 2);
502
503static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
504static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
505 4, 1);
506static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
507 4, 2);
508
509static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
510static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
511 5, 1);
512static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
513 5, 2);
514
515static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
516static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
517 6, 1);
518static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
519 6, 2);
520
521static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
522static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
523 7, 1);
524static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
525 7, 2);
526
527static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1da177e4
LT		 528
529/* 3 temperatures */
20ad93d4 530static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
60ca385a 531 char *buf)
1da177e4 532{
60ca385a
GR		 533 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
534 int nr = sattr->nr;
535 int index = sattr->index;
1da177e4 536 struct it87_data *data = it87_update_device(dev);
20ad93d4 537
60ca385a 538 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1da177e4 539}
20ad93d4 540
60ca385a
GR		 541static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
542 const char *buf, size_t count)
1da177e4 543{
60ca385a
GR		 544 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
545 int nr = sattr->nr;
546 int index = sattr->index;
b74f3fdd 547 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 548 long val;
549
179c4fdb 550 if (kstrtol(buf, 10, &val) < 0)
f5f64501 551 return -EINVAL;
1da177e4 552
9a61bf63 553 mutex_lock(&data->update_lock);
60ca385a
GR		 554 data->temp[nr][index] = TEMP_TO_REG(val);
555 it87_write_value(data,
556 index == 1 ? IT87_REG_TEMP_LOW(nr)
557 : IT87_REG_TEMP_HIGH(nr),
558 data->temp[nr][index]);
9a61bf63 559 mutex_unlock(&data->update_lock);
1da177e4
LT		 560 return count;
561}
1da177e4 562
60ca385a
GR		 563static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
564static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
565 0, 1);
566static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
567 0, 2);
568static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
569static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
570 1, 1);
571static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
572 1, 2);
573static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
574static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
575 2, 1);
576static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
577 2, 2);
1da177e4 578
2cece01f
GR		 579static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
580 char *buf)
1da177e4 581{
20ad93d4
JD		 582 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
583 int nr = sensor_attr->index;
1da177e4 584 struct it87_data *data = it87_update_device(dev);
4a0d71cf 585 u8 reg = data->sensor; /* In case value is updated while used */
5f2dc798 586
1da177e4
LT		 587 if (reg & (1 << nr))
588 return sprintf(buf, "3\n"); /* thermal diode */
589 if (reg & (8 << nr))
4ed10779 590 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT		 591 return sprintf(buf, "0\n"); /* disabled */
592}
2cece01f
GR		 593
594static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
595 const char *buf, size_t count)
1da177e4 596{
20ad93d4
JD		 597 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
598 int nr = sensor_attr->index;
599
b74f3fdd 600 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 601 long val;
8acf07c5 602 u8 reg;
f5f64501 603
179c4fdb 604 if (kstrtol(buf, 10, &val) < 0)
f5f64501 605 return -EINVAL;
1da177e4 606
8acf07c5
JD		 607 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
608 reg &= ~(1 << nr);
609 reg &= ~(8 << nr);
4ed10779
JD		 610 if (val == 2) { /* backwards compatibility */
611 dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
612 "instead\n");
613 val = 4;
614 }
615 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4 616 if (val == 3)
8acf07c5 617 reg |= 1 << nr;
4ed10779 618 else if (val == 4)
8acf07c5
JD		 619 reg |= 8 << nr;
620 else if (val != 0)
1da177e4 621 return -EINVAL;
8acf07c5
JD		 622
623 mutex_lock(&data->update_lock);
624 data->sensor = reg;
b74f3fdd 625 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
2b3d1d87 626 data->valid = 0; /* Force cache refresh */
9a61bf63 627 mutex_unlock(&data->update_lock);
1da177e4
LT		 628 return count;
629}
1da177e4 630
2cece01f
GR		 631static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
632 set_temp_type, 0);
633static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
634 set_temp_type, 1);
635static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
636 set_temp_type, 2);
1da177e4
LT		 637
638/* 3 Fans */
b99883dc
JD		 639
640static int pwm_mode(const struct it87_data *data, int nr)
641{
642 int ctrl = data->fan_main_ctrl & (1 << nr);
643
644 if (ctrl == 0) /* Full speed */
645 return 0;
646 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
647 return 2;
648 else /* Manual mode */
649 return 1;
650}
651
20ad93d4
JD		 652static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
653 char *buf)
1da177e4 654{
20ad93d4
JD		 655 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
656 int nr = sensor_attr->index;
657
1da177e4 658 struct it87_data *data = it87_update_device(dev);
5f2dc798 659 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
1da177e4
LT		 660 DIV_FROM_REG(data->fan_div[nr])));
661}
20ad93d4
JD		 662static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
663 char *buf)
1da177e4 664{
20ad93d4
JD		 665 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
666 int nr = sensor_attr->index;
667
1da177e4 668 struct it87_data *data = it87_update_device(dev);
5f2dc798
JD		 669 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
670 DIV_FROM_REG(data->fan_div[nr])));
1da177e4 671}
20ad93d4
JD		 672static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
673 char *buf)
1da177e4 674{
20ad93d4
JD		 675 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
676 int nr = sensor_attr->index;
677
1da177e4
LT		 678 struct it87_data *data = it87_update_device(dev);
679 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
680}
5f2dc798
JD		 681static ssize_t show_pwm_enable(struct device *dev,
682 struct device_attribute *attr, char *buf)
1da177e4 683{
20ad93d4
JD		 684 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
685 int nr = sensor_attr->index;
686
1da177e4 687 struct it87_data *data = it87_update_device(dev);
b99883dc 688 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 689}
20ad93d4
JD		 690static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
691 char *buf)
1da177e4 692{
20ad93d4
JD		 693 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
694 int nr = sensor_attr->index;
695
1da177e4 696 struct it87_data *data = it87_update_device(dev);
44c1bcd4
JD		 697 return sprintf(buf, "%d\n",
698 pwm_from_reg(data, data->pwm_duty[nr]));
1da177e4 699}
f8d0c19a
JD		 700static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
701 char *buf)
702{
703 struct it87_data *data = it87_update_device(dev);
704 int index = (data->fan_ctl >> 4) & 0x07;
705
706 return sprintf(buf, "%u\n", pwm_freq[index]);
707}
20ad93d4
JD		 708static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
709 const char *buf, size_t count)
1da177e4 710{
20ad93d4
JD		 711 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
712 int nr = sensor_attr->index;
713
b74f3fdd 714 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 715 long val;
7f999aa7 716 u8 reg;
1da177e4 717
179c4fdb 718 if (kstrtol(buf, 10, &val) < 0)
f5f64501
JD		 719 return -EINVAL;
720
9a61bf63 721 mutex_lock(&data->update_lock);
b74f3fdd 722 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d 723 switch (nr) {
5f2dc798
JD		 724 case 0:
725 data->fan_div[nr] = reg & 0x07;
726 break;
727 case 1:
728 data->fan_div[nr] = (reg >> 3) & 0x07;
729 break;
730 case 2:
731 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
732 break;
07eab46d
JD		 733 }
734
1da177e4 735 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 736 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
9a61bf63 737 mutex_unlock(&data->update_lock);
1da177e4
LT		 738 return count;
739}
20ad93d4
JD		 740static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
741 const char *buf, size_t count)
1da177e4 742{
20ad93d4
JD		 743 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
744 int nr = sensor_attr->index;
745
b74f3fdd 746 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 747 unsigned long val;
8ab4ec3e 748 int min;
1da177e4
LT		 749 u8 old;
750
179c4fdb 751 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 752 return -EINVAL;
753
9a61bf63 754 mutex_lock(&data->update_lock);
b74f3fdd 755 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 756
8ab4ec3e
JD		 757 /* Save fan min limit */
758 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT		 759
760 switch (nr) {
761 case 0:
762 case 1:
763 data->fan_div[nr] = DIV_TO_REG(val);
764 break;
765 case 2:
766 if (val < 8)
767 data->fan_div[nr] = 1;
768 else
769 data->fan_div[nr] = 3;
770 }
771 val = old & 0x80;
772 val |= (data->fan_div[0] & 0x07);
773 val |= (data->fan_div[1] & 0x07) << 3;
774 if (data->fan_div[2] == 3)
775 val |= 0x1 << 6;
b74f3fdd 776 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 777
8ab4ec3e
JD		 778 /* Restore fan min limit */
779 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 780 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
8ab4ec3e 781
9a61bf63 782 mutex_unlock(&data->update_lock);
1da177e4
LT		 783 return count;
784}
cccfc9c4
JD		 785
786/* Returns 0 if OK, -EINVAL otherwise */
787static int check_trip_points(struct device *dev, int nr)
788{
789 const struct it87_data *data = dev_get_drvdata(dev);
790 int i, err = 0;
791
792 if (has_old_autopwm(data)) {
793 for (i = 0; i < 3; i++) {
794 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
795 err = -EINVAL;
796 }
797 for (i = 0; i < 2; i++) {
798 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
799 err = -EINVAL;
800 }
801 }
802
803 if (err) {
804 dev_err(dev, "Inconsistent trip points, not switching to "
805 "automatic mode\n");
806 dev_err(dev, "Adjust the trip points and try again\n");
807 }
808 return err;
809}
810
20ad93d4
JD		 811static ssize_t set_pwm_enable(struct device *dev,
812 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 813{
20ad93d4
JD		 814 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
815 int nr = sensor_attr->index;
816
b74f3fdd 817 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 818 long val;
1da177e4 819
179c4fdb 820 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD		 821 return -EINVAL;
822
cccfc9c4
JD		 823 /* Check trip points before switching to automatic mode */
824 if (val == 2) {
825 if (check_trip_points(dev, nr) < 0)
826 return -EINVAL;
827 }
828
9a61bf63 829 mutex_lock(&data->update_lock);
1da177e4
LT		 830
831 if (val == 0) {
832 int tmp;
833 /* make sure the fan is on when in on/off mode */
b74f3fdd 834 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
835 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT		 836 /* set on/off mode */
837 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD		 838 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
839 data->fan_main_ctrl);
b99883dc
JD		 840 } else {
841 if (val == 1) /* Manual mode */
16b5dda2 842 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
6229cdb2
JD		 843 data->pwm_temp_map[nr] :
844 data->pwm_duty[nr];
b99883dc
JD		 845 else /* Automatic mode */
846 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
847 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT		 848 /* set SmartGuardian mode */
849 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD		 850 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
851 data->fan_main_ctrl);
1da177e4
LT		 852 }
853
9a61bf63 854 mutex_unlock(&data->update_lock);
1da177e4
LT		 855 return count;
856}
20ad93d4
JD		 857static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
858 const char *buf, size_t count)
1da177e4 859{
20ad93d4
JD		 860 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
861 int nr = sensor_attr->index;
862
b74f3fdd 863 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 864 long val;
1da177e4 865
179c4fdb 866 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT		 867 return -EINVAL;
868
9a61bf63 869 mutex_lock(&data->update_lock);
16b5dda2 870 if (has_newer_autopwm(data)) {
4a0d71cf
GR		 871 /*
872 * If we are in automatic mode, the PWM duty cycle register
873 * is read-only so we can't write the value.
874 */
6229cdb2
JD		 875 if (data->pwm_ctrl[nr] & 0x80) {
876 mutex_unlock(&data->update_lock);
877 return -EBUSY;
878 }
879 data->pwm_duty[nr] = pwm_to_reg(data, val);
880 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
881 data->pwm_duty[nr]);
882 } else {
883 data->pwm_duty[nr] = pwm_to_reg(data, val);
4a0d71cf
GR		 884 /*
885 * If we are in manual mode, write the duty cycle immediately;
886 * otherwise, just store it for later use.
887 */
6229cdb2
JD		 888 if (!(data->pwm_ctrl[nr] & 0x80)) {
889 data->pwm_ctrl[nr] = data->pwm_duty[nr];
890 it87_write_value(data, IT87_REG_PWM(nr),
891 data->pwm_ctrl[nr]);
892 }
b99883dc 893 }
9a61bf63 894 mutex_unlock(&data->update_lock);
1da177e4
LT		 895 return count;
896}
f8d0c19a
JD		 897static ssize_t set_pwm_freq(struct device *dev,
898 struct device_attribute *attr, const char *buf, size_t count)
899{
b74f3fdd 900 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 901 unsigned long val;
f8d0c19a
JD		 902 int i;
903
179c4fdb 904 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 905 return -EINVAL;
906
f8d0c19a
JD		 907 /* Search for the nearest available frequency */
908 for (i = 0; i < 7; i++) {
909 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
910 break;
911 }
912
913 mutex_lock(&data->update_lock);
b74f3fdd 914 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 915 data->fan_ctl |= i << 4;
b74f3fdd 916 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD		 917 mutex_unlock(&data->update_lock);
918
919 return count;
920}
94ac7ee6
JD		 921static ssize_t show_pwm_temp_map(struct device *dev,
922 struct device_attribute *attr, char *buf)
923{
924 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
925 int nr = sensor_attr->index;
926
927 struct it87_data *data = it87_update_device(dev);
928 int map;
929
930 if (data->pwm_temp_map[nr] < 3)
931 map = 1 << data->pwm_temp_map[nr];
932 else
933 map = 0; /* Should never happen */
934 return sprintf(buf, "%d\n", map);
935}
936static ssize_t set_pwm_temp_map(struct device *dev,
937 struct device_attribute *attr, const char *buf, size_t count)
938{
939 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
940 int nr = sensor_attr->index;
941
942 struct it87_data *data = dev_get_drvdata(dev);
943 long val;
944 u8 reg;
945
4a0d71cf
GR		 946 /*
947 * This check can go away if we ever support automatic fan speed
948 * control on newer chips.
949 */
4f3f51bc
JD		 950 if (!has_old_autopwm(data)) {
951 dev_notice(dev, "Mapping change disabled for safety reasons\n");
952 return -EINVAL;
953 }
954
179c4fdb 955 if (kstrtol(buf, 10, &val) < 0)
94ac7ee6
JD		 956 return -EINVAL;
957
958 switch (val) {
959 case (1 << 0):
960 reg = 0x00;
961 break;
962 case (1 << 1):
963 reg = 0x01;
964 break;
965 case (1 << 2):
966 reg = 0x02;
967 break;
968 default:
969 return -EINVAL;
970 }
971
972 mutex_lock(&data->update_lock);
973 data->pwm_temp_map[nr] = reg;
4a0d71cf
GR		 974 /*
975 * If we are in automatic mode, write the temp mapping immediately;
976 * otherwise, just store it for later use.
977 */
94ac7ee6
JD		 978 if (data->pwm_ctrl[nr] & 0x80) {
979 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
980 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
981 }
982 mutex_unlock(&data->update_lock);
983 return count;
984}
1da177e4 985
4f3f51bc
JD		 986static ssize_t show_auto_pwm(struct device *dev,
987 struct device_attribute *attr, char *buf)
988{
989 struct it87_data *data = it87_update_device(dev);
990 struct sensor_device_attribute_2 *sensor_attr =
991 to_sensor_dev_attr_2(attr);
992 int nr = sensor_attr->nr;
993 int point = sensor_attr->index;
994
44c1bcd4
JD		 995 return sprintf(buf, "%d\n",
996 pwm_from_reg(data, data->auto_pwm[nr][point]));
4f3f51bc
JD		 997}
998
999static ssize_t set_auto_pwm(struct device *dev,
1000 struct device_attribute *attr, const char *buf, size_t count)
1001{
1002 struct it87_data *data = dev_get_drvdata(dev);
1003 struct sensor_device_attribute_2 *sensor_attr =
1004 to_sensor_dev_attr_2(attr);
1005 int nr = sensor_attr->nr;
1006 int point = sensor_attr->index;
1007 long val;
1008
179c4fdb 1009 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
4f3f51bc
JD		 1010 return -EINVAL;
1011
1012 mutex_lock(&data->update_lock);
44c1bcd4 1013 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
4f3f51bc
JD		 1014 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1015 data->auto_pwm[nr][point]);
1016 mutex_unlock(&data->update_lock);
1017 return count;
1018}
1019
1020static ssize_t show_auto_temp(struct device *dev,
1021 struct device_attribute *attr, char *buf)
1022{
1023 struct it87_data *data = it87_update_device(dev);
1024 struct sensor_device_attribute_2 *sensor_attr =
1025 to_sensor_dev_attr_2(attr);
1026 int nr = sensor_attr->nr;
1027 int point = sensor_attr->index;
1028
1029 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1030}
1031
1032static ssize_t set_auto_temp(struct device *dev,
1033 struct device_attribute *attr, const char *buf, size_t count)
1034{
1035 struct it87_data *data = dev_get_drvdata(dev);
1036 struct sensor_device_attribute_2 *sensor_attr =
1037 to_sensor_dev_attr_2(attr);
1038 int nr = sensor_attr->nr;
1039 int point = sensor_attr->index;
1040 long val;
1041
179c4fdb 1042 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
4f3f51bc
JD		 1043 return -EINVAL;
1044
1045 mutex_lock(&data->update_lock);
1046 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1047 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1048 data->auto_temp[nr][point]);
1049 mutex_unlock(&data->update_lock);
1050 return count;
1051}
1052
20ad93d4
JD		 1053#define show_fan_offset(offset) \
1054static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
1055 show_fan, NULL, offset - 1); \
1056static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1057 show_fan_min, set_fan_min, offset - 1); \
1058static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
1059 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT		 1060
1061show_fan_offset(1);
1062show_fan_offset(2);
1063show_fan_offset(3);
1064
1065#define show_pwm_offset(offset) \
20ad93d4
JD		 1066static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
1067 show_pwm_enable, set_pwm_enable, offset - 1); \
1068static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD		 1069 show_pwm, set_pwm, offset - 1); \
1070static DEVICE_ATTR(pwm##offset##_freq, \
1071 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
94ac7ee6
JD		 1072 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
1073static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
4f3f51bc
JD		 1074 S_IRUGO | S_IWUSR, show_pwm_temp_map, set_pwm_temp_map, \
1075 offset - 1); \
1076static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_pwm, \
1077 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1078 offset - 1, 0); \
1079static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_pwm, \
1080 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1081 offset - 1, 1); \
1082static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_pwm, \
1083 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1084 offset - 1, 2); \
1085static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_pwm, \
1086 S_IRUGO, show_auto_pwm, NULL, offset - 1, 3); \
1087static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp, \
1088 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1089 offset - 1, 1); \
1090static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp_hyst, \
1091 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1092 offset - 1, 0); \
1093static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_temp, \
1094 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1095 offset - 1, 2); \
1096static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_temp, \
1097 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1098 offset - 1, 3); \
1099static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_temp, \
1100 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1101 offset - 1, 4);
1da177e4
LT		 1102
1103show_pwm_offset(1);
1104show_pwm_offset(2);
1105show_pwm_offset(3);
1106
17d648bf
JD		 1107/* A different set of callbacks for 16-bit fans */
1108static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
1109 char *buf)
1110{
1111 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1112 int nr = sensor_attr->index;
1113 struct it87_data *data = it87_update_device(dev);
1114 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
1115}
1116
1117static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
1118 char *buf)
1119{
1120 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1121 int nr = sensor_attr->index;
1122 struct it87_data *data = it87_update_device(dev);
1123 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
1124}
1125
1126static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
1127 const char *buf, size_t count)
1128{
1129 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1130 int nr = sensor_attr->index;
b74f3fdd 1131 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1132 long val;
1133
179c4fdb 1134 if (kstrtol(buf, 10, &val) < 0)
f5f64501 1135 return -EINVAL;
17d648bf
JD		 1136
1137 mutex_lock(&data->update_lock);
1138 data->fan_min[nr] = FAN16_TO_REG(val);
c7f1f716 1139 it87_write_value(data, IT87_REG_FAN_MIN[nr],
17d648bf 1140 data->fan_min[nr] & 0xff);
c7f1f716 1141 it87_write_value(data, IT87_REG_FANX_MIN[nr],
17d648bf
JD		 1142 data->fan_min[nr] >> 8);
1143 mutex_unlock(&data->update_lock);
1144 return count;
1145}
1146
4a0d71cf
GR		 1147/*
1148 * We want to use the same sysfs file names as 8-bit fans, but we need
1149 * different variable names, so we have to use SENSOR_ATTR instead of
1150 * SENSOR_DEVICE_ATTR.
1151 */
17d648bf
JD		 1152#define show_fan16_offset(offset) \
1153static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
1154 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
1155 show_fan16, NULL, offset - 1); \
1156static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
1157 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1158 show_fan16_min, set_fan16_min, offset - 1)
1159
1160show_fan16_offset(1);
1161show_fan16_offset(2);
1162show_fan16_offset(3);
c7f1f716
JD		 1163show_fan16_offset(4);
1164show_fan16_offset(5);
17d648bf 1165
1da177e4 1166/* Alarms */
5f2dc798
JD		 1167static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1168 char *buf)
1da177e4
LT		 1169{
1170 struct it87_data *data = it87_update_device(dev);
68188ba7 1171 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1172}
1d66c64c 1173static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1174
0124dd78
JD		 1175static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1176 char *buf)
1177{
1178 int bitnr = to_sensor_dev_attr(attr)->index;
1179 struct it87_data *data = it87_update_device(dev);
1180 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1181}
3d30f9e6
JD		 1182
1183static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1184 *attr, const char *buf, size_t count)
1185{
1186 struct it87_data *data = dev_get_drvdata(dev);
1187 long val;
1188 int config;
1189
179c4fdb 1190 if (kstrtol(buf, 10, &val) < 0 || val != 0)
3d30f9e6
JD		 1191 return -EINVAL;
1192
1193 mutex_lock(&data->update_lock);
1194 config = it87_read_value(data, IT87_REG_CONFIG);
1195 if (config < 0) {
1196 count = config;
1197 } else {
1198 config |= 1 << 5;
1199 it87_write_value(data, IT87_REG_CONFIG, config);
1200 /* Invalidate cache to force re-read */
1201 data->valid = 0;
1202 }
1203 mutex_unlock(&data->update_lock);
1204
1205 return count;
1206}
1207
0124dd78
JD		 1208static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1209static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1210static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1211static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1212static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1213static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1214static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1215static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1216static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1217static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1218static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1219static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1220static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1221static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1222static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1223static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
3d30f9e6
JD		 1224static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1225 show_alarm, clear_intrusion, 4);
0124dd78 1226
d9b327c3
JD		 1227static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1228 char *buf)
1229{
1230 int bitnr = to_sensor_dev_attr(attr)->index;
1231 struct it87_data *data = it87_update_device(dev);
1232 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1233}
1234static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1235 const char *buf, size_t count)
1236{
1237 int bitnr = to_sensor_dev_attr(attr)->index;
1238 struct it87_data *data = dev_get_drvdata(dev);
1239 long val;
1240
179c4fdb 1241 if (kstrtol(buf, 10, &val) < 0
d9b327c3
JD		 1242 || (val != 0 && val != 1))
1243 return -EINVAL;
1244
1245 mutex_lock(&data->update_lock);
1246 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1247 if (val)
1248 data->beeps |= (1 << bitnr);
1249 else
1250 data->beeps &= ~(1 << bitnr);
1251 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1252 mutex_unlock(&data->update_lock);
1253 return count;
1254}
1255
1256static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1257 show_beep, set_beep, 1);
1258static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1259static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1260static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1261static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1262static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1263static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1264static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1265/* fanX_beep writability is set later */
1266static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1267static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1268static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1269static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1270static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1271static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1272 show_beep, set_beep, 2);
1273static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1274static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1275
5f2dc798
JD		 1276static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1277 char *buf)
1da177e4 1278{
90d6619a 1279 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1280 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1281}
5f2dc798
JD		 1282static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1283 const char *buf, size_t count)
1da177e4 1284{
b74f3fdd 1285 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1286 unsigned long val;
1287
179c4fdb 1288 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 1289 return -EINVAL;
1da177e4 1290
1da177e4
LT		 1291 data->vrm = val;
1292
1293 return count;
1294}
1295static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1296
5f2dc798
JD		 1297static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1298 char *buf)
1da177e4
LT		 1299{
1300 struct it87_data *data = it87_update_device(dev);
1301 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1302}
1303static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1304
738e5e05
JD		 1305static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1306 char *buf)
1307{
3c4c4971 1308 static const char * const labels[] = {
738e5e05
JD		 1309 "+5V",
1310 "5VSB",
1311 "Vbat",
1312 };
3c4c4971 1313 static const char * const labels_it8721[] = {
44c1bcd4
JD		 1314 "+3.3V",
1315 "3VSB",
1316 "Vbat",
1317 };
1318 struct it87_data *data = dev_get_drvdata(dev);
738e5e05
JD		 1319 int nr = to_sensor_dev_attr(attr)->index;
1320
16b5dda2
JD		 1321 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1322 : labels[nr]);
738e5e05
JD		 1323}
1324static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1325static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1326static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1327
b74f3fdd 1328static ssize_t show_name(struct device *dev, struct device_attribute
1329 *devattr, char *buf)
1330{
1331 struct it87_data *data = dev_get_drvdata(dev);
1332 return sprintf(buf, "%s\n", data->name);
1333}
1334static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1335
9172b5d1
GR		 1336static struct attribute *it87_attributes_in[9][5] = {
1337{
87808be4 1338 &sensor_dev_attr_in0_input.dev_attr.attr,
87808be4 1339 &sensor_dev_attr_in0_min.dev_attr.attr,
87808be4 1340 &sensor_dev_attr_in0_max.dev_attr.attr,
0124dd78 1341 &sensor_dev_attr_in0_alarm.dev_attr.attr,
9172b5d1
GR		 1342 NULL
1343}, {
1344 &sensor_dev_attr_in1_input.dev_attr.attr,
1345 &sensor_dev_attr_in1_min.dev_attr.attr,
1346 &sensor_dev_attr_in1_max.dev_attr.attr,
0124dd78 1347 &sensor_dev_attr_in1_alarm.dev_attr.attr,
9172b5d1
GR		 1348 NULL
1349}, {
1350 &sensor_dev_attr_in2_input.dev_attr.attr,
1351 &sensor_dev_attr_in2_min.dev_attr.attr,
1352 &sensor_dev_attr_in2_max.dev_attr.attr,
0124dd78 1353 &sensor_dev_attr_in2_alarm.dev_attr.attr,
9172b5d1
GR		 1354 NULL
1355}, {
1356 &sensor_dev_attr_in3_input.dev_attr.attr,
1357 &sensor_dev_attr_in3_min.dev_attr.attr,
1358 &sensor_dev_attr_in3_max.dev_attr.attr,
0124dd78 1359 &sensor_dev_attr_in3_alarm.dev_attr.attr,
9172b5d1
GR		 1360 NULL
1361}, {
1362 &sensor_dev_attr_in4_input.dev_attr.attr,
1363 &sensor_dev_attr_in4_min.dev_attr.attr,
1364 &sensor_dev_attr_in4_max.dev_attr.attr,
0124dd78 1365 &sensor_dev_attr_in4_alarm.dev_attr.attr,
9172b5d1
GR		 1366 NULL
1367}, {
1368 &sensor_dev_attr_in5_input.dev_attr.attr,
1369 &sensor_dev_attr_in5_min.dev_attr.attr,
1370 &sensor_dev_attr_in5_max.dev_attr.attr,
0124dd78 1371 &sensor_dev_attr_in5_alarm.dev_attr.attr,
9172b5d1
GR		 1372 NULL
1373}, {
1374 &sensor_dev_attr_in6_input.dev_attr.attr,
1375 &sensor_dev_attr_in6_min.dev_attr.attr,
1376 &sensor_dev_attr_in6_max.dev_attr.attr,
0124dd78 1377 &sensor_dev_attr_in6_alarm.dev_attr.attr,
9172b5d1
GR		 1378 NULL
1379}, {
1380 &sensor_dev_attr_in7_input.dev_attr.attr,
1381 &sensor_dev_attr_in7_min.dev_attr.attr,
1382 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78 1383 &sensor_dev_attr_in7_alarm.dev_attr.attr,
9172b5d1
GR		 1384 NULL
1385}, {
1386 &sensor_dev_attr_in8_input.dev_attr.attr,
1387 NULL
1388} };
87808be4 1389
9172b5d1
GR		 1390static const struct attribute_group it87_group_in[9] = {
1391 { .attrs = it87_attributes_in[0] },
1392 { .attrs = it87_attributes_in[1] },
1393 { .attrs = it87_attributes_in[2] },
1394 { .attrs = it87_attributes_in[3] },
1395 { .attrs = it87_attributes_in[4] },
1396 { .attrs = it87_attributes_in[5] },
1397 { .attrs = it87_attributes_in[6] },
1398 { .attrs = it87_attributes_in[7] },
1399 { .attrs = it87_attributes_in[8] },
1400};
1401
4573acbc
GR		 1402static struct attribute *it87_attributes_temp[3][6] = {
1403{
87808be4 1404 &sensor_dev_attr_temp1_input.dev_attr.attr,
87808be4 1405 &sensor_dev_attr_temp1_max.dev_attr.attr,
87808be4 1406 &sensor_dev_attr_temp1_min.dev_attr.attr,
87808be4 1407 &sensor_dev_attr_temp1_type.dev_attr.attr,
0124dd78 1408 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
4573acbc
GR		 1409 NULL
1410} , {
1411 &sensor_dev_attr_temp2_input.dev_attr.attr,
1412 &sensor_dev_attr_temp2_max.dev_attr.attr,
1413 &sensor_dev_attr_temp2_min.dev_attr.attr,
1414 &sensor_dev_attr_temp2_type.dev_attr.attr,
0124dd78 1415 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
4573acbc
GR		 1416 NULL
1417} , {
1418 &sensor_dev_attr_temp3_input.dev_attr.attr,
1419 &sensor_dev_attr_temp3_max.dev_attr.attr,
1420 &sensor_dev_attr_temp3_min.dev_attr.attr,
1421 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78 1422 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
4573acbc
GR		 1423 NULL
1424} };
1425
1426static const struct attribute_group it87_group_temp[3] = {
1427 { .attrs = it87_attributes_temp[0] },
1428 { .attrs = it87_attributes_temp[1] },
1429 { .attrs = it87_attributes_temp[2] },
1430};
87808be4 1431
4573acbc 1432static struct attribute *it87_attributes[] = {
87808be4 1433 &dev_attr_alarms.attr,
3d30f9e6 1434 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
b74f3fdd 1435 &dev_attr_name.attr,
87808be4
JD		 1436 NULL
1437};
1438
1439static const struct attribute_group it87_group = {
1440 .attrs = it87_attributes,
1441};
1442
9172b5d1 1443static struct attribute *it87_attributes_in_beep[] = {
d9b327c3
JD		 1444 &sensor_dev_attr_in0_beep.dev_attr.attr,
1445 &sensor_dev_attr_in1_beep.dev_attr.attr,
1446 &sensor_dev_attr_in2_beep.dev_attr.attr,
1447 &sensor_dev_attr_in3_beep.dev_attr.attr,
1448 &sensor_dev_attr_in4_beep.dev_attr.attr,
1449 &sensor_dev_attr_in5_beep.dev_attr.attr,
1450 &sensor_dev_attr_in6_beep.dev_attr.attr,
1451 &sensor_dev_attr_in7_beep.dev_attr.attr,
9172b5d1
GR		 1452 NULL
1453};
d9b327c3 1454
4573acbc 1455static struct attribute *it87_attributes_temp_beep[] = {
d9b327c3
JD		 1456 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1457 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1458 &sensor_dev_attr_temp3_beep.dev_attr.attr,
d9b327c3
JD		 1459};
1460
723a0aa0 1461static struct attribute *it87_attributes_fan16[5][3+1] = { {
87808be4
JD		 1462 &sensor_dev_attr_fan1_input16.dev_attr.attr,
1463 &sensor_dev_attr_fan1_min16.dev_attr.attr,
723a0aa0
JD		 1464 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1465 NULL
1466}, {
87808be4
JD		 1467 &sensor_dev_attr_fan2_input16.dev_attr.attr,
1468 &sensor_dev_attr_fan2_min16.dev_attr.attr,
723a0aa0
JD		 1469 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1470 NULL
1471}, {
87808be4
JD		 1472 &sensor_dev_attr_fan3_input16.dev_attr.attr,
1473 &sensor_dev_attr_fan3_min16.dev_attr.attr,
723a0aa0
JD		 1474 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1475 NULL
1476}, {
c7f1f716
JD		 1477 &sensor_dev_attr_fan4_input16.dev_attr.attr,
1478 &sensor_dev_attr_fan4_min16.dev_attr.attr,
723a0aa0
JD		 1479 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1480 NULL
1481}, {
c7f1f716
JD		 1482 &sensor_dev_attr_fan5_input16.dev_attr.attr,
1483 &sensor_dev_attr_fan5_min16.dev_attr.attr,
723a0aa0
JD		 1484 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1485 NULL
1486} };
1487
1488static const struct attribute_group it87_group_fan16[5] = {
1489 { .attrs = it87_attributes_fan16[0] },
1490 { .attrs = it87_attributes_fan16[1] },
1491 { .attrs = it87_attributes_fan16[2] },
1492 { .attrs = it87_attributes_fan16[3] },
1493 { .attrs = it87_attributes_fan16[4] },
1494};
87808be4 1495
723a0aa0 1496static struct attribute *it87_attributes_fan[3][4+1] = { {
87808be4
JD		 1497 &sensor_dev_attr_fan1_input.dev_attr.attr,
1498 &sensor_dev_attr_fan1_min.dev_attr.attr,
1499 &sensor_dev_attr_fan1_div.dev_attr.attr,
723a0aa0
JD		 1500 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1501 NULL
1502}, {
87808be4
JD		 1503 &sensor_dev_attr_fan2_input.dev_attr.attr,
1504 &sensor_dev_attr_fan2_min.dev_attr.attr,
1505 &sensor_dev_attr_fan2_div.dev_attr.attr,
723a0aa0
JD		 1506 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1507 NULL
1508}, {
87808be4
JD		 1509 &sensor_dev_attr_fan3_input.dev_attr.attr,
1510 &sensor_dev_attr_fan3_min.dev_attr.attr,
1511 &sensor_dev_attr_fan3_div.dev_attr.attr,
0124dd78 1512 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
723a0aa0
JD		 1513 NULL
1514} };
1515
1516static const struct attribute_group it87_group_fan[3] = {
1517 { .attrs = it87_attributes_fan[0] },
1518 { .attrs = it87_attributes_fan[1] },
1519 { .attrs = it87_attributes_fan[2] },
1520};
1521
1522static const struct attribute_group *
1523it87_get_fan_group(const struct it87_data *data)
1524{
1525 return has_16bit_fans(data) ? it87_group_fan16 : it87_group_fan;
1526}
0124dd78 1527
723a0aa0 1528static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1529 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1530 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1531 &dev_attr_pwm1_freq.attr,
94ac7ee6 1532 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1533 NULL
1534}, {
1535 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1536 &sensor_dev_attr_pwm2.dev_attr.attr,
1537 &dev_attr_pwm2_freq.attr,
94ac7ee6 1538 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1539 NULL
1540}, {
1541 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1542 &sensor_dev_attr_pwm3.dev_attr.attr,
1543 &dev_attr_pwm3_freq.attr,
94ac7ee6 1544 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1545 NULL
1546} };
87808be4 1547
723a0aa0
JD		 1548static const struct attribute_group it87_group_pwm[3] = {
1549 { .attrs = it87_attributes_pwm[0] },
1550 { .attrs = it87_attributes_pwm[1] },
1551 { .attrs = it87_attributes_pwm[2] },
1552};
1553
4f3f51bc
JD		 1554static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1555 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1556 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1557 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1558 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1559 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1560 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1561 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1562 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1563 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1564 NULL
1565}, {
1566 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1567 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1568 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1569 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1570 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1571 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1572 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1573 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1574 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1575 NULL
1576}, {
1577 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1578 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1579 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1580 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1581 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1582 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1583 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1584 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1585 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1586 NULL
1587} };
1588
1589static const struct attribute_group it87_group_autopwm[3] = {
1590 { .attrs = it87_attributes_autopwm[0] },
1591 { .attrs = it87_attributes_autopwm[1] },
1592 { .attrs = it87_attributes_autopwm[2] },
1593};
1594
d9b327c3
JD		 1595static struct attribute *it87_attributes_fan_beep[] = {
1596 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1597 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1598 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1599 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1600 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1601};
1602
6a8d7acf 1603static struct attribute *it87_attributes_vid[] = {
87808be4
JD		 1604 &dev_attr_vrm.attr,
1605 &dev_attr_cpu0_vid.attr,
1606 NULL
1607};
1608
6a8d7acf
JD		 1609static const struct attribute_group it87_group_vid = {
1610 .attrs = it87_attributes_vid,
87808be4 1611};
1da177e4 1612
738e5e05
JD		 1613static struct attribute *it87_attributes_label[] = {
1614 &sensor_dev_attr_in3_label.dev_attr.attr,
1615 &sensor_dev_attr_in7_label.dev_attr.attr,
1616 &sensor_dev_attr_in8_label.dev_attr.attr,
1617 NULL
1618};
1619
1620static const struct attribute_group it87_group_label = {
fa8b6975 1621 .attrs = it87_attributes_label,
738e5e05
JD		 1622};
1623
2d8672c5 1624/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1625static int __init it87_find(unsigned short *address,
1626 struct it87_sio_data *sio_data)
1da177e4 1627{
5b0380c9 1628 int err;
b74f3fdd 1629 u16 chip_type;
98dd22c3 1630 const char *board_vendor, *board_name;
1da177e4 1631
5b0380c9
NG		 1632 err = superio_enter();
1633 if (err)
1634 return err;
1635
1636 err = -ENODEV;
67b671bc 1637 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1638
1639 switch (chip_type) {
1640 case IT8705F_DEVID:
1641 sio_data->type = it87;
1642 break;
1643 case IT8712F_DEVID:
1644 sio_data->type = it8712;
1645 break;
1646 case IT8716F_DEVID:
1647 case IT8726F_DEVID:
1648 sio_data->type = it8716;
1649 break;
1650 case IT8718F_DEVID:
1651 sio_data->type = it8718;
1652 break;
b4da93e4
JMS		 1653 case IT8720F_DEVID:
1654 sio_data->type = it8720;
1655 break;
44c1bcd4
JD		 1656 case IT8721F_DEVID:
1657 sio_data->type = it8721;
1658 break;
16b5dda2
JD		 1659 case IT8728F_DEVID:
1660 sio_data->type = it8728;
1661 break;
0531d98b
GR		 1662 case IT8782F_DEVID:
1663 sio_data->type = it8782;
1664 break;
1665 case IT8783E_DEVID:
1666 sio_data->type = it8783;
1667 break;
b74f3fdd 1668 case 0xffff: /* No device at all */
1669 goto exit;
1670 default:
a8ca1037 1671 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
b74f3fdd 1672 goto exit;
1673 }
1da177e4 1674
87673dd7 1675 superio_select(PME);
1da177e4 1676 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
a8ca1037 1677 pr_info("Device not activated, skipping\n");
1da177e4
LT		 1678 goto exit;
1679 }
1680
1681 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1682 if (*address == 0) {
a8ca1037 1683 pr_info("Base address not set, skipping\n");
1da177e4
LT		 1684 goto exit;
1685 }
1686
1687 err = 0;
0475169c 1688 sio_data->revision = superio_inb(DEVREV) & 0x0f;
a8ca1037 1689 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1690 chip_type, *address, sio_data->revision);
1da177e4 1691
738e5e05
JD		 1692 /* in8 (Vbat) is always internal */
1693 sio_data->internal = (1 << 2);
1694
87673dd7 1695 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD		 1696 if (sio_data->type == it87) {
1697 /* The IT8705F doesn't have VID pins at all */
1698 sio_data->skip_vid = 1;
d9b327c3
JD		 1699
1700 /* The IT8705F has a different LD number for GPIO */
1701 superio_select(5);
1702 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
0531d98b
GR		 1703 } else if (sio_data->type == it8783) {
1704 int reg25, reg27, reg2A, reg2C, regEF;
0531d98b
GR		 1705
1706 sio_data->skip_vid = 1; /* No VID */
1707
1708 superio_select(GPIO);
1709
1710 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1711 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1712 reg2A = superio_inb(IT87_SIO_PINX1_REG);
1713 reg2C = superio_inb(IT87_SIO_PINX2_REG);
1714 regEF = superio_inb(IT87_SIO_SPI_REG);
1715
0531d98b 1716 /* Check if fan3 is there or not */
9172b5d1 1717 if ((reg27 & (1 << 0)) || !(reg2C & (1 << 2)))
0531d98b
GR		 1718 sio_data->skip_fan |= (1 << 2);
1719 if ((reg25 & (1 << 4))
1720 || (!(reg2A & (1 << 1)) && (regEF & (1 << 0))))
1721 sio_data->skip_pwm |= (1 << 2);
1722
1723 /* Check if fan2 is there or not */
1724 if (reg27 & (1 << 7))
1725 sio_data->skip_fan |= (1 << 1);
1726 if (reg27 & (1 << 3))
1727 sio_data->skip_pwm |= (1 << 1);
1728
1729 /* VIN5 */
9172b5d1
GR		 1730 if ((reg27 & (1 << 0)) || (reg2C & (1 << 2)))
1731 sio_data->skip_in |= (1 << 5); /* No VIN5 */
0531d98b
GR		 1732
1733 /* VIN6 */
9172b5d1
GR		 1734 if (reg27 & (1 << 1))
1735 sio_data->skip_in |= (1 << 6); /* No VIN6 */
0531d98b
GR		 1736
1737 /*
1738 * VIN7
1739 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1740 */
9172b5d1
GR		 1741 if (reg27 & (1 << 2)) {
1742 /*
1743 * The data sheet is a bit unclear regarding the
1744 * internal voltage divider for VCCH5V. It says
1745 * "This bit enables and switches VIN7 (pin 91) to the
1746 * internal voltage divider for VCCH5V".
1747 * This is different to other chips, where the internal
1748 * voltage divider would connect VIN7 to an internal
1749 * voltage source. Maybe that is the case here as well.
1750 *
1751 * Since we don't know for sure, re-route it if that is
1752 * not the case, and ask the user to report if the
1753 * resulting voltage is sane.
1754 */
1755 if (!(reg2C & (1 << 1))) {
1756 reg2C |= (1 << 1);
1757 superio_outb(IT87_SIO_PINX2_REG, reg2C);
1758 pr_notice("Routing internal VCCH5V to in7.\n");
1759 }
1760 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
1761 pr_notice("Please report if it displays a reasonable voltage.\n");
1762 }
0531d98b
GR		 1763
1764 if (reg2C & (1 << 0))
1765 sio_data->internal |= (1 << 0);
1766 if (reg2C & (1 << 1))
1767 sio_data->internal |= (1 << 1);
1768
1769 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1770
895ff267 1771 } else {
87673dd7 1772 int reg;
9172b5d1 1773 bool uart6;
87673dd7
JD		 1774
1775 superio_select(GPIO);
44c1bcd4 1776
895ff267 1777 reg = superio_inb(IT87_SIO_GPIO3_REG);
0531d98b
GR		 1778 if (sio_data->type == it8721 || sio_data->type == it8728 ||
1779 sio_data->type == it8782) {
16b5dda2 1780 /*
0531d98b
GR		 1781 * IT8721F/IT8758E, and IT8782F don't have VID pins
1782 * at all, not sure about the IT8728F.
16b5dda2 1783 */
895ff267 1784 sio_data->skip_vid = 1;
44c1bcd4
JD		 1785 } else {
1786 /* We need at least 4 VID pins */
1787 if (reg & 0x0f) {
a8ca1037 1788 pr_info("VID is disabled (pins used for GPIO)\n");
44c1bcd4
JD		 1789 sio_data->skip_vid = 1;
1790 }
895ff267
JD		 1791 }
1792
591ec650
JD		 1793 /* Check if fan3 is there or not */
1794 if (reg & (1 << 6))
1795 sio_data->skip_pwm |= (1 << 2);
1796 if (reg & (1 << 7))
1797 sio_data->skip_fan |= (1 << 2);
1798
1799 /* Check if fan2 is there or not */
1800 reg = superio_inb(IT87_SIO_GPIO5_REG);
1801 if (reg & (1 << 1))
1802 sio_data->skip_pwm |= (1 << 1);
1803 if (reg & (1 << 2))
1804 sio_data->skip_fan |= (1 << 1);
1805
895ff267
JD		 1806 if ((sio_data->type == it8718 || sio_data->type == it8720)
1807 && !(sio_data->skip_vid))
b74f3fdd 1808 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD		 1809
1810 reg = superio_inb(IT87_SIO_PINX2_REG);
9172b5d1
GR		 1811
1812 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
1813
436cad2a
JD		 1814 /*
1815 * The IT8720F has no VIN7 pin, so VCCH should always be
1816 * routed internally to VIN7 with an internal divider.
1817 * Curiously, there still is a configuration bit to control
1818 * this, which means it can be set incorrectly. And even
1819 * more curiously, many boards out there are improperly
1820 * configured, even though the IT8720F datasheet claims
1821 * that the internal routing of VCCH to VIN7 is the default
1822 * setting. So we force the internal routing in this case.
0531d98b
GR		 1823 *
1824 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
9172b5d1
GR		 1825 * If UART6 is enabled, re-route VIN7 to the internal divider
1826 * if that is not already the case.
436cad2a 1827 */
9172b5d1 1828 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
436cad2a
JD		 1829 reg |= (1 << 1);
1830 superio_outb(IT87_SIO_PINX2_REG, reg);
a8ca1037 1831 pr_notice("Routing internal VCCH to in7\n");
436cad2a 1832 }
87673dd7 1833 if (reg & (1 << 0))
738e5e05 1834 sio_data->internal |= (1 << 0);
16b5dda2
JD		 1835 if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1836 sio_data->type == it8728)
738e5e05 1837 sio_data->internal |= (1 << 1);
d9b327c3 1838
9172b5d1
GR		 1839 /*
1840 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
1841 * While VIN7 can be routed to the internal voltage divider,
1842 * VIN5 and VIN6 are not available if UART6 is enabled.
4573acbc
GR		 1843 *
1844 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
1845 * is the temperature source. Since we can not read the
1846 * temperature source here, skip_temp is preliminary.
9172b5d1 1847 */
4573acbc 1848 if (uart6) {
9172b5d1 1849 sio_data->skip_in |= (1 << 5) | (1 << 6);
4573acbc
GR		 1850 sio_data->skip_temp |= (1 << 2);
1851 }
9172b5d1 1852
d9b327c3 1853 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1854 }
d9b327c3 1855 if (sio_data->beep_pin)
a8ca1037 1856 pr_info("Beeping is supported\n");
87673dd7 1857
98dd22c3
JD		 1858 /* Disable specific features based on DMI strings */
1859 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1860 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1861 if (board_vendor && board_name) {
1862 if (strcmp(board_vendor, "nVIDIA") == 0
1863 && strcmp(board_name, "FN68PT") == 0) {
4a0d71cf
GR		 1864 /*
1865 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
1866 * connected to a fan, but to something else. One user
1867 * has reported instant system power-off when changing
1868 * the PWM2 duty cycle, so we disable it.
1869 * I use the board name string as the trigger in case
1870 * the same board is ever used in other systems.
1871 */
a8ca1037 1872 pr_info("Disabling pwm2 due to hardware constraints\n");
98dd22c3
JD		 1873 sio_data->skip_pwm = (1 << 1);
1874 }
1875 }
1876
1da177e4
LT		 1877exit:
1878 superio_exit();
1879 return err;
1880}
1881
723a0aa0
JD		 1882static void it87_remove_files(struct device *dev)
1883{
1884 struct it87_data *data = platform_get_drvdata(pdev);
1885 struct it87_sio_data *sio_data = dev->platform_data;
1886 const struct attribute_group *fan_group = it87_get_fan_group(data);
1887 int i;
1888
1889 sysfs_remove_group(&dev->kobj, &it87_group);
9172b5d1
GR		 1890 for (i = 0; i < 9; i++) {
1891 if (sio_data->skip_in & (1 << i))
1892 continue;
1893 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
1894 if (it87_attributes_in_beep[i])
1895 sysfs_remove_file(&dev->kobj,
1896 it87_attributes_in_beep[i]);
1897 }
4573acbc
GR		 1898 for (i = 0; i < 3; i++) {
1899 if (!(data->has_temp & (1 << i)))
1900 continue;
1901 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
1902 if (sio_data->beep_pin)
1903 sysfs_remove_file(&dev->kobj,
1904 it87_attributes_temp_beep[i]);
1905 }
723a0aa0
JD		 1906 for (i = 0; i < 5; i++) {
1907 if (!(data->has_fan & (1 << i)))
1908 continue;
1909 sysfs_remove_group(&dev->kobj, &fan_group[i]);
d9b327c3
JD		 1910 if (sio_data->beep_pin)
1911 sysfs_remove_file(&dev->kobj,
1912 it87_attributes_fan_beep[i]);
723a0aa0
JD		 1913 }
1914 for (i = 0; i < 3; i++) {
1915 if (sio_data->skip_pwm & (1 << 0))
1916 continue;
1917 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD		 1918 if (has_old_autopwm(data))
1919 sysfs_remove_group(&dev->kobj,
1920 &it87_group_autopwm[i]);
723a0aa0 1921 }
6a8d7acf
JD		 1922 if (!sio_data->skip_vid)
1923 sysfs_remove_group(&dev->kobj, &it87_group_vid);
738e5e05 1924 sysfs_remove_group(&dev->kobj, &it87_group_label);
723a0aa0
JD		 1925}
1926
6c931ae1 1927static int it87_probe(struct platform_device *pdev)
1da177e4 1928{
1da177e4 1929 struct it87_data *data;
b74f3fdd 1930 struct resource *res;
1931 struct device *dev = &pdev->dev;
1932 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD		 1933 const struct attribute_group *fan_group;
1934 int err = 0, i;
1da177e4 1935 int enable_pwm_interface;
d9b327c3 1936 int fan_beep_need_rw;
3c4c4971 1937 static const char * const names[] = {
b74f3fdd 1938 "it87",
1939 "it8712",
1940 "it8716",
1941 "it8718",
b4da93e4 1942 "it8720",
44c1bcd4 1943 "it8721",
16b5dda2 1944 "it8728",
0531d98b
GR		 1945 "it8782",
1946 "it8783",
b74f3fdd 1947 };
1948
1949 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
62a1d05f
GR		 1950 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
1951 DRVNAME)) {
b74f3fdd 1952 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1953 (unsigned long)res->start,
87b4b663 1954 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
62a1d05f 1955 return -EBUSY;
8e9afcbb 1956 }
1da177e4 1957
62a1d05f
GR		 1958 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
1959 if (!data)
1960 return -ENOMEM;
1da177e4 1961
b74f3fdd 1962 data->addr = res->start;
1963 data->type = sio_data->type;
0475169c 1964 data->revision = sio_data->revision;
b74f3fdd 1965 data->name = names[sio_data->type];
1da177e4
LT		 1966
1967 /* Now, we do the remaining detection. */
b74f3fdd 1968 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
62a1d05f
GR		 1969 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
1970 return -ENODEV;
1da177e4 1971
b74f3fdd 1972 platform_set_drvdata(pdev, data);
1da177e4 1973
9a61bf63 1974 mutex_init(&data->update_lock);
1da177e4 1975
1da177e4 1976 /* Check PWM configuration */
b74f3fdd 1977 enable_pwm_interface = it87_check_pwm(dev);
1da177e4 1978
44c1bcd4 1979 /* Starting with IT8721F, we handle scaling of internal voltages */
16b5dda2 1980 if (has_12mv_adc(data)) {
44c1bcd4
JD		 1981 if (sio_data->internal & (1 << 0))
1982 data->in_scaled |= (1 << 3); /* in3 is AVCC */
1983 if (sio_data->internal & (1 << 1))
1984 data->in_scaled |= (1 << 7); /* in7 is VSB */
1985 if (sio_data->internal & (1 << 2))
1986 data->in_scaled |= (1 << 8); /* in8 is Vbat */
0531d98b
GR		 1987 } else if (sio_data->type == it8782 || sio_data->type == it8783) {
1988 if (sio_data->internal & (1 << 0))
1989 data->in_scaled |= (1 << 3); /* in3 is VCC5V */
1990 if (sio_data->internal & (1 << 1))
1991 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
44c1bcd4
JD		 1992 }
1993
4573acbc
GR		 1994 data->has_temp = 0x07;
1995 if (sio_data->skip_temp & (1 << 2)) {
1996 if (sio_data->type == it8782
1997 && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
1998 data->has_temp &= ~(1 << 2);
1999 }
2000
1da177e4 2001 /* Initialize the IT87 chip */
b74f3fdd 2002 it87_init_device(pdev);
1da177e4
LT		 2003
2004 /* Register sysfs hooks */
5f2dc798
JD		 2005 err = sysfs_create_group(&dev->kobj, &it87_group);
2006 if (err)
62a1d05f 2007 return err;
17d648bf 2008
9172b5d1
GR		 2009 for (i = 0; i < 9; i++) {
2010 if (sio_data->skip_in & (1 << i))
2011 continue;
2012 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2013 if (err)
62a1d05f 2014 goto error;
9172b5d1
GR		 2015 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2016 err = sysfs_create_file(&dev->kobj,
2017 it87_attributes_in_beep[i]);
2018 if (err)
62a1d05f 2019 goto error;
9172b5d1
GR		 2020 }
2021 }
2022
4573acbc
GR		 2023 for (i = 0; i < 3; i++) {
2024 if (!(data->has_temp & (1 << i)))
2025 continue;
2026 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
d9b327c3 2027 if (err)
62a1d05f 2028 goto error;
4573acbc
GR		 2029 if (sio_data->beep_pin) {
2030 err = sysfs_create_file(&dev->kobj,
2031 it87_attributes_temp_beep[i]);
2032 if (err)
2033 goto error;
2034 }
d9b327c3
JD		 2035 }
2036
9060f8bd 2037 /* Do not create fan files for disabled fans */
723a0aa0 2038 fan_group = it87_get_fan_group(data);
d9b327c3 2039 fan_beep_need_rw = 1;
723a0aa0
JD		 2040 for (i = 0; i < 5; i++) {
2041 if (!(data->has_fan & (1 << i)))
2042 continue;
2043 err = sysfs_create_group(&dev->kobj, &fan_group[i]);
2044 if (err)
62a1d05f 2045 goto error;
d9b327c3
JD		 2046
2047 if (sio_data->beep_pin) {
2048 err = sysfs_create_file(&dev->kobj,
2049 it87_attributes_fan_beep[i]);
2050 if (err)
62a1d05f 2051 goto error;
d9b327c3
JD		 2052 if (!fan_beep_need_rw)
2053 continue;
2054
4a0d71cf
GR		 2055 /*
2056 * As we have a single beep enable bit for all fans,
d9b327c3 2057 * only the first enabled fan has a writable attribute
4a0d71cf
GR		 2058 * for it.
2059 */
d9b327c3
JD		 2060 if (sysfs_chmod_file(&dev->kobj,
2061 it87_attributes_fan_beep[i],
2062 S_IRUGO | S_IWUSR))
2063 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2064 i + 1);
2065 fan_beep_need_rw = 0;
2066 }
17d648bf
JD		 2067 }
2068
1da177e4 2069 if (enable_pwm_interface) {
723a0aa0
JD		 2070 for (i = 0; i < 3; i++) {
2071 if (sio_data->skip_pwm & (1 << i))
2072 continue;
2073 err = sysfs_create_group(&dev->kobj,
2074 &it87_group_pwm[i]);
2075 if (err)
62a1d05f 2076 goto error;
4f3f51bc
JD		 2077
2078 if (!has_old_autopwm(data))
2079 continue;
2080 err = sysfs_create_group(&dev->kobj,
2081 &it87_group_autopwm[i]);
2082 if (err)
62a1d05f 2083 goto error;
98dd22c3 2084 }
1da177e4
LT		 2085 }
2086
895ff267 2087 if (!sio_data->skip_vid) {
303760b4 2088 data->vrm = vid_which_vrm();
87673dd7 2089 /* VID reading from Super-I/O config space if available */
b74f3fdd 2090 data->vid = sio_data->vid_value;
6a8d7acf
JD		 2091 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2092 if (err)
62a1d05f 2093 goto error;
87808be4
JD		 2094 }
2095
738e5e05
JD		 2096 /* Export labels for internal sensors */
2097 for (i = 0; i < 3; i++) {
2098 if (!(sio_data->internal & (1 << i)))
2099 continue;
2100 err = sysfs_create_file(&dev->kobj,
2101 it87_attributes_label[i]);
2102 if (err)
62a1d05f 2103 goto error;
738e5e05
JD		 2104 }
2105
1beeffe4
TJ		 2106 data->hwmon_dev = hwmon_device_register(dev);
2107 if (IS_ERR(data->hwmon_dev)) {
2108 err = PTR_ERR(data->hwmon_dev);
62a1d05f 2109 goto error;
1da177e4
LT		 2110 }
2111
2112 return 0;
2113
62a1d05f 2114error:
723a0aa0 2115 it87_remove_files(dev);
1da177e4
LT		 2116 return err;
2117}
2118
281dfd0b 2119static int it87_remove(struct platform_device *pdev)
1da177e4 2120{
b74f3fdd 2121 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2122
1beeffe4 2123 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 2124 it87_remove_files(&pdev->dev);
943b0830 2125
1da177e4
LT		 2126 return 0;
2127}
2128
4a0d71cf
GR		 2129/*
2130 * Must be called with data->update_lock held, except during initialization.
2131 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2132 * would slow down the IT87 access and should not be necessary.
2133 */
b74f3fdd 2134static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 2135{
b74f3fdd 2136 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2137 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2138}
2139
4a0d71cf
GR		 2140/*
2141 * Must be called with data->update_lock held, except during initialization.
2142 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2143 * would slow down the IT87 access and should not be necessary.
2144 */
b74f3fdd 2145static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 2146{
b74f3fdd 2147 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2148 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2149}
2150
2151/* Return 1 if and only if the PWM interface is safe to use */
6c931ae1 2152static int it87_check_pwm(struct device *dev)
1da177e4 2153{
b74f3fdd 2154 struct it87_data *data = dev_get_drvdata(dev);
4a0d71cf
GR		 2155 /*
2156 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
1da177e4 2157 * and polarity set to active low is sign that this is the case so we
4a0d71cf
GR		 2158 * disable pwm control to protect the user.
2159 */
b74f3fdd 2160 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT		 2161 if ((tmp & 0x87) == 0) {
2162 if (fix_pwm_polarity) {
4a0d71cf
GR		 2163 /*
2164 * The user asks us to attempt a chip reconfiguration.
1da177e4 2165 * This means switching to active high polarity and
4a0d71cf
GR		 2166 * inverting all fan speed values.
2167 */
1da177e4
LT		 2168 int i;
2169 u8 pwm[3];
2170
2171 for (i = 0; i < 3; i++)
b74f3fdd 2172 pwm[i] = it87_read_value(data,
1da177e4
LT		 2173 IT87_REG_PWM(i));
2174
4a0d71cf
GR		 2175 /*
2176 * If any fan is in automatic pwm mode, the polarity
1da177e4
LT		 2177 * might be correct, as suspicious as it seems, so we
2178 * better don't change anything (but still disable the
4a0d71cf
GR		 2179 * PWM interface).
2180 */
1da177e4 2181 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 2182 dev_info(dev, "Reconfiguring PWM to "
1da177e4 2183 "active high polarity\n");
b74f3fdd 2184 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT		 2185 tmp | 0x87);
2186 for (i = 0; i < 3; i++)
b74f3fdd 2187 it87_write_value(data,
1da177e4
LT		 2188 IT87_REG_PWM(i),
2189 0x7f & ~pwm[i]);
2190 return 1;
2191 }
2192
b74f3fdd 2193 dev_info(dev, "PWM configuration is "
1da177e4
LT		 2194 "too broken to be fixed\n");
2195 }
2196
b74f3fdd 2197 dev_info(dev, "Detected broken BIOS "
1da177e4
LT		 2198 "defaults, disabling PWM interface\n");
2199 return 0;
2200 } else if (fix_pwm_polarity) {
b74f3fdd 2201 dev_info(dev, "PWM configuration looks "
1da177e4
LT		 2202 "sane, won't touch\n");
2203 }
2204
2205 return 1;
2206}
2207
2208/* Called when we have found a new IT87. */
6c931ae1 2209static void it87_init_device(struct platform_device *pdev)
1da177e4 2210{
591ec650 2211 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 2212 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2213 int tmp, i;
591ec650 2214 u8 mask;
1da177e4 2215
4a0d71cf
GR		 2216 /*
2217 * For each PWM channel:
b99883dc
JD		 2218 * - If it is in automatic mode, setting to manual mode should set
2219 * the fan to full speed by default.
2220 * - If it is in manual mode, we need a mapping to temperature
2221 * channels to use when later setting to automatic mode later.
2222 * Use a 1:1 mapping by default (we are clueless.)
2223 * In both cases, the value can (and should) be changed by the user
6229cdb2
JD		 2224 * prior to switching to a different mode.
2225 * Note that this is no longer needed for the IT8721F and later, as
2226 * these have separate registers for the temperature mapping and the
4a0d71cf
GR		 2227 * manual duty cycle.
2228 */
1da177e4 2229 for (i = 0; i < 3; i++) {
b99883dc
JD		 2230 data->pwm_temp_map[i] = i;
2231 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 2232 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT		 2233 }
2234
4a0d71cf
GR		 2235 /*
2236 * Some chips seem to have default value 0xff for all limit
c5df9b7a
JD		 2237 * registers. For low voltage limits it makes no sense and triggers
2238 * alarms, so change to 0 instead. For high temperature limits, it
2239 * means -1 degree C, which surprisingly doesn't trigger an alarm,
4a0d71cf
GR		 2240 * but is still confusing, so change to 127 degrees C.
2241 */
c5df9b7a 2242 for (i = 0; i < 8; i++) {
b74f3fdd 2243 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 2244 if (tmp == 0xff)
b74f3fdd 2245 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD		 2246 }
2247 for (i = 0; i < 3; i++) {
b74f3fdd 2248 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 2249 if (tmp == 0xff)
b74f3fdd 2250 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD		 2251 }
2252
4a0d71cf
GR		 2253 /*
2254 * Temperature channels are not forcibly enabled, as they can be
a00afb97
JD		 2255 * set to two different sensor types and we can't guess which one
2256 * is correct for a given system. These channels can be enabled at
4a0d71cf
GR		 2257 * run-time through the temp{1-3}_type sysfs accessors if needed.
2258 */
1da177e4
LT		 2259
2260 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 2261 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT		 2262 if ((tmp & 0xff) == 0) {
2263 /* Enable all voltage monitors */
b74f3fdd 2264 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT		 2265 }
2266
2267 /* Check if tachometers are reset manually or by some reason */
591ec650 2268 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 2269 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 2270 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 2271 /* Enable all fan tachometers */
591ec650 2272 data->fan_main_ctrl |= mask;
5f2dc798
JD		 2273 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2274 data->fan_main_ctrl);
1da177e4 2275 }
9060f8bd 2276 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 2277
17d648bf 2278 /* Set tachometers to 16-bit mode if needed */
0475169c 2279 if (has_16bit_fans(data)) {
b74f3fdd 2280 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 2281 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 2282 dev_dbg(&pdev->dev,
17d648bf 2283 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 2284 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD		 2285 tmp | 0x07);
2286 }
0531d98b
GR		 2287 /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
2288 if (data->type != it87 && data->type != it8782 &&
2289 data->type != it8783) {
816d8c6a
AP		 2290 if (tmp & (1 << 4))
2291 data->has_fan |= (1 << 3); /* fan4 enabled */
2292 if (tmp & (1 << 5))
2293 data->has_fan |= (1 << 4); /* fan5 enabled */
2294 }
17d648bf
JD		 2295 }
2296
591ec650
JD		 2297 /* Fan input pins may be used for alternative functions */
2298 data->has_fan &= ~sio_data->skip_fan;
2299
1da177e4 2300 /* Start monitoring */
b74f3fdd 2301 it87_write_value(data, IT87_REG_CONFIG,
41002f8d 2302 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
1da177e4
LT		 2303 | (update_vbat ? 0x41 : 0x01));
2304}
2305
b99883dc
JD		 2306static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2307{
2308 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
16b5dda2 2309 if (has_newer_autopwm(data)) {
b99883dc 2310 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
6229cdb2
JD		 2311 data->pwm_duty[nr] = it87_read_value(data,
2312 IT87_REG_PWM_DUTY(nr));
2313 } else {
2314 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2315 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2316 else /* Manual mode */
2317 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2318 }
4f3f51bc
JD		 2319
2320 if (has_old_autopwm(data)) {
2321 int i;
2322
2323 for (i = 0; i < 5 ; i++)
2324 data->auto_temp[nr][i] = it87_read_value(data,
2325 IT87_REG_AUTO_TEMP(nr, i));
2326 for (i = 0; i < 3 ; i++)
2327 data->auto_pwm[nr][i] = it87_read_value(data,
2328 IT87_REG_AUTO_PWM(nr, i));
2329 }
b99883dc
JD		 2330}
2331
1da177e4
LT		 2332static struct it87_data *it87_update_device(struct device *dev)
2333{
b74f3fdd 2334 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 2335 int i;
2336
9a61bf63 2337 mutex_lock(&data->update_lock);
1da177e4
LT		 2338
2339 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2340 || !data->valid) {
1da177e4 2341 if (update_vbat) {
4a0d71cf
GR		 2342 /*
2343 * Cleared after each update, so reenable. Value
2344 * returned by this read will be previous value
2345 */
b74f3fdd 2346 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 2347 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT		 2348 }
2349 for (i = 0; i <= 7; i++) {
929c6a56 2350 data->in[i][0] =
5f2dc798 2351 it87_read_value(data, IT87_REG_VIN(i));
929c6a56 2352 data->in[i][1] =
5f2dc798 2353 it87_read_value(data, IT87_REG_VIN_MIN(i));
929c6a56 2354 data->in[i][2] =
5f2dc798 2355 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 2356 }
3543a53f 2357 /* in8 (battery) has no limit registers */
929c6a56 2358 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 2359
c7f1f716 2360 for (i = 0; i < 5; i++) {
9060f8bd
JD		 2361 /* Skip disabled fans */
2362 if (!(data->has_fan & (1 << i)))
2363 continue;
2364
1da177e4 2365 data->fan_min[i] =
5f2dc798 2366 it87_read_value(data, IT87_REG_FAN_MIN[i]);
b74f3fdd 2367 data->fan[i] = it87_read_value(data,
c7f1f716 2368 IT87_REG_FAN[i]);
17d648bf 2369 /* Add high byte if in 16-bit mode */
0475169c 2370 if (has_16bit_fans(data)) {
b74f3fdd 2371 data->fan[i] |= it87_read_value(data,
c7f1f716 2372 IT87_REG_FANX[i]) << 8;
b74f3fdd 2373 data->fan_min[i] |= it87_read_value(data,
c7f1f716 2374 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 2375 }
1da177e4
LT		 2376 }
2377 for (i = 0; i < 3; i++) {
4573acbc
GR		 2378 if (!(data->has_temp & (1 << i)))
2379 continue;
60ca385a 2380 data->temp[i][0] =
5f2dc798 2381 it87_read_value(data, IT87_REG_TEMP(i));
60ca385a 2382 data->temp[i][1] =
5f2dc798 2383 it87_read_value(data, IT87_REG_TEMP_LOW(i));
60ca385a
GR		 2384 data->temp[i][2] =
2385 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1da177e4
LT		 2386 }
2387
17d648bf 2388 /* Newer chips don't have clock dividers */
0475169c 2389 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 2390 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD		 2391 data->fan_div[0] = i & 0x07;
2392 data->fan_div[1] = (i >> 3) & 0x07;
2393 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2394 }
1da177e4
LT		 2395
2396 data->alarms =
b74f3fdd 2397 it87_read_value(data, IT87_REG_ALARM1) |
2398 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2399 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2400 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2401
b74f3fdd 2402 data->fan_main_ctrl = it87_read_value(data,
2403 IT87_REG_FAN_MAIN_CTRL);
2404 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD		 2405 for (i = 0; i < 3; i++)
2406 it87_update_pwm_ctrl(data, i);
b74f3fdd 2407
2408 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
4a0d71cf
GR		 2409 /*
2410 * The IT8705F does not have VID capability.
2411 * The IT8718F and later don't use IT87_REG_VID for the
2412 * same purpose.
2413 */
17d648bf 2414 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2415 data->vid = it87_read_value(data, IT87_REG_VID);
4a0d71cf
GR		 2416 /*
2417 * The older IT8712F revisions had only 5 VID pins,
2418 * but we assume it is always safe to read 6 bits.
2419 */
17d648bf 2420 data->vid &= 0x3f;
1da177e4
LT		 2421 }
2422 data->last_updated = jiffies;
2423 data->valid = 1;
2424 }
2425
9a61bf63 2426 mutex_unlock(&data->update_lock);
1da177e4
LT		 2427
2428 return data;
2429}
2430
b74f3fdd 2431static int __init it87_device_add(unsigned short address,
2432 const struct it87_sio_data *sio_data)
2433{
2434 struct resource res = {
87b4b663
BH		 2435 .start = address + IT87_EC_OFFSET,
2436 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2437 .name = DRVNAME,
2438 .flags = IORESOURCE_IO,
2439 };
2440 int err;
2441
b9acb64a
JD		 2442 err = acpi_check_resource_conflict(&res);
2443 if (err)
2444 goto exit;
2445
b74f3fdd 2446 pdev = platform_device_alloc(DRVNAME, address);
2447 if (!pdev) {
2448 err = -ENOMEM;
a8ca1037 2449 pr_err("Device allocation failed\n");
b74f3fdd 2450 goto exit;
2451 }
2452
2453 err = platform_device_add_resources(pdev, &res, 1);
2454 if (err) {
a8ca1037 2455 pr_err("Device resource addition failed (%d)\n", err);
b74f3fdd 2456 goto exit_device_put;
2457 }
2458
2459 err = platform_device_add_data(pdev, sio_data,
2460 sizeof(struct it87_sio_data));
2461 if (err) {
a8ca1037 2462 pr_err("Platform data allocation failed\n");
b74f3fdd 2463 goto exit_device_put;
2464 }
2465
2466 err = platform_device_add(pdev);
2467 if (err) {
a8ca1037 2468 pr_err("Device addition failed (%d)\n", err);
b74f3fdd 2469 goto exit_device_put;
2470 }
2471
2472 return 0;
2473
2474exit_device_put:
2475 platform_device_put(pdev);
2476exit:
2477 return err;
2478}
2479
1da177e4
LT		 2480static int __init sm_it87_init(void)
2481{
b74f3fdd 2482 int err;
5f2dc798 2483 unsigned short isa_address = 0;
b74f3fdd 2484 struct it87_sio_data sio_data;
2485
98dd22c3 2486 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2487 err = it87_find(&isa_address, &sio_data);
2488 if (err)
2489 return err;
2490 err = platform_driver_register(&it87_driver);
2491 if (err)
2492 return err;
fde09509 2493
b74f3fdd 2494 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2495 if (err) {
b74f3fdd 2496 platform_driver_unregister(&it87_driver);
2497 return err;
2498 }
2499
2500 return 0;
1da177e4
LT		 2501}
2502
2503static void __exit sm_it87_exit(void)
2504{
b74f3fdd 2505 platform_device_unregister(pdev);
2506 platform_driver_unregister(&it87_driver);
1da177e4
LT		 2507}
2508
2509
f1d8e332 2510MODULE_AUTHOR("Chris Gauthron, "
b19367c6 2511 "Jean Delvare <khali@linux-fr.org>");
44c1bcd4 2512MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
1da177e4
LT		 2513module_param(update_vbat, bool, 0);
2514MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2515module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD		 2516MODULE_PARM_DESC(fix_pwm_polarity,
2517 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT		 2518MODULE_LICENSE("GPL");
2519
2520module_init(sm_it87_init);
2521module_exit(sm_it87_exit);
Linux kernel - Deliverables
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