Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
5f2dc798 JD |
2 | * it87.c - Part of lm_sensors, Linux kernel modules for hardware |
3 | * monitoring. | |
4 | * | |
5 | * The IT8705F is an LPC-based Super I/O part that contains UARTs, a | |
6 | * parallel port, an IR port, a MIDI port, a floppy controller, etc., in | |
7 | * addition to an Environment Controller (Enhanced Hardware Monitor and | |
8 | * Fan Controller) | |
9 | * | |
10 | * This driver supports only the Environment Controller in the IT8705F and | |
11 | * similar parts. The other devices are supported by different drivers. | |
12 | * | |
c145d5c6 RM |
13 | * Supports: IT8603E Super I/O chip w/LPC interface |
14 | * IT8705F Super I/O chip w/LPC interface | |
5f2dc798 JD |
15 | * IT8712F Super I/O chip w/LPC interface |
16 | * IT8716F Super I/O chip w/LPC interface | |
17 | * IT8718F Super I/O chip w/LPC interface | |
18 | * IT8720F Super I/O chip w/LPC interface | |
44c1bcd4 | 19 | * IT8721F Super I/O chip w/LPC interface |
5f2dc798 | 20 | * IT8726F Super I/O chip w/LPC interface |
16b5dda2 | 21 | * IT8728F Super I/O chip w/LPC interface |
44c1bcd4 | 22 | * IT8758E Super I/O chip w/LPC interface |
b0636707 GR |
23 | * IT8771E Super I/O chip w/LPC interface |
24 | * IT8772E Super I/O chip w/LPC interface | |
0531d98b GR |
25 | * IT8782F Super I/O chip w/LPC interface |
26 | * IT8783E/F Super I/O chip w/LPC interface | |
5f2dc798 JD |
27 | * Sis950 A clone of the IT8705F |
28 | * | |
29 | * Copyright (C) 2001 Chris Gauthron | |
7c81c60f | 30 | * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de> |
5f2dc798 JD |
31 | * |
32 | * This program is free software; you can redistribute it and/or modify | |
33 | * it under the terms of the GNU General Public License as published by | |
34 | * the Free Software Foundation; either version 2 of the License, or | |
35 | * (at your option) any later version. | |
36 | * | |
37 | * This program is distributed in the hope that it will be useful, | |
38 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
39 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
40 | * GNU General Public License for more details. | |
41 | * | |
42 | * You should have received a copy of the GNU General Public License | |
43 | * along with this program; if not, write to the Free Software | |
44 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
45 | */ | |
1da177e4 | 46 | |
a8ca1037 JP |
47 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
48 | ||
1da177e4 LT |
49 | #include <linux/module.h> |
50 | #include <linux/init.h> | |
51 | #include <linux/slab.h> | |
52 | #include <linux/jiffies.h> | |
b74f3fdd | 53 | #include <linux/platform_device.h> |
943b0830 | 54 | #include <linux/hwmon.h> |
303760b4 JD |
55 | #include <linux/hwmon-sysfs.h> |
56 | #include <linux/hwmon-vid.h> | |
943b0830 | 57 | #include <linux/err.h> |
9a61bf63 | 58 | #include <linux/mutex.h> |
87808be4 | 59 | #include <linux/sysfs.h> |
98dd22c3 JD |
60 | #include <linux/string.h> |
61 | #include <linux/dmi.h> | |
b9acb64a | 62 | #include <linux/acpi.h> |
6055fae8 | 63 | #include <linux/io.h> |
1da177e4 | 64 | |
b74f3fdd | 65 | #define DRVNAME "it87" |
1da177e4 | 66 | |
b0636707 | 67 | enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8771, |
c145d5c6 | 68 | it8772, it8782, it8783, it8603 }; |
1da177e4 | 69 | |
67b671bc JD |
70 | static unsigned short force_id; |
71 | module_param(force_id, ushort, 0); | |
72 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
73 | ||
b74f3fdd | 74 | static struct platform_device *pdev; |
75 | ||
1da177e4 LT |
76 | #define REG 0x2e /* The register to read/write */ |
77 | #define DEV 0x07 /* Register: Logical device select */ | |
78 | #define VAL 0x2f /* The value to read/write */ | |
79 | #define PME 0x04 /* The device with the fan registers in it */ | |
b4da93e4 JMS |
80 | |
81 | /* The device with the IT8718F/IT8720F VID value in it */ | |
82 | #define GPIO 0x07 | |
83 | ||
1da177e4 LT |
84 | #define DEVID 0x20 /* Register: Device ID */ |
85 | #define DEVREV 0x22 /* Register: Device Revision */ | |
86 | ||
5b0380c9 | 87 | static inline int superio_inb(int reg) |
1da177e4 LT |
88 | { |
89 | outb(reg, REG); | |
90 | return inb(VAL); | |
91 | } | |
92 | ||
5b0380c9 | 93 | static inline void superio_outb(int reg, int val) |
436cad2a JD |
94 | { |
95 | outb(reg, REG); | |
96 | outb(val, VAL); | |
97 | } | |
98 | ||
1da177e4 LT |
99 | static int superio_inw(int reg) |
100 | { | |
101 | int val; | |
102 | outb(reg++, REG); | |
103 | val = inb(VAL) << 8; | |
104 | outb(reg, REG); | |
105 | val |= inb(VAL); | |
106 | return val; | |
107 | } | |
108 | ||
5b0380c9 | 109 | static inline void superio_select(int ldn) |
1da177e4 LT |
110 | { |
111 | outb(DEV, REG); | |
87673dd7 | 112 | outb(ldn, VAL); |
1da177e4 LT |
113 | } |
114 | ||
5b0380c9 | 115 | static inline int superio_enter(void) |
1da177e4 | 116 | { |
5b0380c9 NG |
117 | /* |
118 | * Try to reserve REG and REG + 1 for exclusive access. | |
119 | */ | |
120 | if (!request_muxed_region(REG, 2, DRVNAME)) | |
121 | return -EBUSY; | |
122 | ||
1da177e4 LT |
123 | outb(0x87, REG); |
124 | outb(0x01, REG); | |
125 | outb(0x55, REG); | |
126 | outb(0x55, REG); | |
5b0380c9 | 127 | return 0; |
1da177e4 LT |
128 | } |
129 | ||
5b0380c9 | 130 | static inline void superio_exit(void) |
1da177e4 LT |
131 | { |
132 | outb(0x02, REG); | |
133 | outb(0x02, VAL); | |
5b0380c9 | 134 | release_region(REG, 2); |
1da177e4 LT |
135 | } |
136 | ||
87673dd7 | 137 | /* Logical device 4 registers */ |
1da177e4 LT |
138 | #define IT8712F_DEVID 0x8712 |
139 | #define IT8705F_DEVID 0x8705 | |
17d648bf | 140 | #define IT8716F_DEVID 0x8716 |
87673dd7 | 141 | #define IT8718F_DEVID 0x8718 |
b4da93e4 | 142 | #define IT8720F_DEVID 0x8720 |
44c1bcd4 | 143 | #define IT8721F_DEVID 0x8721 |
08a8f6e9 | 144 | #define IT8726F_DEVID 0x8726 |
16b5dda2 | 145 | #define IT8728F_DEVID 0x8728 |
b0636707 GR |
146 | #define IT8771E_DEVID 0x8771 |
147 | #define IT8772E_DEVID 0x8772 | |
0531d98b GR |
148 | #define IT8782F_DEVID 0x8782 |
149 | #define IT8783E_DEVID 0x8783 | |
7183ae8c | 150 | #define IT8603E_DEVID 0x8603 |
1da177e4 LT |
151 | #define IT87_ACT_REG 0x30 |
152 | #define IT87_BASE_REG 0x60 | |
153 | ||
87673dd7 | 154 | /* Logical device 7 registers (IT8712F and later) */ |
0531d98b | 155 | #define IT87_SIO_GPIO1_REG 0x25 |
895ff267 | 156 | #define IT87_SIO_GPIO3_REG 0x27 |
591ec650 | 157 | #define IT87_SIO_GPIO5_REG 0x29 |
0531d98b | 158 | #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */ |
87673dd7 | 159 | #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */ |
0531d98b | 160 | #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */ |
87673dd7 | 161 | #define IT87_SIO_VID_REG 0xfc /* VID value */ |
d9b327c3 | 162 | #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */ |
87673dd7 | 163 | |
1da177e4 | 164 | /* Update battery voltage after every reading if true */ |
90ab5ee9 | 165 | static bool update_vbat; |
1da177e4 LT |
166 | |
167 | /* Not all BIOSes properly configure the PWM registers */ | |
90ab5ee9 | 168 | static bool fix_pwm_polarity; |
1da177e4 | 169 | |
1da177e4 LT |
170 | /* Many IT87 constants specified below */ |
171 | ||
172 | /* Length of ISA address segment */ | |
173 | #define IT87_EXTENT 8 | |
174 | ||
87b4b663 BH |
175 | /* Length of ISA address segment for Environmental Controller */ |
176 | #define IT87_EC_EXTENT 2 | |
177 | ||
178 | /* Offset of EC registers from ISA base address */ | |
179 | #define IT87_EC_OFFSET 5 | |
180 | ||
181 | /* Where are the ISA address/data registers relative to the EC base address */ | |
182 | #define IT87_ADDR_REG_OFFSET 0 | |
183 | #define IT87_DATA_REG_OFFSET 1 | |
1da177e4 LT |
184 | |
185 | /*----- The IT87 registers -----*/ | |
186 | ||
187 | #define IT87_REG_CONFIG 0x00 | |
188 | ||
189 | #define IT87_REG_ALARM1 0x01 | |
190 | #define IT87_REG_ALARM2 0x02 | |
191 | #define IT87_REG_ALARM3 0x03 | |
192 | ||
4a0d71cf GR |
193 | /* |
194 | * The IT8718F and IT8720F have the VID value in a different register, in | |
195 | * Super-I/O configuration space. | |
196 | */ | |
1da177e4 | 197 | #define IT87_REG_VID 0x0a |
4a0d71cf GR |
198 | /* |
199 | * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b | |
200 | * for fan divisors. Later IT8712F revisions must use 16-bit tachometer | |
201 | * mode. | |
202 | */ | |
1da177e4 | 203 | #define IT87_REG_FAN_DIV 0x0b |
17d648bf | 204 | #define IT87_REG_FAN_16BIT 0x0c |
1da177e4 LT |
205 | |
206 | /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */ | |
207 | ||
c7f1f716 JD |
208 | static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 }; |
209 | static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 }; | |
210 | static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 }; | |
211 | static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 }; | |
161d898a GR |
212 | static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 }; |
213 | ||
1da177e4 LT |
214 | #define IT87_REG_FAN_MAIN_CTRL 0x13 |
215 | #define IT87_REG_FAN_CTL 0x14 | |
216 | #define IT87_REG_PWM(nr) (0x15 + (nr)) | |
6229cdb2 | 217 | #define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8) |
1da177e4 LT |
218 | |
219 | #define IT87_REG_VIN(nr) (0x20 + (nr)) | |
220 | #define IT87_REG_TEMP(nr) (0x29 + (nr)) | |
221 | ||
222 | #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2) | |
223 | #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2) | |
224 | #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2) | |
225 | #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2) | |
226 | ||
1da177e4 LT |
227 | #define IT87_REG_VIN_ENABLE 0x50 |
228 | #define IT87_REG_TEMP_ENABLE 0x51 | |
4573acbc | 229 | #define IT87_REG_TEMP_EXTRA 0x55 |
d9b327c3 | 230 | #define IT87_REG_BEEP_ENABLE 0x5c |
1da177e4 LT |
231 | |
232 | #define IT87_REG_CHIPID 0x58 | |
233 | ||
4f3f51bc JD |
234 | #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i)) |
235 | #define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i)) | |
236 | ||
483db43e GR |
237 | struct it87_devices { |
238 | const char *name; | |
239 | u16 features; | |
19529784 GR |
240 | u8 peci_mask; |
241 | u8 old_peci_mask; | |
483db43e GR |
242 | }; |
243 | ||
244 | #define FEAT_12MV_ADC (1 << 0) | |
245 | #define FEAT_NEWER_AUTOPWM (1 << 1) | |
246 | #define FEAT_OLD_AUTOPWM (1 << 2) | |
247 | #define FEAT_16BIT_FANS (1 << 3) | |
248 | #define FEAT_TEMP_OFFSET (1 << 4) | |
5d8d2f2b | 249 | #define FEAT_TEMP_PECI (1 << 5) |
19529784 | 250 | #define FEAT_TEMP_OLD_PECI (1 << 6) |
483db43e GR |
251 | |
252 | static const struct it87_devices it87_devices[] = { | |
253 | [it87] = { | |
254 | .name = "it87", | |
255 | .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */ | |
256 | }, | |
257 | [it8712] = { | |
258 | .name = "it8712", | |
259 | .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */ | |
260 | }, | |
261 | [it8716] = { | |
262 | .name = "it8716", | |
263 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET, | |
264 | }, | |
265 | [it8718] = { | |
266 | .name = "it8718", | |
19529784 GR |
267 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
268 | | FEAT_TEMP_OLD_PECI, | |
269 | .old_peci_mask = 0x4, | |
483db43e GR |
270 | }, |
271 | [it8720] = { | |
272 | .name = "it8720", | |
19529784 GR |
273 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
274 | | FEAT_TEMP_OLD_PECI, | |
275 | .old_peci_mask = 0x4, | |
483db43e GR |
276 | }, |
277 | [it8721] = { | |
278 | .name = "it8721", | |
279 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
19529784 | 280 | | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI, |
5d8d2f2b | 281 | .peci_mask = 0x05, |
19529784 | 282 | .old_peci_mask = 0x02, /* Actually reports PCH */ |
483db43e GR |
283 | }, |
284 | [it8728] = { | |
285 | .name = "it8728", | |
286 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
5d8d2f2b GR |
287 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, |
288 | .peci_mask = 0x07, | |
483db43e | 289 | }, |
b0636707 GR |
290 | [it8771] = { |
291 | .name = "it8771", | |
292 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
293 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, | |
294 | /* PECI: guesswork */ | |
295 | /* 12mV ADC (OHM) */ | |
296 | /* 16 bit fans (OHM) */ | |
297 | .peci_mask = 0x07, | |
298 | }, | |
299 | [it8772] = { | |
300 | .name = "it8772", | |
301 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
302 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, | |
303 | /* PECI (coreboot) */ | |
304 | /* 12mV ADC (HWSensors4, OHM) */ | |
305 | /* 16 bit fans (HWSensors4, OHM) */ | |
306 | .peci_mask = 0x07, | |
307 | }, | |
483db43e GR |
308 | [it8782] = { |
309 | .name = "it8782", | |
19529784 GR |
310 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
311 | | FEAT_TEMP_OLD_PECI, | |
312 | .old_peci_mask = 0x4, | |
483db43e GR |
313 | }, |
314 | [it8783] = { | |
315 | .name = "it8783", | |
19529784 GR |
316 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
317 | | FEAT_TEMP_OLD_PECI, | |
318 | .old_peci_mask = 0x4, | |
483db43e | 319 | }, |
c145d5c6 RM |
320 | [it8603] = { |
321 | .name = "it8603", | |
322 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
323 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, | |
324 | .peci_mask = 0x07, | |
325 | }, | |
483db43e GR |
326 | }; |
327 | ||
328 | #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS) | |
329 | #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC) | |
330 | #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM) | |
331 | #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM) | |
332 | #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET) | |
5d8d2f2b GR |
333 | #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \ |
334 | ((data)->peci_mask & (1 << nr))) | |
19529784 GR |
335 | #define has_temp_old_peci(data, nr) \ |
336 | (((data)->features & FEAT_TEMP_OLD_PECI) && \ | |
337 | ((data)->old_peci_mask & (1 << nr))) | |
1da177e4 | 338 | |
b74f3fdd | 339 | struct it87_sio_data { |
340 | enum chips type; | |
341 | /* Values read from Super-I/O config space */ | |
0475169c | 342 | u8 revision; |
b74f3fdd | 343 | u8 vid_value; |
d9b327c3 | 344 | u8 beep_pin; |
738e5e05 | 345 | u8 internal; /* Internal sensors can be labeled */ |
591ec650 | 346 | /* Features skipped based on config or DMI */ |
9172b5d1 | 347 | u16 skip_in; |
895ff267 | 348 | u8 skip_vid; |
591ec650 | 349 | u8 skip_fan; |
98dd22c3 | 350 | u8 skip_pwm; |
4573acbc | 351 | u8 skip_temp; |
b74f3fdd | 352 | }; |
353 | ||
4a0d71cf GR |
354 | /* |
355 | * For each registered chip, we need to keep some data in memory. | |
356 | * The structure is dynamically allocated. | |
357 | */ | |
1da177e4 | 358 | struct it87_data { |
1beeffe4 | 359 | struct device *hwmon_dev; |
1da177e4 | 360 | enum chips type; |
483db43e | 361 | u16 features; |
19529784 GR |
362 | u8 peci_mask; |
363 | u8 old_peci_mask; | |
1da177e4 | 364 | |
b74f3fdd | 365 | unsigned short addr; |
366 | const char *name; | |
9a61bf63 | 367 | struct mutex update_lock; |
1da177e4 LT |
368 | char valid; /* !=0 if following fields are valid */ |
369 | unsigned long last_updated; /* In jiffies */ | |
370 | ||
44c1bcd4 | 371 | u16 in_scaled; /* Internal voltage sensors are scaled */ |
c145d5c6 | 372 | u8 in[10][3]; /* [nr][0]=in, [1]=min, [2]=max */ |
9060f8bd | 373 | u8 has_fan; /* Bitfield, fans enabled */ |
e1169ba0 | 374 | u16 fan[5][2]; /* Register values, [nr][0]=fan, [1]=min */ |
4573acbc | 375 | u8 has_temp; /* Bitfield, temp sensors enabled */ |
161d898a | 376 | s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */ |
19529784 GR |
377 | u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */ |
378 | u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */ | |
1da177e4 LT |
379 | u8 fan_div[3]; /* Register encoding, shifted right */ |
380 | u8 vid; /* Register encoding, combined */ | |
a7be58a1 | 381 | u8 vrm; |
1da177e4 | 382 | u32 alarms; /* Register encoding, combined */ |
d9b327c3 | 383 | u8 beeps; /* Register encoding */ |
1da177e4 | 384 | u8 fan_main_ctrl; /* Register value */ |
f8d0c19a | 385 | u8 fan_ctl; /* Register value */ |
b99883dc | 386 | |
4a0d71cf GR |
387 | /* |
388 | * The following 3 arrays correspond to the same registers up to | |
6229cdb2 JD |
389 | * the IT8720F. The meaning of bits 6-0 depends on the value of bit |
390 | * 7, and we want to preserve settings on mode changes, so we have | |
391 | * to track all values separately. | |
392 | * Starting with the IT8721F, the manual PWM duty cycles are stored | |
393 | * in separate registers (8-bit values), so the separate tracking | |
394 | * is no longer needed, but it is still done to keep the driver | |
4a0d71cf GR |
395 | * simple. |
396 | */ | |
b99883dc | 397 | u8 pwm_ctrl[3]; /* Register value */ |
6229cdb2 | 398 | u8 pwm_duty[3]; /* Manual PWM value set by user */ |
b99883dc | 399 | u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */ |
4f3f51bc JD |
400 | |
401 | /* Automatic fan speed control registers */ | |
402 | u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */ | |
403 | s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */ | |
1da177e4 | 404 | }; |
0df6454d | 405 | |
0531d98b | 406 | static int adc_lsb(const struct it87_data *data, int nr) |
44c1bcd4 | 407 | { |
0531d98b GR |
408 | int lsb = has_12mv_adc(data) ? 12 : 16; |
409 | if (data->in_scaled & (1 << nr)) | |
410 | lsb <<= 1; | |
411 | return lsb; | |
412 | } | |
44c1bcd4 | 413 | |
0531d98b GR |
414 | static u8 in_to_reg(const struct it87_data *data, int nr, long val) |
415 | { | |
416 | val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr)); | |
2a844c14 | 417 | return clamp_val(val, 0, 255); |
44c1bcd4 JD |
418 | } |
419 | ||
420 | static int in_from_reg(const struct it87_data *data, int nr, int val) | |
421 | { | |
0531d98b | 422 | return val * adc_lsb(data, nr); |
44c1bcd4 | 423 | } |
0df6454d JD |
424 | |
425 | static inline u8 FAN_TO_REG(long rpm, int div) | |
426 | { | |
427 | if (rpm == 0) | |
428 | return 255; | |
2a844c14 GR |
429 | rpm = clamp_val(rpm, 1, 1000000); |
430 | return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
0df6454d JD |
431 | } |
432 | ||
433 | static inline u16 FAN16_TO_REG(long rpm) | |
434 | { | |
435 | if (rpm == 0) | |
436 | return 0xffff; | |
2a844c14 | 437 | return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe); |
0df6454d JD |
438 | } |
439 | ||
440 | #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \ | |
441 | 1350000 / ((val) * (div))) | |
442 | /* The divider is fixed to 2 in 16-bit mode */ | |
443 | #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \ | |
444 | 1350000 / ((val) * 2)) | |
445 | ||
2a844c14 GR |
446 | #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \ |
447 | ((val) + 500) / 1000), -128, 127)) | |
0df6454d JD |
448 | #define TEMP_FROM_REG(val) ((val) * 1000) |
449 | ||
44c1bcd4 JD |
450 | static u8 pwm_to_reg(const struct it87_data *data, long val) |
451 | { | |
16b5dda2 | 452 | if (has_newer_autopwm(data)) |
44c1bcd4 JD |
453 | return val; |
454 | else | |
455 | return val >> 1; | |
456 | } | |
457 | ||
458 | static int pwm_from_reg(const struct it87_data *data, u8 reg) | |
459 | { | |
16b5dda2 | 460 | if (has_newer_autopwm(data)) |
44c1bcd4 JD |
461 | return reg; |
462 | else | |
463 | return (reg & 0x7f) << 1; | |
464 | } | |
465 | ||
0df6454d JD |
466 | |
467 | static int DIV_TO_REG(int val) | |
468 | { | |
469 | int answer = 0; | |
470 | while (answer < 7 && (val >>= 1)) | |
471 | answer++; | |
472 | return answer; | |
473 | } | |
474 | #define DIV_FROM_REG(val) (1 << (val)) | |
475 | ||
476 | static const unsigned int pwm_freq[8] = { | |
477 | 48000000 / 128, | |
478 | 24000000 / 128, | |
479 | 12000000 / 128, | |
480 | 8000000 / 128, | |
481 | 6000000 / 128, | |
482 | 3000000 / 128, | |
483 | 1500000 / 128, | |
484 | 750000 / 128, | |
485 | }; | |
1da177e4 | 486 | |
b74f3fdd | 487 | static int it87_probe(struct platform_device *pdev); |
281dfd0b | 488 | static int it87_remove(struct platform_device *pdev); |
1da177e4 | 489 | |
b74f3fdd | 490 | static int it87_read_value(struct it87_data *data, u8 reg); |
491 | static void it87_write_value(struct it87_data *data, u8 reg, u8 value); | |
1da177e4 | 492 | static struct it87_data *it87_update_device(struct device *dev); |
b74f3fdd | 493 | static int it87_check_pwm(struct device *dev); |
494 | static void it87_init_device(struct platform_device *pdev); | |
1da177e4 LT |
495 | |
496 | ||
b74f3fdd | 497 | static struct platform_driver it87_driver = { |
cdaf7934 | 498 | .driver = { |
87218842 | 499 | .owner = THIS_MODULE, |
b74f3fdd | 500 | .name = DRVNAME, |
cdaf7934 | 501 | }, |
b74f3fdd | 502 | .probe = it87_probe, |
9e5e9b7a | 503 | .remove = it87_remove, |
fde09509 JD |
504 | }; |
505 | ||
20ad93d4 | 506 | static ssize_t show_in(struct device *dev, struct device_attribute *attr, |
929c6a56 | 507 | char *buf) |
1da177e4 | 508 | { |
929c6a56 GR |
509 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
510 | int nr = sattr->nr; | |
511 | int index = sattr->index; | |
20ad93d4 | 512 | |
1da177e4 | 513 | struct it87_data *data = it87_update_device(dev); |
929c6a56 | 514 | return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index])); |
1da177e4 LT |
515 | } |
516 | ||
929c6a56 GR |
517 | static ssize_t set_in(struct device *dev, struct device_attribute *attr, |
518 | const char *buf, size_t count) | |
1da177e4 | 519 | { |
929c6a56 GR |
520 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
521 | int nr = sattr->nr; | |
522 | int index = sattr->index; | |
20ad93d4 | 523 | |
b74f3fdd | 524 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 JD |
525 | unsigned long val; |
526 | ||
179c4fdb | 527 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 528 | return -EINVAL; |
1da177e4 | 529 | |
9a61bf63 | 530 | mutex_lock(&data->update_lock); |
929c6a56 GR |
531 | data->in[nr][index] = in_to_reg(data, nr, val); |
532 | it87_write_value(data, | |
533 | index == 1 ? IT87_REG_VIN_MIN(nr) | |
534 | : IT87_REG_VIN_MAX(nr), | |
535 | data->in[nr][index]); | |
9a61bf63 | 536 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
537 | return count; |
538 | } | |
20ad93d4 | 539 | |
929c6a56 GR |
540 | static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0); |
541 | static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
542 | 0, 1); | |
543 | static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
544 | 0, 2); | |
f5f64501 | 545 | |
929c6a56 GR |
546 | static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0); |
547 | static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
548 | 1, 1); | |
549 | static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
550 | 1, 2); | |
1da177e4 | 551 | |
929c6a56 GR |
552 | static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0); |
553 | static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
554 | 2, 1); | |
555 | static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
556 | 2, 2); | |
1da177e4 | 557 | |
929c6a56 GR |
558 | static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0); |
559 | static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
560 | 3, 1); | |
561 | static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
562 | 3, 2); | |
563 | ||
564 | static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0); | |
565 | static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
566 | 4, 1); | |
567 | static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
568 | 4, 2); | |
569 | ||
570 | static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0); | |
571 | static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
572 | 5, 1); | |
573 | static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
574 | 5, 2); | |
575 | ||
576 | static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0); | |
577 | static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
578 | 6, 1); | |
579 | static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
580 | 6, 2); | |
581 | ||
582 | static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0); | |
583 | static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
584 | 7, 1); | |
585 | static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
586 | 7, 2); | |
587 | ||
588 | static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0); | |
c145d5c6 | 589 | static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0); |
1da177e4 LT |
590 | |
591 | /* 3 temperatures */ | |
20ad93d4 | 592 | static ssize_t show_temp(struct device *dev, struct device_attribute *attr, |
60ca385a | 593 | char *buf) |
1da177e4 | 594 | { |
60ca385a GR |
595 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
596 | int nr = sattr->nr; | |
597 | int index = sattr->index; | |
1da177e4 | 598 | struct it87_data *data = it87_update_device(dev); |
20ad93d4 | 599 | |
60ca385a | 600 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index])); |
1da177e4 | 601 | } |
20ad93d4 | 602 | |
60ca385a GR |
603 | static ssize_t set_temp(struct device *dev, struct device_attribute *attr, |
604 | const char *buf, size_t count) | |
1da177e4 | 605 | { |
60ca385a GR |
606 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
607 | int nr = sattr->nr; | |
608 | int index = sattr->index; | |
b74f3fdd | 609 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 610 | long val; |
161d898a | 611 | u8 reg, regval; |
f5f64501 | 612 | |
179c4fdb | 613 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 | 614 | return -EINVAL; |
1da177e4 | 615 | |
9a61bf63 | 616 | mutex_lock(&data->update_lock); |
161d898a GR |
617 | |
618 | switch (index) { | |
619 | default: | |
620 | case 1: | |
621 | reg = IT87_REG_TEMP_LOW(nr); | |
622 | break; | |
623 | case 2: | |
624 | reg = IT87_REG_TEMP_HIGH(nr); | |
625 | break; | |
626 | case 3: | |
627 | regval = it87_read_value(data, IT87_REG_BEEP_ENABLE); | |
628 | if (!(regval & 0x80)) { | |
629 | regval |= 0x80; | |
630 | it87_write_value(data, IT87_REG_BEEP_ENABLE, regval); | |
631 | } | |
632 | data->valid = 0; | |
633 | reg = IT87_REG_TEMP_OFFSET[nr]; | |
634 | break; | |
635 | } | |
636 | ||
60ca385a | 637 | data->temp[nr][index] = TEMP_TO_REG(val); |
161d898a | 638 | it87_write_value(data, reg, data->temp[nr][index]); |
9a61bf63 | 639 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
640 | return count; |
641 | } | |
1da177e4 | 642 | |
60ca385a GR |
643 | static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0); |
644 | static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
645 | 0, 1); | |
646 | static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
647 | 0, 2); | |
161d898a GR |
648 | static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp, |
649 | set_temp, 0, 3); | |
60ca385a GR |
650 | static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0); |
651 | static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
652 | 1, 1); | |
653 | static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
654 | 1, 2); | |
161d898a GR |
655 | static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp, |
656 | set_temp, 1, 3); | |
60ca385a GR |
657 | static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0); |
658 | static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
659 | 2, 1); | |
660 | static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
661 | 2, 2); | |
161d898a GR |
662 | static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp, |
663 | set_temp, 2, 3); | |
1da177e4 | 664 | |
2cece01f GR |
665 | static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr, |
666 | char *buf) | |
1da177e4 | 667 | { |
20ad93d4 JD |
668 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
669 | int nr = sensor_attr->index; | |
1da177e4 | 670 | struct it87_data *data = it87_update_device(dev); |
4a0d71cf | 671 | u8 reg = data->sensor; /* In case value is updated while used */ |
19529784 | 672 | u8 extra = data->extra; |
5f2dc798 | 673 | |
19529784 GR |
674 | if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) |
675 | || (has_temp_old_peci(data, nr) && (extra & 0x80))) | |
5d8d2f2b | 676 | return sprintf(buf, "6\n"); /* Intel PECI */ |
1da177e4 LT |
677 | if (reg & (1 << nr)) |
678 | return sprintf(buf, "3\n"); /* thermal diode */ | |
679 | if (reg & (8 << nr)) | |
4ed10779 | 680 | return sprintf(buf, "4\n"); /* thermistor */ |
1da177e4 LT |
681 | return sprintf(buf, "0\n"); /* disabled */ |
682 | } | |
2cece01f GR |
683 | |
684 | static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr, | |
685 | const char *buf, size_t count) | |
1da177e4 | 686 | { |
20ad93d4 JD |
687 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
688 | int nr = sensor_attr->index; | |
689 | ||
b74f3fdd | 690 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 691 | long val; |
19529784 | 692 | u8 reg, extra; |
f5f64501 | 693 | |
179c4fdb | 694 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 | 695 | return -EINVAL; |
1da177e4 | 696 | |
8acf07c5 JD |
697 | reg = it87_read_value(data, IT87_REG_TEMP_ENABLE); |
698 | reg &= ~(1 << nr); | |
699 | reg &= ~(8 << nr); | |
5d8d2f2b GR |
700 | if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6)) |
701 | reg &= 0x3f; | |
19529784 GR |
702 | extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); |
703 | if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6)) | |
704 | extra &= 0x7f; | |
4ed10779 | 705 | if (val == 2) { /* backwards compatibility */ |
1d9bcf6a GR |
706 | dev_warn(dev, |
707 | "Sensor type 2 is deprecated, please use 4 instead\n"); | |
4ed10779 JD |
708 | val = 4; |
709 | } | |
5d8d2f2b | 710 | /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */ |
1da177e4 | 711 | if (val == 3) |
8acf07c5 | 712 | reg |= 1 << nr; |
4ed10779 | 713 | else if (val == 4) |
8acf07c5 | 714 | reg |= 8 << nr; |
5d8d2f2b GR |
715 | else if (has_temp_peci(data, nr) && val == 6) |
716 | reg |= (nr + 1) << 6; | |
19529784 GR |
717 | else if (has_temp_old_peci(data, nr) && val == 6) |
718 | extra |= 0x80; | |
8acf07c5 | 719 | else if (val != 0) |
1da177e4 | 720 | return -EINVAL; |
8acf07c5 JD |
721 | |
722 | mutex_lock(&data->update_lock); | |
723 | data->sensor = reg; | |
19529784 | 724 | data->extra = extra; |
b74f3fdd | 725 | it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor); |
19529784 GR |
726 | if (has_temp_old_peci(data, nr)) |
727 | it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra); | |
2b3d1d87 | 728 | data->valid = 0; /* Force cache refresh */ |
9a61bf63 | 729 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
730 | return count; |
731 | } | |
1da177e4 | 732 | |
2cece01f GR |
733 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type, |
734 | set_temp_type, 0); | |
735 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type, | |
736 | set_temp_type, 1); | |
737 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type, | |
738 | set_temp_type, 2); | |
1da177e4 LT |
739 | |
740 | /* 3 Fans */ | |
b99883dc JD |
741 | |
742 | static int pwm_mode(const struct it87_data *data, int nr) | |
743 | { | |
744 | int ctrl = data->fan_main_ctrl & (1 << nr); | |
745 | ||
c145d5c6 | 746 | if (ctrl == 0 && data->type != it8603) /* Full speed */ |
b99883dc JD |
747 | return 0; |
748 | if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ | |
749 | return 2; | |
750 | else /* Manual mode */ | |
751 | return 1; | |
752 | } | |
753 | ||
20ad93d4 | 754 | static ssize_t show_fan(struct device *dev, struct device_attribute *attr, |
e1169ba0 | 755 | char *buf) |
1da177e4 | 756 | { |
e1169ba0 GR |
757 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
758 | int nr = sattr->nr; | |
759 | int index = sattr->index; | |
760 | int speed; | |
1da177e4 | 761 | struct it87_data *data = it87_update_device(dev); |
20ad93d4 | 762 | |
e1169ba0 GR |
763 | speed = has_16bit_fans(data) ? |
764 | FAN16_FROM_REG(data->fan[nr][index]) : | |
765 | FAN_FROM_REG(data->fan[nr][index], | |
766 | DIV_FROM_REG(data->fan_div[nr])); | |
767 | return sprintf(buf, "%d\n", speed); | |
1da177e4 | 768 | } |
e1169ba0 | 769 | |
20ad93d4 JD |
770 | static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr, |
771 | char *buf) | |
1da177e4 | 772 | { |
20ad93d4 JD |
773 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
774 | int nr = sensor_attr->index; | |
775 | ||
1da177e4 LT |
776 | struct it87_data *data = it87_update_device(dev); |
777 | return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr])); | |
778 | } | |
5f2dc798 JD |
779 | static ssize_t show_pwm_enable(struct device *dev, |
780 | struct device_attribute *attr, char *buf) | |
1da177e4 | 781 | { |
20ad93d4 JD |
782 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
783 | int nr = sensor_attr->index; | |
784 | ||
1da177e4 | 785 | struct it87_data *data = it87_update_device(dev); |
b99883dc | 786 | return sprintf(buf, "%d\n", pwm_mode(data, nr)); |
1da177e4 | 787 | } |
20ad93d4 JD |
788 | static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, |
789 | char *buf) | |
1da177e4 | 790 | { |
20ad93d4 JD |
791 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
792 | int nr = sensor_attr->index; | |
793 | ||
1da177e4 | 794 | struct it87_data *data = it87_update_device(dev); |
44c1bcd4 JD |
795 | return sprintf(buf, "%d\n", |
796 | pwm_from_reg(data, data->pwm_duty[nr])); | |
1da177e4 | 797 | } |
f8d0c19a JD |
798 | static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr, |
799 | char *buf) | |
800 | { | |
801 | struct it87_data *data = it87_update_device(dev); | |
802 | int index = (data->fan_ctl >> 4) & 0x07; | |
803 | ||
804 | return sprintf(buf, "%u\n", pwm_freq[index]); | |
805 | } | |
e1169ba0 GR |
806 | |
807 | static ssize_t set_fan(struct device *dev, struct device_attribute *attr, | |
808 | const char *buf, size_t count) | |
1da177e4 | 809 | { |
e1169ba0 GR |
810 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
811 | int nr = sattr->nr; | |
812 | int index = sattr->index; | |
20ad93d4 | 813 | |
b74f3fdd | 814 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 815 | long val; |
7f999aa7 | 816 | u8 reg; |
1da177e4 | 817 | |
179c4fdb | 818 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 JD |
819 | return -EINVAL; |
820 | ||
9a61bf63 | 821 | mutex_lock(&data->update_lock); |
e1169ba0 GR |
822 | |
823 | if (has_16bit_fans(data)) { | |
824 | data->fan[nr][index] = FAN16_TO_REG(val); | |
825 | it87_write_value(data, IT87_REG_FAN_MIN[nr], | |
826 | data->fan[nr][index] & 0xff); | |
827 | it87_write_value(data, IT87_REG_FANX_MIN[nr], | |
828 | data->fan[nr][index] >> 8); | |
829 | } else { | |
830 | reg = it87_read_value(data, IT87_REG_FAN_DIV); | |
831 | switch (nr) { | |
832 | case 0: | |
833 | data->fan_div[nr] = reg & 0x07; | |
834 | break; | |
835 | case 1: | |
836 | data->fan_div[nr] = (reg >> 3) & 0x07; | |
837 | break; | |
838 | case 2: | |
839 | data->fan_div[nr] = (reg & 0x40) ? 3 : 1; | |
840 | break; | |
841 | } | |
842 | data->fan[nr][index] = | |
843 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); | |
844 | it87_write_value(data, IT87_REG_FAN_MIN[nr], | |
845 | data->fan[nr][index]); | |
07eab46d JD |
846 | } |
847 | ||
9a61bf63 | 848 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
849 | return count; |
850 | } | |
e1169ba0 | 851 | |
20ad93d4 JD |
852 | static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr, |
853 | const char *buf, size_t count) | |
1da177e4 | 854 | { |
20ad93d4 JD |
855 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
856 | int nr = sensor_attr->index; | |
857 | ||
b74f3fdd | 858 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 859 | unsigned long val; |
8ab4ec3e | 860 | int min; |
1da177e4 LT |
861 | u8 old; |
862 | ||
179c4fdb | 863 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 JD |
864 | return -EINVAL; |
865 | ||
9a61bf63 | 866 | mutex_lock(&data->update_lock); |
b74f3fdd | 867 | old = it87_read_value(data, IT87_REG_FAN_DIV); |
1da177e4 | 868 | |
8ab4ec3e | 869 | /* Save fan min limit */ |
e1169ba0 | 870 | min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr])); |
1da177e4 LT |
871 | |
872 | switch (nr) { | |
873 | case 0: | |
874 | case 1: | |
875 | data->fan_div[nr] = DIV_TO_REG(val); | |
876 | break; | |
877 | case 2: | |
878 | if (val < 8) | |
879 | data->fan_div[nr] = 1; | |
880 | else | |
881 | data->fan_div[nr] = 3; | |
882 | } | |
883 | val = old & 0x80; | |
884 | val |= (data->fan_div[0] & 0x07); | |
885 | val |= (data->fan_div[1] & 0x07) << 3; | |
886 | if (data->fan_div[2] == 3) | |
887 | val |= 0x1 << 6; | |
b74f3fdd | 888 | it87_write_value(data, IT87_REG_FAN_DIV, val); |
1da177e4 | 889 | |
8ab4ec3e | 890 | /* Restore fan min limit */ |
e1169ba0 GR |
891 | data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); |
892 | it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]); | |
8ab4ec3e | 893 | |
9a61bf63 | 894 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
895 | return count; |
896 | } | |
cccfc9c4 JD |
897 | |
898 | /* Returns 0 if OK, -EINVAL otherwise */ | |
899 | static int check_trip_points(struct device *dev, int nr) | |
900 | { | |
901 | const struct it87_data *data = dev_get_drvdata(dev); | |
902 | int i, err = 0; | |
903 | ||
904 | if (has_old_autopwm(data)) { | |
905 | for (i = 0; i < 3; i++) { | |
906 | if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) | |
907 | err = -EINVAL; | |
908 | } | |
909 | for (i = 0; i < 2; i++) { | |
910 | if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) | |
911 | err = -EINVAL; | |
912 | } | |
913 | } | |
914 | ||
915 | if (err) { | |
1d9bcf6a GR |
916 | dev_err(dev, |
917 | "Inconsistent trip points, not switching to automatic mode\n"); | |
cccfc9c4 JD |
918 | dev_err(dev, "Adjust the trip points and try again\n"); |
919 | } | |
920 | return err; | |
921 | } | |
922 | ||
20ad93d4 JD |
923 | static ssize_t set_pwm_enable(struct device *dev, |
924 | struct device_attribute *attr, const char *buf, size_t count) | |
1da177e4 | 925 | { |
20ad93d4 JD |
926 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
927 | int nr = sensor_attr->index; | |
928 | ||
b74f3fdd | 929 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 930 | long val; |
1da177e4 | 931 | |
179c4fdb | 932 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2) |
b99883dc JD |
933 | return -EINVAL; |
934 | ||
cccfc9c4 JD |
935 | /* Check trip points before switching to automatic mode */ |
936 | if (val == 2) { | |
937 | if (check_trip_points(dev, nr) < 0) | |
938 | return -EINVAL; | |
939 | } | |
940 | ||
c145d5c6 RM |
941 | /* IT8603E does not have on/off mode */ |
942 | if (val == 0 && data->type == it8603) | |
943 | return -EINVAL; | |
944 | ||
9a61bf63 | 945 | mutex_lock(&data->update_lock); |
1da177e4 LT |
946 | |
947 | if (val == 0) { | |
948 | int tmp; | |
949 | /* make sure the fan is on when in on/off mode */ | |
b74f3fdd | 950 | tmp = it87_read_value(data, IT87_REG_FAN_CTL); |
951 | it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr)); | |
1da177e4 LT |
952 | /* set on/off mode */ |
953 | data->fan_main_ctrl &= ~(1 << nr); | |
5f2dc798 JD |
954 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, |
955 | data->fan_main_ctrl); | |
b99883dc JD |
956 | } else { |
957 | if (val == 1) /* Manual mode */ | |
16b5dda2 | 958 | data->pwm_ctrl[nr] = has_newer_autopwm(data) ? |
6229cdb2 JD |
959 | data->pwm_temp_map[nr] : |
960 | data->pwm_duty[nr]; | |
b99883dc JD |
961 | else /* Automatic mode */ |
962 | data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; | |
963 | it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); | |
c145d5c6 RM |
964 | |
965 | if (data->type != it8603) { | |
966 | /* set SmartGuardian mode */ | |
967 | data->fan_main_ctrl |= (1 << nr); | |
968 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, | |
969 | data->fan_main_ctrl); | |
970 | } | |
1da177e4 LT |
971 | } |
972 | ||
9a61bf63 | 973 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
974 | return count; |
975 | } | |
20ad93d4 JD |
976 | static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, |
977 | const char *buf, size_t count) | |
1da177e4 | 978 | { |
20ad93d4 JD |
979 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
980 | int nr = sensor_attr->index; | |
981 | ||
b74f3fdd | 982 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 983 | long val; |
1da177e4 | 984 | |
179c4fdb | 985 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) |
1da177e4 LT |
986 | return -EINVAL; |
987 | ||
9a61bf63 | 988 | mutex_lock(&data->update_lock); |
16b5dda2 | 989 | if (has_newer_autopwm(data)) { |
4a0d71cf GR |
990 | /* |
991 | * If we are in automatic mode, the PWM duty cycle register | |
992 | * is read-only so we can't write the value. | |
993 | */ | |
6229cdb2 JD |
994 | if (data->pwm_ctrl[nr] & 0x80) { |
995 | mutex_unlock(&data->update_lock); | |
996 | return -EBUSY; | |
997 | } | |
998 | data->pwm_duty[nr] = pwm_to_reg(data, val); | |
999 | it87_write_value(data, IT87_REG_PWM_DUTY(nr), | |
1000 | data->pwm_duty[nr]); | |
1001 | } else { | |
1002 | data->pwm_duty[nr] = pwm_to_reg(data, val); | |
4a0d71cf GR |
1003 | /* |
1004 | * If we are in manual mode, write the duty cycle immediately; | |
1005 | * otherwise, just store it for later use. | |
1006 | */ | |
6229cdb2 JD |
1007 | if (!(data->pwm_ctrl[nr] & 0x80)) { |
1008 | data->pwm_ctrl[nr] = data->pwm_duty[nr]; | |
1009 | it87_write_value(data, IT87_REG_PWM(nr), | |
1010 | data->pwm_ctrl[nr]); | |
1011 | } | |
b99883dc | 1012 | } |
9a61bf63 | 1013 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1014 | return count; |
1015 | } | |
f8d0c19a JD |
1016 | static ssize_t set_pwm_freq(struct device *dev, |
1017 | struct device_attribute *attr, const char *buf, size_t count) | |
1018 | { | |
b74f3fdd | 1019 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 1020 | unsigned long val; |
f8d0c19a JD |
1021 | int i; |
1022 | ||
179c4fdb | 1023 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 JD |
1024 | return -EINVAL; |
1025 | ||
f8d0c19a JD |
1026 | /* Search for the nearest available frequency */ |
1027 | for (i = 0; i < 7; i++) { | |
1028 | if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2) | |
1029 | break; | |
1030 | } | |
1031 | ||
1032 | mutex_lock(&data->update_lock); | |
b74f3fdd | 1033 | data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f; |
f8d0c19a | 1034 | data->fan_ctl |= i << 4; |
b74f3fdd | 1035 | it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl); |
f8d0c19a JD |
1036 | mutex_unlock(&data->update_lock); |
1037 | ||
1038 | return count; | |
1039 | } | |
94ac7ee6 JD |
1040 | static ssize_t show_pwm_temp_map(struct device *dev, |
1041 | struct device_attribute *attr, char *buf) | |
1042 | { | |
1043 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
1044 | int nr = sensor_attr->index; | |
1045 | ||
1046 | struct it87_data *data = it87_update_device(dev); | |
1047 | int map; | |
1048 | ||
1049 | if (data->pwm_temp_map[nr] < 3) | |
1050 | map = 1 << data->pwm_temp_map[nr]; | |
1051 | else | |
1052 | map = 0; /* Should never happen */ | |
1053 | return sprintf(buf, "%d\n", map); | |
1054 | } | |
1055 | static ssize_t set_pwm_temp_map(struct device *dev, | |
1056 | struct device_attribute *attr, const char *buf, size_t count) | |
1057 | { | |
1058 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
1059 | int nr = sensor_attr->index; | |
1060 | ||
1061 | struct it87_data *data = dev_get_drvdata(dev); | |
1062 | long val; | |
1063 | u8 reg; | |
1064 | ||
4a0d71cf GR |
1065 | /* |
1066 | * This check can go away if we ever support automatic fan speed | |
1067 | * control on newer chips. | |
1068 | */ | |
4f3f51bc JD |
1069 | if (!has_old_autopwm(data)) { |
1070 | dev_notice(dev, "Mapping change disabled for safety reasons\n"); | |
1071 | return -EINVAL; | |
1072 | } | |
1073 | ||
179c4fdb | 1074 | if (kstrtol(buf, 10, &val) < 0) |
94ac7ee6 JD |
1075 | return -EINVAL; |
1076 | ||
1077 | switch (val) { | |
1078 | case (1 << 0): | |
1079 | reg = 0x00; | |
1080 | break; | |
1081 | case (1 << 1): | |
1082 | reg = 0x01; | |
1083 | break; | |
1084 | case (1 << 2): | |
1085 | reg = 0x02; | |
1086 | break; | |
1087 | default: | |
1088 | return -EINVAL; | |
1089 | } | |
1090 | ||
1091 | mutex_lock(&data->update_lock); | |
1092 | data->pwm_temp_map[nr] = reg; | |
4a0d71cf GR |
1093 | /* |
1094 | * If we are in automatic mode, write the temp mapping immediately; | |
1095 | * otherwise, just store it for later use. | |
1096 | */ | |
94ac7ee6 JD |
1097 | if (data->pwm_ctrl[nr] & 0x80) { |
1098 | data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; | |
1099 | it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); | |
1100 | } | |
1101 | mutex_unlock(&data->update_lock); | |
1102 | return count; | |
1103 | } | |
1da177e4 | 1104 | |
4f3f51bc JD |
1105 | static ssize_t show_auto_pwm(struct device *dev, |
1106 | struct device_attribute *attr, char *buf) | |
1107 | { | |
1108 | struct it87_data *data = it87_update_device(dev); | |
1109 | struct sensor_device_attribute_2 *sensor_attr = | |
1110 | to_sensor_dev_attr_2(attr); | |
1111 | int nr = sensor_attr->nr; | |
1112 | int point = sensor_attr->index; | |
1113 | ||
44c1bcd4 JD |
1114 | return sprintf(buf, "%d\n", |
1115 | pwm_from_reg(data, data->auto_pwm[nr][point])); | |
4f3f51bc JD |
1116 | } |
1117 | ||
1118 | static ssize_t set_auto_pwm(struct device *dev, | |
1119 | struct device_attribute *attr, const char *buf, size_t count) | |
1120 | { | |
1121 | struct it87_data *data = dev_get_drvdata(dev); | |
1122 | struct sensor_device_attribute_2 *sensor_attr = | |
1123 | to_sensor_dev_attr_2(attr); | |
1124 | int nr = sensor_attr->nr; | |
1125 | int point = sensor_attr->index; | |
1126 | long val; | |
1127 | ||
179c4fdb | 1128 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) |
4f3f51bc JD |
1129 | return -EINVAL; |
1130 | ||
1131 | mutex_lock(&data->update_lock); | |
44c1bcd4 | 1132 | data->auto_pwm[nr][point] = pwm_to_reg(data, val); |
4f3f51bc JD |
1133 | it87_write_value(data, IT87_REG_AUTO_PWM(nr, point), |
1134 | data->auto_pwm[nr][point]); | |
1135 | mutex_unlock(&data->update_lock); | |
1136 | return count; | |
1137 | } | |
1138 | ||
1139 | static ssize_t show_auto_temp(struct device *dev, | |
1140 | struct device_attribute *attr, char *buf) | |
1141 | { | |
1142 | struct it87_data *data = it87_update_device(dev); | |
1143 | struct sensor_device_attribute_2 *sensor_attr = | |
1144 | to_sensor_dev_attr_2(attr); | |
1145 | int nr = sensor_attr->nr; | |
1146 | int point = sensor_attr->index; | |
1147 | ||
1148 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point])); | |
1149 | } | |
1150 | ||
1151 | static ssize_t set_auto_temp(struct device *dev, | |
1152 | struct device_attribute *attr, const char *buf, size_t count) | |
1153 | { | |
1154 | struct it87_data *data = dev_get_drvdata(dev); | |
1155 | struct sensor_device_attribute_2 *sensor_attr = | |
1156 | to_sensor_dev_attr_2(attr); | |
1157 | int nr = sensor_attr->nr; | |
1158 | int point = sensor_attr->index; | |
1159 | long val; | |
1160 | ||
179c4fdb | 1161 | if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000) |
4f3f51bc JD |
1162 | return -EINVAL; |
1163 | ||
1164 | mutex_lock(&data->update_lock); | |
1165 | data->auto_temp[nr][point] = TEMP_TO_REG(val); | |
1166 | it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), | |
1167 | data->auto_temp[nr][point]); | |
1168 | mutex_unlock(&data->update_lock); | |
1169 | return count; | |
1170 | } | |
1171 | ||
e1169ba0 GR |
1172 | static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0); |
1173 | static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1174 | 0, 1); | |
1175 | static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1176 | set_fan_div, 0); | |
1177 | ||
1178 | static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0); | |
1179 | static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1180 | 1, 1); | |
1181 | static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1182 | set_fan_div, 1); | |
1183 | ||
1184 | static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0); | |
1185 | static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1186 | 2, 1); | |
1187 | static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1188 | set_fan_div, 2); | |
1189 | ||
1190 | static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0); | |
1191 | static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1192 | 3, 1); | |
1da177e4 | 1193 | |
e1169ba0 GR |
1194 | static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0); |
1195 | static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1196 | 4, 1); | |
1da177e4 | 1197 | |
c4458db3 GR |
1198 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, |
1199 | show_pwm_enable, set_pwm_enable, 0); | |
1200 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0); | |
1201 | static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq); | |
1202 | static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1203 | show_pwm_temp_map, set_pwm_temp_map, 0); | |
1204 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1205 | show_auto_pwm, set_auto_pwm, 0, 0); | |
1206 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1207 | show_auto_pwm, set_auto_pwm, 0, 1); | |
1208 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1209 | show_auto_pwm, set_auto_pwm, 0, 2); | |
1210 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO, | |
1211 | show_auto_pwm, NULL, 0, 3); | |
1212 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1213 | show_auto_temp, set_auto_temp, 0, 1); | |
1214 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1215 | show_auto_temp, set_auto_temp, 0, 0); | |
1216 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1217 | show_auto_temp, set_auto_temp, 0, 2); | |
1218 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1219 | show_auto_temp, set_auto_temp, 0, 3); | |
1220 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1221 | show_auto_temp, set_auto_temp, 0, 4); | |
1222 | ||
1223 | static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
1224 | show_pwm_enable, set_pwm_enable, 1); | |
1225 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1); | |
1226 | static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL); | |
1227 | static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1228 | show_pwm_temp_map, set_pwm_temp_map, 1); | |
1229 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1230 | show_auto_pwm, set_auto_pwm, 1, 0); | |
1231 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1232 | show_auto_pwm, set_auto_pwm, 1, 1); | |
1233 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1234 | show_auto_pwm, set_auto_pwm, 1, 2); | |
1235 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO, | |
1236 | show_auto_pwm, NULL, 1, 3); | |
1237 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1238 | show_auto_temp, set_auto_temp, 1, 1); | |
1239 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1240 | show_auto_temp, set_auto_temp, 1, 0); | |
1241 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1242 | show_auto_temp, set_auto_temp, 1, 2); | |
1243 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1244 | show_auto_temp, set_auto_temp, 1, 3); | |
1245 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1246 | show_auto_temp, set_auto_temp, 1, 4); | |
1247 | ||
1248 | static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, | |
1249 | show_pwm_enable, set_pwm_enable, 2); | |
1250 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2); | |
1251 | static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL); | |
1252 | static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1253 | show_pwm_temp_map, set_pwm_temp_map, 2); | |
1254 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1255 | show_auto_pwm, set_auto_pwm, 2, 0); | |
1256 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1257 | show_auto_pwm, set_auto_pwm, 2, 1); | |
1258 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1259 | show_auto_pwm, set_auto_pwm, 2, 2); | |
1260 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO, | |
1261 | show_auto_pwm, NULL, 2, 3); | |
1262 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1263 | show_auto_temp, set_auto_temp, 2, 1); | |
1264 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1265 | show_auto_temp, set_auto_temp, 2, 0); | |
1266 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1267 | show_auto_temp, set_auto_temp, 2, 2); | |
1268 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1269 | show_auto_temp, set_auto_temp, 2, 3); | |
1270 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1271 | show_auto_temp, set_auto_temp, 2, 4); | |
1da177e4 LT |
1272 | |
1273 | /* Alarms */ | |
5f2dc798 JD |
1274 | static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, |
1275 | char *buf) | |
1da177e4 LT |
1276 | { |
1277 | struct it87_data *data = it87_update_device(dev); | |
68188ba7 | 1278 | return sprintf(buf, "%u\n", data->alarms); |
1da177e4 | 1279 | } |
1d66c64c | 1280 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); |
1da177e4 | 1281 | |
0124dd78 JD |
1282 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, |
1283 | char *buf) | |
1284 | { | |
1285 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1286 | struct it87_data *data = it87_update_device(dev); | |
1287 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
1288 | } | |
3d30f9e6 JD |
1289 | |
1290 | static ssize_t clear_intrusion(struct device *dev, struct device_attribute | |
1291 | *attr, const char *buf, size_t count) | |
1292 | { | |
1293 | struct it87_data *data = dev_get_drvdata(dev); | |
1294 | long val; | |
1295 | int config; | |
1296 | ||
179c4fdb | 1297 | if (kstrtol(buf, 10, &val) < 0 || val != 0) |
3d30f9e6 JD |
1298 | return -EINVAL; |
1299 | ||
1300 | mutex_lock(&data->update_lock); | |
1301 | config = it87_read_value(data, IT87_REG_CONFIG); | |
1302 | if (config < 0) { | |
1303 | count = config; | |
1304 | } else { | |
1305 | config |= 1 << 5; | |
1306 | it87_write_value(data, IT87_REG_CONFIG, config); | |
1307 | /* Invalidate cache to force re-read */ | |
1308 | data->valid = 0; | |
1309 | } | |
1310 | mutex_unlock(&data->update_lock); | |
1311 | ||
1312 | return count; | |
1313 | } | |
1314 | ||
0124dd78 JD |
1315 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8); |
1316 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9); | |
1317 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10); | |
1318 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11); | |
1319 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12); | |
1320 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13); | |
1321 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14); | |
1322 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15); | |
1323 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0); | |
1324 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1); | |
1325 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2); | |
1326 | static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3); | |
1327 | static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6); | |
1328 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16); | |
1329 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17); | |
1330 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18); | |
3d30f9e6 JD |
1331 | static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR, |
1332 | show_alarm, clear_intrusion, 4); | |
0124dd78 | 1333 | |
d9b327c3 JD |
1334 | static ssize_t show_beep(struct device *dev, struct device_attribute *attr, |
1335 | char *buf) | |
1336 | { | |
1337 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1338 | struct it87_data *data = it87_update_device(dev); | |
1339 | return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1); | |
1340 | } | |
1341 | static ssize_t set_beep(struct device *dev, struct device_attribute *attr, | |
1342 | const char *buf, size_t count) | |
1343 | { | |
1344 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1345 | struct it87_data *data = dev_get_drvdata(dev); | |
1346 | long val; | |
1347 | ||
179c4fdb | 1348 | if (kstrtol(buf, 10, &val) < 0 |
d9b327c3 JD |
1349 | || (val != 0 && val != 1)) |
1350 | return -EINVAL; | |
1351 | ||
1352 | mutex_lock(&data->update_lock); | |
1353 | data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); | |
1354 | if (val) | |
1355 | data->beeps |= (1 << bitnr); | |
1356 | else | |
1357 | data->beeps &= ~(1 << bitnr); | |
1358 | it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps); | |
1359 | mutex_unlock(&data->update_lock); | |
1360 | return count; | |
1361 | } | |
1362 | ||
1363 | static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, | |
1364 | show_beep, set_beep, 1); | |
1365 | static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1); | |
1366 | static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1); | |
1367 | static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1); | |
1368 | static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1); | |
1369 | static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1); | |
1370 | static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1); | |
1371 | static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1); | |
1372 | /* fanX_beep writability is set later */ | |
1373 | static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0); | |
1374 | static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0); | |
1375 | static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0); | |
1376 | static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0); | |
1377 | static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0); | |
1378 | static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, | |
1379 | show_beep, set_beep, 2); | |
1380 | static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2); | |
1381 | static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2); | |
1382 | ||
5f2dc798 JD |
1383 | static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr, |
1384 | char *buf) | |
1da177e4 | 1385 | { |
90d6619a | 1386 | struct it87_data *data = dev_get_drvdata(dev); |
a7be58a1 | 1387 | return sprintf(buf, "%u\n", data->vrm); |
1da177e4 | 1388 | } |
5f2dc798 JD |
1389 | static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr, |
1390 | const char *buf, size_t count) | |
1da177e4 | 1391 | { |
b74f3fdd | 1392 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 JD |
1393 | unsigned long val; |
1394 | ||
179c4fdb | 1395 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 1396 | return -EINVAL; |
1da177e4 | 1397 | |
1da177e4 LT |
1398 | data->vrm = val; |
1399 | ||
1400 | return count; | |
1401 | } | |
1402 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
1da177e4 | 1403 | |
5f2dc798 JD |
1404 | static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr, |
1405 | char *buf) | |
1da177e4 LT |
1406 | { |
1407 | struct it87_data *data = it87_update_device(dev); | |
1408 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
1409 | } | |
1410 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
87808be4 | 1411 | |
738e5e05 JD |
1412 | static ssize_t show_label(struct device *dev, struct device_attribute *attr, |
1413 | char *buf) | |
1414 | { | |
3c4c4971 | 1415 | static const char * const labels[] = { |
738e5e05 JD |
1416 | "+5V", |
1417 | "5VSB", | |
1418 | "Vbat", | |
1419 | }; | |
3c4c4971 | 1420 | static const char * const labels_it8721[] = { |
44c1bcd4 JD |
1421 | "+3.3V", |
1422 | "3VSB", | |
1423 | "Vbat", | |
1424 | }; | |
1425 | struct it87_data *data = dev_get_drvdata(dev); | |
738e5e05 JD |
1426 | int nr = to_sensor_dev_attr(attr)->index; |
1427 | ||
16b5dda2 JD |
1428 | return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr] |
1429 | : labels[nr]); | |
738e5e05 JD |
1430 | } |
1431 | static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0); | |
1432 | static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1); | |
1433 | static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2); | |
7183ae8c | 1434 | /* special AVCC3 IT8603E in9 */ |
c145d5c6 | 1435 | static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0); |
738e5e05 | 1436 | |
b74f3fdd | 1437 | static ssize_t show_name(struct device *dev, struct device_attribute |
1438 | *devattr, char *buf) | |
1439 | { | |
1440 | struct it87_data *data = dev_get_drvdata(dev); | |
1441 | return sprintf(buf, "%s\n", data->name); | |
1442 | } | |
1443 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
1444 | ||
c145d5c6 | 1445 | static struct attribute *it87_attributes_in[10][5] = { |
9172b5d1 | 1446 | { |
87808be4 | 1447 | &sensor_dev_attr_in0_input.dev_attr.attr, |
87808be4 | 1448 | &sensor_dev_attr_in0_min.dev_attr.attr, |
87808be4 | 1449 | &sensor_dev_attr_in0_max.dev_attr.attr, |
0124dd78 | 1450 | &sensor_dev_attr_in0_alarm.dev_attr.attr, |
9172b5d1 GR |
1451 | NULL |
1452 | }, { | |
1453 | &sensor_dev_attr_in1_input.dev_attr.attr, | |
1454 | &sensor_dev_attr_in1_min.dev_attr.attr, | |
1455 | &sensor_dev_attr_in1_max.dev_attr.attr, | |
0124dd78 | 1456 | &sensor_dev_attr_in1_alarm.dev_attr.attr, |
9172b5d1 GR |
1457 | NULL |
1458 | }, { | |
1459 | &sensor_dev_attr_in2_input.dev_attr.attr, | |
1460 | &sensor_dev_attr_in2_min.dev_attr.attr, | |
1461 | &sensor_dev_attr_in2_max.dev_attr.attr, | |
0124dd78 | 1462 | &sensor_dev_attr_in2_alarm.dev_attr.attr, |
9172b5d1 GR |
1463 | NULL |
1464 | }, { | |
1465 | &sensor_dev_attr_in3_input.dev_attr.attr, | |
1466 | &sensor_dev_attr_in3_min.dev_attr.attr, | |
1467 | &sensor_dev_attr_in3_max.dev_attr.attr, | |
0124dd78 | 1468 | &sensor_dev_attr_in3_alarm.dev_attr.attr, |
9172b5d1 GR |
1469 | NULL |
1470 | }, { | |
1471 | &sensor_dev_attr_in4_input.dev_attr.attr, | |
1472 | &sensor_dev_attr_in4_min.dev_attr.attr, | |
1473 | &sensor_dev_attr_in4_max.dev_attr.attr, | |
0124dd78 | 1474 | &sensor_dev_attr_in4_alarm.dev_attr.attr, |
9172b5d1 GR |
1475 | NULL |
1476 | }, { | |
1477 | &sensor_dev_attr_in5_input.dev_attr.attr, | |
1478 | &sensor_dev_attr_in5_min.dev_attr.attr, | |
1479 | &sensor_dev_attr_in5_max.dev_attr.attr, | |
0124dd78 | 1480 | &sensor_dev_attr_in5_alarm.dev_attr.attr, |
9172b5d1 GR |
1481 | NULL |
1482 | }, { | |
1483 | &sensor_dev_attr_in6_input.dev_attr.attr, | |
1484 | &sensor_dev_attr_in6_min.dev_attr.attr, | |
1485 | &sensor_dev_attr_in6_max.dev_attr.attr, | |
0124dd78 | 1486 | &sensor_dev_attr_in6_alarm.dev_attr.attr, |
9172b5d1 GR |
1487 | NULL |
1488 | }, { | |
1489 | &sensor_dev_attr_in7_input.dev_attr.attr, | |
1490 | &sensor_dev_attr_in7_min.dev_attr.attr, | |
1491 | &sensor_dev_attr_in7_max.dev_attr.attr, | |
0124dd78 | 1492 | &sensor_dev_attr_in7_alarm.dev_attr.attr, |
9172b5d1 GR |
1493 | NULL |
1494 | }, { | |
1495 | &sensor_dev_attr_in8_input.dev_attr.attr, | |
1496 | NULL | |
c145d5c6 RM |
1497 | }, { |
1498 | &sensor_dev_attr_in9_input.dev_attr.attr, | |
1499 | NULL | |
9172b5d1 | 1500 | } }; |
87808be4 | 1501 | |
c145d5c6 | 1502 | static const struct attribute_group it87_group_in[10] = { |
9172b5d1 GR |
1503 | { .attrs = it87_attributes_in[0] }, |
1504 | { .attrs = it87_attributes_in[1] }, | |
1505 | { .attrs = it87_attributes_in[2] }, | |
1506 | { .attrs = it87_attributes_in[3] }, | |
1507 | { .attrs = it87_attributes_in[4] }, | |
1508 | { .attrs = it87_attributes_in[5] }, | |
1509 | { .attrs = it87_attributes_in[6] }, | |
1510 | { .attrs = it87_attributes_in[7] }, | |
1511 | { .attrs = it87_attributes_in[8] }, | |
c145d5c6 | 1512 | { .attrs = it87_attributes_in[9] }, |
9172b5d1 GR |
1513 | }; |
1514 | ||
4573acbc GR |
1515 | static struct attribute *it87_attributes_temp[3][6] = { |
1516 | { | |
87808be4 | 1517 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
87808be4 | 1518 | &sensor_dev_attr_temp1_max.dev_attr.attr, |
87808be4 | 1519 | &sensor_dev_attr_temp1_min.dev_attr.attr, |
87808be4 | 1520 | &sensor_dev_attr_temp1_type.dev_attr.attr, |
0124dd78 | 1521 | &sensor_dev_attr_temp1_alarm.dev_attr.attr, |
4573acbc GR |
1522 | NULL |
1523 | } , { | |
1524 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
1525 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
1526 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
1527 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
0124dd78 | 1528 | &sensor_dev_attr_temp2_alarm.dev_attr.attr, |
4573acbc GR |
1529 | NULL |
1530 | } , { | |
1531 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
1532 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
1533 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
1534 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
0124dd78 | 1535 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, |
4573acbc GR |
1536 | NULL |
1537 | } }; | |
1538 | ||
1539 | static const struct attribute_group it87_group_temp[3] = { | |
1540 | { .attrs = it87_attributes_temp[0] }, | |
1541 | { .attrs = it87_attributes_temp[1] }, | |
1542 | { .attrs = it87_attributes_temp[2] }, | |
1543 | }; | |
87808be4 | 1544 | |
161d898a GR |
1545 | static struct attribute *it87_attributes_temp_offset[] = { |
1546 | &sensor_dev_attr_temp1_offset.dev_attr.attr, | |
1547 | &sensor_dev_attr_temp2_offset.dev_attr.attr, | |
1548 | &sensor_dev_attr_temp3_offset.dev_attr.attr, | |
1549 | }; | |
1550 | ||
4573acbc | 1551 | static struct attribute *it87_attributes[] = { |
87808be4 | 1552 | &dev_attr_alarms.attr, |
3d30f9e6 | 1553 | &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, |
b74f3fdd | 1554 | &dev_attr_name.attr, |
87808be4 JD |
1555 | NULL |
1556 | }; | |
1557 | ||
1558 | static const struct attribute_group it87_group = { | |
1559 | .attrs = it87_attributes, | |
1560 | }; | |
1561 | ||
9172b5d1 | 1562 | static struct attribute *it87_attributes_in_beep[] = { |
d9b327c3 JD |
1563 | &sensor_dev_attr_in0_beep.dev_attr.attr, |
1564 | &sensor_dev_attr_in1_beep.dev_attr.attr, | |
1565 | &sensor_dev_attr_in2_beep.dev_attr.attr, | |
1566 | &sensor_dev_attr_in3_beep.dev_attr.attr, | |
1567 | &sensor_dev_attr_in4_beep.dev_attr.attr, | |
1568 | &sensor_dev_attr_in5_beep.dev_attr.attr, | |
1569 | &sensor_dev_attr_in6_beep.dev_attr.attr, | |
1570 | &sensor_dev_attr_in7_beep.dev_attr.attr, | |
c145d5c6 RM |
1571 | NULL, |
1572 | NULL, | |
9172b5d1 | 1573 | }; |
d9b327c3 | 1574 | |
4573acbc | 1575 | static struct attribute *it87_attributes_temp_beep[] = { |
d9b327c3 JD |
1576 | &sensor_dev_attr_temp1_beep.dev_attr.attr, |
1577 | &sensor_dev_attr_temp2_beep.dev_attr.attr, | |
1578 | &sensor_dev_attr_temp3_beep.dev_attr.attr, | |
d9b327c3 JD |
1579 | }; |
1580 | ||
e1169ba0 GR |
1581 | static struct attribute *it87_attributes_fan[5][3+1] = { { |
1582 | &sensor_dev_attr_fan1_input.dev_attr.attr, | |
1583 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
723a0aa0 JD |
1584 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, |
1585 | NULL | |
1586 | }, { | |
e1169ba0 GR |
1587 | &sensor_dev_attr_fan2_input.dev_attr.attr, |
1588 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
723a0aa0 JD |
1589 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, |
1590 | NULL | |
1591 | }, { | |
e1169ba0 GR |
1592 | &sensor_dev_attr_fan3_input.dev_attr.attr, |
1593 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
723a0aa0 JD |
1594 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, |
1595 | NULL | |
1596 | }, { | |
e1169ba0 GR |
1597 | &sensor_dev_attr_fan4_input.dev_attr.attr, |
1598 | &sensor_dev_attr_fan4_min.dev_attr.attr, | |
723a0aa0 JD |
1599 | &sensor_dev_attr_fan4_alarm.dev_attr.attr, |
1600 | NULL | |
1601 | }, { | |
e1169ba0 GR |
1602 | &sensor_dev_attr_fan5_input.dev_attr.attr, |
1603 | &sensor_dev_attr_fan5_min.dev_attr.attr, | |
723a0aa0 JD |
1604 | &sensor_dev_attr_fan5_alarm.dev_attr.attr, |
1605 | NULL | |
1606 | } }; | |
1607 | ||
e1169ba0 GR |
1608 | static const struct attribute_group it87_group_fan[5] = { |
1609 | { .attrs = it87_attributes_fan[0] }, | |
1610 | { .attrs = it87_attributes_fan[1] }, | |
1611 | { .attrs = it87_attributes_fan[2] }, | |
1612 | { .attrs = it87_attributes_fan[3] }, | |
1613 | { .attrs = it87_attributes_fan[4] }, | |
723a0aa0 | 1614 | }; |
87808be4 | 1615 | |
e1169ba0 | 1616 | static const struct attribute *it87_attributes_fan_div[] = { |
87808be4 | 1617 | &sensor_dev_attr_fan1_div.dev_attr.attr, |
87808be4 | 1618 | &sensor_dev_attr_fan2_div.dev_attr.attr, |
87808be4 | 1619 | &sensor_dev_attr_fan3_div.dev_attr.attr, |
723a0aa0 JD |
1620 | }; |
1621 | ||
723a0aa0 | 1622 | static struct attribute *it87_attributes_pwm[3][4+1] = { { |
87808be4 | 1623 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, |
87808be4 | 1624 | &sensor_dev_attr_pwm1.dev_attr.attr, |
d5b0b5d6 | 1625 | &dev_attr_pwm1_freq.attr, |
94ac7ee6 | 1626 | &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1627 | NULL |
1628 | }, { | |
1629 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1630 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1631 | &dev_attr_pwm2_freq.attr, | |
94ac7ee6 | 1632 | &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1633 | NULL |
1634 | }, { | |
1635 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1636 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1637 | &dev_attr_pwm3_freq.attr, | |
94ac7ee6 | 1638 | &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1639 | NULL |
1640 | } }; | |
87808be4 | 1641 | |
723a0aa0 JD |
1642 | static const struct attribute_group it87_group_pwm[3] = { |
1643 | { .attrs = it87_attributes_pwm[0] }, | |
1644 | { .attrs = it87_attributes_pwm[1] }, | |
1645 | { .attrs = it87_attributes_pwm[2] }, | |
1646 | }; | |
1647 | ||
4f3f51bc JD |
1648 | static struct attribute *it87_attributes_autopwm[3][9+1] = { { |
1649 | &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, | |
1650 | &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, | |
1651 | &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr, | |
1652 | &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr, | |
1653 | &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, | |
1654 | &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr, | |
1655 | &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, | |
1656 | &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, | |
1657 | &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr, | |
1658 | NULL | |
1659 | }, { | |
1660 | &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, | |
1661 | &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, | |
1662 | &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr, | |
1663 | &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr, | |
1664 | &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr, | |
1665 | &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr, | |
1666 | &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr, | |
1667 | &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr, | |
1668 | &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr, | |
1669 | NULL | |
1670 | }, { | |
1671 | &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, | |
1672 | &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, | |
1673 | &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr, | |
1674 | &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr, | |
1675 | &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr, | |
1676 | &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr, | |
1677 | &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr, | |
1678 | &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr, | |
1679 | &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr, | |
1680 | NULL | |
1681 | } }; | |
1682 | ||
1683 | static const struct attribute_group it87_group_autopwm[3] = { | |
1684 | { .attrs = it87_attributes_autopwm[0] }, | |
1685 | { .attrs = it87_attributes_autopwm[1] }, | |
1686 | { .attrs = it87_attributes_autopwm[2] }, | |
1687 | }; | |
1688 | ||
d9b327c3 JD |
1689 | static struct attribute *it87_attributes_fan_beep[] = { |
1690 | &sensor_dev_attr_fan1_beep.dev_attr.attr, | |
1691 | &sensor_dev_attr_fan2_beep.dev_attr.attr, | |
1692 | &sensor_dev_attr_fan3_beep.dev_attr.attr, | |
1693 | &sensor_dev_attr_fan4_beep.dev_attr.attr, | |
1694 | &sensor_dev_attr_fan5_beep.dev_attr.attr, | |
1695 | }; | |
1696 | ||
6a8d7acf | 1697 | static struct attribute *it87_attributes_vid[] = { |
87808be4 JD |
1698 | &dev_attr_vrm.attr, |
1699 | &dev_attr_cpu0_vid.attr, | |
1700 | NULL | |
1701 | }; | |
1702 | ||
6a8d7acf JD |
1703 | static const struct attribute_group it87_group_vid = { |
1704 | .attrs = it87_attributes_vid, | |
87808be4 | 1705 | }; |
1da177e4 | 1706 | |
738e5e05 JD |
1707 | static struct attribute *it87_attributes_label[] = { |
1708 | &sensor_dev_attr_in3_label.dev_attr.attr, | |
1709 | &sensor_dev_attr_in7_label.dev_attr.attr, | |
1710 | &sensor_dev_attr_in8_label.dev_attr.attr, | |
c145d5c6 | 1711 | &sensor_dev_attr_in9_label.dev_attr.attr, |
738e5e05 JD |
1712 | NULL |
1713 | }; | |
1714 | ||
1715 | static const struct attribute_group it87_group_label = { | |
fa8b6975 | 1716 | .attrs = it87_attributes_label, |
738e5e05 JD |
1717 | }; |
1718 | ||
2d8672c5 | 1719 | /* SuperIO detection - will change isa_address if a chip is found */ |
b74f3fdd | 1720 | static int __init it87_find(unsigned short *address, |
1721 | struct it87_sio_data *sio_data) | |
1da177e4 | 1722 | { |
5b0380c9 | 1723 | int err; |
b74f3fdd | 1724 | u16 chip_type; |
98dd22c3 | 1725 | const char *board_vendor, *board_name; |
1da177e4 | 1726 | |
5b0380c9 NG |
1727 | err = superio_enter(); |
1728 | if (err) | |
1729 | return err; | |
1730 | ||
1731 | err = -ENODEV; | |
67b671bc | 1732 | chip_type = force_id ? force_id : superio_inw(DEVID); |
b74f3fdd | 1733 | |
1734 | switch (chip_type) { | |
1735 | case IT8705F_DEVID: | |
1736 | sio_data->type = it87; | |
1737 | break; | |
1738 | case IT8712F_DEVID: | |
1739 | sio_data->type = it8712; | |
1740 | break; | |
1741 | case IT8716F_DEVID: | |
1742 | case IT8726F_DEVID: | |
1743 | sio_data->type = it8716; | |
1744 | break; | |
1745 | case IT8718F_DEVID: | |
1746 | sio_data->type = it8718; | |
1747 | break; | |
b4da93e4 JMS |
1748 | case IT8720F_DEVID: |
1749 | sio_data->type = it8720; | |
1750 | break; | |
44c1bcd4 JD |
1751 | case IT8721F_DEVID: |
1752 | sio_data->type = it8721; | |
1753 | break; | |
16b5dda2 JD |
1754 | case IT8728F_DEVID: |
1755 | sio_data->type = it8728; | |
1756 | break; | |
b0636707 GR |
1757 | case IT8771E_DEVID: |
1758 | sio_data->type = it8771; | |
1759 | break; | |
1760 | case IT8772E_DEVID: | |
1761 | sio_data->type = it8772; | |
1762 | break; | |
0531d98b GR |
1763 | case IT8782F_DEVID: |
1764 | sio_data->type = it8782; | |
1765 | break; | |
1766 | case IT8783E_DEVID: | |
1767 | sio_data->type = it8783; | |
1768 | break; | |
7183ae8c | 1769 | case IT8603E_DEVID: |
c145d5c6 RM |
1770 | sio_data->type = it8603; |
1771 | break; | |
b74f3fdd | 1772 | case 0xffff: /* No device at all */ |
1773 | goto exit; | |
1774 | default: | |
a8ca1037 | 1775 | pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type); |
b74f3fdd | 1776 | goto exit; |
1777 | } | |
1da177e4 | 1778 | |
87673dd7 | 1779 | superio_select(PME); |
1da177e4 | 1780 | if (!(superio_inb(IT87_ACT_REG) & 0x01)) { |
a8ca1037 | 1781 | pr_info("Device not activated, skipping\n"); |
1da177e4 LT |
1782 | goto exit; |
1783 | } | |
1784 | ||
1785 | *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1); | |
1786 | if (*address == 0) { | |
a8ca1037 | 1787 | pr_info("Base address not set, skipping\n"); |
1da177e4 LT |
1788 | goto exit; |
1789 | } | |
1790 | ||
1791 | err = 0; | |
0475169c | 1792 | sio_data->revision = superio_inb(DEVREV) & 0x0f; |
c145d5c6 | 1793 | pr_info("Found IT%04x%c chip at 0x%x, revision %d\n", chip_type, |
b523bb75 | 1794 | chip_type == 0x8771 || chip_type == 0x8772 || |
c145d5c6 RM |
1795 | chip_type == 0x8603 ? 'E' : 'F', *address, |
1796 | sio_data->revision); | |
1da177e4 | 1797 | |
738e5e05 JD |
1798 | /* in8 (Vbat) is always internal */ |
1799 | sio_data->internal = (1 << 2); | |
c145d5c6 RM |
1800 | /* Only the IT8603E has in9 */ |
1801 | if (sio_data->type != it8603) | |
1802 | sio_data->skip_in |= (1 << 9); | |
738e5e05 | 1803 | |
87673dd7 | 1804 | /* Read GPIO config and VID value from LDN 7 (GPIO) */ |
895ff267 JD |
1805 | if (sio_data->type == it87) { |
1806 | /* The IT8705F doesn't have VID pins at all */ | |
1807 | sio_data->skip_vid = 1; | |
d9b327c3 JD |
1808 | |
1809 | /* The IT8705F has a different LD number for GPIO */ | |
1810 | superio_select(5); | |
1811 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
0531d98b | 1812 | } else if (sio_data->type == it8783) { |
088ce2ac | 1813 | int reg25, reg27, reg2a, reg2c, regef; |
0531d98b GR |
1814 | |
1815 | sio_data->skip_vid = 1; /* No VID */ | |
1816 | ||
1817 | superio_select(GPIO); | |
1818 | ||
1819 | reg25 = superio_inb(IT87_SIO_GPIO1_REG); | |
1820 | reg27 = superio_inb(IT87_SIO_GPIO3_REG); | |
088ce2ac GR |
1821 | reg2a = superio_inb(IT87_SIO_PINX1_REG); |
1822 | reg2c = superio_inb(IT87_SIO_PINX2_REG); | |
1823 | regef = superio_inb(IT87_SIO_SPI_REG); | |
0531d98b | 1824 | |
0531d98b | 1825 | /* Check if fan3 is there or not */ |
088ce2ac | 1826 | if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2))) |
0531d98b GR |
1827 | sio_data->skip_fan |= (1 << 2); |
1828 | if ((reg25 & (1 << 4)) | |
088ce2ac | 1829 | || (!(reg2a & (1 << 1)) && (regef & (1 << 0)))) |
0531d98b GR |
1830 | sio_data->skip_pwm |= (1 << 2); |
1831 | ||
1832 | /* Check if fan2 is there or not */ | |
1833 | if (reg27 & (1 << 7)) | |
1834 | sio_data->skip_fan |= (1 << 1); | |
1835 | if (reg27 & (1 << 3)) | |
1836 | sio_data->skip_pwm |= (1 << 1); | |
1837 | ||
1838 | /* VIN5 */ | |
088ce2ac | 1839 | if ((reg27 & (1 << 0)) || (reg2c & (1 << 2))) |
9172b5d1 | 1840 | sio_data->skip_in |= (1 << 5); /* No VIN5 */ |
0531d98b GR |
1841 | |
1842 | /* VIN6 */ | |
9172b5d1 GR |
1843 | if (reg27 & (1 << 1)) |
1844 | sio_data->skip_in |= (1 << 6); /* No VIN6 */ | |
0531d98b GR |
1845 | |
1846 | /* | |
1847 | * VIN7 | |
1848 | * Does not depend on bit 2 of Reg2C, contrary to datasheet. | |
1849 | */ | |
9172b5d1 GR |
1850 | if (reg27 & (1 << 2)) { |
1851 | /* | |
1852 | * The data sheet is a bit unclear regarding the | |
1853 | * internal voltage divider for VCCH5V. It says | |
1854 | * "This bit enables and switches VIN7 (pin 91) to the | |
1855 | * internal voltage divider for VCCH5V". | |
1856 | * This is different to other chips, where the internal | |
1857 | * voltage divider would connect VIN7 to an internal | |
1858 | * voltage source. Maybe that is the case here as well. | |
1859 | * | |
1860 | * Since we don't know for sure, re-route it if that is | |
1861 | * not the case, and ask the user to report if the | |
1862 | * resulting voltage is sane. | |
1863 | */ | |
088ce2ac GR |
1864 | if (!(reg2c & (1 << 1))) { |
1865 | reg2c |= (1 << 1); | |
1866 | superio_outb(IT87_SIO_PINX2_REG, reg2c); | |
9172b5d1 GR |
1867 | pr_notice("Routing internal VCCH5V to in7.\n"); |
1868 | } | |
1869 | pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n"); | |
1870 | pr_notice("Please report if it displays a reasonable voltage.\n"); | |
1871 | } | |
0531d98b | 1872 | |
088ce2ac | 1873 | if (reg2c & (1 << 0)) |
0531d98b | 1874 | sio_data->internal |= (1 << 0); |
088ce2ac | 1875 | if (reg2c & (1 << 1)) |
0531d98b GR |
1876 | sio_data->internal |= (1 << 1); |
1877 | ||
1878 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
c145d5c6 RM |
1879 | } else if (sio_data->type == it8603) { |
1880 | int reg27, reg29; | |
1881 | ||
1882 | sio_data->skip_vid = 1; /* No VID */ | |
1883 | superio_select(GPIO); | |
0531d98b | 1884 | |
c145d5c6 RM |
1885 | reg27 = superio_inb(IT87_SIO_GPIO3_REG); |
1886 | ||
1887 | /* Check if fan3 is there or not */ | |
1888 | if (reg27 & (1 << 6)) | |
1889 | sio_data->skip_pwm |= (1 << 2); | |
1890 | if (reg27 & (1 << 7)) | |
1891 | sio_data->skip_fan |= (1 << 2); | |
1892 | ||
1893 | /* Check if fan2 is there or not */ | |
1894 | reg29 = superio_inb(IT87_SIO_GPIO5_REG); | |
1895 | if (reg29 & (1 << 1)) | |
1896 | sio_data->skip_pwm |= (1 << 1); | |
1897 | if (reg29 & (1 << 2)) | |
1898 | sio_data->skip_fan |= (1 << 1); | |
1899 | ||
1900 | sio_data->skip_in |= (1 << 5); /* No VIN5 */ | |
1901 | sio_data->skip_in |= (1 << 6); /* No VIN6 */ | |
1902 | ||
1903 | /* no fan4 */ | |
1904 | sio_data->skip_pwm |= (1 << 3); | |
1905 | sio_data->skip_fan |= (1 << 3); | |
1906 | ||
1907 | sio_data->internal |= (1 << 1); /* in7 is VSB */ | |
1908 | sio_data->internal |= (1 << 3); /* in9 is AVCC */ | |
1909 | ||
1910 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
895ff267 | 1911 | } else { |
87673dd7 | 1912 | int reg; |
9172b5d1 | 1913 | bool uart6; |
87673dd7 JD |
1914 | |
1915 | superio_select(GPIO); | |
44c1bcd4 | 1916 | |
895ff267 | 1917 | reg = superio_inb(IT87_SIO_GPIO3_REG); |
0531d98b | 1918 | if (sio_data->type == it8721 || sio_data->type == it8728 || |
b0636707 | 1919 | sio_data->type == it8771 || sio_data->type == it8772 || |
0531d98b | 1920 | sio_data->type == it8782) { |
16b5dda2 | 1921 | /* |
0531d98b | 1922 | * IT8721F/IT8758E, and IT8782F don't have VID pins |
b0636707 | 1923 | * at all, not sure about the IT8728F and compatibles. |
16b5dda2 | 1924 | */ |
895ff267 | 1925 | sio_data->skip_vid = 1; |
44c1bcd4 JD |
1926 | } else { |
1927 | /* We need at least 4 VID pins */ | |
1928 | if (reg & 0x0f) { | |
a8ca1037 | 1929 | pr_info("VID is disabled (pins used for GPIO)\n"); |
44c1bcd4 JD |
1930 | sio_data->skip_vid = 1; |
1931 | } | |
895ff267 JD |
1932 | } |
1933 | ||
591ec650 JD |
1934 | /* Check if fan3 is there or not */ |
1935 | if (reg & (1 << 6)) | |
1936 | sio_data->skip_pwm |= (1 << 2); | |
1937 | if (reg & (1 << 7)) | |
1938 | sio_data->skip_fan |= (1 << 2); | |
1939 | ||
1940 | /* Check if fan2 is there or not */ | |
1941 | reg = superio_inb(IT87_SIO_GPIO5_REG); | |
1942 | if (reg & (1 << 1)) | |
1943 | sio_data->skip_pwm |= (1 << 1); | |
1944 | if (reg & (1 << 2)) | |
1945 | sio_data->skip_fan |= (1 << 1); | |
1946 | ||
895ff267 JD |
1947 | if ((sio_data->type == it8718 || sio_data->type == it8720) |
1948 | && !(sio_data->skip_vid)) | |
b74f3fdd | 1949 | sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); |
87673dd7 JD |
1950 | |
1951 | reg = superio_inb(IT87_SIO_PINX2_REG); | |
9172b5d1 GR |
1952 | |
1953 | uart6 = sio_data->type == it8782 && (reg & (1 << 2)); | |
1954 | ||
436cad2a JD |
1955 | /* |
1956 | * The IT8720F has no VIN7 pin, so VCCH should always be | |
1957 | * routed internally to VIN7 with an internal divider. | |
1958 | * Curiously, there still is a configuration bit to control | |
1959 | * this, which means it can be set incorrectly. And even | |
1960 | * more curiously, many boards out there are improperly | |
1961 | * configured, even though the IT8720F datasheet claims | |
1962 | * that the internal routing of VCCH to VIN7 is the default | |
1963 | * setting. So we force the internal routing in this case. | |
0531d98b GR |
1964 | * |
1965 | * On IT8782F, VIN7 is multiplexed with one of the UART6 pins. | |
9172b5d1 GR |
1966 | * If UART6 is enabled, re-route VIN7 to the internal divider |
1967 | * if that is not already the case. | |
436cad2a | 1968 | */ |
9172b5d1 | 1969 | if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) { |
436cad2a JD |
1970 | reg |= (1 << 1); |
1971 | superio_outb(IT87_SIO_PINX2_REG, reg); | |
a8ca1037 | 1972 | pr_notice("Routing internal VCCH to in7\n"); |
436cad2a | 1973 | } |
87673dd7 | 1974 | if (reg & (1 << 0)) |
738e5e05 | 1975 | sio_data->internal |= (1 << 0); |
16b5dda2 | 1976 | if ((reg & (1 << 1)) || sio_data->type == it8721 || |
b0636707 GR |
1977 | sio_data->type == it8728 || |
1978 | sio_data->type == it8771 || | |
1979 | sio_data->type == it8772) | |
738e5e05 | 1980 | sio_data->internal |= (1 << 1); |
d9b327c3 | 1981 | |
9172b5d1 GR |
1982 | /* |
1983 | * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7. | |
1984 | * While VIN7 can be routed to the internal voltage divider, | |
1985 | * VIN5 and VIN6 are not available if UART6 is enabled. | |
4573acbc GR |
1986 | * |
1987 | * Also, temp3 is not available if UART6 is enabled and TEMPIN3 | |
1988 | * is the temperature source. Since we can not read the | |
1989 | * temperature source here, skip_temp is preliminary. | |
9172b5d1 | 1990 | */ |
4573acbc | 1991 | if (uart6) { |
9172b5d1 | 1992 | sio_data->skip_in |= (1 << 5) | (1 << 6); |
4573acbc GR |
1993 | sio_data->skip_temp |= (1 << 2); |
1994 | } | |
9172b5d1 | 1995 | |
d9b327c3 | 1996 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; |
87673dd7 | 1997 | } |
d9b327c3 | 1998 | if (sio_data->beep_pin) |
a8ca1037 | 1999 | pr_info("Beeping is supported\n"); |
87673dd7 | 2000 | |
98dd22c3 JD |
2001 | /* Disable specific features based on DMI strings */ |
2002 | board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR); | |
2003 | board_name = dmi_get_system_info(DMI_BOARD_NAME); | |
2004 | if (board_vendor && board_name) { | |
2005 | if (strcmp(board_vendor, "nVIDIA") == 0 | |
2006 | && strcmp(board_name, "FN68PT") == 0) { | |
4a0d71cf GR |
2007 | /* |
2008 | * On the Shuttle SN68PT, FAN_CTL2 is apparently not | |
2009 | * connected to a fan, but to something else. One user | |
2010 | * has reported instant system power-off when changing | |
2011 | * the PWM2 duty cycle, so we disable it. | |
2012 | * I use the board name string as the trigger in case | |
2013 | * the same board is ever used in other systems. | |
2014 | */ | |
a8ca1037 | 2015 | pr_info("Disabling pwm2 due to hardware constraints\n"); |
98dd22c3 JD |
2016 | sio_data->skip_pwm = (1 << 1); |
2017 | } | |
2018 | } | |
2019 | ||
1da177e4 LT |
2020 | exit: |
2021 | superio_exit(); | |
2022 | return err; | |
2023 | } | |
2024 | ||
723a0aa0 JD |
2025 | static void it87_remove_files(struct device *dev) |
2026 | { | |
2027 | struct it87_data *data = platform_get_drvdata(pdev); | |
a8b3a3a5 | 2028 | struct it87_sio_data *sio_data = dev_get_platdata(dev); |
723a0aa0 JD |
2029 | int i; |
2030 | ||
2031 | sysfs_remove_group(&dev->kobj, &it87_group); | |
c145d5c6 | 2032 | for (i = 0; i < 10; i++) { |
9172b5d1 GR |
2033 | if (sio_data->skip_in & (1 << i)) |
2034 | continue; | |
2035 | sysfs_remove_group(&dev->kobj, &it87_group_in[i]); | |
2036 | if (it87_attributes_in_beep[i]) | |
2037 | sysfs_remove_file(&dev->kobj, | |
2038 | it87_attributes_in_beep[i]); | |
2039 | } | |
4573acbc GR |
2040 | for (i = 0; i < 3; i++) { |
2041 | if (!(data->has_temp & (1 << i))) | |
2042 | continue; | |
2043 | sysfs_remove_group(&dev->kobj, &it87_group_temp[i]); | |
161d898a GR |
2044 | if (has_temp_offset(data)) |
2045 | sysfs_remove_file(&dev->kobj, | |
2046 | it87_attributes_temp_offset[i]); | |
4573acbc GR |
2047 | if (sio_data->beep_pin) |
2048 | sysfs_remove_file(&dev->kobj, | |
2049 | it87_attributes_temp_beep[i]); | |
2050 | } | |
723a0aa0 JD |
2051 | for (i = 0; i < 5; i++) { |
2052 | if (!(data->has_fan & (1 << i))) | |
2053 | continue; | |
e1169ba0 | 2054 | sysfs_remove_group(&dev->kobj, &it87_group_fan[i]); |
d9b327c3 JD |
2055 | if (sio_data->beep_pin) |
2056 | sysfs_remove_file(&dev->kobj, | |
2057 | it87_attributes_fan_beep[i]); | |
e1169ba0 GR |
2058 | if (i < 3 && !has_16bit_fans(data)) |
2059 | sysfs_remove_file(&dev->kobj, | |
2060 | it87_attributes_fan_div[i]); | |
723a0aa0 JD |
2061 | } |
2062 | for (i = 0; i < 3; i++) { | |
2063 | if (sio_data->skip_pwm & (1 << 0)) | |
2064 | continue; | |
2065 | sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]); | |
4f3f51bc JD |
2066 | if (has_old_autopwm(data)) |
2067 | sysfs_remove_group(&dev->kobj, | |
2068 | &it87_group_autopwm[i]); | |
723a0aa0 | 2069 | } |
6a8d7acf JD |
2070 | if (!sio_data->skip_vid) |
2071 | sysfs_remove_group(&dev->kobj, &it87_group_vid); | |
738e5e05 | 2072 | sysfs_remove_group(&dev->kobj, &it87_group_label); |
723a0aa0 JD |
2073 | } |
2074 | ||
6c931ae1 | 2075 | static int it87_probe(struct platform_device *pdev) |
1da177e4 | 2076 | { |
1da177e4 | 2077 | struct it87_data *data; |
b74f3fdd | 2078 | struct resource *res; |
2079 | struct device *dev = &pdev->dev; | |
a8b3a3a5 | 2080 | struct it87_sio_data *sio_data = dev_get_platdata(dev); |
723a0aa0 | 2081 | int err = 0, i; |
1da177e4 | 2082 | int enable_pwm_interface; |
d9b327c3 | 2083 | int fan_beep_need_rw; |
b74f3fdd | 2084 | |
2085 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
62a1d05f GR |
2086 | if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT, |
2087 | DRVNAME)) { | |
b74f3fdd | 2088 | dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", |
2089 | (unsigned long)res->start, | |
87b4b663 | 2090 | (unsigned long)(res->start + IT87_EC_EXTENT - 1)); |
62a1d05f | 2091 | return -EBUSY; |
8e9afcbb | 2092 | } |
1da177e4 | 2093 | |
62a1d05f GR |
2094 | data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL); |
2095 | if (!data) | |
2096 | return -ENOMEM; | |
1da177e4 | 2097 | |
b74f3fdd | 2098 | data->addr = res->start; |
2099 | data->type = sio_data->type; | |
483db43e | 2100 | data->features = it87_devices[sio_data->type].features; |
5d8d2f2b | 2101 | data->peci_mask = it87_devices[sio_data->type].peci_mask; |
19529784 | 2102 | data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask; |
483db43e GR |
2103 | data->name = it87_devices[sio_data->type].name; |
2104 | /* | |
2105 | * IT8705F Datasheet 0.4.1, 3h == Version G. | |
2106 | * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J. | |
2107 | * These are the first revisions with 16-bit tachometer support. | |
2108 | */ | |
2109 | switch (data->type) { | |
2110 | case it87: | |
2111 | if (sio_data->revision >= 0x03) { | |
2112 | data->features &= ~FEAT_OLD_AUTOPWM; | |
2113 | data->features |= FEAT_16BIT_FANS; | |
2114 | } | |
2115 | break; | |
2116 | case it8712: | |
2117 | if (sio_data->revision >= 0x08) { | |
2118 | data->features &= ~FEAT_OLD_AUTOPWM; | |
2119 | data->features |= FEAT_16BIT_FANS; | |
2120 | } | |
2121 | break; | |
2122 | default: | |
2123 | break; | |
2124 | } | |
1da177e4 LT |
2125 | |
2126 | /* Now, we do the remaining detection. */ | |
b74f3fdd | 2127 | if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) |
62a1d05f GR |
2128 | || it87_read_value(data, IT87_REG_CHIPID) != 0x90) |
2129 | return -ENODEV; | |
1da177e4 | 2130 | |
b74f3fdd | 2131 | platform_set_drvdata(pdev, data); |
1da177e4 | 2132 | |
9a61bf63 | 2133 | mutex_init(&data->update_lock); |
1da177e4 | 2134 | |
1da177e4 | 2135 | /* Check PWM configuration */ |
b74f3fdd | 2136 | enable_pwm_interface = it87_check_pwm(dev); |
1da177e4 | 2137 | |
44c1bcd4 | 2138 | /* Starting with IT8721F, we handle scaling of internal voltages */ |
16b5dda2 | 2139 | if (has_12mv_adc(data)) { |
44c1bcd4 JD |
2140 | if (sio_data->internal & (1 << 0)) |
2141 | data->in_scaled |= (1 << 3); /* in3 is AVCC */ | |
2142 | if (sio_data->internal & (1 << 1)) | |
2143 | data->in_scaled |= (1 << 7); /* in7 is VSB */ | |
2144 | if (sio_data->internal & (1 << 2)) | |
2145 | data->in_scaled |= (1 << 8); /* in8 is Vbat */ | |
c145d5c6 RM |
2146 | if (sio_data->internal & (1 << 3)) |
2147 | data->in_scaled |= (1 << 9); /* in9 is AVCC */ | |
0531d98b GR |
2148 | } else if (sio_data->type == it8782 || sio_data->type == it8783) { |
2149 | if (sio_data->internal & (1 << 0)) | |
2150 | data->in_scaled |= (1 << 3); /* in3 is VCC5V */ | |
2151 | if (sio_data->internal & (1 << 1)) | |
2152 | data->in_scaled |= (1 << 7); /* in7 is VCCH5V */ | |
44c1bcd4 JD |
2153 | } |
2154 | ||
4573acbc GR |
2155 | data->has_temp = 0x07; |
2156 | if (sio_data->skip_temp & (1 << 2)) { | |
2157 | if (sio_data->type == it8782 | |
2158 | && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80)) | |
2159 | data->has_temp &= ~(1 << 2); | |
2160 | } | |
2161 | ||
1da177e4 | 2162 | /* Initialize the IT87 chip */ |
b74f3fdd | 2163 | it87_init_device(pdev); |
1da177e4 LT |
2164 | |
2165 | /* Register sysfs hooks */ | |
5f2dc798 JD |
2166 | err = sysfs_create_group(&dev->kobj, &it87_group); |
2167 | if (err) | |
62a1d05f | 2168 | return err; |
17d648bf | 2169 | |
c145d5c6 | 2170 | for (i = 0; i < 10; i++) { |
9172b5d1 GR |
2171 | if (sio_data->skip_in & (1 << i)) |
2172 | continue; | |
2173 | err = sysfs_create_group(&dev->kobj, &it87_group_in[i]); | |
2174 | if (err) | |
62a1d05f | 2175 | goto error; |
9172b5d1 GR |
2176 | if (sio_data->beep_pin && it87_attributes_in_beep[i]) { |
2177 | err = sysfs_create_file(&dev->kobj, | |
2178 | it87_attributes_in_beep[i]); | |
2179 | if (err) | |
62a1d05f | 2180 | goto error; |
9172b5d1 GR |
2181 | } |
2182 | } | |
2183 | ||
4573acbc GR |
2184 | for (i = 0; i < 3; i++) { |
2185 | if (!(data->has_temp & (1 << i))) | |
2186 | continue; | |
2187 | err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]); | |
d9b327c3 | 2188 | if (err) |
62a1d05f | 2189 | goto error; |
161d898a GR |
2190 | if (has_temp_offset(data)) { |
2191 | err = sysfs_create_file(&dev->kobj, | |
2192 | it87_attributes_temp_offset[i]); | |
2193 | if (err) | |
2194 | goto error; | |
2195 | } | |
4573acbc GR |
2196 | if (sio_data->beep_pin) { |
2197 | err = sysfs_create_file(&dev->kobj, | |
2198 | it87_attributes_temp_beep[i]); | |
2199 | if (err) | |
2200 | goto error; | |
2201 | } | |
d9b327c3 JD |
2202 | } |
2203 | ||
9060f8bd | 2204 | /* Do not create fan files for disabled fans */ |
d9b327c3 | 2205 | fan_beep_need_rw = 1; |
723a0aa0 JD |
2206 | for (i = 0; i < 5; i++) { |
2207 | if (!(data->has_fan & (1 << i))) | |
2208 | continue; | |
e1169ba0 | 2209 | err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]); |
723a0aa0 | 2210 | if (err) |
62a1d05f | 2211 | goto error; |
d9b327c3 | 2212 | |
e1169ba0 GR |
2213 | if (i < 3 && !has_16bit_fans(data)) { |
2214 | err = sysfs_create_file(&dev->kobj, | |
2215 | it87_attributes_fan_div[i]); | |
2216 | if (err) | |
2217 | goto error; | |
2218 | } | |
2219 | ||
d9b327c3 JD |
2220 | if (sio_data->beep_pin) { |
2221 | err = sysfs_create_file(&dev->kobj, | |
2222 | it87_attributes_fan_beep[i]); | |
2223 | if (err) | |
62a1d05f | 2224 | goto error; |
d9b327c3 JD |
2225 | if (!fan_beep_need_rw) |
2226 | continue; | |
2227 | ||
4a0d71cf GR |
2228 | /* |
2229 | * As we have a single beep enable bit for all fans, | |
d9b327c3 | 2230 | * only the first enabled fan has a writable attribute |
4a0d71cf GR |
2231 | * for it. |
2232 | */ | |
d9b327c3 JD |
2233 | if (sysfs_chmod_file(&dev->kobj, |
2234 | it87_attributes_fan_beep[i], | |
2235 | S_IRUGO | S_IWUSR)) | |
2236 | dev_dbg(dev, "chmod +w fan%d_beep failed\n", | |
2237 | i + 1); | |
2238 | fan_beep_need_rw = 0; | |
2239 | } | |
17d648bf JD |
2240 | } |
2241 | ||
1da177e4 | 2242 | if (enable_pwm_interface) { |
723a0aa0 JD |
2243 | for (i = 0; i < 3; i++) { |
2244 | if (sio_data->skip_pwm & (1 << i)) | |
2245 | continue; | |
2246 | err = sysfs_create_group(&dev->kobj, | |
2247 | &it87_group_pwm[i]); | |
2248 | if (err) | |
62a1d05f | 2249 | goto error; |
4f3f51bc JD |
2250 | |
2251 | if (!has_old_autopwm(data)) | |
2252 | continue; | |
2253 | err = sysfs_create_group(&dev->kobj, | |
2254 | &it87_group_autopwm[i]); | |
2255 | if (err) | |
62a1d05f | 2256 | goto error; |
98dd22c3 | 2257 | } |
1da177e4 LT |
2258 | } |
2259 | ||
895ff267 | 2260 | if (!sio_data->skip_vid) { |
303760b4 | 2261 | data->vrm = vid_which_vrm(); |
87673dd7 | 2262 | /* VID reading from Super-I/O config space if available */ |
b74f3fdd | 2263 | data->vid = sio_data->vid_value; |
6a8d7acf JD |
2264 | err = sysfs_create_group(&dev->kobj, &it87_group_vid); |
2265 | if (err) | |
62a1d05f | 2266 | goto error; |
87808be4 JD |
2267 | } |
2268 | ||
738e5e05 | 2269 | /* Export labels for internal sensors */ |
c145d5c6 | 2270 | for (i = 0; i < 4; i++) { |
738e5e05 JD |
2271 | if (!(sio_data->internal & (1 << i))) |
2272 | continue; | |
2273 | err = sysfs_create_file(&dev->kobj, | |
2274 | it87_attributes_label[i]); | |
2275 | if (err) | |
62a1d05f | 2276 | goto error; |
738e5e05 JD |
2277 | } |
2278 | ||
1beeffe4 TJ |
2279 | data->hwmon_dev = hwmon_device_register(dev); |
2280 | if (IS_ERR(data->hwmon_dev)) { | |
2281 | err = PTR_ERR(data->hwmon_dev); | |
62a1d05f | 2282 | goto error; |
1da177e4 LT |
2283 | } |
2284 | ||
2285 | return 0; | |
2286 | ||
62a1d05f | 2287 | error: |
723a0aa0 | 2288 | it87_remove_files(dev); |
1da177e4 LT |
2289 | return err; |
2290 | } | |
2291 | ||
281dfd0b | 2292 | static int it87_remove(struct platform_device *pdev) |
1da177e4 | 2293 | { |
b74f3fdd | 2294 | struct it87_data *data = platform_get_drvdata(pdev); |
1da177e4 | 2295 | |
1beeffe4 | 2296 | hwmon_device_unregister(data->hwmon_dev); |
723a0aa0 | 2297 | it87_remove_files(&pdev->dev); |
943b0830 | 2298 | |
1da177e4 LT |
2299 | return 0; |
2300 | } | |
2301 | ||
4a0d71cf GR |
2302 | /* |
2303 | * Must be called with data->update_lock held, except during initialization. | |
2304 | * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, | |
2305 | * would slow down the IT87 access and should not be necessary. | |
2306 | */ | |
b74f3fdd | 2307 | static int it87_read_value(struct it87_data *data, u8 reg) |
1da177e4 | 2308 | { |
b74f3fdd | 2309 | outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); |
2310 | return inb_p(data->addr + IT87_DATA_REG_OFFSET); | |
1da177e4 LT |
2311 | } |
2312 | ||
4a0d71cf GR |
2313 | /* |
2314 | * Must be called with data->update_lock held, except during initialization. | |
2315 | * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, | |
2316 | * would slow down the IT87 access and should not be necessary. | |
2317 | */ | |
b74f3fdd | 2318 | static void it87_write_value(struct it87_data *data, u8 reg, u8 value) |
1da177e4 | 2319 | { |
b74f3fdd | 2320 | outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); |
2321 | outb_p(value, data->addr + IT87_DATA_REG_OFFSET); | |
1da177e4 LT |
2322 | } |
2323 | ||
2324 | /* Return 1 if and only if the PWM interface is safe to use */ | |
6c931ae1 | 2325 | static int it87_check_pwm(struct device *dev) |
1da177e4 | 2326 | { |
b74f3fdd | 2327 | struct it87_data *data = dev_get_drvdata(dev); |
4a0d71cf GR |
2328 | /* |
2329 | * Some BIOSes fail to correctly configure the IT87 fans. All fans off | |
1da177e4 | 2330 | * and polarity set to active low is sign that this is the case so we |
4a0d71cf GR |
2331 | * disable pwm control to protect the user. |
2332 | */ | |
b74f3fdd | 2333 | int tmp = it87_read_value(data, IT87_REG_FAN_CTL); |
1da177e4 LT |
2334 | if ((tmp & 0x87) == 0) { |
2335 | if (fix_pwm_polarity) { | |
4a0d71cf GR |
2336 | /* |
2337 | * The user asks us to attempt a chip reconfiguration. | |
1da177e4 | 2338 | * This means switching to active high polarity and |
4a0d71cf GR |
2339 | * inverting all fan speed values. |
2340 | */ | |
1da177e4 LT |
2341 | int i; |
2342 | u8 pwm[3]; | |
2343 | ||
2344 | for (i = 0; i < 3; i++) | |
b74f3fdd | 2345 | pwm[i] = it87_read_value(data, |
1da177e4 LT |
2346 | IT87_REG_PWM(i)); |
2347 | ||
4a0d71cf GR |
2348 | /* |
2349 | * If any fan is in automatic pwm mode, the polarity | |
1da177e4 LT |
2350 | * might be correct, as suspicious as it seems, so we |
2351 | * better don't change anything (but still disable the | |
4a0d71cf GR |
2352 | * PWM interface). |
2353 | */ | |
1da177e4 | 2354 | if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) { |
1d9bcf6a GR |
2355 | dev_info(dev, |
2356 | "Reconfiguring PWM to active high polarity\n"); | |
b74f3fdd | 2357 | it87_write_value(data, IT87_REG_FAN_CTL, |
1da177e4 LT |
2358 | tmp | 0x87); |
2359 | for (i = 0; i < 3; i++) | |
b74f3fdd | 2360 | it87_write_value(data, |
1da177e4 LT |
2361 | IT87_REG_PWM(i), |
2362 | 0x7f & ~pwm[i]); | |
2363 | return 1; | |
2364 | } | |
2365 | ||
1d9bcf6a GR |
2366 | dev_info(dev, |
2367 | "PWM configuration is too broken to be fixed\n"); | |
1da177e4 LT |
2368 | } |
2369 | ||
1d9bcf6a GR |
2370 | dev_info(dev, |
2371 | "Detected broken BIOS defaults, disabling PWM interface\n"); | |
1da177e4 LT |
2372 | return 0; |
2373 | } else if (fix_pwm_polarity) { | |
1d9bcf6a GR |
2374 | dev_info(dev, |
2375 | "PWM configuration looks sane, won't touch\n"); | |
1da177e4 LT |
2376 | } |
2377 | ||
2378 | return 1; | |
2379 | } | |
2380 | ||
2381 | /* Called when we have found a new IT87. */ | |
6c931ae1 | 2382 | static void it87_init_device(struct platform_device *pdev) |
1da177e4 | 2383 | { |
a8b3a3a5 | 2384 | struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev); |
b74f3fdd | 2385 | struct it87_data *data = platform_get_drvdata(pdev); |
1da177e4 | 2386 | int tmp, i; |
591ec650 | 2387 | u8 mask; |
1da177e4 | 2388 | |
4a0d71cf GR |
2389 | /* |
2390 | * For each PWM channel: | |
b99883dc JD |
2391 | * - If it is in automatic mode, setting to manual mode should set |
2392 | * the fan to full speed by default. | |
2393 | * - If it is in manual mode, we need a mapping to temperature | |
2394 | * channels to use when later setting to automatic mode later. | |
2395 | * Use a 1:1 mapping by default (we are clueless.) | |
2396 | * In both cases, the value can (and should) be changed by the user | |
6229cdb2 JD |
2397 | * prior to switching to a different mode. |
2398 | * Note that this is no longer needed for the IT8721F and later, as | |
2399 | * these have separate registers for the temperature mapping and the | |
4a0d71cf GR |
2400 | * manual duty cycle. |
2401 | */ | |
1da177e4 | 2402 | for (i = 0; i < 3; i++) { |
b99883dc JD |
2403 | data->pwm_temp_map[i] = i; |
2404 | data->pwm_duty[i] = 0x7f; /* Full speed */ | |
4f3f51bc | 2405 | data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */ |
1da177e4 LT |
2406 | } |
2407 | ||
4a0d71cf GR |
2408 | /* |
2409 | * Some chips seem to have default value 0xff for all limit | |
c5df9b7a JD |
2410 | * registers. For low voltage limits it makes no sense and triggers |
2411 | * alarms, so change to 0 instead. For high temperature limits, it | |
2412 | * means -1 degree C, which surprisingly doesn't trigger an alarm, | |
4a0d71cf GR |
2413 | * but is still confusing, so change to 127 degrees C. |
2414 | */ | |
c5df9b7a | 2415 | for (i = 0; i < 8; i++) { |
b74f3fdd | 2416 | tmp = it87_read_value(data, IT87_REG_VIN_MIN(i)); |
c5df9b7a | 2417 | if (tmp == 0xff) |
b74f3fdd | 2418 | it87_write_value(data, IT87_REG_VIN_MIN(i), 0); |
c5df9b7a JD |
2419 | } |
2420 | for (i = 0; i < 3; i++) { | |
b74f3fdd | 2421 | tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i)); |
c5df9b7a | 2422 | if (tmp == 0xff) |
b74f3fdd | 2423 | it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127); |
c5df9b7a JD |
2424 | } |
2425 | ||
4a0d71cf GR |
2426 | /* |
2427 | * Temperature channels are not forcibly enabled, as they can be | |
a00afb97 JD |
2428 | * set to two different sensor types and we can't guess which one |
2429 | * is correct for a given system. These channels can be enabled at | |
4a0d71cf GR |
2430 | * run-time through the temp{1-3}_type sysfs accessors if needed. |
2431 | */ | |
1da177e4 LT |
2432 | |
2433 | /* Check if voltage monitors are reset manually or by some reason */ | |
b74f3fdd | 2434 | tmp = it87_read_value(data, IT87_REG_VIN_ENABLE); |
1da177e4 LT |
2435 | if ((tmp & 0xff) == 0) { |
2436 | /* Enable all voltage monitors */ | |
b74f3fdd | 2437 | it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff); |
1da177e4 LT |
2438 | } |
2439 | ||
2440 | /* Check if tachometers are reset manually or by some reason */ | |
591ec650 | 2441 | mask = 0x70 & ~(sio_data->skip_fan << 4); |
b74f3fdd | 2442 | data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL); |
591ec650 | 2443 | if ((data->fan_main_ctrl & mask) == 0) { |
1da177e4 | 2444 | /* Enable all fan tachometers */ |
591ec650 | 2445 | data->fan_main_ctrl |= mask; |
5f2dc798 JD |
2446 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, |
2447 | data->fan_main_ctrl); | |
1da177e4 | 2448 | } |
9060f8bd | 2449 | data->has_fan = (data->fan_main_ctrl >> 4) & 0x07; |
1da177e4 | 2450 | |
c145d5c6 RM |
2451 | /* Set tachometers to 16-bit mode if needed, IT8603E (and IT8728F?) |
2452 | * has it by default */ | |
2453 | if (has_16bit_fans(data) && data->type != it8603) { | |
b74f3fdd | 2454 | tmp = it87_read_value(data, IT87_REG_FAN_16BIT); |
9060f8bd | 2455 | if (~tmp & 0x07 & data->has_fan) { |
b74f3fdd | 2456 | dev_dbg(&pdev->dev, |
17d648bf | 2457 | "Setting fan1-3 to 16-bit mode\n"); |
b74f3fdd | 2458 | it87_write_value(data, IT87_REG_FAN_16BIT, |
17d648bf JD |
2459 | tmp | 0x07); |
2460 | } | |
0531d98b GR |
2461 | /* IT8705F, IT8782F, and IT8783E/F only support three fans. */ |
2462 | if (data->type != it87 && data->type != it8782 && | |
2463 | data->type != it8783) { | |
816d8c6a AP |
2464 | if (tmp & (1 << 4)) |
2465 | data->has_fan |= (1 << 3); /* fan4 enabled */ | |
2466 | if (tmp & (1 << 5)) | |
2467 | data->has_fan |= (1 << 4); /* fan5 enabled */ | |
2468 | } | |
17d648bf JD |
2469 | } |
2470 | ||
591ec650 JD |
2471 | /* Fan input pins may be used for alternative functions */ |
2472 | data->has_fan &= ~sio_data->skip_fan; | |
2473 | ||
1da177e4 | 2474 | /* Start monitoring */ |
b74f3fdd | 2475 | it87_write_value(data, IT87_REG_CONFIG, |
41002f8d | 2476 | (it87_read_value(data, IT87_REG_CONFIG) & 0x3e) |
1da177e4 LT |
2477 | | (update_vbat ? 0x41 : 0x01)); |
2478 | } | |
2479 | ||
b99883dc JD |
2480 | static void it87_update_pwm_ctrl(struct it87_data *data, int nr) |
2481 | { | |
2482 | data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr)); | |
16b5dda2 | 2483 | if (has_newer_autopwm(data)) { |
b99883dc | 2484 | data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; |
6229cdb2 JD |
2485 | data->pwm_duty[nr] = it87_read_value(data, |
2486 | IT87_REG_PWM_DUTY(nr)); | |
2487 | } else { | |
2488 | if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ | |
2489 | data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; | |
2490 | else /* Manual mode */ | |
2491 | data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f; | |
2492 | } | |
4f3f51bc JD |
2493 | |
2494 | if (has_old_autopwm(data)) { | |
2495 | int i; | |
2496 | ||
2497 | for (i = 0; i < 5 ; i++) | |
2498 | data->auto_temp[nr][i] = it87_read_value(data, | |
2499 | IT87_REG_AUTO_TEMP(nr, i)); | |
2500 | for (i = 0; i < 3 ; i++) | |
2501 | data->auto_pwm[nr][i] = it87_read_value(data, | |
2502 | IT87_REG_AUTO_PWM(nr, i)); | |
2503 | } | |
b99883dc JD |
2504 | } |
2505 | ||
1da177e4 LT |
2506 | static struct it87_data *it87_update_device(struct device *dev) |
2507 | { | |
b74f3fdd | 2508 | struct it87_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
2509 | int i; |
2510 | ||
9a61bf63 | 2511 | mutex_lock(&data->update_lock); |
1da177e4 LT |
2512 | |
2513 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
2514 | || !data->valid) { | |
1da177e4 | 2515 | if (update_vbat) { |
4a0d71cf GR |
2516 | /* |
2517 | * Cleared after each update, so reenable. Value | |
2518 | * returned by this read will be previous value | |
2519 | */ | |
b74f3fdd | 2520 | it87_write_value(data, IT87_REG_CONFIG, |
5f2dc798 | 2521 | it87_read_value(data, IT87_REG_CONFIG) | 0x40); |
1da177e4 LT |
2522 | } |
2523 | for (i = 0; i <= 7; i++) { | |
929c6a56 | 2524 | data->in[i][0] = |
5f2dc798 | 2525 | it87_read_value(data, IT87_REG_VIN(i)); |
929c6a56 | 2526 | data->in[i][1] = |
5f2dc798 | 2527 | it87_read_value(data, IT87_REG_VIN_MIN(i)); |
929c6a56 | 2528 | data->in[i][2] = |
5f2dc798 | 2529 | it87_read_value(data, IT87_REG_VIN_MAX(i)); |
1da177e4 | 2530 | } |
3543a53f | 2531 | /* in8 (battery) has no limit registers */ |
929c6a56 | 2532 | data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8)); |
c145d5c6 RM |
2533 | if (data->type == it8603) |
2534 | data->in[9][0] = it87_read_value(data, 0x2f); | |
1da177e4 | 2535 | |
c7f1f716 | 2536 | for (i = 0; i < 5; i++) { |
9060f8bd JD |
2537 | /* Skip disabled fans */ |
2538 | if (!(data->has_fan & (1 << i))) | |
2539 | continue; | |
2540 | ||
e1169ba0 | 2541 | data->fan[i][1] = |
5f2dc798 | 2542 | it87_read_value(data, IT87_REG_FAN_MIN[i]); |
e1169ba0 | 2543 | data->fan[i][0] = it87_read_value(data, |
c7f1f716 | 2544 | IT87_REG_FAN[i]); |
17d648bf | 2545 | /* Add high byte if in 16-bit mode */ |
0475169c | 2546 | if (has_16bit_fans(data)) { |
e1169ba0 | 2547 | data->fan[i][0] |= it87_read_value(data, |
c7f1f716 | 2548 | IT87_REG_FANX[i]) << 8; |
e1169ba0 | 2549 | data->fan[i][1] |= it87_read_value(data, |
c7f1f716 | 2550 | IT87_REG_FANX_MIN[i]) << 8; |
17d648bf | 2551 | } |
1da177e4 LT |
2552 | } |
2553 | for (i = 0; i < 3; i++) { | |
4573acbc GR |
2554 | if (!(data->has_temp & (1 << i))) |
2555 | continue; | |
60ca385a | 2556 | data->temp[i][0] = |
5f2dc798 | 2557 | it87_read_value(data, IT87_REG_TEMP(i)); |
60ca385a | 2558 | data->temp[i][1] = |
5f2dc798 | 2559 | it87_read_value(data, IT87_REG_TEMP_LOW(i)); |
60ca385a GR |
2560 | data->temp[i][2] = |
2561 | it87_read_value(data, IT87_REG_TEMP_HIGH(i)); | |
161d898a GR |
2562 | if (has_temp_offset(data)) |
2563 | data->temp[i][3] = | |
2564 | it87_read_value(data, | |
2565 | IT87_REG_TEMP_OFFSET[i]); | |
1da177e4 LT |
2566 | } |
2567 | ||
17d648bf | 2568 | /* Newer chips don't have clock dividers */ |
0475169c | 2569 | if ((data->has_fan & 0x07) && !has_16bit_fans(data)) { |
b74f3fdd | 2570 | i = it87_read_value(data, IT87_REG_FAN_DIV); |
17d648bf JD |
2571 | data->fan_div[0] = i & 0x07; |
2572 | data->fan_div[1] = (i >> 3) & 0x07; | |
2573 | data->fan_div[2] = (i & 0x40) ? 3 : 1; | |
2574 | } | |
1da177e4 LT |
2575 | |
2576 | data->alarms = | |
b74f3fdd | 2577 | it87_read_value(data, IT87_REG_ALARM1) | |
2578 | (it87_read_value(data, IT87_REG_ALARM2) << 8) | | |
2579 | (it87_read_value(data, IT87_REG_ALARM3) << 16); | |
d9b327c3 | 2580 | data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); |
b99883dc | 2581 | |
b74f3fdd | 2582 | data->fan_main_ctrl = it87_read_value(data, |
2583 | IT87_REG_FAN_MAIN_CTRL); | |
2584 | data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL); | |
b99883dc JD |
2585 | for (i = 0; i < 3; i++) |
2586 | it87_update_pwm_ctrl(data, i); | |
b74f3fdd | 2587 | |
2588 | data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE); | |
19529784 | 2589 | data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); |
4a0d71cf GR |
2590 | /* |
2591 | * The IT8705F does not have VID capability. | |
2592 | * The IT8718F and later don't use IT87_REG_VID for the | |
2593 | * same purpose. | |
2594 | */ | |
17d648bf | 2595 | if (data->type == it8712 || data->type == it8716) { |
b74f3fdd | 2596 | data->vid = it87_read_value(data, IT87_REG_VID); |
4a0d71cf GR |
2597 | /* |
2598 | * The older IT8712F revisions had only 5 VID pins, | |
2599 | * but we assume it is always safe to read 6 bits. | |
2600 | */ | |
17d648bf | 2601 | data->vid &= 0x3f; |
1da177e4 LT |
2602 | } |
2603 | data->last_updated = jiffies; | |
2604 | data->valid = 1; | |
2605 | } | |
2606 | ||
9a61bf63 | 2607 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
2608 | |
2609 | return data; | |
2610 | } | |
2611 | ||
b74f3fdd | 2612 | static int __init it87_device_add(unsigned short address, |
2613 | const struct it87_sio_data *sio_data) | |
2614 | { | |
2615 | struct resource res = { | |
87b4b663 BH |
2616 | .start = address + IT87_EC_OFFSET, |
2617 | .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1, | |
b74f3fdd | 2618 | .name = DRVNAME, |
2619 | .flags = IORESOURCE_IO, | |
2620 | }; | |
2621 | int err; | |
2622 | ||
b9acb64a JD |
2623 | err = acpi_check_resource_conflict(&res); |
2624 | if (err) | |
2625 | goto exit; | |
2626 | ||
b74f3fdd | 2627 | pdev = platform_device_alloc(DRVNAME, address); |
2628 | if (!pdev) { | |
2629 | err = -ENOMEM; | |
a8ca1037 | 2630 | pr_err("Device allocation failed\n"); |
b74f3fdd | 2631 | goto exit; |
2632 | } | |
2633 | ||
2634 | err = platform_device_add_resources(pdev, &res, 1); | |
2635 | if (err) { | |
a8ca1037 | 2636 | pr_err("Device resource addition failed (%d)\n", err); |
b74f3fdd | 2637 | goto exit_device_put; |
2638 | } | |
2639 | ||
2640 | err = platform_device_add_data(pdev, sio_data, | |
2641 | sizeof(struct it87_sio_data)); | |
2642 | if (err) { | |
a8ca1037 | 2643 | pr_err("Platform data allocation failed\n"); |
b74f3fdd | 2644 | goto exit_device_put; |
2645 | } | |
2646 | ||
2647 | err = platform_device_add(pdev); | |
2648 | if (err) { | |
a8ca1037 | 2649 | pr_err("Device addition failed (%d)\n", err); |
b74f3fdd | 2650 | goto exit_device_put; |
2651 | } | |
2652 | ||
2653 | return 0; | |
2654 | ||
2655 | exit_device_put: | |
2656 | platform_device_put(pdev); | |
2657 | exit: | |
2658 | return err; | |
2659 | } | |
2660 | ||
1da177e4 LT |
2661 | static int __init sm_it87_init(void) |
2662 | { | |
b74f3fdd | 2663 | int err; |
5f2dc798 | 2664 | unsigned short isa_address = 0; |
b74f3fdd | 2665 | struct it87_sio_data sio_data; |
2666 | ||
98dd22c3 | 2667 | memset(&sio_data, 0, sizeof(struct it87_sio_data)); |
b74f3fdd | 2668 | err = it87_find(&isa_address, &sio_data); |
2669 | if (err) | |
2670 | return err; | |
2671 | err = platform_driver_register(&it87_driver); | |
2672 | if (err) | |
2673 | return err; | |
fde09509 | 2674 | |
b74f3fdd | 2675 | err = it87_device_add(isa_address, &sio_data); |
5f2dc798 | 2676 | if (err) { |
b74f3fdd | 2677 | platform_driver_unregister(&it87_driver); |
2678 | return err; | |
2679 | } | |
2680 | ||
2681 | return 0; | |
1da177e4 LT |
2682 | } |
2683 | ||
2684 | static void __exit sm_it87_exit(void) | |
2685 | { | |
b74f3fdd | 2686 | platform_device_unregister(pdev); |
2687 | platform_driver_unregister(&it87_driver); | |
1da177e4 LT |
2688 | } |
2689 | ||
2690 | ||
7c81c60f | 2691 | MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>"); |
44c1bcd4 | 2692 | MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver"); |
1da177e4 LT |
2693 | module_param(update_vbat, bool, 0); |
2694 | MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value"); | |
2695 | module_param(fix_pwm_polarity, bool, 0); | |
5f2dc798 JD |
2696 | MODULE_PARM_DESC(fix_pwm_polarity, |
2697 | "Force PWM polarity to active high (DANGEROUS)"); | |
1da177e4 LT |
2698 | MODULE_LICENSE("GPL"); |
2699 | ||
2700 | module_init(sm_it87_init); | |
2701 | module_exit(sm_it87_exit); |