hwmon: (ad7414) Fix multi-line comments
[deliverable/linux.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4 1/*
5f2dc798
JD
2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
44c1bcd4 18 * IT8721F Super I/O chip w/LPC interface
5f2dc798 19 * IT8726F Super I/O chip w/LPC interface
16b5dda2 20 * IT8728F Super I/O chip w/LPC interface
44c1bcd4 21 * IT8758E Super I/O chip w/LPC interface
5f2dc798
JD
22 * Sis950 A clone of the IT8705F
23 *
24 * Copyright (C) 2001 Chris Gauthron
25 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
26 *
27 * This program is free software; you can redistribute it and/or modify
28 * it under the terms of the GNU General Public License as published by
29 * the Free Software Foundation; either version 2 of the License, or
30 * (at your option) any later version.
31 *
32 * This program is distributed in the hope that it will be useful,
33 * but WITHOUT ANY WARRANTY; without even the implied warranty of
34 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
35 * GNU General Public License for more details.
36 *
37 * You should have received a copy of the GNU General Public License
38 * along with this program; if not, write to the Free Software
39 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
40 */
1da177e4 41
a8ca1037
JP
42#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43
1da177e4
LT
44#include <linux/module.h>
45#include <linux/init.h>
46#include <linux/slab.h>
47#include <linux/jiffies.h>
b74f3fdd 48#include <linux/platform_device.h>
943b0830 49#include <linux/hwmon.h>
303760b4
JD
50#include <linux/hwmon-sysfs.h>
51#include <linux/hwmon-vid.h>
943b0830 52#include <linux/err.h>
9a61bf63 53#include <linux/mutex.h>
87808be4 54#include <linux/sysfs.h>
98dd22c3
JD
55#include <linux/string.h>
56#include <linux/dmi.h>
b9acb64a 57#include <linux/acpi.h>
6055fae8 58#include <linux/io.h>
1da177e4 59
b74f3fdd 60#define DRVNAME "it87"
1da177e4 61
16b5dda2 62enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728 };
1da177e4 63
67b671bc
JD
64static unsigned short force_id;
65module_param(force_id, ushort, 0);
66MODULE_PARM_DESC(force_id, "Override the detected device ID");
67
b74f3fdd 68static struct platform_device *pdev;
69
1da177e4
LT
70#define REG 0x2e /* The register to read/write */
71#define DEV 0x07 /* Register: Logical device select */
72#define VAL 0x2f /* The value to read/write */
73#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS
74
75/* The device with the IT8718F/IT8720F VID value in it */
76#define GPIO 0x07
77
1da177e4
LT
78#define DEVID 0x20 /* Register: Device ID */
79#define DEVREV 0x22 /* Register: Device Revision */
80
5b0380c9 81static inline int superio_inb(int reg)
1da177e4
LT
82{
83 outb(reg, REG);
84 return inb(VAL);
85}
86
5b0380c9 87static inline void superio_outb(int reg, int val)
436cad2a
JD
88{
89 outb(reg, REG);
90 outb(val, VAL);
91}
92
1da177e4
LT
93static int superio_inw(int reg)
94{
95 int val;
96 outb(reg++, REG);
97 val = inb(VAL) << 8;
98 outb(reg, REG);
99 val |= inb(VAL);
100 return val;
101}
102
5b0380c9 103static inline void superio_select(int ldn)
1da177e4
LT
104{
105 outb(DEV, REG);
87673dd7 106 outb(ldn, VAL);
1da177e4
LT
107}
108
5b0380c9 109static inline int superio_enter(void)
1da177e4 110{
5b0380c9
NG
111 /*
112 * Try to reserve REG and REG + 1 for exclusive access.
113 */
114 if (!request_muxed_region(REG, 2, DRVNAME))
115 return -EBUSY;
116
1da177e4
LT
117 outb(0x87, REG);
118 outb(0x01, REG);
119 outb(0x55, REG);
120 outb(0x55, REG);
5b0380c9 121 return 0;
1da177e4
LT
122}
123
5b0380c9 124static inline void superio_exit(void)
1da177e4
LT
125{
126 outb(0x02, REG);
127 outb(0x02, VAL);
5b0380c9 128 release_region(REG, 2);
1da177e4
LT
129}
130
87673dd7 131/* Logical device 4 registers */
1da177e4
LT
132#define IT8712F_DEVID 0x8712
133#define IT8705F_DEVID 0x8705
17d648bf 134#define IT8716F_DEVID 0x8716
87673dd7 135#define IT8718F_DEVID 0x8718
b4da93e4 136#define IT8720F_DEVID 0x8720
44c1bcd4 137#define IT8721F_DEVID 0x8721
08a8f6e9 138#define IT8726F_DEVID 0x8726
16b5dda2 139#define IT8728F_DEVID 0x8728
1da177e4
LT
140#define IT87_ACT_REG 0x30
141#define IT87_BASE_REG 0x60
142
87673dd7 143/* Logical device 7 registers (IT8712F and later) */
895ff267 144#define IT87_SIO_GPIO3_REG 0x27
591ec650 145#define IT87_SIO_GPIO5_REG 0x29
87673dd7
JD
146#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
147#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 148#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 149
1da177e4 150/* Update battery voltage after every reading if true */
90ab5ee9 151static bool update_vbat;
1da177e4
LT
152
153/* Not all BIOSes properly configure the PWM registers */
90ab5ee9 154static bool fix_pwm_polarity;
1da177e4 155
1da177e4
LT
156/* Many IT87 constants specified below */
157
158/* Length of ISA address segment */
159#define IT87_EXTENT 8
160
87b4b663
BH
161/* Length of ISA address segment for Environmental Controller */
162#define IT87_EC_EXTENT 2
163
164/* Offset of EC registers from ISA base address */
165#define IT87_EC_OFFSET 5
166
167/* Where are the ISA address/data registers relative to the EC base address */
168#define IT87_ADDR_REG_OFFSET 0
169#define IT87_DATA_REG_OFFSET 1
1da177e4
LT
170
171/*----- The IT87 registers -----*/
172
173#define IT87_REG_CONFIG 0x00
174
175#define IT87_REG_ALARM1 0x01
176#define IT87_REG_ALARM2 0x02
177#define IT87_REG_ALARM3 0x03
178
4a0d71cf
GR
179/*
180 * The IT8718F and IT8720F have the VID value in a different register, in
181 * Super-I/O configuration space.
182 */
1da177e4 183#define IT87_REG_VID 0x0a
4a0d71cf
GR
184/*
185 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
186 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
187 * mode.
188 */
1da177e4 189#define IT87_REG_FAN_DIV 0x0b
17d648bf 190#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT
191
192/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
193
c7f1f716
JD
194static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
195static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
196static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
197static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
1da177e4
LT
198#define IT87_REG_FAN_MAIN_CTRL 0x13
199#define IT87_REG_FAN_CTL 0x14
200#define IT87_REG_PWM(nr) (0x15 + (nr))
6229cdb2 201#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
1da177e4
LT
202
203#define IT87_REG_VIN(nr) (0x20 + (nr))
204#define IT87_REG_TEMP(nr) (0x29 + (nr))
205
206#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
207#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
208#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
209#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
210
1da177e4
LT
211#define IT87_REG_VIN_ENABLE 0x50
212#define IT87_REG_TEMP_ENABLE 0x51
d9b327c3 213#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT
214
215#define IT87_REG_CHIPID 0x58
216
4f3f51bc
JD
217#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
218#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
219
1da177e4 220
b74f3fdd 221struct it87_sio_data {
222 enum chips type;
223 /* Values read from Super-I/O config space */
0475169c 224 u8 revision;
b74f3fdd 225 u8 vid_value;
d9b327c3 226 u8 beep_pin;
738e5e05 227 u8 internal; /* Internal sensors can be labeled */
591ec650 228 /* Features skipped based on config or DMI */
895ff267 229 u8 skip_vid;
591ec650 230 u8 skip_fan;
98dd22c3 231 u8 skip_pwm;
b74f3fdd 232};
233
4a0d71cf
GR
234/*
235 * For each registered chip, we need to keep some data in memory.
236 * The structure is dynamically allocated.
237 */
1da177e4 238struct it87_data {
1beeffe4 239 struct device *hwmon_dev;
1da177e4 240 enum chips type;
0475169c 241 u8 revision;
1da177e4 242
b74f3fdd 243 unsigned short addr;
244 const char *name;
9a61bf63 245 struct mutex update_lock;
1da177e4
LT
246 char valid; /* !=0 if following fields are valid */
247 unsigned long last_updated; /* In jiffies */
248
44c1bcd4 249 u16 in_scaled; /* Internal voltage sensors are scaled */
1da177e4 250 u8 in[9]; /* Register value */
3543a53f
JD
251 u8 in_max[8]; /* Register value */
252 u8 in_min[8]; /* Register value */
9060f8bd 253 u8 has_fan; /* Bitfield, fans enabled */
c7f1f716
JD
254 u16 fan[5]; /* Register values, possibly combined */
255 u16 fan_min[5]; /* Register values, possibly combined */
e267d250
JD
256 s8 temp[3]; /* Register value */
257 s8 temp_high[3]; /* Register value */
258 s8 temp_low[3]; /* Register value */
1da177e4
LT
259 u8 sensor; /* Register value */
260 u8 fan_div[3]; /* Register encoding, shifted right */
261 u8 vid; /* Register encoding, combined */
a7be58a1 262 u8 vrm;
1da177e4 263 u32 alarms; /* Register encoding, combined */
d9b327c3 264 u8 beeps; /* Register encoding */
1da177e4 265 u8 fan_main_ctrl; /* Register value */
f8d0c19a 266 u8 fan_ctl; /* Register value */
b99883dc 267
4a0d71cf
GR
268 /*
269 * The following 3 arrays correspond to the same registers up to
6229cdb2
JD
270 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
271 * 7, and we want to preserve settings on mode changes, so we have
272 * to track all values separately.
273 * Starting with the IT8721F, the manual PWM duty cycles are stored
274 * in separate registers (8-bit values), so the separate tracking
275 * is no longer needed, but it is still done to keep the driver
4a0d71cf
GR
276 * simple.
277 */
b99883dc 278 u8 pwm_ctrl[3]; /* Register value */
6229cdb2 279 u8 pwm_duty[3]; /* Manual PWM value set by user */
b99883dc 280 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD
281
282 /* Automatic fan speed control registers */
283 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
284 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4 285};
0df6454d 286
16b5dda2
JD
287static inline int has_12mv_adc(const struct it87_data *data)
288{
289 /*
290 * IT8721F and later have a 12 mV ADC, also with internal scaling
291 * on selected inputs.
292 */
293 return data->type == it8721
294 || data->type == it8728;
295}
296
297static inline int has_newer_autopwm(const struct it87_data *data)
298{
299 /*
300 * IT8721F and later have separate registers for the temperature
301 * mapping and the manual duty cycle.
302 */
303 return data->type == it8721
304 || data->type == it8728;
305}
306
44c1bcd4
JD
307static u8 in_to_reg(const struct it87_data *data, int nr, long val)
308{
309 long lsb;
310
16b5dda2 311 if (has_12mv_adc(data)) {
44c1bcd4
JD
312 if (data->in_scaled & (1 << nr))
313 lsb = 24;
314 else
315 lsb = 12;
316 } else
317 lsb = 16;
318
319 val = DIV_ROUND_CLOSEST(val, lsb);
320 return SENSORS_LIMIT(val, 0, 255);
321}
322
323static int in_from_reg(const struct it87_data *data, int nr, int val)
324{
16b5dda2 325 if (has_12mv_adc(data)) {
44c1bcd4
JD
326 if (data->in_scaled & (1 << nr))
327 return val * 24;
328 else
329 return val * 12;
330 } else
331 return val * 16;
332}
0df6454d
JD
333
334static inline u8 FAN_TO_REG(long rpm, int div)
335{
336 if (rpm == 0)
337 return 255;
338 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
339 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
340 254);
341}
342
343static inline u16 FAN16_TO_REG(long rpm)
344{
345 if (rpm == 0)
346 return 0xffff;
347 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
348}
349
350#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
351 1350000 / ((val) * (div)))
352/* The divider is fixed to 2 in 16-bit mode */
353#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
354 1350000 / ((val) * 2))
355
356#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
357 ((val) + 500) / 1000), -128, 127))
358#define TEMP_FROM_REG(val) ((val) * 1000)
359
44c1bcd4
JD
360static u8 pwm_to_reg(const struct it87_data *data, long val)
361{
16b5dda2 362 if (has_newer_autopwm(data))
44c1bcd4
JD
363 return val;
364 else
365 return val >> 1;
366}
367
368static int pwm_from_reg(const struct it87_data *data, u8 reg)
369{
16b5dda2 370 if (has_newer_autopwm(data))
44c1bcd4
JD
371 return reg;
372 else
373 return (reg & 0x7f) << 1;
374}
375
0df6454d
JD
376
377static int DIV_TO_REG(int val)
378{
379 int answer = 0;
380 while (answer < 7 && (val >>= 1))
381 answer++;
382 return answer;
383}
384#define DIV_FROM_REG(val) (1 << (val))
385
386static const unsigned int pwm_freq[8] = {
387 48000000 / 128,
388 24000000 / 128,
389 12000000 / 128,
390 8000000 / 128,
391 6000000 / 128,
392 3000000 / 128,
393 1500000 / 128,
394 750000 / 128,
395};
1da177e4 396
0475169c
AP
397static inline int has_16bit_fans(const struct it87_data *data)
398{
4a0d71cf
GR
399 /*
400 * IT8705F Datasheet 0.4.1, 3h == Version G.
401 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
402 * These are the first revisions with 16-bit tachometer support.
403 */
816d8c6a 404 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 405 || (data->type == it8712 && data->revision >= 0x08)
0475169c 406 || data->type == it8716
b4da93e4 407 || data->type == it8718
44c1bcd4 408 || data->type == it8720
16b5dda2
JD
409 || data->type == it8721
410 || data->type == it8728;
0475169c 411}
1da177e4 412
4f3f51bc
JD
413static inline int has_old_autopwm(const struct it87_data *data)
414{
4a0d71cf
GR
415 /*
416 * The old automatic fan speed control interface is implemented
417 * by IT8705F chips up to revision F and IT8712F chips up to
418 * revision G.
419 */
4f3f51bc
JD
420 return (data->type == it87 && data->revision < 0x03)
421 || (data->type == it8712 && data->revision < 0x08);
422}
423
b74f3fdd 424static int it87_probe(struct platform_device *pdev);
d0546128 425static int __devexit it87_remove(struct platform_device *pdev);
1da177e4 426
b74f3fdd 427static int it87_read_value(struct it87_data *data, u8 reg);
428static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 429static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 430static int it87_check_pwm(struct device *dev);
431static void it87_init_device(struct platform_device *pdev);
1da177e4
LT
432
433
b74f3fdd 434static struct platform_driver it87_driver = {
cdaf7934 435 .driver = {
87218842 436 .owner = THIS_MODULE,
b74f3fdd 437 .name = DRVNAME,
cdaf7934 438 },
b74f3fdd 439 .probe = it87_probe,
440 .remove = __devexit_p(it87_remove),
fde09509
JD
441};
442
20ad93d4
JD
443static ssize_t show_in(struct device *dev, struct device_attribute *attr,
444 char *buf)
1da177e4 445{
20ad93d4
JD
446 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
447 int nr = sensor_attr->index;
448
1da177e4 449 struct it87_data *data = it87_update_device(dev);
44c1bcd4 450 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr]));
1da177e4
LT
451}
452
20ad93d4
JD
453static ssize_t show_in_min(struct device *dev, struct device_attribute *attr,
454 char *buf)
1da177e4 455{
20ad93d4
JD
456 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
457 int nr = sensor_attr->index;
458
1da177e4 459 struct it87_data *data = it87_update_device(dev);
44c1bcd4 460 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_min[nr]));
1da177e4
LT
461}
462
20ad93d4
JD
463static ssize_t show_in_max(struct device *dev, struct device_attribute *attr,
464 char *buf)
1da177e4 465{
20ad93d4
JD
466 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
467 int nr = sensor_attr->index;
468
1da177e4 469 struct it87_data *data = it87_update_device(dev);
44c1bcd4 470 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_max[nr]));
1da177e4
LT
471}
472
20ad93d4
JD
473static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
474 const char *buf, size_t count)
1da177e4 475{
20ad93d4
JD
476 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
477 int nr = sensor_attr->index;
478
b74f3fdd 479 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
480 unsigned long val;
481
179c4fdb 482 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 483 return -EINVAL;
1da177e4 484
9a61bf63 485 mutex_lock(&data->update_lock);
44c1bcd4 486 data->in_min[nr] = in_to_reg(data, nr, val);
b74f3fdd 487 it87_write_value(data, IT87_REG_VIN_MIN(nr),
1da177e4 488 data->in_min[nr]);
9a61bf63 489 mutex_unlock(&data->update_lock);
1da177e4
LT
490 return count;
491}
20ad93d4
JD
492static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
493 const char *buf, size_t count)
1da177e4 494{
20ad93d4
JD
495 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
496 int nr = sensor_attr->index;
497
b74f3fdd 498 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
499 unsigned long val;
500
179c4fdb 501 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 502 return -EINVAL;
1da177e4 503
9a61bf63 504 mutex_lock(&data->update_lock);
44c1bcd4 505 data->in_max[nr] = in_to_reg(data, nr, val);
b74f3fdd 506 it87_write_value(data, IT87_REG_VIN_MAX(nr),
1da177e4 507 data->in_max[nr]);
9a61bf63 508 mutex_unlock(&data->update_lock);
1da177e4
LT
509 return count;
510}
511
512#define show_in_offset(offset) \
20ad93d4
JD
513static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
514 show_in, NULL, offset);
1da177e4
LT
515
516#define limit_in_offset(offset) \
20ad93d4
JD
517static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
518 show_in_min, set_in_min, offset); \
519static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
520 show_in_max, set_in_max, offset);
1da177e4
LT
521
522show_in_offset(0);
523limit_in_offset(0);
524show_in_offset(1);
525limit_in_offset(1);
526show_in_offset(2);
527limit_in_offset(2);
528show_in_offset(3);
529limit_in_offset(3);
530show_in_offset(4);
531limit_in_offset(4);
532show_in_offset(5);
533limit_in_offset(5);
534show_in_offset(6);
535limit_in_offset(6);
536show_in_offset(7);
537limit_in_offset(7);
538show_in_offset(8);
539
540/* 3 temperatures */
20ad93d4
JD
541static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
542 char *buf)
1da177e4 543{
20ad93d4
JD
544 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
545 int nr = sensor_attr->index;
546
1da177e4
LT
547 struct it87_data *data = it87_update_device(dev);
548 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
549}
20ad93d4
JD
550static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr,
551 char *buf)
1da177e4 552{
20ad93d4
JD
553 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
554 int nr = sensor_attr->index;
555
1da177e4
LT
556 struct it87_data *data = it87_update_device(dev);
557 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_high[nr]));
558}
20ad93d4
JD
559static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr,
560 char *buf)
1da177e4 561{
20ad93d4
JD
562 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
563 int nr = sensor_attr->index;
564
1da177e4
LT
565 struct it87_data *data = it87_update_device(dev);
566 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_low[nr]));
567}
20ad93d4
JD
568static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
569 const char *buf, size_t count)
1da177e4 570{
20ad93d4
JD
571 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
572 int nr = sensor_attr->index;
573
b74f3fdd 574 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
575 long val;
576
179c4fdb 577 if (kstrtol(buf, 10, &val) < 0)
f5f64501 578 return -EINVAL;
1da177e4 579
9a61bf63 580 mutex_lock(&data->update_lock);
1da177e4 581 data->temp_high[nr] = TEMP_TO_REG(val);
b74f3fdd 582 it87_write_value(data, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]);
9a61bf63 583 mutex_unlock(&data->update_lock);
1da177e4
LT
584 return count;
585}
20ad93d4
JD
586static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
587 const char *buf, size_t count)
1da177e4 588{
20ad93d4
JD
589 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
590 int nr = sensor_attr->index;
591
b74f3fdd 592 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
593 long val;
594
179c4fdb 595 if (kstrtol(buf, 10, &val) < 0)
f5f64501 596 return -EINVAL;
1da177e4 597
9a61bf63 598 mutex_lock(&data->update_lock);
1da177e4 599 data->temp_low[nr] = TEMP_TO_REG(val);
b74f3fdd 600 it87_write_value(data, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]);
9a61bf63 601 mutex_unlock(&data->update_lock);
1da177e4
LT
602 return count;
603}
604#define show_temp_offset(offset) \
20ad93d4
JD
605static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
606 show_temp, NULL, offset - 1); \
607static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
608 show_temp_max, set_temp_max, offset - 1); \
609static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR, \
610 show_temp_min, set_temp_min, offset - 1);
1da177e4
LT
611
612show_temp_offset(1);
613show_temp_offset(2);
614show_temp_offset(3);
615
20ad93d4
JD
616static ssize_t show_sensor(struct device *dev, struct device_attribute *attr,
617 char *buf)
1da177e4 618{
20ad93d4
JD
619 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
620 int nr = sensor_attr->index;
1da177e4 621 struct it87_data *data = it87_update_device(dev);
4a0d71cf 622 u8 reg = data->sensor; /* In case value is updated while used */
5f2dc798 623
1da177e4
LT
624 if (reg & (1 << nr))
625 return sprintf(buf, "3\n"); /* thermal diode */
626 if (reg & (8 << nr))
4ed10779 627 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT
628 return sprintf(buf, "0\n"); /* disabled */
629}
20ad93d4
JD
630static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
631 const char *buf, size_t count)
1da177e4 632{
20ad93d4
JD
633 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
634 int nr = sensor_attr->index;
635
b74f3fdd 636 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 637 long val;
8acf07c5 638 u8 reg;
f5f64501 639
179c4fdb 640 if (kstrtol(buf, 10, &val) < 0)
f5f64501 641 return -EINVAL;
1da177e4 642
8acf07c5
JD
643 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
644 reg &= ~(1 << nr);
645 reg &= ~(8 << nr);
4ed10779
JD
646 if (val == 2) { /* backwards compatibility */
647 dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
648 "instead\n");
649 val = 4;
650 }
651 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4 652 if (val == 3)
8acf07c5 653 reg |= 1 << nr;
4ed10779 654 else if (val == 4)
8acf07c5
JD
655 reg |= 8 << nr;
656 else if (val != 0)
1da177e4 657 return -EINVAL;
8acf07c5
JD
658
659 mutex_lock(&data->update_lock);
660 data->sensor = reg;
b74f3fdd 661 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
2b3d1d87 662 data->valid = 0; /* Force cache refresh */
9a61bf63 663 mutex_unlock(&data->update_lock);
1da177e4
LT
664 return count;
665}
666#define show_sensor_offset(offset) \
20ad93d4
JD
667static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
668 show_sensor, set_sensor, offset - 1);
1da177e4
LT
669
670show_sensor_offset(1);
671show_sensor_offset(2);
672show_sensor_offset(3);
673
674/* 3 Fans */
b99883dc
JD
675
676static int pwm_mode(const struct it87_data *data, int nr)
677{
678 int ctrl = data->fan_main_ctrl & (1 << nr);
679
680 if (ctrl == 0) /* Full speed */
681 return 0;
682 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
683 return 2;
684 else /* Manual mode */
685 return 1;
686}
687
20ad93d4
JD
688static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
689 char *buf)
1da177e4 690{
20ad93d4
JD
691 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
692 int nr = sensor_attr->index;
693
1da177e4 694 struct it87_data *data = it87_update_device(dev);
5f2dc798 695 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
1da177e4
LT
696 DIV_FROM_REG(data->fan_div[nr])));
697}
20ad93d4
JD
698static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
699 char *buf)
1da177e4 700{
20ad93d4
JD
701 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
702 int nr = sensor_attr->index;
703
1da177e4 704 struct it87_data *data = it87_update_device(dev);
5f2dc798
JD
705 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
706 DIV_FROM_REG(data->fan_div[nr])));
1da177e4 707}
20ad93d4
JD
708static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
709 char *buf)
1da177e4 710{
20ad93d4
JD
711 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
712 int nr = sensor_attr->index;
713
1da177e4
LT
714 struct it87_data *data = it87_update_device(dev);
715 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
716}
5f2dc798
JD
717static ssize_t show_pwm_enable(struct device *dev,
718 struct device_attribute *attr, char *buf)
1da177e4 719{
20ad93d4
JD
720 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
721 int nr = sensor_attr->index;
722
1da177e4 723 struct it87_data *data = it87_update_device(dev);
b99883dc 724 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 725}
20ad93d4
JD
726static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
727 char *buf)
1da177e4 728{
20ad93d4
JD
729 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
730 int nr = sensor_attr->index;
731
1da177e4 732 struct it87_data *data = it87_update_device(dev);
44c1bcd4
JD
733 return sprintf(buf, "%d\n",
734 pwm_from_reg(data, data->pwm_duty[nr]));
1da177e4 735}
f8d0c19a
JD
736static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
737 char *buf)
738{
739 struct it87_data *data = it87_update_device(dev);
740 int index = (data->fan_ctl >> 4) & 0x07;
741
742 return sprintf(buf, "%u\n", pwm_freq[index]);
743}
20ad93d4
JD
744static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
745 const char *buf, size_t count)
1da177e4 746{
20ad93d4
JD
747 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
748 int nr = sensor_attr->index;
749
b74f3fdd 750 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 751 long val;
7f999aa7 752 u8 reg;
1da177e4 753
179c4fdb 754 if (kstrtol(buf, 10, &val) < 0)
f5f64501
JD
755 return -EINVAL;
756
9a61bf63 757 mutex_lock(&data->update_lock);
b74f3fdd 758 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d 759 switch (nr) {
5f2dc798
JD
760 case 0:
761 data->fan_div[nr] = reg & 0x07;
762 break;
763 case 1:
764 data->fan_div[nr] = (reg >> 3) & 0x07;
765 break;
766 case 2:
767 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
768 break;
07eab46d
JD
769 }
770
1da177e4 771 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 772 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
9a61bf63 773 mutex_unlock(&data->update_lock);
1da177e4
LT
774 return count;
775}
20ad93d4
JD
776static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
777 const char *buf, size_t count)
1da177e4 778{
20ad93d4
JD
779 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
780 int nr = sensor_attr->index;
781
b74f3fdd 782 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 783 unsigned long val;
8ab4ec3e 784 int min;
1da177e4
LT
785 u8 old;
786
179c4fdb 787 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD
788 return -EINVAL;
789
9a61bf63 790 mutex_lock(&data->update_lock);
b74f3fdd 791 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 792
8ab4ec3e
JD
793 /* Save fan min limit */
794 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT
795
796 switch (nr) {
797 case 0:
798 case 1:
799 data->fan_div[nr] = DIV_TO_REG(val);
800 break;
801 case 2:
802 if (val < 8)
803 data->fan_div[nr] = 1;
804 else
805 data->fan_div[nr] = 3;
806 }
807 val = old & 0x80;
808 val |= (data->fan_div[0] & 0x07);
809 val |= (data->fan_div[1] & 0x07) << 3;
810 if (data->fan_div[2] == 3)
811 val |= 0x1 << 6;
b74f3fdd 812 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 813
8ab4ec3e
JD
814 /* Restore fan min limit */
815 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 816 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
8ab4ec3e 817
9a61bf63 818 mutex_unlock(&data->update_lock);
1da177e4
LT
819 return count;
820}
cccfc9c4
JD
821
822/* Returns 0 if OK, -EINVAL otherwise */
823static int check_trip_points(struct device *dev, int nr)
824{
825 const struct it87_data *data = dev_get_drvdata(dev);
826 int i, err = 0;
827
828 if (has_old_autopwm(data)) {
829 for (i = 0; i < 3; i++) {
830 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
831 err = -EINVAL;
832 }
833 for (i = 0; i < 2; i++) {
834 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
835 err = -EINVAL;
836 }
837 }
838
839 if (err) {
840 dev_err(dev, "Inconsistent trip points, not switching to "
841 "automatic mode\n");
842 dev_err(dev, "Adjust the trip points and try again\n");
843 }
844 return err;
845}
846
20ad93d4
JD
847static ssize_t set_pwm_enable(struct device *dev,
848 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 849{
20ad93d4
JD
850 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
851 int nr = sensor_attr->index;
852
b74f3fdd 853 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 854 long val;
1da177e4 855
179c4fdb 856 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD
857 return -EINVAL;
858
cccfc9c4
JD
859 /* Check trip points before switching to automatic mode */
860 if (val == 2) {
861 if (check_trip_points(dev, nr) < 0)
862 return -EINVAL;
863 }
864
9a61bf63 865 mutex_lock(&data->update_lock);
1da177e4
LT
866
867 if (val == 0) {
868 int tmp;
869 /* make sure the fan is on when in on/off mode */
b74f3fdd 870 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
871 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT
872 /* set on/off mode */
873 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD
874 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
875 data->fan_main_ctrl);
b99883dc
JD
876 } else {
877 if (val == 1) /* Manual mode */
16b5dda2 878 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
6229cdb2
JD
879 data->pwm_temp_map[nr] :
880 data->pwm_duty[nr];
b99883dc
JD
881 else /* Automatic mode */
882 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
883 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT
884 /* set SmartGuardian mode */
885 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD
886 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
887 data->fan_main_ctrl);
1da177e4
LT
888 }
889
9a61bf63 890 mutex_unlock(&data->update_lock);
1da177e4
LT
891 return count;
892}
20ad93d4
JD
893static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
894 const char *buf, size_t count)
1da177e4 895{
20ad93d4
JD
896 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
897 int nr = sensor_attr->index;
898
b74f3fdd 899 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 900 long val;
1da177e4 901
179c4fdb 902 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT
903 return -EINVAL;
904
9a61bf63 905 mutex_lock(&data->update_lock);
16b5dda2 906 if (has_newer_autopwm(data)) {
4a0d71cf
GR
907 /*
908 * If we are in automatic mode, the PWM duty cycle register
909 * is read-only so we can't write the value.
910 */
6229cdb2
JD
911 if (data->pwm_ctrl[nr] & 0x80) {
912 mutex_unlock(&data->update_lock);
913 return -EBUSY;
914 }
915 data->pwm_duty[nr] = pwm_to_reg(data, val);
916 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
917 data->pwm_duty[nr]);
918 } else {
919 data->pwm_duty[nr] = pwm_to_reg(data, val);
4a0d71cf
GR
920 /*
921 * If we are in manual mode, write the duty cycle immediately;
922 * otherwise, just store it for later use.
923 */
6229cdb2
JD
924 if (!(data->pwm_ctrl[nr] & 0x80)) {
925 data->pwm_ctrl[nr] = data->pwm_duty[nr];
926 it87_write_value(data, IT87_REG_PWM(nr),
927 data->pwm_ctrl[nr]);
928 }
b99883dc 929 }
9a61bf63 930 mutex_unlock(&data->update_lock);
1da177e4
LT
931 return count;
932}
f8d0c19a
JD
933static ssize_t set_pwm_freq(struct device *dev,
934 struct device_attribute *attr, const char *buf, size_t count)
935{
b74f3fdd 936 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 937 unsigned long val;
f8d0c19a
JD
938 int i;
939
179c4fdb 940 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD
941 return -EINVAL;
942
f8d0c19a
JD
943 /* Search for the nearest available frequency */
944 for (i = 0; i < 7; i++) {
945 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
946 break;
947 }
948
949 mutex_lock(&data->update_lock);
b74f3fdd 950 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 951 data->fan_ctl |= i << 4;
b74f3fdd 952 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD
953 mutex_unlock(&data->update_lock);
954
955 return count;
956}
94ac7ee6
JD
957static ssize_t show_pwm_temp_map(struct device *dev,
958 struct device_attribute *attr, char *buf)
959{
960 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
961 int nr = sensor_attr->index;
962
963 struct it87_data *data = it87_update_device(dev);
964 int map;
965
966 if (data->pwm_temp_map[nr] < 3)
967 map = 1 << data->pwm_temp_map[nr];
968 else
969 map = 0; /* Should never happen */
970 return sprintf(buf, "%d\n", map);
971}
972static ssize_t set_pwm_temp_map(struct device *dev,
973 struct device_attribute *attr, const char *buf, size_t count)
974{
975 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
976 int nr = sensor_attr->index;
977
978 struct it87_data *data = dev_get_drvdata(dev);
979 long val;
980 u8 reg;
981
4a0d71cf
GR
982 /*
983 * This check can go away if we ever support automatic fan speed
984 * control on newer chips.
985 */
4f3f51bc
JD
986 if (!has_old_autopwm(data)) {
987 dev_notice(dev, "Mapping change disabled for safety reasons\n");
988 return -EINVAL;
989 }
990
179c4fdb 991 if (kstrtol(buf, 10, &val) < 0)
94ac7ee6
JD
992 return -EINVAL;
993
994 switch (val) {
995 case (1 << 0):
996 reg = 0x00;
997 break;
998 case (1 << 1):
999 reg = 0x01;
1000 break;
1001 case (1 << 2):
1002 reg = 0x02;
1003 break;
1004 default:
1005 return -EINVAL;
1006 }
1007
1008 mutex_lock(&data->update_lock);
1009 data->pwm_temp_map[nr] = reg;
4a0d71cf
GR
1010 /*
1011 * If we are in automatic mode, write the temp mapping immediately;
1012 * otherwise, just store it for later use.
1013 */
94ac7ee6
JD
1014 if (data->pwm_ctrl[nr] & 0x80) {
1015 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1016 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1017 }
1018 mutex_unlock(&data->update_lock);
1019 return count;
1020}
1da177e4 1021
4f3f51bc
JD
1022static ssize_t show_auto_pwm(struct device *dev,
1023 struct device_attribute *attr, char *buf)
1024{
1025 struct it87_data *data = it87_update_device(dev);
1026 struct sensor_device_attribute_2 *sensor_attr =
1027 to_sensor_dev_attr_2(attr);
1028 int nr = sensor_attr->nr;
1029 int point = sensor_attr->index;
1030
44c1bcd4
JD
1031 return sprintf(buf, "%d\n",
1032 pwm_from_reg(data, data->auto_pwm[nr][point]));
4f3f51bc
JD
1033}
1034
1035static ssize_t set_auto_pwm(struct device *dev,
1036 struct device_attribute *attr, const char *buf, size_t count)
1037{
1038 struct it87_data *data = dev_get_drvdata(dev);
1039 struct sensor_device_attribute_2 *sensor_attr =
1040 to_sensor_dev_attr_2(attr);
1041 int nr = sensor_attr->nr;
1042 int point = sensor_attr->index;
1043 long val;
1044
179c4fdb 1045 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
4f3f51bc
JD
1046 return -EINVAL;
1047
1048 mutex_lock(&data->update_lock);
44c1bcd4 1049 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
4f3f51bc
JD
1050 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1051 data->auto_pwm[nr][point]);
1052 mutex_unlock(&data->update_lock);
1053 return count;
1054}
1055
1056static ssize_t show_auto_temp(struct device *dev,
1057 struct device_attribute *attr, char *buf)
1058{
1059 struct it87_data *data = it87_update_device(dev);
1060 struct sensor_device_attribute_2 *sensor_attr =
1061 to_sensor_dev_attr_2(attr);
1062 int nr = sensor_attr->nr;
1063 int point = sensor_attr->index;
1064
1065 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1066}
1067
1068static ssize_t set_auto_temp(struct device *dev,
1069 struct device_attribute *attr, const char *buf, size_t count)
1070{
1071 struct it87_data *data = dev_get_drvdata(dev);
1072 struct sensor_device_attribute_2 *sensor_attr =
1073 to_sensor_dev_attr_2(attr);
1074 int nr = sensor_attr->nr;
1075 int point = sensor_attr->index;
1076 long val;
1077
179c4fdb 1078 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
4f3f51bc
JD
1079 return -EINVAL;
1080
1081 mutex_lock(&data->update_lock);
1082 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1083 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1084 data->auto_temp[nr][point]);
1085 mutex_unlock(&data->update_lock);
1086 return count;
1087}
1088
20ad93d4
JD
1089#define show_fan_offset(offset) \
1090static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
1091 show_fan, NULL, offset - 1); \
1092static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1093 show_fan_min, set_fan_min, offset - 1); \
1094static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
1095 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT
1096
1097show_fan_offset(1);
1098show_fan_offset(2);
1099show_fan_offset(3);
1100
1101#define show_pwm_offset(offset) \
20ad93d4
JD
1102static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
1103 show_pwm_enable, set_pwm_enable, offset - 1); \
1104static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD
1105 show_pwm, set_pwm, offset - 1); \
1106static DEVICE_ATTR(pwm##offset##_freq, \
1107 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
94ac7ee6
JD
1108 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
1109static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
4f3f51bc
JD
1110 S_IRUGO | S_IWUSR, show_pwm_temp_map, set_pwm_temp_map, \
1111 offset - 1); \
1112static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_pwm, \
1113 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1114 offset - 1, 0); \
1115static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_pwm, \
1116 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1117 offset - 1, 1); \
1118static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_pwm, \
1119 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1120 offset - 1, 2); \
1121static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_pwm, \
1122 S_IRUGO, show_auto_pwm, NULL, offset - 1, 3); \
1123static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp, \
1124 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1125 offset - 1, 1); \
1126static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp_hyst, \
1127 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1128 offset - 1, 0); \
1129static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_temp, \
1130 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1131 offset - 1, 2); \
1132static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_temp, \
1133 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1134 offset - 1, 3); \
1135static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_temp, \
1136 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1137 offset - 1, 4);
1da177e4
LT
1138
1139show_pwm_offset(1);
1140show_pwm_offset(2);
1141show_pwm_offset(3);
1142
17d648bf
JD
1143/* A different set of callbacks for 16-bit fans */
1144static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
1145 char *buf)
1146{
1147 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1148 int nr = sensor_attr->index;
1149 struct it87_data *data = it87_update_device(dev);
1150 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
1151}
1152
1153static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
1154 char *buf)
1155{
1156 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1157 int nr = sensor_attr->index;
1158 struct it87_data *data = it87_update_device(dev);
1159 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
1160}
1161
1162static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
1163 const char *buf, size_t count)
1164{
1165 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1166 int nr = sensor_attr->index;
b74f3fdd 1167 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
1168 long val;
1169
179c4fdb 1170 if (kstrtol(buf, 10, &val) < 0)
f5f64501 1171 return -EINVAL;
17d648bf
JD
1172
1173 mutex_lock(&data->update_lock);
1174 data->fan_min[nr] = FAN16_TO_REG(val);
c7f1f716 1175 it87_write_value(data, IT87_REG_FAN_MIN[nr],
17d648bf 1176 data->fan_min[nr] & 0xff);
c7f1f716 1177 it87_write_value(data, IT87_REG_FANX_MIN[nr],
17d648bf
JD
1178 data->fan_min[nr] >> 8);
1179 mutex_unlock(&data->update_lock);
1180 return count;
1181}
1182
4a0d71cf
GR
1183/*
1184 * We want to use the same sysfs file names as 8-bit fans, but we need
1185 * different variable names, so we have to use SENSOR_ATTR instead of
1186 * SENSOR_DEVICE_ATTR.
1187 */
17d648bf
JD
1188#define show_fan16_offset(offset) \
1189static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
1190 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
1191 show_fan16, NULL, offset - 1); \
1192static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
1193 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1194 show_fan16_min, set_fan16_min, offset - 1)
1195
1196show_fan16_offset(1);
1197show_fan16_offset(2);
1198show_fan16_offset(3);
c7f1f716
JD
1199show_fan16_offset(4);
1200show_fan16_offset(5);
17d648bf 1201
1da177e4 1202/* Alarms */
5f2dc798
JD
1203static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1204 char *buf)
1da177e4
LT
1205{
1206 struct it87_data *data = it87_update_device(dev);
68188ba7 1207 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1208}
1d66c64c 1209static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1210
0124dd78
JD
1211static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1212 char *buf)
1213{
1214 int bitnr = to_sensor_dev_attr(attr)->index;
1215 struct it87_data *data = it87_update_device(dev);
1216 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1217}
3d30f9e6
JD
1218
1219static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1220 *attr, const char *buf, size_t count)
1221{
1222 struct it87_data *data = dev_get_drvdata(dev);
1223 long val;
1224 int config;
1225
179c4fdb 1226 if (kstrtol(buf, 10, &val) < 0 || val != 0)
3d30f9e6
JD
1227 return -EINVAL;
1228
1229 mutex_lock(&data->update_lock);
1230 config = it87_read_value(data, IT87_REG_CONFIG);
1231 if (config < 0) {
1232 count = config;
1233 } else {
1234 config |= 1 << 5;
1235 it87_write_value(data, IT87_REG_CONFIG, config);
1236 /* Invalidate cache to force re-read */
1237 data->valid = 0;
1238 }
1239 mutex_unlock(&data->update_lock);
1240
1241 return count;
1242}
1243
0124dd78
JD
1244static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1245static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1246static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1247static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1248static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1249static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1250static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1251static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1252static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1253static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1254static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1255static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1256static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1257static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1258static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1259static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
3d30f9e6
JD
1260static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1261 show_alarm, clear_intrusion, 4);
0124dd78 1262
d9b327c3
JD
1263static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1264 char *buf)
1265{
1266 int bitnr = to_sensor_dev_attr(attr)->index;
1267 struct it87_data *data = it87_update_device(dev);
1268 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1269}
1270static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1271 const char *buf, size_t count)
1272{
1273 int bitnr = to_sensor_dev_attr(attr)->index;
1274 struct it87_data *data = dev_get_drvdata(dev);
1275 long val;
1276
179c4fdb 1277 if (kstrtol(buf, 10, &val) < 0
d9b327c3
JD
1278 || (val != 0 && val != 1))
1279 return -EINVAL;
1280
1281 mutex_lock(&data->update_lock);
1282 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1283 if (val)
1284 data->beeps |= (1 << bitnr);
1285 else
1286 data->beeps &= ~(1 << bitnr);
1287 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1288 mutex_unlock(&data->update_lock);
1289 return count;
1290}
1291
1292static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1293 show_beep, set_beep, 1);
1294static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1295static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1296static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1297static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1298static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1299static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1300static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1301/* fanX_beep writability is set later */
1302static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1303static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1304static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1305static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1306static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1307static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1308 show_beep, set_beep, 2);
1309static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1310static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1311
5f2dc798
JD
1312static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1313 char *buf)
1da177e4 1314{
90d6619a 1315 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1316 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1317}
5f2dc798
JD
1318static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1319 const char *buf, size_t count)
1da177e4 1320{
b74f3fdd 1321 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
1322 unsigned long val;
1323
179c4fdb 1324 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 1325 return -EINVAL;
1da177e4 1326
1da177e4
LT
1327 data->vrm = val;
1328
1329 return count;
1330}
1331static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1332
5f2dc798
JD
1333static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1334 char *buf)
1da177e4
LT
1335{
1336 struct it87_data *data = it87_update_device(dev);
1337 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1338}
1339static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1340
738e5e05
JD
1341static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1342 char *buf)
1343{
1344 static const char *labels[] = {
1345 "+5V",
1346 "5VSB",
1347 "Vbat",
1348 };
44c1bcd4
JD
1349 static const char *labels_it8721[] = {
1350 "+3.3V",
1351 "3VSB",
1352 "Vbat",
1353 };
1354 struct it87_data *data = dev_get_drvdata(dev);
738e5e05
JD
1355 int nr = to_sensor_dev_attr(attr)->index;
1356
16b5dda2
JD
1357 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1358 : labels[nr]);
738e5e05
JD
1359}
1360static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1361static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1362static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1363
b74f3fdd 1364static ssize_t show_name(struct device *dev, struct device_attribute
1365 *devattr, char *buf)
1366{
1367 struct it87_data *data = dev_get_drvdata(dev);
1368 return sprintf(buf, "%s\n", data->name);
1369}
1370static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1371
87808be4
JD
1372static struct attribute *it87_attributes[] = {
1373 &sensor_dev_attr_in0_input.dev_attr.attr,
1374 &sensor_dev_attr_in1_input.dev_attr.attr,
1375 &sensor_dev_attr_in2_input.dev_attr.attr,
1376 &sensor_dev_attr_in3_input.dev_attr.attr,
1377 &sensor_dev_attr_in4_input.dev_attr.attr,
1378 &sensor_dev_attr_in5_input.dev_attr.attr,
1379 &sensor_dev_attr_in6_input.dev_attr.attr,
1380 &sensor_dev_attr_in7_input.dev_attr.attr,
1381 &sensor_dev_attr_in8_input.dev_attr.attr,
1382 &sensor_dev_attr_in0_min.dev_attr.attr,
1383 &sensor_dev_attr_in1_min.dev_attr.attr,
1384 &sensor_dev_attr_in2_min.dev_attr.attr,
1385 &sensor_dev_attr_in3_min.dev_attr.attr,
1386 &sensor_dev_attr_in4_min.dev_attr.attr,
1387 &sensor_dev_attr_in5_min.dev_attr.attr,
1388 &sensor_dev_attr_in6_min.dev_attr.attr,
1389 &sensor_dev_attr_in7_min.dev_attr.attr,
1390 &sensor_dev_attr_in0_max.dev_attr.attr,
1391 &sensor_dev_attr_in1_max.dev_attr.attr,
1392 &sensor_dev_attr_in2_max.dev_attr.attr,
1393 &sensor_dev_attr_in3_max.dev_attr.attr,
1394 &sensor_dev_attr_in4_max.dev_attr.attr,
1395 &sensor_dev_attr_in5_max.dev_attr.attr,
1396 &sensor_dev_attr_in6_max.dev_attr.attr,
1397 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78
JD
1398 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1399 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1400 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1401 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1402 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1403 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1404 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1405 &sensor_dev_attr_in7_alarm.dev_attr.attr,
87808be4
JD
1406
1407 &sensor_dev_attr_temp1_input.dev_attr.attr,
1408 &sensor_dev_attr_temp2_input.dev_attr.attr,
1409 &sensor_dev_attr_temp3_input.dev_attr.attr,
1410 &sensor_dev_attr_temp1_max.dev_attr.attr,
1411 &sensor_dev_attr_temp2_max.dev_attr.attr,
1412 &sensor_dev_attr_temp3_max.dev_attr.attr,
1413 &sensor_dev_attr_temp1_min.dev_attr.attr,
1414 &sensor_dev_attr_temp2_min.dev_attr.attr,
1415 &sensor_dev_attr_temp3_min.dev_attr.attr,
1416 &sensor_dev_attr_temp1_type.dev_attr.attr,
1417 &sensor_dev_attr_temp2_type.dev_attr.attr,
1418 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78
JD
1419 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1420 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1421 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
87808be4
JD
1422
1423 &dev_attr_alarms.attr,
3d30f9e6 1424 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
b74f3fdd 1425 &dev_attr_name.attr,
87808be4
JD
1426 NULL
1427};
1428
1429static const struct attribute_group it87_group = {
1430 .attrs = it87_attributes,
1431};
1432
d9b327c3
JD
1433static struct attribute *it87_attributes_beep[] = {
1434 &sensor_dev_attr_in0_beep.dev_attr.attr,
1435 &sensor_dev_attr_in1_beep.dev_attr.attr,
1436 &sensor_dev_attr_in2_beep.dev_attr.attr,
1437 &sensor_dev_attr_in3_beep.dev_attr.attr,
1438 &sensor_dev_attr_in4_beep.dev_attr.attr,
1439 &sensor_dev_attr_in5_beep.dev_attr.attr,
1440 &sensor_dev_attr_in6_beep.dev_attr.attr,
1441 &sensor_dev_attr_in7_beep.dev_attr.attr,
1442
1443 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1444 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1445 &sensor_dev_attr_temp3_beep.dev_attr.attr,
1446 NULL
1447};
1448
1449static const struct attribute_group it87_group_beep = {
1450 .attrs = it87_attributes_beep,
1451};
1452
723a0aa0 1453static struct attribute *it87_attributes_fan16[5][3+1] = { {
87808be4
JD
1454 &sensor_dev_attr_fan1_input16.dev_attr.attr,
1455 &sensor_dev_attr_fan1_min16.dev_attr.attr,
723a0aa0
JD
1456 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1457 NULL
1458}, {
87808be4
JD
1459 &sensor_dev_attr_fan2_input16.dev_attr.attr,
1460 &sensor_dev_attr_fan2_min16.dev_attr.attr,
723a0aa0
JD
1461 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1462 NULL
1463}, {
87808be4
JD
1464 &sensor_dev_attr_fan3_input16.dev_attr.attr,
1465 &sensor_dev_attr_fan3_min16.dev_attr.attr,
723a0aa0
JD
1466 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1467 NULL
1468}, {
c7f1f716
JD
1469 &sensor_dev_attr_fan4_input16.dev_attr.attr,
1470 &sensor_dev_attr_fan4_min16.dev_attr.attr,
723a0aa0
JD
1471 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1472 NULL
1473}, {
c7f1f716
JD
1474 &sensor_dev_attr_fan5_input16.dev_attr.attr,
1475 &sensor_dev_attr_fan5_min16.dev_attr.attr,
723a0aa0
JD
1476 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1477 NULL
1478} };
1479
1480static const struct attribute_group it87_group_fan16[5] = {
1481 { .attrs = it87_attributes_fan16[0] },
1482 { .attrs = it87_attributes_fan16[1] },
1483 { .attrs = it87_attributes_fan16[2] },
1484 { .attrs = it87_attributes_fan16[3] },
1485 { .attrs = it87_attributes_fan16[4] },
1486};
87808be4 1487
723a0aa0 1488static struct attribute *it87_attributes_fan[3][4+1] = { {
87808be4
JD
1489 &sensor_dev_attr_fan1_input.dev_attr.attr,
1490 &sensor_dev_attr_fan1_min.dev_attr.attr,
1491 &sensor_dev_attr_fan1_div.dev_attr.attr,
723a0aa0
JD
1492 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1493 NULL
1494}, {
87808be4
JD
1495 &sensor_dev_attr_fan2_input.dev_attr.attr,
1496 &sensor_dev_attr_fan2_min.dev_attr.attr,
1497 &sensor_dev_attr_fan2_div.dev_attr.attr,
723a0aa0
JD
1498 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1499 NULL
1500}, {
87808be4
JD
1501 &sensor_dev_attr_fan3_input.dev_attr.attr,
1502 &sensor_dev_attr_fan3_min.dev_attr.attr,
1503 &sensor_dev_attr_fan3_div.dev_attr.attr,
0124dd78 1504 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
723a0aa0
JD
1505 NULL
1506} };
1507
1508static const struct attribute_group it87_group_fan[3] = {
1509 { .attrs = it87_attributes_fan[0] },
1510 { .attrs = it87_attributes_fan[1] },
1511 { .attrs = it87_attributes_fan[2] },
1512};
1513
1514static const struct attribute_group *
1515it87_get_fan_group(const struct it87_data *data)
1516{
1517 return has_16bit_fans(data) ? it87_group_fan16 : it87_group_fan;
1518}
0124dd78 1519
723a0aa0 1520static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1521 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1522 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1523 &dev_attr_pwm1_freq.attr,
94ac7ee6 1524 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1525 NULL
1526}, {
1527 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1528 &sensor_dev_attr_pwm2.dev_attr.attr,
1529 &dev_attr_pwm2_freq.attr,
94ac7ee6 1530 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1531 NULL
1532}, {
1533 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1534 &sensor_dev_attr_pwm3.dev_attr.attr,
1535 &dev_attr_pwm3_freq.attr,
94ac7ee6 1536 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1537 NULL
1538} };
87808be4 1539
723a0aa0
JD
1540static const struct attribute_group it87_group_pwm[3] = {
1541 { .attrs = it87_attributes_pwm[0] },
1542 { .attrs = it87_attributes_pwm[1] },
1543 { .attrs = it87_attributes_pwm[2] },
1544};
1545
4f3f51bc
JD
1546static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1547 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1548 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1549 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1550 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1551 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1552 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1553 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1554 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1555 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1556 NULL
1557}, {
1558 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1559 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1560 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1561 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1562 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1563 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1564 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1565 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1566 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1567 NULL
1568}, {
1569 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1570 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1571 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1572 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1573 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1574 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1575 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1576 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1577 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1578 NULL
1579} };
1580
1581static const struct attribute_group it87_group_autopwm[3] = {
1582 { .attrs = it87_attributes_autopwm[0] },
1583 { .attrs = it87_attributes_autopwm[1] },
1584 { .attrs = it87_attributes_autopwm[2] },
1585};
1586
d9b327c3
JD
1587static struct attribute *it87_attributes_fan_beep[] = {
1588 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1589 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1590 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1591 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1592 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1593};
1594
6a8d7acf 1595static struct attribute *it87_attributes_vid[] = {
87808be4
JD
1596 &dev_attr_vrm.attr,
1597 &dev_attr_cpu0_vid.attr,
1598 NULL
1599};
1600
6a8d7acf
JD
1601static const struct attribute_group it87_group_vid = {
1602 .attrs = it87_attributes_vid,
87808be4 1603};
1da177e4 1604
738e5e05
JD
1605static struct attribute *it87_attributes_label[] = {
1606 &sensor_dev_attr_in3_label.dev_attr.attr,
1607 &sensor_dev_attr_in7_label.dev_attr.attr,
1608 &sensor_dev_attr_in8_label.dev_attr.attr,
1609 NULL
1610};
1611
1612static const struct attribute_group it87_group_label = {
fa8b6975 1613 .attrs = it87_attributes_label,
738e5e05
JD
1614};
1615
2d8672c5 1616/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1617static int __init it87_find(unsigned short *address,
1618 struct it87_sio_data *sio_data)
1da177e4 1619{
5b0380c9 1620 int err;
b74f3fdd 1621 u16 chip_type;
98dd22c3 1622 const char *board_vendor, *board_name;
1da177e4 1623
5b0380c9
NG
1624 err = superio_enter();
1625 if (err)
1626 return err;
1627
1628 err = -ENODEV;
67b671bc 1629 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1630
1631 switch (chip_type) {
1632 case IT8705F_DEVID:
1633 sio_data->type = it87;
1634 break;
1635 case IT8712F_DEVID:
1636 sio_data->type = it8712;
1637 break;
1638 case IT8716F_DEVID:
1639 case IT8726F_DEVID:
1640 sio_data->type = it8716;
1641 break;
1642 case IT8718F_DEVID:
1643 sio_data->type = it8718;
1644 break;
b4da93e4
JMS
1645 case IT8720F_DEVID:
1646 sio_data->type = it8720;
1647 break;
44c1bcd4
JD
1648 case IT8721F_DEVID:
1649 sio_data->type = it8721;
1650 break;
16b5dda2
JD
1651 case IT8728F_DEVID:
1652 sio_data->type = it8728;
1653 break;
b74f3fdd 1654 case 0xffff: /* No device at all */
1655 goto exit;
1656 default:
a8ca1037 1657 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
b74f3fdd 1658 goto exit;
1659 }
1da177e4 1660
87673dd7 1661 superio_select(PME);
1da177e4 1662 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
a8ca1037 1663 pr_info("Device not activated, skipping\n");
1da177e4
LT
1664 goto exit;
1665 }
1666
1667 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1668 if (*address == 0) {
a8ca1037 1669 pr_info("Base address not set, skipping\n");
1da177e4
LT
1670 goto exit;
1671 }
1672
1673 err = 0;
0475169c 1674 sio_data->revision = superio_inb(DEVREV) & 0x0f;
a8ca1037 1675 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1676 chip_type, *address, sio_data->revision);
1da177e4 1677
738e5e05
JD
1678 /* in8 (Vbat) is always internal */
1679 sio_data->internal = (1 << 2);
1680
87673dd7 1681 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD
1682 if (sio_data->type == it87) {
1683 /* The IT8705F doesn't have VID pins at all */
1684 sio_data->skip_vid = 1;
d9b327c3
JD
1685
1686 /* The IT8705F has a different LD number for GPIO */
1687 superio_select(5);
1688 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
895ff267 1689 } else {
87673dd7
JD
1690 int reg;
1691
1692 superio_select(GPIO);
44c1bcd4 1693
895ff267 1694 reg = superio_inb(IT87_SIO_GPIO3_REG);
16b5dda2
JD
1695 if (sio_data->type == it8721 || sio_data->type == it8728) {
1696 /*
1697 * The IT8721F/IT8758E doesn't have VID pins at all,
1698 * not sure about the IT8728F.
1699 */
895ff267 1700 sio_data->skip_vid = 1;
44c1bcd4
JD
1701 } else {
1702 /* We need at least 4 VID pins */
1703 if (reg & 0x0f) {
a8ca1037 1704 pr_info("VID is disabled (pins used for GPIO)\n");
44c1bcd4
JD
1705 sio_data->skip_vid = 1;
1706 }
895ff267
JD
1707 }
1708
591ec650
JD
1709 /* Check if fan3 is there or not */
1710 if (reg & (1 << 6))
1711 sio_data->skip_pwm |= (1 << 2);
1712 if (reg & (1 << 7))
1713 sio_data->skip_fan |= (1 << 2);
1714
1715 /* Check if fan2 is there or not */
1716 reg = superio_inb(IT87_SIO_GPIO5_REG);
1717 if (reg & (1 << 1))
1718 sio_data->skip_pwm |= (1 << 1);
1719 if (reg & (1 << 2))
1720 sio_data->skip_fan |= (1 << 1);
1721
895ff267
JD
1722 if ((sio_data->type == it8718 || sio_data->type == it8720)
1723 && !(sio_data->skip_vid))
b74f3fdd 1724 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD
1725
1726 reg = superio_inb(IT87_SIO_PINX2_REG);
436cad2a
JD
1727 /*
1728 * The IT8720F has no VIN7 pin, so VCCH should always be
1729 * routed internally to VIN7 with an internal divider.
1730 * Curiously, there still is a configuration bit to control
1731 * this, which means it can be set incorrectly. And even
1732 * more curiously, many boards out there are improperly
1733 * configured, even though the IT8720F datasheet claims
1734 * that the internal routing of VCCH to VIN7 is the default
1735 * setting. So we force the internal routing in this case.
1736 */
1737 if (sio_data->type == it8720 && !(reg & (1 << 1))) {
1738 reg |= (1 << 1);
1739 superio_outb(IT87_SIO_PINX2_REG, reg);
a8ca1037 1740 pr_notice("Routing internal VCCH to in7\n");
436cad2a 1741 }
87673dd7 1742 if (reg & (1 << 0))
738e5e05 1743 sio_data->internal |= (1 << 0);
16b5dda2
JD
1744 if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1745 sio_data->type == it8728)
738e5e05 1746 sio_data->internal |= (1 << 1);
d9b327c3
JD
1747
1748 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1749 }
d9b327c3 1750 if (sio_data->beep_pin)
a8ca1037 1751 pr_info("Beeping is supported\n");
87673dd7 1752
98dd22c3
JD
1753 /* Disable specific features based on DMI strings */
1754 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1755 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1756 if (board_vendor && board_name) {
1757 if (strcmp(board_vendor, "nVIDIA") == 0
1758 && strcmp(board_name, "FN68PT") == 0) {
4a0d71cf
GR
1759 /*
1760 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
1761 * connected to a fan, but to something else. One user
1762 * has reported instant system power-off when changing
1763 * the PWM2 duty cycle, so we disable it.
1764 * I use the board name string as the trigger in case
1765 * the same board is ever used in other systems.
1766 */
a8ca1037 1767 pr_info("Disabling pwm2 due to hardware constraints\n");
98dd22c3
JD
1768 sio_data->skip_pwm = (1 << 1);
1769 }
1770 }
1771
1da177e4
LT
1772exit:
1773 superio_exit();
1774 return err;
1775}
1776
723a0aa0
JD
1777static void it87_remove_files(struct device *dev)
1778{
1779 struct it87_data *data = platform_get_drvdata(pdev);
1780 struct it87_sio_data *sio_data = dev->platform_data;
1781 const struct attribute_group *fan_group = it87_get_fan_group(data);
1782 int i;
1783
1784 sysfs_remove_group(&dev->kobj, &it87_group);
d9b327c3
JD
1785 if (sio_data->beep_pin)
1786 sysfs_remove_group(&dev->kobj, &it87_group_beep);
723a0aa0
JD
1787 for (i = 0; i < 5; i++) {
1788 if (!(data->has_fan & (1 << i)))
1789 continue;
1790 sysfs_remove_group(&dev->kobj, &fan_group[i]);
d9b327c3
JD
1791 if (sio_data->beep_pin)
1792 sysfs_remove_file(&dev->kobj,
1793 it87_attributes_fan_beep[i]);
723a0aa0
JD
1794 }
1795 for (i = 0; i < 3; i++) {
1796 if (sio_data->skip_pwm & (1 << 0))
1797 continue;
1798 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD
1799 if (has_old_autopwm(data))
1800 sysfs_remove_group(&dev->kobj,
1801 &it87_group_autopwm[i]);
723a0aa0 1802 }
6a8d7acf
JD
1803 if (!sio_data->skip_vid)
1804 sysfs_remove_group(&dev->kobj, &it87_group_vid);
738e5e05 1805 sysfs_remove_group(&dev->kobj, &it87_group_label);
723a0aa0
JD
1806}
1807
b74f3fdd 1808static int __devinit it87_probe(struct platform_device *pdev)
1da177e4 1809{
1da177e4 1810 struct it87_data *data;
b74f3fdd 1811 struct resource *res;
1812 struct device *dev = &pdev->dev;
1813 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD
1814 const struct attribute_group *fan_group;
1815 int err = 0, i;
1da177e4 1816 int enable_pwm_interface;
d9b327c3 1817 int fan_beep_need_rw;
b74f3fdd 1818 static const char *names[] = {
1819 "it87",
1820 "it8712",
1821 "it8716",
1822 "it8718",
b4da93e4 1823 "it8720",
44c1bcd4 1824 "it8721",
16b5dda2 1825 "it8728",
b74f3fdd 1826 };
1827
1828 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
87b4b663 1829 if (!request_region(res->start, IT87_EC_EXTENT, DRVNAME)) {
b74f3fdd 1830 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1831 (unsigned long)res->start,
87b4b663 1832 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
8e9afcbb
JD
1833 err = -EBUSY;
1834 goto ERROR0;
1835 }
1da177e4 1836
5f2dc798
JD
1837 data = kzalloc(sizeof(struct it87_data), GFP_KERNEL);
1838 if (!data) {
1da177e4
LT
1839 err = -ENOMEM;
1840 goto ERROR1;
1841 }
1da177e4 1842
b74f3fdd 1843 data->addr = res->start;
1844 data->type = sio_data->type;
0475169c 1845 data->revision = sio_data->revision;
b74f3fdd 1846 data->name = names[sio_data->type];
1da177e4
LT
1847
1848 /* Now, we do the remaining detection. */
b74f3fdd 1849 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
1850 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
8e9afcbb
JD
1851 err = -ENODEV;
1852 goto ERROR2;
1da177e4
LT
1853 }
1854
b74f3fdd 1855 platform_set_drvdata(pdev, data);
1da177e4 1856
9a61bf63 1857 mutex_init(&data->update_lock);
1da177e4 1858
1da177e4 1859 /* Check PWM configuration */
b74f3fdd 1860 enable_pwm_interface = it87_check_pwm(dev);
1da177e4 1861
44c1bcd4 1862 /* Starting with IT8721F, we handle scaling of internal voltages */
16b5dda2 1863 if (has_12mv_adc(data)) {
44c1bcd4
JD
1864 if (sio_data->internal & (1 << 0))
1865 data->in_scaled |= (1 << 3); /* in3 is AVCC */
1866 if (sio_data->internal & (1 << 1))
1867 data->in_scaled |= (1 << 7); /* in7 is VSB */
1868 if (sio_data->internal & (1 << 2))
1869 data->in_scaled |= (1 << 8); /* in8 is Vbat */
1870 }
1871
1da177e4 1872 /* Initialize the IT87 chip */
b74f3fdd 1873 it87_init_device(pdev);
1da177e4
LT
1874
1875 /* Register sysfs hooks */
5f2dc798
JD
1876 err = sysfs_create_group(&dev->kobj, &it87_group);
1877 if (err)
b74f3fdd 1878 goto ERROR2;
17d648bf 1879
d9b327c3
JD
1880 if (sio_data->beep_pin) {
1881 err = sysfs_create_group(&dev->kobj, &it87_group_beep);
1882 if (err)
1883 goto ERROR4;
1884 }
1885
9060f8bd 1886 /* Do not create fan files for disabled fans */
723a0aa0 1887 fan_group = it87_get_fan_group(data);
d9b327c3 1888 fan_beep_need_rw = 1;
723a0aa0
JD
1889 for (i = 0; i < 5; i++) {
1890 if (!(data->has_fan & (1 << i)))
1891 continue;
1892 err = sysfs_create_group(&dev->kobj, &fan_group[i]);
1893 if (err)
1894 goto ERROR4;
d9b327c3
JD
1895
1896 if (sio_data->beep_pin) {
1897 err = sysfs_create_file(&dev->kobj,
1898 it87_attributes_fan_beep[i]);
1899 if (err)
1900 goto ERROR4;
1901 if (!fan_beep_need_rw)
1902 continue;
1903
4a0d71cf
GR
1904 /*
1905 * As we have a single beep enable bit for all fans,
d9b327c3 1906 * only the first enabled fan has a writable attribute
4a0d71cf
GR
1907 * for it.
1908 */
d9b327c3
JD
1909 if (sysfs_chmod_file(&dev->kobj,
1910 it87_attributes_fan_beep[i],
1911 S_IRUGO | S_IWUSR))
1912 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
1913 i + 1);
1914 fan_beep_need_rw = 0;
1915 }
17d648bf
JD
1916 }
1917
1da177e4 1918 if (enable_pwm_interface) {
723a0aa0
JD
1919 for (i = 0; i < 3; i++) {
1920 if (sio_data->skip_pwm & (1 << i))
1921 continue;
1922 err = sysfs_create_group(&dev->kobj,
1923 &it87_group_pwm[i]);
1924 if (err)
98dd22c3 1925 goto ERROR4;
4f3f51bc
JD
1926
1927 if (!has_old_autopwm(data))
1928 continue;
1929 err = sysfs_create_group(&dev->kobj,
1930 &it87_group_autopwm[i]);
1931 if (err)
1932 goto ERROR4;
98dd22c3 1933 }
1da177e4
LT
1934 }
1935
895ff267 1936 if (!sio_data->skip_vid) {
303760b4 1937 data->vrm = vid_which_vrm();
87673dd7 1938 /* VID reading from Super-I/O config space if available */
b74f3fdd 1939 data->vid = sio_data->vid_value;
6a8d7acf
JD
1940 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
1941 if (err)
87808be4
JD
1942 goto ERROR4;
1943 }
1944
738e5e05
JD
1945 /* Export labels for internal sensors */
1946 for (i = 0; i < 3; i++) {
1947 if (!(sio_data->internal & (1 << i)))
1948 continue;
1949 err = sysfs_create_file(&dev->kobj,
1950 it87_attributes_label[i]);
1951 if (err)
1952 goto ERROR4;
1953 }
1954
1beeffe4
TJ
1955 data->hwmon_dev = hwmon_device_register(dev);
1956 if (IS_ERR(data->hwmon_dev)) {
1957 err = PTR_ERR(data->hwmon_dev);
87808be4 1958 goto ERROR4;
1da177e4
LT
1959 }
1960
1961 return 0;
1962
87808be4 1963ERROR4:
723a0aa0 1964 it87_remove_files(dev);
1da177e4 1965ERROR2:
b74f3fdd 1966 platform_set_drvdata(pdev, NULL);
1da177e4
LT
1967 kfree(data);
1968ERROR1:
87b4b663 1969 release_region(res->start, IT87_EC_EXTENT);
1da177e4
LT
1970ERROR0:
1971 return err;
1972}
1973
b74f3fdd 1974static int __devexit it87_remove(struct platform_device *pdev)
1da177e4 1975{
b74f3fdd 1976 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 1977
1beeffe4 1978 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 1979 it87_remove_files(&pdev->dev);
943b0830 1980
87b4b663 1981 release_region(data->addr, IT87_EC_EXTENT);
b74f3fdd 1982 platform_set_drvdata(pdev, NULL);
943b0830 1983 kfree(data);
1da177e4
LT
1984
1985 return 0;
1986}
1987
4a0d71cf
GR
1988/*
1989 * Must be called with data->update_lock held, except during initialization.
1990 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1991 * would slow down the IT87 access and should not be necessary.
1992 */
b74f3fdd 1993static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 1994{
b74f3fdd 1995 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1996 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
1997}
1998
4a0d71cf
GR
1999/*
2000 * Must be called with data->update_lock held, except during initialization.
2001 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2002 * would slow down the IT87 access and should not be necessary.
2003 */
b74f3fdd 2004static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 2005{
b74f3fdd 2006 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2007 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
2008}
2009
2010/* Return 1 if and only if the PWM interface is safe to use */
b74f3fdd 2011static int __devinit it87_check_pwm(struct device *dev)
1da177e4 2012{
b74f3fdd 2013 struct it87_data *data = dev_get_drvdata(dev);
4a0d71cf
GR
2014 /*
2015 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
1da177e4 2016 * and polarity set to active low is sign that this is the case so we
4a0d71cf
GR
2017 * disable pwm control to protect the user.
2018 */
b74f3fdd 2019 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT
2020 if ((tmp & 0x87) == 0) {
2021 if (fix_pwm_polarity) {
4a0d71cf
GR
2022 /*
2023 * The user asks us to attempt a chip reconfiguration.
1da177e4 2024 * This means switching to active high polarity and
4a0d71cf
GR
2025 * inverting all fan speed values.
2026 */
1da177e4
LT
2027 int i;
2028 u8 pwm[3];
2029
2030 for (i = 0; i < 3; i++)
b74f3fdd 2031 pwm[i] = it87_read_value(data,
1da177e4
LT
2032 IT87_REG_PWM(i));
2033
4a0d71cf
GR
2034 /*
2035 * If any fan is in automatic pwm mode, the polarity
1da177e4
LT
2036 * might be correct, as suspicious as it seems, so we
2037 * better don't change anything (but still disable the
4a0d71cf
GR
2038 * PWM interface).
2039 */
1da177e4 2040 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 2041 dev_info(dev, "Reconfiguring PWM to "
1da177e4 2042 "active high polarity\n");
b74f3fdd 2043 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT
2044 tmp | 0x87);
2045 for (i = 0; i < 3; i++)
b74f3fdd 2046 it87_write_value(data,
1da177e4
LT
2047 IT87_REG_PWM(i),
2048 0x7f & ~pwm[i]);
2049 return 1;
2050 }
2051
b74f3fdd 2052 dev_info(dev, "PWM configuration is "
1da177e4
LT
2053 "too broken to be fixed\n");
2054 }
2055
b74f3fdd 2056 dev_info(dev, "Detected broken BIOS "
1da177e4
LT
2057 "defaults, disabling PWM interface\n");
2058 return 0;
2059 } else if (fix_pwm_polarity) {
b74f3fdd 2060 dev_info(dev, "PWM configuration looks "
1da177e4
LT
2061 "sane, won't touch\n");
2062 }
2063
2064 return 1;
2065}
2066
2067/* Called when we have found a new IT87. */
b74f3fdd 2068static void __devinit it87_init_device(struct platform_device *pdev)
1da177e4 2069{
591ec650 2070 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 2071 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2072 int tmp, i;
591ec650 2073 u8 mask;
1da177e4 2074
4a0d71cf
GR
2075 /*
2076 * For each PWM channel:
b99883dc
JD
2077 * - If it is in automatic mode, setting to manual mode should set
2078 * the fan to full speed by default.
2079 * - If it is in manual mode, we need a mapping to temperature
2080 * channels to use when later setting to automatic mode later.
2081 * Use a 1:1 mapping by default (we are clueless.)
2082 * In both cases, the value can (and should) be changed by the user
6229cdb2
JD
2083 * prior to switching to a different mode.
2084 * Note that this is no longer needed for the IT8721F and later, as
2085 * these have separate registers for the temperature mapping and the
4a0d71cf
GR
2086 * manual duty cycle.
2087 */
1da177e4 2088 for (i = 0; i < 3; i++) {
b99883dc
JD
2089 data->pwm_temp_map[i] = i;
2090 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 2091 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT
2092 }
2093
4a0d71cf
GR
2094 /*
2095 * Some chips seem to have default value 0xff for all limit
c5df9b7a
JD
2096 * registers. For low voltage limits it makes no sense and triggers
2097 * alarms, so change to 0 instead. For high temperature limits, it
2098 * means -1 degree C, which surprisingly doesn't trigger an alarm,
4a0d71cf
GR
2099 * but is still confusing, so change to 127 degrees C.
2100 */
c5df9b7a 2101 for (i = 0; i < 8; i++) {
b74f3fdd 2102 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 2103 if (tmp == 0xff)
b74f3fdd 2104 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD
2105 }
2106 for (i = 0; i < 3; i++) {
b74f3fdd 2107 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 2108 if (tmp == 0xff)
b74f3fdd 2109 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD
2110 }
2111
4a0d71cf
GR
2112 /*
2113 * Temperature channels are not forcibly enabled, as they can be
a00afb97
JD
2114 * set to two different sensor types and we can't guess which one
2115 * is correct for a given system. These channels can be enabled at
4a0d71cf
GR
2116 * run-time through the temp{1-3}_type sysfs accessors if needed.
2117 */
1da177e4
LT
2118
2119 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 2120 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT
2121 if ((tmp & 0xff) == 0) {
2122 /* Enable all voltage monitors */
b74f3fdd 2123 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT
2124 }
2125
2126 /* Check if tachometers are reset manually or by some reason */
591ec650 2127 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 2128 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 2129 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 2130 /* Enable all fan tachometers */
591ec650 2131 data->fan_main_ctrl |= mask;
5f2dc798
JD
2132 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2133 data->fan_main_ctrl);
1da177e4 2134 }
9060f8bd 2135 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 2136
17d648bf 2137 /* Set tachometers to 16-bit mode if needed */
0475169c 2138 if (has_16bit_fans(data)) {
b74f3fdd 2139 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 2140 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 2141 dev_dbg(&pdev->dev,
17d648bf 2142 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 2143 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD
2144 tmp | 0x07);
2145 }
816d8c6a
AP
2146 /* IT8705F only supports three fans. */
2147 if (data->type != it87) {
2148 if (tmp & (1 << 4))
2149 data->has_fan |= (1 << 3); /* fan4 enabled */
2150 if (tmp & (1 << 5))
2151 data->has_fan |= (1 << 4); /* fan5 enabled */
2152 }
17d648bf
JD
2153 }
2154
591ec650
JD
2155 /* Fan input pins may be used for alternative functions */
2156 data->has_fan &= ~sio_data->skip_fan;
2157
1da177e4 2158 /* Start monitoring */
b74f3fdd 2159 it87_write_value(data, IT87_REG_CONFIG,
2160 (it87_read_value(data, IT87_REG_CONFIG) & 0x36)
1da177e4
LT
2161 | (update_vbat ? 0x41 : 0x01));
2162}
2163
b99883dc
JD
2164static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2165{
2166 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
16b5dda2 2167 if (has_newer_autopwm(data)) {
b99883dc 2168 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
6229cdb2
JD
2169 data->pwm_duty[nr] = it87_read_value(data,
2170 IT87_REG_PWM_DUTY(nr));
2171 } else {
2172 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2173 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2174 else /* Manual mode */
2175 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2176 }
4f3f51bc
JD
2177
2178 if (has_old_autopwm(data)) {
2179 int i;
2180
2181 for (i = 0; i < 5 ; i++)
2182 data->auto_temp[nr][i] = it87_read_value(data,
2183 IT87_REG_AUTO_TEMP(nr, i));
2184 for (i = 0; i < 3 ; i++)
2185 data->auto_pwm[nr][i] = it87_read_value(data,
2186 IT87_REG_AUTO_PWM(nr, i));
2187 }
b99883dc
JD
2188}
2189
1da177e4
LT
2190static struct it87_data *it87_update_device(struct device *dev)
2191{
b74f3fdd 2192 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
2193 int i;
2194
9a61bf63 2195 mutex_lock(&data->update_lock);
1da177e4
LT
2196
2197 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2198 || !data->valid) {
1da177e4 2199 if (update_vbat) {
4a0d71cf
GR
2200 /*
2201 * Cleared after each update, so reenable. Value
2202 * returned by this read will be previous value
2203 */
b74f3fdd 2204 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 2205 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT
2206 }
2207 for (i = 0; i <= 7; i++) {
2208 data->in[i] =
5f2dc798 2209 it87_read_value(data, IT87_REG_VIN(i));
1da177e4 2210 data->in_min[i] =
5f2dc798 2211 it87_read_value(data, IT87_REG_VIN_MIN(i));
1da177e4 2212 data->in_max[i] =
5f2dc798 2213 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 2214 }
3543a53f 2215 /* in8 (battery) has no limit registers */
5f2dc798 2216 data->in[8] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 2217
c7f1f716 2218 for (i = 0; i < 5; i++) {
9060f8bd
JD
2219 /* Skip disabled fans */
2220 if (!(data->has_fan & (1 << i)))
2221 continue;
2222
1da177e4 2223 data->fan_min[i] =
5f2dc798 2224 it87_read_value(data, IT87_REG_FAN_MIN[i]);
b74f3fdd 2225 data->fan[i] = it87_read_value(data,
c7f1f716 2226 IT87_REG_FAN[i]);
17d648bf 2227 /* Add high byte if in 16-bit mode */
0475169c 2228 if (has_16bit_fans(data)) {
b74f3fdd 2229 data->fan[i] |= it87_read_value(data,
c7f1f716 2230 IT87_REG_FANX[i]) << 8;
b74f3fdd 2231 data->fan_min[i] |= it87_read_value(data,
c7f1f716 2232 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 2233 }
1da177e4
LT
2234 }
2235 for (i = 0; i < 3; i++) {
2236 data->temp[i] =
5f2dc798 2237 it87_read_value(data, IT87_REG_TEMP(i));
1da177e4 2238 data->temp_high[i] =
5f2dc798 2239 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1da177e4 2240 data->temp_low[i] =
5f2dc798 2241 it87_read_value(data, IT87_REG_TEMP_LOW(i));
1da177e4
LT
2242 }
2243
17d648bf 2244 /* Newer chips don't have clock dividers */
0475169c 2245 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 2246 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD
2247 data->fan_div[0] = i & 0x07;
2248 data->fan_div[1] = (i >> 3) & 0x07;
2249 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2250 }
1da177e4
LT
2251
2252 data->alarms =
b74f3fdd 2253 it87_read_value(data, IT87_REG_ALARM1) |
2254 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2255 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2256 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2257
b74f3fdd 2258 data->fan_main_ctrl = it87_read_value(data,
2259 IT87_REG_FAN_MAIN_CTRL);
2260 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD
2261 for (i = 0; i < 3; i++)
2262 it87_update_pwm_ctrl(data, i);
b74f3fdd 2263
2264 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
4a0d71cf
GR
2265 /*
2266 * The IT8705F does not have VID capability.
2267 * The IT8718F and later don't use IT87_REG_VID for the
2268 * same purpose.
2269 */
17d648bf 2270 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2271 data->vid = it87_read_value(data, IT87_REG_VID);
4a0d71cf
GR
2272 /*
2273 * The older IT8712F revisions had only 5 VID pins,
2274 * but we assume it is always safe to read 6 bits.
2275 */
17d648bf 2276 data->vid &= 0x3f;
1da177e4
LT
2277 }
2278 data->last_updated = jiffies;
2279 data->valid = 1;
2280 }
2281
9a61bf63 2282 mutex_unlock(&data->update_lock);
1da177e4
LT
2283
2284 return data;
2285}
2286
b74f3fdd 2287static int __init it87_device_add(unsigned short address,
2288 const struct it87_sio_data *sio_data)
2289{
2290 struct resource res = {
87b4b663
BH
2291 .start = address + IT87_EC_OFFSET,
2292 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2293 .name = DRVNAME,
2294 .flags = IORESOURCE_IO,
2295 };
2296 int err;
2297
b9acb64a
JD
2298 err = acpi_check_resource_conflict(&res);
2299 if (err)
2300 goto exit;
2301
b74f3fdd 2302 pdev = platform_device_alloc(DRVNAME, address);
2303 if (!pdev) {
2304 err = -ENOMEM;
a8ca1037 2305 pr_err("Device allocation failed\n");
b74f3fdd 2306 goto exit;
2307 }
2308
2309 err = platform_device_add_resources(pdev, &res, 1);
2310 if (err) {
a8ca1037 2311 pr_err("Device resource addition failed (%d)\n", err);
b74f3fdd 2312 goto exit_device_put;
2313 }
2314
2315 err = platform_device_add_data(pdev, sio_data,
2316 sizeof(struct it87_sio_data));
2317 if (err) {
a8ca1037 2318 pr_err("Platform data allocation failed\n");
b74f3fdd 2319 goto exit_device_put;
2320 }
2321
2322 err = platform_device_add(pdev);
2323 if (err) {
a8ca1037 2324 pr_err("Device addition failed (%d)\n", err);
b74f3fdd 2325 goto exit_device_put;
2326 }
2327
2328 return 0;
2329
2330exit_device_put:
2331 platform_device_put(pdev);
2332exit:
2333 return err;
2334}
2335
1da177e4
LT
2336static int __init sm_it87_init(void)
2337{
b74f3fdd 2338 int err;
5f2dc798 2339 unsigned short isa_address = 0;
b74f3fdd 2340 struct it87_sio_data sio_data;
2341
98dd22c3 2342 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2343 err = it87_find(&isa_address, &sio_data);
2344 if (err)
2345 return err;
2346 err = platform_driver_register(&it87_driver);
2347 if (err)
2348 return err;
fde09509 2349
b74f3fdd 2350 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2351 if (err) {
b74f3fdd 2352 platform_driver_unregister(&it87_driver);
2353 return err;
2354 }
2355
2356 return 0;
1da177e4
LT
2357}
2358
2359static void __exit sm_it87_exit(void)
2360{
b74f3fdd 2361 platform_device_unregister(pdev);
2362 platform_driver_unregister(&it87_driver);
1da177e4
LT
2363}
2364
2365
f1d8e332 2366MODULE_AUTHOR("Chris Gauthron, "
b19367c6 2367 "Jean Delvare <khali@linux-fr.org>");
44c1bcd4 2368MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
1da177e4
LT
2369module_param(update_vbat, bool, 0);
2370MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2371module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD
2372MODULE_PARM_DESC(fix_pwm_polarity,
2373 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT
2374MODULE_LICENSE("GPL");
2375
2376module_init(sm_it87_init);
2377module_exit(sm_it87_exit);
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