[deliverable/linux.git] / drivers / hwmon / jc42.c

/*
 * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
 *
 * Copyright (c) 2010  Ericsson AB.
 *
 * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
 *
 * JC42.4 compliant temperature sensors are typically used on memory modules.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>

/* Addresses to scan */
static const unsigned short normal_i2c[] = {
	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };

/* JC42 registers. All registers are 16 bit. */
#define JC42_REG_CAP		0x00
#define JC42_REG_CONFIG		0x01
#define JC42_REG_TEMP_UPPER	0x02
#define JC42_REG_TEMP_LOWER	0x03
#define JC42_REG_TEMP_CRITICAL	0x04
#define JC42_REG_TEMP		0x05
#define JC42_REG_MANID		0x06
#define JC42_REG_DEVICEID	0x07

/* Status bits in temperature register */
#define JC42_ALARM_CRIT_BIT	15
#define JC42_ALARM_MAX_BIT	14
#define JC42_ALARM_MIN_BIT	13

/* Configuration register defines */
#define JC42_CFG_CRIT_ONLY	(1 << 2)
#define JC42_CFG_TCRIT_LOCK	(1 << 6)
#define JC42_CFG_EVENT_LOCK	(1 << 7)
#define JC42_CFG_SHUTDOWN	(1 << 8)
#define JC42_CFG_HYST_SHIFT	9
#define JC42_CFG_HYST_MASK	(0x03 << 9)

/* Capabilities */
#define JC42_CAP_RANGE		(1 << 2)

/* Manufacturer IDs */
#define ADT_MANID		0x11d4  /* Analog Devices */
#define ATMEL_MANID		0x001f  /* Atmel */
#define MAX_MANID		0x004d  /* Maxim */
#define IDT_MANID		0x00b3  /* IDT */
#define MCP_MANID		0x0054  /* Microchip */
#define NXP_MANID		0x1131  /* NXP Semiconductors */
#define ONS_MANID		0x1b09  /* ON Semiconductor */
#define STM_MANID		0x104a  /* ST Microelectronics */

/* Supported chips */

/* Analog Devices */
#define ADT7408_DEVID		0x0801
#define ADT7408_DEVID_MASK	0xffff

/* Atmel */
#define AT30TS00_DEVID		0x8201
#define AT30TS00_DEVID_MASK	0xffff

/* IDT */
#define TS3000B3_DEVID		0x2903  /* Also matches TSE2002B3 */
#define TS3000B3_DEVID_MASK	0xffff

#define TS3000GB2_DEVID		0x2912  /* Also matches TSE2002GB2 */
#define TS3000GB2_DEVID_MASK	0xffff

/* Maxim */
#define MAX6604_DEVID		0x3e00
#define MAX6604_DEVID_MASK	0xffff

/* Microchip */
#define MCP9804_DEVID		0x0200
#define MCP9804_DEVID_MASK	0xfffc

#define MCP98242_DEVID		0x2000
#define MCP98242_DEVID_MASK	0xfffc

#define MCP98243_DEVID		0x2100
#define MCP98243_DEVID_MASK	0xfffc

#define MCP9843_DEVID		0x0000	/* Also matches mcp9805 */
#define MCP9843_DEVID_MASK	0xfffe

/* NXP */
#define SE97_DEVID		0xa200
#define SE97_DEVID_MASK		0xfffc

#define SE98_DEVID		0xa100
#define SE98_DEVID_MASK		0xfffc

/* ON Semiconductor */
#define CAT6095_DEVID		0x0800	/* Also matches CAT34TS02 */
#define CAT6095_DEVID_MASK	0xffe0

/* ST Microelectronics */
#define STTS424_DEVID		0x0101
#define STTS424_DEVID_MASK	0xffff

#define STTS424E_DEVID		0x0000
#define STTS424E_DEVID_MASK	0xfffe

#define STTS2002_DEVID		0x0300
#define STTS2002_DEVID_MASK	0xffff

#define STTS3000_DEVID		0x0200
#define STTS3000_DEVID_MASK	0xffff

static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };

struct jc42_chips {
	u16 manid;
	u16 devid;
	u16 devid_mask;
};

static struct jc42_chips jc42_chips[] = {
	{ ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
	{ ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
	{ IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
	{ IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
	{ MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
	{ MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
	{ MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
	{ MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
	{ MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
	{ NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
	{ ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
	{ NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
	{ STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
	{ STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
	{ STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
	{ STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
};

/* Each client has this additional data */
struct jc42_data {
	struct device	*hwmon_dev;
	struct mutex	update_lock;	/* protect register access */
	bool		extended;	/* true if extended range supported */
	bool		valid;
	unsigned long	last_updated;	/* In jiffies */
	u16		orig_config;	/* original configuration */
	u16		config;		/* current configuration */
	u16		temp_input;	/* Temperatures */
	u16		temp_crit;
	u16		temp_min;
	u16		temp_max;
};

static int jc42_probe(struct i2c_client *client,
		      const struct i2c_device_id *id);
static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info);
static int jc42_remove(struct i2c_client *client);

static struct jc42_data *jc42_update_device(struct device *dev);

static const struct i2c_device_id jc42_id[] = {
	{ "jc42", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, jc42_id);

#ifdef CONFIG_PM

static int jc42_suspend(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct jc42_data *data = i2c_get_clientdata(client);

	data->config |= JC42_CFG_SHUTDOWN;
	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
	return 0;
}

static int jc42_resume(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct jc42_data *data = i2c_get_clientdata(client);

	data->config &= ~JC42_CFG_SHUTDOWN;
	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
	return 0;
}

static const struct dev_pm_ops jc42_dev_pm_ops = {
	.suspend = jc42_suspend,
	.resume = jc42_resume,
};

#define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
#else
#define JC42_DEV_PM_OPS NULL
#endif /* CONFIG_PM */

/* This is the driver that will be inserted */
static struct i2c_driver jc42_driver = {
	.class		= I2C_CLASS_SPD,
	.driver = {
		.name	= "jc42",
		.pm = JC42_DEV_PM_OPS,
	},
	.probe		= jc42_probe,
	.remove		= jc42_remove,
	.id_table	= jc42_id,
	.detect		= jc42_detect,
	.address_list	= normal_i2c,
};

#define JC42_TEMP_MIN_EXTENDED	(-40000)
#define JC42_TEMP_MIN		0
#define JC42_TEMP_MAX		125000

static u16 jc42_temp_to_reg(int temp, bool extended)
{
	int ntemp = SENSORS_LIMIT(temp,
				  extended ? JC42_TEMP_MIN_EXTENDED :
				  JC42_TEMP_MIN, JC42_TEMP_MAX);

	/* convert from 0.001 to 0.0625 resolution */
	return (ntemp * 2 / 125) & 0x1fff;
}

static int jc42_temp_from_reg(s16 reg)
{
	reg &= 0x1fff;

	/* sign extend register */
	if (reg & 0x1000)
		reg |= 0xf000;

	/* convert from 0.0625 to 0.001 resolution */
	return reg * 125 / 2;
}

/* sysfs stuff */

/* read routines for temperature limits */
#define show(value)	\
static ssize_t show_##value(struct device *dev,				\
			    struct device_attribute *attr,		\
			    char *buf)					\
{									\
	struct jc42_data *data = jc42_update_device(dev);		\
	if (IS_ERR(data))						\
		return PTR_ERR(data);					\
	return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value));	\
}

show(temp_input);
show(temp_crit);
show(temp_min);
show(temp_max);

/* read routines for hysteresis values */
static ssize_t show_temp_crit_hyst(struct device *dev,
				   struct device_attribute *attr, char *buf)
{
	struct jc42_data *data = jc42_update_device(dev);
	int temp, hyst;

	if (IS_ERR(data))
		return PTR_ERR(data);

	temp = jc42_temp_from_reg(data->temp_crit);
	hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
			       >> JC42_CFG_HYST_SHIFT];
	return sprintf(buf, "%d\n", temp - hyst);
}

static ssize_t show_temp_max_hyst(struct device *dev,
				  struct device_attribute *attr, char *buf)
{
	struct jc42_data *data = jc42_update_device(dev);
	int temp, hyst;

	if (IS_ERR(data))
		return PTR_ERR(data);

	temp = jc42_temp_from_reg(data->temp_max);
	hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
			       >> JC42_CFG_HYST_SHIFT];
	return sprintf(buf, "%d\n", temp - hyst);
}

/* write routines */
#define set(value, reg)	\
static ssize_t set_##value(struct device *dev,				\
			   struct device_attribute *attr,		\
			   const char *buf, size_t count)		\
{									\
	struct i2c_client *client = to_i2c_client(dev);			\
	struct jc42_data *data = i2c_get_clientdata(client);		\
	int err, ret = count;						\
	long val;							\
	if (kstrtol(buf, 10, &val) < 0)				\
		return -EINVAL;						\
	mutex_lock(&data->update_lock);					\
	data->value = jc42_temp_to_reg(val, data->extended);		\
	err = i2c_smbus_write_word_swapped(client, reg, data->value);	\
	if (err < 0)							\
		ret = err;						\
	mutex_unlock(&data->update_lock);				\
	return ret;							\
}

set(temp_min, JC42_REG_TEMP_LOWER);
set(temp_max, JC42_REG_TEMP_UPPER);
set(temp_crit, JC42_REG_TEMP_CRITICAL);

/*
 * JC42.4 compliant chips only support four hysteresis values.
 * Pick best choice and go from there.
 */
static ssize_t set_temp_crit_hyst(struct device *dev,
				  struct device_attribute *attr,
				  const char *buf, size_t count)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct jc42_data *data = i2c_get_clientdata(client);
	unsigned long val;
	int diff, hyst;
	int err;
	int ret = count;

	if (kstrtoul(buf, 10, &val) < 0)
		return -EINVAL;

	diff = jc42_temp_from_reg(data->temp_crit) - val;
	hyst = 0;
	if (diff > 0) {
		if (diff < 2250)
			hyst = 1;	/* 1.5 degrees C */
		else if (diff < 4500)
			hyst = 2;	/* 3.0 degrees C */
		else
			hyst = 3;	/* 6.0 degrees C */
	}

	mutex_lock(&data->update_lock);
	data->config = (data->config & ~JC42_CFG_HYST_MASK)
	  | (hyst << JC42_CFG_HYST_SHIFT);
	err = i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG,
					   data->config);
	if (err < 0)
		ret = err;
	mutex_unlock(&data->update_lock);
	return ret;
}

static ssize_t show_alarm(struct device *dev,
			  struct device_attribute *attr, char *buf)
{
	u16 bit = to_sensor_dev_attr(attr)->index;
	struct jc42_data *data = jc42_update_device(dev);
	u16 val;

	if (IS_ERR(data))
		return PTR_ERR(data);

	val = data->temp_input;
	if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
		val = 0;
	return sprintf(buf, "%u\n", (val >> bit) & 1);
}

static DEVICE_ATTR(temp1_input, S_IRUGO,
		   show_temp_input, NULL);
static DEVICE_ATTR(temp1_crit, S_IRUGO,
		   show_temp_crit, set_temp_crit);
static DEVICE_ATTR(temp1_min, S_IRUGO,
		   show_temp_min, set_temp_min);
static DEVICE_ATTR(temp1_max, S_IRUGO,
		   show_temp_max, set_temp_max);

static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO,
		   show_temp_crit_hyst, set_temp_crit_hyst);
static DEVICE_ATTR(temp1_max_hyst, S_IRUGO,
		   show_temp_max_hyst, NULL);

static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
			  JC42_ALARM_CRIT_BIT);
static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
			  JC42_ALARM_MIN_BIT);
static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
			  JC42_ALARM_MAX_BIT);

static struct attribute *jc42_attributes[] = {
	&dev_attr_temp1_input.attr,
	&dev_attr_temp1_crit.attr,
	&dev_attr_temp1_min.attr,
	&dev_attr_temp1_max.attr,
	&dev_attr_temp1_crit_hyst.attr,
	&dev_attr_temp1_max_hyst.attr,
	&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
	&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
	&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
	NULL
};

static umode_t jc42_attribute_mode(struct kobject *kobj,
				  struct attribute *attr, int index)
{
	struct device *dev = container_of(kobj, struct device, kobj);
	struct i2c_client *client = to_i2c_client(dev);
	struct jc42_data *data = i2c_get_clientdata(client);
	unsigned int config = data->config;
	bool readonly;

	if (attr == &dev_attr_temp1_crit.attr)
		readonly = config & JC42_CFG_TCRIT_LOCK;
	else if (attr == &dev_attr_temp1_min.attr ||
		 attr == &dev_attr_temp1_max.attr)
		readonly = config & JC42_CFG_EVENT_LOCK;
	else if (attr == &dev_attr_temp1_crit_hyst.attr)
		readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK);
	else
		readonly = true;

	return S_IRUGO | (readonly ? 0 : S_IWUSR);
}

static const struct attribute_group jc42_group = {
	.attrs = jc42_attributes,
	.is_visible = jc42_attribute_mode,
};

/* Return 0 if detection is successful, -ENODEV otherwise */
static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info)
{
	struct i2c_adapter *adapter = client->adapter;
	int i, config, cap, manid, devid;

	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
				     I2C_FUNC_SMBUS_WORD_DATA))
		return -ENODEV;

	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
	manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
	devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);

	if (cap < 0 || config < 0 || manid < 0 || devid < 0)
		return -ENODEV;

	if ((cap & 0xff00) || (config & 0xf800))
		return -ENODEV;

	for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
		struct jc42_chips *chip = &jc42_chips[i];
		if (manid == chip->manid &&
		    (devid & chip->devid_mask) == chip->devid) {
			strlcpy(info->type, "jc42", I2C_NAME_SIZE);
			return 0;
		}
	}
	return -ENODEV;
}

static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
	struct jc42_data *data;
	int config, cap, err;
	struct device *dev = &client->dev;

	data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	i2c_set_clientdata(client, data);
	mutex_init(&data->update_lock);

	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
	if (cap < 0)
		return cap;

	data->extended = !!(cap & JC42_CAP_RANGE);

	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
	if (config < 0)
		return config;

	data->orig_config = config;
	if (config & JC42_CFG_SHUTDOWN) {
		config &= ~JC42_CFG_SHUTDOWN;
		i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
	}
	data->config = config;

	/* Register sysfs hooks */
	err = sysfs_create_group(&dev->kobj, &jc42_group);
	if (err)
		return err;

	data->hwmon_dev = hwmon_device_register(dev);
	if (IS_ERR(data->hwmon_dev)) {
		err = PTR_ERR(data->hwmon_dev);
		goto exit_remove;
	}

	return 0;

exit_remove:
	sysfs_remove_group(&dev->kobj, &jc42_group);
	return err;
}

static int jc42_remove(struct i2c_client *client)
{
	struct jc42_data *data = i2c_get_clientdata(client);
	hwmon_device_unregister(data->hwmon_dev);
	sysfs_remove_group(&client->dev.kobj, &jc42_group);

	/* Restore original configuration except hysteresis */
	if ((data->config & ~JC42_CFG_HYST_MASK) !=
	    (data->orig_config & ~JC42_CFG_HYST_MASK)) {
		int config;

		config = (data->orig_config & ~JC42_CFG_HYST_MASK)
		  | (data->config & JC42_CFG_HYST_MASK);
		i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
	}
	return 0;
}

static struct jc42_data *jc42_update_device(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct jc42_data *data = i2c_get_clientdata(client);
	struct jc42_data *ret = data;
	int val;

	mutex_lock(&data->update_lock);

	if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
		val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP);
		if (val < 0) {
			ret = ERR_PTR(val);
			goto abort;
		}
		data->temp_input = val;

		val = i2c_smbus_read_word_swapped(client,
						  JC42_REG_TEMP_CRITICAL);
		if (val < 0) {
			ret = ERR_PTR(val);
			goto abort;
		}
		data->temp_crit = val;

		val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER);
		if (val < 0) {
			ret = ERR_PTR(val);
			goto abort;
		}
		data->temp_min = val;

		val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER);
		if (val < 0) {
			ret = ERR_PTR(val);
			goto abort;
		}
		data->temp_max = val;

		data->last_updated = jiffies;
		data->valid = true;
	}
abort:
	mutex_unlock(&data->update_lock);
	return ret;
}

module_i2c_driver(jc42_driver);

MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
MODULE_DESCRIPTION("JC42 driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
4453d736 GR	1	/*
	2	* jc42.c - driver for Jedec JC42.4 compliant temperature sensors
	3	*
	4	* Copyright (c) 2010 Ericsson AB.
	5	*
	6	* Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
	7	*
	8	* JC42.4 compliant temperature sensors are typically used on memory modules.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	23	*/
	24
	25	#include <linux/module.h>
	26	#include <linux/init.h>
	27	#include <linux/slab.h>
	28	#include <linux/jiffies.h>
	29	#include <linux/i2c.h>
	30	#include <linux/hwmon.h>
	31	#include <linux/hwmon-sysfs.h>
	32	#include <linux/err.h>
	33	#include <linux/mutex.h>
	34
	35	/* Addresses to scan */
	36	static const unsigned short normal_i2c[] = {
	37	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
	38
	39	/* JC42 registers. All registers are 16 bit. */
	40	#define JC42_REG_CAP 0x00
	41	#define JC42_REG_CONFIG 0x01
	42	#define JC42_REG_TEMP_UPPER 0x02
	43	#define JC42_REG_TEMP_LOWER 0x03
	44	#define JC42_REG_TEMP_CRITICAL 0x04
	45	#define JC42_REG_TEMP 0x05
	46	#define JC42_REG_MANID 0x06
	47	#define JC42_REG_DEVICEID 0x07
	48
	49	/* Status bits in temperature register */
	50	#define JC42_ALARM_CRIT_BIT 15
	51	#define JC42_ALARM_MAX_BIT 14
	52	#define JC42_ALARM_MIN_BIT 13
	53
	54	/* Configuration register defines */
	55	#define JC42_CFG_CRIT_ONLY (1 << 2)
2c6315da CL	56	#define JC42_CFG_TCRIT_LOCK (1 << 6)
2c6315da CL	57	#define JC42_CFG_EVENT_LOCK (1 << 7)
4453d736 GR	58	#define JC42_CFG_SHUTDOWN (1 << 8)
4453d736 GR	59	#define JC42_CFG_HYST_SHIFT 9
2ccc8731	60	#define JC42_CFG_HYST_MASK (0x03 << 9)
4453d736 GR	61
	62	/* Capabilities */
	63	#define JC42_CAP_RANGE (1 << 2)
	64
	65	/* Manufacturer IDs */
	66	#define ADT_MANID 0x11d4 /* Analog Devices */
1bd612a2	67	#define ATMEL_MANID 0x001f /* Atmel */
4453d736 GR	68	#define MAX_MANID 0x004d /* Maxim */
	69	#define IDT_MANID 0x00b3 /* IDT */
	70	#define MCP_MANID 0x0054 /* Microchip */
	71	#define NXP_MANID 0x1131 /* NXP Semiconductors */
	72	#define ONS_MANID 0x1b09 /* ON Semiconductor */
	73	#define STM_MANID 0x104a /* ST Microelectronics */
	74
	75	/* Supported chips */
	76
	77	/* Analog Devices */
	78	#define ADT7408_DEVID 0x0801
	79	#define ADT7408_DEVID_MASK 0xffff
	80
1bd612a2 GR	81	/* Atmel */
	82	#define AT30TS00_DEVID 0x8201
	83	#define AT30TS00_DEVID_MASK 0xffff
	84
4453d736 GR	85	/* IDT */
	86	#define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
	87	#define TS3000B3_DEVID_MASK 0xffff
	88
1bd612a2 GR	89	#define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
	90	#define TS3000GB2_DEVID_MASK 0xffff
	91
4453d736 GR	92	/* Maxim */
	93	#define MAX6604_DEVID 0x3e00
	94	#define MAX6604_DEVID_MASK 0xffff
	95
	96	/* Microchip */
1bd612a2 GR	97	#define MCP9804_DEVID 0x0200
	98	#define MCP9804_DEVID_MASK 0xfffc
	99
4453d736 GR	100	#define MCP98242_DEVID 0x2000
	101	#define MCP98242_DEVID_MASK 0xfffc
	102
	103	#define MCP98243_DEVID 0x2100
	104	#define MCP98243_DEVID_MASK 0xfffc
	105
	106	#define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */
	107	#define MCP9843_DEVID_MASK 0xfffe
	108
	109	/* NXP */
	110	#define SE97_DEVID 0xa200
	111	#define SE97_DEVID_MASK 0xfffc
	112
	113	#define SE98_DEVID 0xa100
	114	#define SE98_DEVID_MASK 0xfffc
	115
	116	/* ON Semiconductor */
	117	#define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */
	118	#define CAT6095_DEVID_MASK 0xffe0
	119
	120	/* ST Microelectronics */
	121	#define STTS424_DEVID 0x0101
	122	#define STTS424_DEVID_MASK 0xffff
	123
	124	#define STTS424E_DEVID 0x0000
	125	#define STTS424E_DEVID_MASK 0xfffe
	126
4de86126 JD	127	#define STTS2002_DEVID 0x0300
	128	#define STTS2002_DEVID_MASK 0xffff
	129
	130	#define STTS3000_DEVID 0x0200
	131	#define STTS3000_DEVID_MASK 0xffff
	132
4453d736 GR	133	static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
	134
	135	struct jc42_chips {
	136	u16 manid;
	137	u16 devid;
	138	u16 devid_mask;
	139	};
	140
	141	static struct jc42_chips jc42_chips[] = {
	142	{ ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
1bd612a2	143	{ ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
4453d736	144	{ IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
1bd612a2	145	{ IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
4453d736	146	{ MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
1bd612a2	147	{ MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
4453d736 GR	148	{ MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
	149	{ MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
	150	{ MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
	151	{ NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
	152	{ ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
	153	{ NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
	154	{ STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
	155	{ STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
4de86126 JD	156	{ STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
4de86126 JD	157	{ STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
4453d736 GR	158	};
	159
	160	/* Each client has this additional data */
	161	struct jc42_data {
	162	struct device *hwmon_dev;
	163	struct mutex update_lock; /* protect register access */
	164	bool extended; /* true if extended range supported */
	165	bool valid;
	166	unsigned long last_updated; /* In jiffies */
	167	u16 orig_config; /* original configuration */
	168	u16 config; /* current configuration */
	169	u16 temp_input; /* Temperatures */
	170	u16 temp_crit;
	171	u16 temp_min;
	172	u16 temp_max;
	173	};
	174
	175	static int jc42_probe(struct i2c_client *client,
	176	const struct i2c_device_id *id);
	177	static int jc42_detect(struct i2c_client client, struct i2c_board_info info);
	178	static int jc42_remove(struct i2c_client *client);
4453d736 GR	179
	180	static struct jc42_data jc42_update_device(struct device dev);
	181
	182	static const struct i2c_device_id jc42_id[] = {
4453d736	183	{ "jc42", 0 },
4453d736 GR	184	{ }
	185	};
	186	MODULE_DEVICE_TABLE(i2c, jc42_id);
	187
	188	#ifdef CONFIG_PM
	189
	190	static int jc42_suspend(struct device *dev)
	191	{
	192	struct i2c_client *client = to_i2c_client(dev);
	193	struct jc42_data *data = i2c_get_clientdata(client);
	194
	195	data->config \|= JC42_CFG_SHUTDOWN;
90f4102c	196	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
4453d736 GR	197	return 0;
	198	}
	199
	200	static int jc42_resume(struct device *dev)
	201	{
	202	struct i2c_client *client = to_i2c_client(dev);
	203	struct jc42_data *data = i2c_get_clientdata(client);
	204
	205	data->config &= ~JC42_CFG_SHUTDOWN;
90f4102c	206	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
4453d736 GR	207	return 0;
	208	}
	209
	210	static const struct dev_pm_ops jc42_dev_pm_ops = {
	211	.suspend = jc42_suspend,
	212	.resume = jc42_resume,
	213	};
	214
	215	#define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
	216	#else
	217	#define JC42_DEV_PM_OPS NULL
	218	#endif /* CONFIG_PM */
	219
	220	/* This is the driver that will be inserted */
	221	static struct i2c_driver jc42_driver = {
774466ad	222	.class = I2C_CLASS_SPD,
4453d736 GR	223	.driver = {
	224	.name = "jc42",
	225	.pm = JC42_DEV_PM_OPS,
	226	},
	227	.probe = jc42_probe,
	228	.remove = jc42_remove,
	229	.id_table = jc42_id,
	230	.detect = jc42_detect,
	231	.address_list = normal_i2c,
	232	};
	233
	234	#define JC42_TEMP_MIN_EXTENDED (-40000)
	235	#define JC42_TEMP_MIN 0
	236	#define JC42_TEMP_MAX 125000
	237
	238	static u16 jc42_temp_to_reg(int temp, bool extended)
	239	{
	240	int ntemp = SENSORS_LIMIT(temp,
	241	extended ? JC42_TEMP_MIN_EXTENDED :
	242	JC42_TEMP_MIN, JC42_TEMP_MAX);
	243
	244	/* convert from 0.001 to 0.0625 resolution */
	245	return (ntemp * 2 / 125) & 0x1fff;
	246	}
	247
	248	static int jc42_temp_from_reg(s16 reg)
	249	{
	250	reg &= 0x1fff;
	251
	252	/* sign extend register */
	253	if (reg & 0x1000)
	254	reg \|= 0xf000;
	255
	256	/* convert from 0.0625 to 0.001 resolution */
	257	return reg * 125 / 2;
	258	}
	259
	260	/* sysfs stuff */
	261
	262	/* read routines for temperature limits */
	263	#define show(value) \
	264	static ssize_t show_##value(struct device *dev, \
	265	struct device_attribute *attr, \
	266	char *buf) \
	267	{ \
	268	struct jc42_data *data = jc42_update_device(dev); \
	269	if (IS_ERR(data)) \
	270	return PTR_ERR(data); \
	271	return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value)); \
	272	}
	273
	274	show(temp_input);
	275	show(temp_crit);
	276	show(temp_min);
	277	show(temp_max);
	278
	279	/* read routines for hysteresis values */
	280	static ssize_t show_temp_crit_hyst(struct device *dev,
	281	struct device_attribute attr, char buf)
	282	{
	283	struct jc42_data *data = jc42_update_device(dev);
	284	int temp, hyst;
	285
	286	if (IS_ERR(data))
287	return PTR_ERR(data);
288
289	temp = jc42_temp_from_reg(data->temp_crit);
2ccc8731 JD	290	hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
2ccc8731 JD	291	>> JC42_CFG_HYST_SHIFT];
4453d736 GR	292	return sprintf(buf, "%d\n", temp - hyst);
	293	}
	294
	295	static ssize_t show_temp_max_hyst(struct device *dev,
	296	struct device_attribute attr, char buf)
	297	{
	298	struct jc42_data *data = jc42_update_device(dev);
	299	int temp, hyst;
	300
	301	if (IS_ERR(data))
	302	return PTR_ERR(data);
	303
	304	temp = jc42_temp_from_reg(data->temp_max);
2ccc8731 JD	305	hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
2ccc8731 JD	306	>> JC42_CFG_HYST_SHIFT];
4453d736 GR	307	return sprintf(buf, "%d\n", temp - hyst);
	308	}
	309
	310	/* write routines */
	311	#define set(value, reg) \
	312	static ssize_t set_##value(struct device *dev, \
	313	struct device_attribute *attr, \
	314	const char *buf, size_t count) \
	315	{ \
	316	struct i2c_client *client = to_i2c_client(dev); \
	317	struct jc42_data *data = i2c_get_clientdata(client); \
	318	int err, ret = count; \
	319	long val; \
179c4fdb	320	if (kstrtol(buf, 10, &val) < 0) \
4453d736 GR	321	return -EINVAL; \
	322	mutex_lock(&data->update_lock); \
	323	data->value = jc42_temp_to_reg(val, data->extended); \
90f4102c	324	err = i2c_smbus_write_word_swapped(client, reg, data->value); \
4453d736 GR	325	if (err < 0) \
	326	ret = err; \
	327	mutex_unlock(&data->update_lock); \
	328	return ret; \
	329	}
	330
	331	set(temp_min, JC42_REG_TEMP_LOWER);
	332	set(temp_max, JC42_REG_TEMP_UPPER);
	333	set(temp_crit, JC42_REG_TEMP_CRITICAL);
	334
5d577dba GR	335	/*
	336	* JC42.4 compliant chips only support four hysteresis values.
	337	* Pick best choice and go from there.
	338	*/
4453d736 GR	339	static ssize_t set_temp_crit_hyst(struct device *dev,
	340	struct device_attribute *attr,
	341	const char *buf, size_t count)
	342	{
	343	struct i2c_client *client = to_i2c_client(dev);
	344	struct jc42_data *data = i2c_get_clientdata(client);
e8667296	345	unsigned long val;
4453d736 GR	346	int diff, hyst;
	347	int err;
	348	int ret = count;
	349
179c4fdb	350	if (kstrtoul(buf, 10, &val) < 0)
4453d736 GR	351	return -EINVAL;
	352
	353	diff = jc42_temp_from_reg(data->temp_crit) - val;
	354	hyst = 0;
	355	if (diff > 0) {
	356	if (diff < 2250)
	357	hyst = 1; /* 1.5 degrees C */
	358	else if (diff < 4500)
	359	hyst = 2; /* 3.0 degrees C */
	360	else
	361	hyst = 3; /* 6.0 degrees C */
	362	}
	363
	364	mutex_lock(&data->update_lock);
2ccc8731	365	data->config = (data->config & ~JC42_CFG_HYST_MASK)
4453d736	366	\| (hyst << JC42_CFG_HYST_SHIFT);
90f4102c JD	367	err = i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG,
90f4102c JD	368	data->config);
4453d736 GR	369	if (err < 0)
	370	ret = err;
	371	mutex_unlock(&data->update_lock);
	372	return ret;
	373	}
	374
	375	static ssize_t show_alarm(struct device *dev,
	376	struct device_attribute attr, char buf)
	377	{
	378	u16 bit = to_sensor_dev_attr(attr)->index;
	379	struct jc42_data *data = jc42_update_device(dev);
	380	u16 val;
	381
	382	if (IS_ERR(data))
	383	return PTR_ERR(data);
	384
	385	val = data->temp_input;
	386	if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
	387	val = 0;
	388	return sprintf(buf, "%u\n", (val >> bit) & 1);
	389	}
	390
	391	static DEVICE_ATTR(temp1_input, S_IRUGO,
	392	show_temp_input, NULL);
2c6315da	393	static DEVICE_ATTR(temp1_crit, S_IRUGO,
4453d736	394	show_temp_crit, set_temp_crit);
2c6315da	395	static DEVICE_ATTR(temp1_min, S_IRUGO,
4453d736	396	show_temp_min, set_temp_min);
2c6315da	397	static DEVICE_ATTR(temp1_max, S_IRUGO,
4453d736 GR	398	show_temp_max, set_temp_max);
4453d736 GR	399
2c6315da	400	static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO,
4453d736 GR	401	show_temp_crit_hyst, set_temp_crit_hyst);
	402	static DEVICE_ATTR(temp1_max_hyst, S_IRUGO,
	403	show_temp_max_hyst, NULL);
	404
	405	static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
	406	JC42_ALARM_CRIT_BIT);
	407	static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
	408	JC42_ALARM_MIN_BIT);
	409	static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
	410	JC42_ALARM_MAX_BIT);
	411
	412	static struct attribute *jc42_attributes[] = {
	413	&dev_attr_temp1_input.attr,
	414	&dev_attr_temp1_crit.attr,
	415	&dev_attr_temp1_min.attr,
	416	&dev_attr_temp1_max.attr,
	417	&dev_attr_temp1_crit_hyst.attr,
	418	&dev_attr_temp1_max_hyst.attr,
	419	&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
	420	&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
	421	&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
	422	NULL
	423	};
	424
587a1f16	425	static umode_t jc42_attribute_mode(struct kobject *kobj,
2c6315da CL	426	struct attribute *attr, int index)
	427	{
	428	struct device *dev = container_of(kobj, struct device, kobj);
	429	struct i2c_client *client = to_i2c_client(dev);
	430	struct jc42_data *data = i2c_get_clientdata(client);
	431	unsigned int config = data->config;
	432	bool readonly;
	433
	434	if (attr == &dev_attr_temp1_crit.attr)
	435	readonly = config & JC42_CFG_TCRIT_LOCK;
	436	else if (attr == &dev_attr_temp1_min.attr \|\|
	437	attr == &dev_attr_temp1_max.attr)
	438	readonly = config & JC42_CFG_EVENT_LOCK;
	439	else if (attr == &dev_attr_temp1_crit_hyst.attr)
	440	readonly = config & (JC42_CFG_EVENT_LOCK \| JC42_CFG_TCRIT_LOCK);
	441	else
	442	readonly = true;
	443
	444	return S_IRUGO \| (readonly ? 0 : S_IWUSR);
	445	}
	446
4453d736 GR	447	static const struct attribute_group jc42_group = {
4453d736 GR	448	.attrs = jc42_attributes,
2c6315da	449	.is_visible = jc42_attribute_mode,
4453d736 GR	450	};
	451
	452	/* Return 0 if detection is successful, -ENODEV otherwise */
f15df57d	453	static int jc42_detect(struct i2c_client client, struct i2c_board_info info)
4453d736	454	{
f15df57d	455	struct i2c_adapter *adapter = client->adapter;
4453d736 GR	456	int i, config, cap, manid, devid;
	457
	458	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA \|
	459	I2C_FUNC_SMBUS_WORD_DATA))
	460	return -ENODEV;
	461
f15df57d GR	462	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
	463	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
	464	manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
	465	devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);
4453d736 GR	466
	467	if (cap < 0 \|\| config < 0 \|\| manid < 0 \|\| devid < 0)
	468	return -ENODEV;
	469
	470	if ((cap & 0xff00) \|\| (config & 0xf800))
	471	return -ENODEV;
	472
	473	for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
	474	struct jc42_chips *chip = &jc42_chips[i];
	475	if (manid == chip->manid &&
	476	(devid & chip->devid_mask) == chip->devid) {
	477	strlcpy(info->type, "jc42", I2C_NAME_SIZE);
	478	return 0;
	479	}
	480	}
	481	return -ENODEV;
	482	}
	483
f15df57d	484	static int jc42_probe(struct i2c_client client, const struct i2c_device_id id)
4453d736 GR	485	{
	486	struct jc42_data *data;
	487	int config, cap, err;
f15df57d	488	struct device *dev = &client->dev;
4453d736	489
f15df57d GR	490	data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
	491	if (!data)
	492	return -ENOMEM;
4453d736	493
f15df57d	494	i2c_set_clientdata(client, data);
4453d736 GR	495	mutex_init(&data->update_lock);
4453d736 GR	496
f15df57d GR	497	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
	498	if (cap < 0)
	499	return cap;
	500
4453d736 GR	501	data->extended = !!(cap & JC42_CAP_RANGE);
4453d736 GR	502
f15df57d GR	503	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
	504	if (config < 0)
	505	return config;
	506
4453d736 GR	507	data->orig_config = config;
	508	if (config & JC42_CFG_SHUTDOWN) {
	509	config &= ~JC42_CFG_SHUTDOWN;
f15df57d	510	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
4453d736 GR	511	}
	512	data->config = config;
	513
	514	/* Register sysfs hooks */
f15df57d	515	err = sysfs_create_group(&dev->kobj, &jc42_group);
4453d736	516	if (err)
f15df57d	517	return err;
4453d736	518
f15df57d	519	data->hwmon_dev = hwmon_device_register(dev);
4453d736 GR	520	if (IS_ERR(data->hwmon_dev)) {
	521	err = PTR_ERR(data->hwmon_dev);
	522	goto exit_remove;
	523	}
	524
	525	return 0;
	526
	527	exit_remove:
f15df57d	528	sysfs_remove_group(&dev->kobj, &jc42_group);
4453d736 GR	529	return err;
	530	}
	531
	532	static int jc42_remove(struct i2c_client *client)
	533	{
	534	struct jc42_data *data = i2c_get_clientdata(client);
	535	hwmon_device_unregister(data->hwmon_dev);
	536	sysfs_remove_group(&client->dev.kobj, &jc42_group);
5953e276 JD	537
	538	/* Restore original configuration except hysteresis */
	539	if ((data->config & ~JC42_CFG_HYST_MASK) !=
	540	(data->orig_config & ~JC42_CFG_HYST_MASK)) {
	541	int config;
	542
	543	config = (data->orig_config & ~JC42_CFG_HYST_MASK)
	544	\| (data->config & JC42_CFG_HYST_MASK);
	545	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
	546	}
4453d736 GR	547	return 0;
	548	}
	549
4453d736 GR	550	static struct jc42_data jc42_update_device(struct device dev)
	551	{
	552	struct i2c_client *client = to_i2c_client(dev);
	553	struct jc42_data *data = i2c_get_clientdata(client);
	554	struct jc42_data *ret = data;
	555	int val;
	556
	557	mutex_lock(&data->update_lock);
	558
	559	if (time_after(jiffies, data->last_updated + HZ) \|\| !data->valid) {
90f4102c	560	val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP);
4453d736 GR	561	if (val < 0) {
	562	ret = ERR_PTR(val);
	563	goto abort;
	564	}
	565	data->temp_input = val;
	566
90f4102c JD	567	val = i2c_smbus_read_word_swapped(client,
90f4102c JD	568	JC42_REG_TEMP_CRITICAL);
4453d736 GR	569	if (val < 0) {
	570	ret = ERR_PTR(val);
	571	goto abort;
	572	}
	573	data->temp_crit = val;
	574
90f4102c	575	val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER);
4453d736 GR	576	if (val < 0) {
	577	ret = ERR_PTR(val);
	578	goto abort;
	579	}
	580	data->temp_min = val;
	581
90f4102c	582	val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER);
4453d736 GR	583	if (val < 0) {
	584	ret = ERR_PTR(val);
	585	goto abort;
	586	}
	587	data->temp_max = val;
	588
	589	data->last_updated = jiffies;
	590	data->valid = true;
	591	}
	592	abort:
	593	mutex_unlock(&data->update_lock);
	594	return ret;
	595	}
	596
f0967eea	597	module_i2c_driver(jc42_driver);
4453d736	598
bb9a80e5	599	MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4453d736 GR	600	MODULE_DESCRIPTION("JC42 driver");
4453d736 GR	601	MODULE_LICENSE("GPL");