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4453d736 GR |
1 | /* |
2 | * jc42.c - driver for Jedec JC42.4 compliant temperature sensors | |
3 | * | |
4 | * Copyright (c) 2010 Ericsson AB. | |
5 | * | |
6 | * Derived from lm77.c by Andras BALI <drewie@freemail.hu>. | |
7 | * | |
8 | * JC42.4 compliant temperature sensors are typically used on memory modules. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/i2c.h> | |
30 | #include <linux/hwmon.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/mutex.h> | |
34 | ||
35 | /* Addresses to scan */ | |
36 | static const unsigned short normal_i2c[] = { | |
37 | 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END }; | |
38 | ||
39 | /* JC42 registers. All registers are 16 bit. */ | |
40 | #define JC42_REG_CAP 0x00 | |
41 | #define JC42_REG_CONFIG 0x01 | |
42 | #define JC42_REG_TEMP_UPPER 0x02 | |
43 | #define JC42_REG_TEMP_LOWER 0x03 | |
44 | #define JC42_REG_TEMP_CRITICAL 0x04 | |
45 | #define JC42_REG_TEMP 0x05 | |
46 | #define JC42_REG_MANID 0x06 | |
47 | #define JC42_REG_DEVICEID 0x07 | |
48 | ||
49 | /* Status bits in temperature register */ | |
50 | #define JC42_ALARM_CRIT_BIT 15 | |
51 | #define JC42_ALARM_MAX_BIT 14 | |
52 | #define JC42_ALARM_MIN_BIT 13 | |
53 | ||
54 | /* Configuration register defines */ | |
55 | #define JC42_CFG_CRIT_ONLY (1 << 2) | |
2c6315da CL |
56 | #define JC42_CFG_TCRIT_LOCK (1 << 6) |
57 | #define JC42_CFG_EVENT_LOCK (1 << 7) | |
4453d736 GR |
58 | #define JC42_CFG_SHUTDOWN (1 << 8) |
59 | #define JC42_CFG_HYST_SHIFT 9 | |
60 | #define JC42_CFG_HYST_MASK 0x03 | |
61 | ||
62 | /* Capabilities */ | |
63 | #define JC42_CAP_RANGE (1 << 2) | |
64 | ||
65 | /* Manufacturer IDs */ | |
66 | #define ADT_MANID 0x11d4 /* Analog Devices */ | |
1bd612a2 | 67 | #define ATMEL_MANID 0x001f /* Atmel */ |
4453d736 GR |
68 | #define MAX_MANID 0x004d /* Maxim */ |
69 | #define IDT_MANID 0x00b3 /* IDT */ | |
70 | #define MCP_MANID 0x0054 /* Microchip */ | |
71 | #define NXP_MANID 0x1131 /* NXP Semiconductors */ | |
72 | #define ONS_MANID 0x1b09 /* ON Semiconductor */ | |
73 | #define STM_MANID 0x104a /* ST Microelectronics */ | |
74 | ||
75 | /* Supported chips */ | |
76 | ||
77 | /* Analog Devices */ | |
78 | #define ADT7408_DEVID 0x0801 | |
79 | #define ADT7408_DEVID_MASK 0xffff | |
80 | ||
1bd612a2 GR |
81 | /* Atmel */ |
82 | #define AT30TS00_DEVID 0x8201 | |
83 | #define AT30TS00_DEVID_MASK 0xffff | |
84 | ||
4453d736 GR |
85 | /* IDT */ |
86 | #define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */ | |
87 | #define TS3000B3_DEVID_MASK 0xffff | |
88 | ||
1bd612a2 GR |
89 | #define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */ |
90 | #define TS3000GB2_DEVID_MASK 0xffff | |
91 | ||
4453d736 GR |
92 | /* Maxim */ |
93 | #define MAX6604_DEVID 0x3e00 | |
94 | #define MAX6604_DEVID_MASK 0xffff | |
95 | ||
96 | /* Microchip */ | |
1bd612a2 GR |
97 | #define MCP9804_DEVID 0x0200 |
98 | #define MCP9804_DEVID_MASK 0xfffc | |
99 | ||
4453d736 GR |
100 | #define MCP98242_DEVID 0x2000 |
101 | #define MCP98242_DEVID_MASK 0xfffc | |
102 | ||
103 | #define MCP98243_DEVID 0x2100 | |
104 | #define MCP98243_DEVID_MASK 0xfffc | |
105 | ||
106 | #define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */ | |
107 | #define MCP9843_DEVID_MASK 0xfffe | |
108 | ||
109 | /* NXP */ | |
110 | #define SE97_DEVID 0xa200 | |
111 | #define SE97_DEVID_MASK 0xfffc | |
112 | ||
113 | #define SE98_DEVID 0xa100 | |
114 | #define SE98_DEVID_MASK 0xfffc | |
115 | ||
116 | /* ON Semiconductor */ | |
117 | #define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */ | |
118 | #define CAT6095_DEVID_MASK 0xffe0 | |
119 | ||
120 | /* ST Microelectronics */ | |
121 | #define STTS424_DEVID 0x0101 | |
122 | #define STTS424_DEVID_MASK 0xffff | |
123 | ||
124 | #define STTS424E_DEVID 0x0000 | |
125 | #define STTS424E_DEVID_MASK 0xfffe | |
126 | ||
4de86126 JD |
127 | #define STTS2002_DEVID 0x0300 |
128 | #define STTS2002_DEVID_MASK 0xffff | |
129 | ||
130 | #define STTS3000_DEVID 0x0200 | |
131 | #define STTS3000_DEVID_MASK 0xffff | |
132 | ||
4453d736 GR |
133 | static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 }; |
134 | ||
135 | struct jc42_chips { | |
136 | u16 manid; | |
137 | u16 devid; | |
138 | u16 devid_mask; | |
139 | }; | |
140 | ||
141 | static struct jc42_chips jc42_chips[] = { | |
142 | { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK }, | |
1bd612a2 | 143 | { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK }, |
4453d736 | 144 | { IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK }, |
1bd612a2 | 145 | { IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK }, |
4453d736 | 146 | { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK }, |
1bd612a2 | 147 | { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK }, |
4453d736 GR |
148 | { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK }, |
149 | { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK }, | |
150 | { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK }, | |
151 | { NXP_MANID, SE97_DEVID, SE97_DEVID_MASK }, | |
152 | { ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK }, | |
153 | { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK }, | |
154 | { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK }, | |
155 | { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK }, | |
4de86126 JD |
156 | { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK }, |
157 | { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK }, | |
4453d736 GR |
158 | }; |
159 | ||
160 | /* Each client has this additional data */ | |
161 | struct jc42_data { | |
162 | struct device *hwmon_dev; | |
163 | struct mutex update_lock; /* protect register access */ | |
164 | bool extended; /* true if extended range supported */ | |
165 | bool valid; | |
166 | unsigned long last_updated; /* In jiffies */ | |
167 | u16 orig_config; /* original configuration */ | |
168 | u16 config; /* current configuration */ | |
169 | u16 temp_input; /* Temperatures */ | |
170 | u16 temp_crit; | |
171 | u16 temp_min; | |
172 | u16 temp_max; | |
173 | }; | |
174 | ||
175 | static int jc42_probe(struct i2c_client *client, | |
176 | const struct i2c_device_id *id); | |
177 | static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info); | |
178 | static int jc42_remove(struct i2c_client *client); | |
4453d736 GR |
179 | |
180 | static struct jc42_data *jc42_update_device(struct device *dev); | |
181 | ||
182 | static const struct i2c_device_id jc42_id[] = { | |
183 | { "adt7408", 0 }, | |
1bd612a2 | 184 | { "at30ts00", 0 }, |
4453d736 GR |
185 | { "cat94ts02", 0 }, |
186 | { "cat6095", 0 }, | |
187 | { "jc42", 0 }, | |
188 | { "max6604", 0 }, | |
1bd612a2 | 189 | { "mcp9804", 0 }, |
4453d736 GR |
190 | { "mcp9805", 0 }, |
191 | { "mcp98242", 0 }, | |
192 | { "mcp98243", 0 }, | |
193 | { "mcp9843", 0 }, | |
194 | { "se97", 0 }, | |
195 | { "se97b", 0 }, | |
196 | { "se98", 0 }, | |
197 | { "stts424", 0 }, | |
4de86126 JD |
198 | { "stts2002", 0 }, |
199 | { "stts3000", 0 }, | |
1bd612a2 GR |
200 | { "tse2002", 0 }, |
201 | { "ts3000", 0 }, | |
4453d736 GR |
202 | { } |
203 | }; | |
204 | MODULE_DEVICE_TABLE(i2c, jc42_id); | |
205 | ||
206 | #ifdef CONFIG_PM | |
207 | ||
208 | static int jc42_suspend(struct device *dev) | |
209 | { | |
210 | struct i2c_client *client = to_i2c_client(dev); | |
211 | struct jc42_data *data = i2c_get_clientdata(client); | |
212 | ||
213 | data->config |= JC42_CFG_SHUTDOWN; | |
90f4102c | 214 | i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config); |
4453d736 GR |
215 | return 0; |
216 | } | |
217 | ||
218 | static int jc42_resume(struct device *dev) | |
219 | { | |
220 | struct i2c_client *client = to_i2c_client(dev); | |
221 | struct jc42_data *data = i2c_get_clientdata(client); | |
222 | ||
223 | data->config &= ~JC42_CFG_SHUTDOWN; | |
90f4102c | 224 | i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config); |
4453d736 GR |
225 | return 0; |
226 | } | |
227 | ||
228 | static const struct dev_pm_ops jc42_dev_pm_ops = { | |
229 | .suspend = jc42_suspend, | |
230 | .resume = jc42_resume, | |
231 | }; | |
232 | ||
233 | #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops) | |
234 | #else | |
235 | #define JC42_DEV_PM_OPS NULL | |
236 | #endif /* CONFIG_PM */ | |
237 | ||
238 | /* This is the driver that will be inserted */ | |
239 | static struct i2c_driver jc42_driver = { | |
774466ad | 240 | .class = I2C_CLASS_SPD, |
4453d736 GR |
241 | .driver = { |
242 | .name = "jc42", | |
243 | .pm = JC42_DEV_PM_OPS, | |
244 | }, | |
245 | .probe = jc42_probe, | |
246 | .remove = jc42_remove, | |
247 | .id_table = jc42_id, | |
248 | .detect = jc42_detect, | |
249 | .address_list = normal_i2c, | |
250 | }; | |
251 | ||
252 | #define JC42_TEMP_MIN_EXTENDED (-40000) | |
253 | #define JC42_TEMP_MIN 0 | |
254 | #define JC42_TEMP_MAX 125000 | |
255 | ||
256 | static u16 jc42_temp_to_reg(int temp, bool extended) | |
257 | { | |
258 | int ntemp = SENSORS_LIMIT(temp, | |
259 | extended ? JC42_TEMP_MIN_EXTENDED : | |
260 | JC42_TEMP_MIN, JC42_TEMP_MAX); | |
261 | ||
262 | /* convert from 0.001 to 0.0625 resolution */ | |
263 | return (ntemp * 2 / 125) & 0x1fff; | |
264 | } | |
265 | ||
266 | static int jc42_temp_from_reg(s16 reg) | |
267 | { | |
268 | reg &= 0x1fff; | |
269 | ||
270 | /* sign extend register */ | |
271 | if (reg & 0x1000) | |
272 | reg |= 0xf000; | |
273 | ||
274 | /* convert from 0.0625 to 0.001 resolution */ | |
275 | return reg * 125 / 2; | |
276 | } | |
277 | ||
278 | /* sysfs stuff */ | |
279 | ||
280 | /* read routines for temperature limits */ | |
281 | #define show(value) \ | |
282 | static ssize_t show_##value(struct device *dev, \ | |
283 | struct device_attribute *attr, \ | |
284 | char *buf) \ | |
285 | { \ | |
286 | struct jc42_data *data = jc42_update_device(dev); \ | |
287 | if (IS_ERR(data)) \ | |
288 | return PTR_ERR(data); \ | |
289 | return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value)); \ | |
290 | } | |
291 | ||
292 | show(temp_input); | |
293 | show(temp_crit); | |
294 | show(temp_min); | |
295 | show(temp_max); | |
296 | ||
297 | /* read routines for hysteresis values */ | |
298 | static ssize_t show_temp_crit_hyst(struct device *dev, | |
299 | struct device_attribute *attr, char *buf) | |
300 | { | |
301 | struct jc42_data *data = jc42_update_device(dev); | |
302 | int temp, hyst; | |
303 | ||
304 | if (IS_ERR(data)) | |
305 | return PTR_ERR(data); | |
306 | ||
307 | temp = jc42_temp_from_reg(data->temp_crit); | |
308 | hyst = jc42_hysteresis[(data->config >> JC42_CFG_HYST_SHIFT) | |
309 | & JC42_CFG_HYST_MASK]; | |
310 | return sprintf(buf, "%d\n", temp - hyst); | |
311 | } | |
312 | ||
313 | static ssize_t show_temp_max_hyst(struct device *dev, | |
314 | struct device_attribute *attr, char *buf) | |
315 | { | |
316 | struct jc42_data *data = jc42_update_device(dev); | |
317 | int temp, hyst; | |
318 | ||
319 | if (IS_ERR(data)) | |
320 | return PTR_ERR(data); | |
321 | ||
322 | temp = jc42_temp_from_reg(data->temp_max); | |
323 | hyst = jc42_hysteresis[(data->config >> JC42_CFG_HYST_SHIFT) | |
324 | & JC42_CFG_HYST_MASK]; | |
325 | return sprintf(buf, "%d\n", temp - hyst); | |
326 | } | |
327 | ||
328 | /* write routines */ | |
329 | #define set(value, reg) \ | |
330 | static ssize_t set_##value(struct device *dev, \ | |
331 | struct device_attribute *attr, \ | |
332 | const char *buf, size_t count) \ | |
333 | { \ | |
334 | struct i2c_client *client = to_i2c_client(dev); \ | |
335 | struct jc42_data *data = i2c_get_clientdata(client); \ | |
336 | int err, ret = count; \ | |
337 | long val; \ | |
179c4fdb | 338 | if (kstrtol(buf, 10, &val) < 0) \ |
4453d736 GR |
339 | return -EINVAL; \ |
340 | mutex_lock(&data->update_lock); \ | |
341 | data->value = jc42_temp_to_reg(val, data->extended); \ | |
90f4102c | 342 | err = i2c_smbus_write_word_swapped(client, reg, data->value); \ |
4453d736 GR |
343 | if (err < 0) \ |
344 | ret = err; \ | |
345 | mutex_unlock(&data->update_lock); \ | |
346 | return ret; \ | |
347 | } | |
348 | ||
349 | set(temp_min, JC42_REG_TEMP_LOWER); | |
350 | set(temp_max, JC42_REG_TEMP_UPPER); | |
351 | set(temp_crit, JC42_REG_TEMP_CRITICAL); | |
352 | ||
353 | /* JC42.4 compliant chips only support four hysteresis values. | |
354 | * Pick best choice and go from there. */ | |
355 | static ssize_t set_temp_crit_hyst(struct device *dev, | |
356 | struct device_attribute *attr, | |
357 | const char *buf, size_t count) | |
358 | { | |
359 | struct i2c_client *client = to_i2c_client(dev); | |
360 | struct jc42_data *data = i2c_get_clientdata(client); | |
e8667296 | 361 | unsigned long val; |
4453d736 GR |
362 | int diff, hyst; |
363 | int err; | |
364 | int ret = count; | |
365 | ||
179c4fdb | 366 | if (kstrtoul(buf, 10, &val) < 0) |
4453d736 GR |
367 | return -EINVAL; |
368 | ||
369 | diff = jc42_temp_from_reg(data->temp_crit) - val; | |
370 | hyst = 0; | |
371 | if (diff > 0) { | |
372 | if (diff < 2250) | |
373 | hyst = 1; /* 1.5 degrees C */ | |
374 | else if (diff < 4500) | |
375 | hyst = 2; /* 3.0 degrees C */ | |
376 | else | |
377 | hyst = 3; /* 6.0 degrees C */ | |
378 | } | |
379 | ||
380 | mutex_lock(&data->update_lock); | |
381 | data->config = (data->config | |
382 | & ~(JC42_CFG_HYST_MASK << JC42_CFG_HYST_SHIFT)) | |
383 | | (hyst << JC42_CFG_HYST_SHIFT); | |
90f4102c JD |
384 | err = i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, |
385 | data->config); | |
4453d736 GR |
386 | if (err < 0) |
387 | ret = err; | |
388 | mutex_unlock(&data->update_lock); | |
389 | return ret; | |
390 | } | |
391 | ||
392 | static ssize_t show_alarm(struct device *dev, | |
393 | struct device_attribute *attr, char *buf) | |
394 | { | |
395 | u16 bit = to_sensor_dev_attr(attr)->index; | |
396 | struct jc42_data *data = jc42_update_device(dev); | |
397 | u16 val; | |
398 | ||
399 | if (IS_ERR(data)) | |
400 | return PTR_ERR(data); | |
401 | ||
402 | val = data->temp_input; | |
403 | if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY)) | |
404 | val = 0; | |
405 | return sprintf(buf, "%u\n", (val >> bit) & 1); | |
406 | } | |
407 | ||
408 | static DEVICE_ATTR(temp1_input, S_IRUGO, | |
409 | show_temp_input, NULL); | |
2c6315da | 410 | static DEVICE_ATTR(temp1_crit, S_IRUGO, |
4453d736 | 411 | show_temp_crit, set_temp_crit); |
2c6315da | 412 | static DEVICE_ATTR(temp1_min, S_IRUGO, |
4453d736 | 413 | show_temp_min, set_temp_min); |
2c6315da | 414 | static DEVICE_ATTR(temp1_max, S_IRUGO, |
4453d736 GR |
415 | show_temp_max, set_temp_max); |
416 | ||
2c6315da | 417 | static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, |
4453d736 GR |
418 | show_temp_crit_hyst, set_temp_crit_hyst); |
419 | static DEVICE_ATTR(temp1_max_hyst, S_IRUGO, | |
420 | show_temp_max_hyst, NULL); | |
421 | ||
422 | static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL, | |
423 | JC42_ALARM_CRIT_BIT); | |
424 | static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL, | |
425 | JC42_ALARM_MIN_BIT); | |
426 | static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL, | |
427 | JC42_ALARM_MAX_BIT); | |
428 | ||
429 | static struct attribute *jc42_attributes[] = { | |
430 | &dev_attr_temp1_input.attr, | |
431 | &dev_attr_temp1_crit.attr, | |
432 | &dev_attr_temp1_min.attr, | |
433 | &dev_attr_temp1_max.attr, | |
434 | &dev_attr_temp1_crit_hyst.attr, | |
435 | &dev_attr_temp1_max_hyst.attr, | |
436 | &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, | |
437 | &sensor_dev_attr_temp1_min_alarm.dev_attr.attr, | |
438 | &sensor_dev_attr_temp1_max_alarm.dev_attr.attr, | |
439 | NULL | |
440 | }; | |
441 | ||
587a1f16 | 442 | static umode_t jc42_attribute_mode(struct kobject *kobj, |
2c6315da CL |
443 | struct attribute *attr, int index) |
444 | { | |
445 | struct device *dev = container_of(kobj, struct device, kobj); | |
446 | struct i2c_client *client = to_i2c_client(dev); | |
447 | struct jc42_data *data = i2c_get_clientdata(client); | |
448 | unsigned int config = data->config; | |
449 | bool readonly; | |
450 | ||
451 | if (attr == &dev_attr_temp1_crit.attr) | |
452 | readonly = config & JC42_CFG_TCRIT_LOCK; | |
453 | else if (attr == &dev_attr_temp1_min.attr || | |
454 | attr == &dev_attr_temp1_max.attr) | |
455 | readonly = config & JC42_CFG_EVENT_LOCK; | |
456 | else if (attr == &dev_attr_temp1_crit_hyst.attr) | |
457 | readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK); | |
458 | else | |
459 | readonly = true; | |
460 | ||
461 | return S_IRUGO | (readonly ? 0 : S_IWUSR); | |
462 | } | |
463 | ||
4453d736 GR |
464 | static const struct attribute_group jc42_group = { |
465 | .attrs = jc42_attributes, | |
2c6315da | 466 | .is_visible = jc42_attribute_mode, |
4453d736 GR |
467 | }; |
468 | ||
469 | /* Return 0 if detection is successful, -ENODEV otherwise */ | |
470 | static int jc42_detect(struct i2c_client *new_client, | |
471 | struct i2c_board_info *info) | |
472 | { | |
473 | struct i2c_adapter *adapter = new_client->adapter; | |
474 | int i, config, cap, manid, devid; | |
475 | ||
476 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | | |
477 | I2C_FUNC_SMBUS_WORD_DATA)) | |
478 | return -ENODEV; | |
479 | ||
90f4102c JD |
480 | cap = i2c_smbus_read_word_swapped(new_client, JC42_REG_CAP); |
481 | config = i2c_smbus_read_word_swapped(new_client, JC42_REG_CONFIG); | |
482 | manid = i2c_smbus_read_word_swapped(new_client, JC42_REG_MANID); | |
483 | devid = i2c_smbus_read_word_swapped(new_client, JC42_REG_DEVICEID); | |
4453d736 GR |
484 | |
485 | if (cap < 0 || config < 0 || manid < 0 || devid < 0) | |
486 | return -ENODEV; | |
487 | ||
488 | if ((cap & 0xff00) || (config & 0xf800)) | |
489 | return -ENODEV; | |
490 | ||
491 | for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) { | |
492 | struct jc42_chips *chip = &jc42_chips[i]; | |
493 | if (manid == chip->manid && | |
494 | (devid & chip->devid_mask) == chip->devid) { | |
495 | strlcpy(info->type, "jc42", I2C_NAME_SIZE); | |
496 | return 0; | |
497 | } | |
498 | } | |
499 | return -ENODEV; | |
500 | } | |
501 | ||
502 | static int jc42_probe(struct i2c_client *new_client, | |
503 | const struct i2c_device_id *id) | |
504 | { | |
505 | struct jc42_data *data; | |
506 | int config, cap, err; | |
507 | ||
508 | data = kzalloc(sizeof(struct jc42_data), GFP_KERNEL); | |
509 | if (!data) { | |
510 | err = -ENOMEM; | |
511 | goto exit; | |
512 | } | |
513 | ||
514 | i2c_set_clientdata(new_client, data); | |
515 | mutex_init(&data->update_lock); | |
516 | ||
90f4102c | 517 | cap = i2c_smbus_read_word_swapped(new_client, JC42_REG_CAP); |
4453d736 GR |
518 | if (cap < 0) { |
519 | err = -EINVAL; | |
520 | goto exit_free; | |
521 | } | |
522 | data->extended = !!(cap & JC42_CAP_RANGE); | |
523 | ||
90f4102c | 524 | config = i2c_smbus_read_word_swapped(new_client, JC42_REG_CONFIG); |
4453d736 GR |
525 | if (config < 0) { |
526 | err = -EINVAL; | |
527 | goto exit_free; | |
528 | } | |
529 | data->orig_config = config; | |
530 | if (config & JC42_CFG_SHUTDOWN) { | |
531 | config &= ~JC42_CFG_SHUTDOWN; | |
90f4102c JD |
532 | i2c_smbus_write_word_swapped(new_client, JC42_REG_CONFIG, |
533 | config); | |
4453d736 GR |
534 | } |
535 | data->config = config; | |
536 | ||
537 | /* Register sysfs hooks */ | |
538 | err = sysfs_create_group(&new_client->dev.kobj, &jc42_group); | |
539 | if (err) | |
540 | goto exit_free; | |
541 | ||
542 | data->hwmon_dev = hwmon_device_register(&new_client->dev); | |
543 | if (IS_ERR(data->hwmon_dev)) { | |
544 | err = PTR_ERR(data->hwmon_dev); | |
545 | goto exit_remove; | |
546 | } | |
547 | ||
548 | return 0; | |
549 | ||
550 | exit_remove: | |
551 | sysfs_remove_group(&new_client->dev.kobj, &jc42_group); | |
552 | exit_free: | |
553 | kfree(data); | |
554 | exit: | |
555 | return err; | |
556 | } | |
557 | ||
558 | static int jc42_remove(struct i2c_client *client) | |
559 | { | |
560 | struct jc42_data *data = i2c_get_clientdata(client); | |
561 | hwmon_device_unregister(data->hwmon_dev); | |
562 | sysfs_remove_group(&client->dev.kobj, &jc42_group); | |
563 | if (data->config != data->orig_config) | |
90f4102c JD |
564 | i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, |
565 | data->orig_config); | |
4453d736 GR |
566 | kfree(data); |
567 | return 0; | |
568 | } | |
569 | ||
4453d736 GR |
570 | static struct jc42_data *jc42_update_device(struct device *dev) |
571 | { | |
572 | struct i2c_client *client = to_i2c_client(dev); | |
573 | struct jc42_data *data = i2c_get_clientdata(client); | |
574 | struct jc42_data *ret = data; | |
575 | int val; | |
576 | ||
577 | mutex_lock(&data->update_lock); | |
578 | ||
579 | if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { | |
90f4102c | 580 | val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP); |
4453d736 GR |
581 | if (val < 0) { |
582 | ret = ERR_PTR(val); | |
583 | goto abort; | |
584 | } | |
585 | data->temp_input = val; | |
586 | ||
90f4102c JD |
587 | val = i2c_smbus_read_word_swapped(client, |
588 | JC42_REG_TEMP_CRITICAL); | |
4453d736 GR |
589 | if (val < 0) { |
590 | ret = ERR_PTR(val); | |
591 | goto abort; | |
592 | } | |
593 | data->temp_crit = val; | |
594 | ||
90f4102c | 595 | val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER); |
4453d736 GR |
596 | if (val < 0) { |
597 | ret = ERR_PTR(val); | |
598 | goto abort; | |
599 | } | |
600 | data->temp_min = val; | |
601 | ||
90f4102c | 602 | val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER); |
4453d736 GR |
603 | if (val < 0) { |
604 | ret = ERR_PTR(val); | |
605 | goto abort; | |
606 | } | |
607 | data->temp_max = val; | |
608 | ||
609 | data->last_updated = jiffies; | |
610 | data->valid = true; | |
611 | } | |
612 | abort: | |
613 | mutex_unlock(&data->update_lock); | |
614 | return ret; | |
615 | } | |
616 | ||
f0967eea | 617 | module_i2c_driver(jc42_driver); |
4453d736 GR |
618 | |
619 | MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>"); | |
620 | MODULE_DESCRIPTION("JC42 driver"); | |
621 | MODULE_LICENSE("GPL"); |