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hwmon: (nct6775) Add support for fan debounce module parameter
[deliverable/linux.git] / drivers / hwmon / nct6775.c
CommitLineData
9de2e2e8
GR		 1/*
2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
4 *
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
6 *
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
14 *
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 *
33 * Supports the following chips:
34 *
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
37 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
38 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
39 *
40 * #temp lists the number of monitored temperature sources (first value) plus
41 * the number of directly connectable temperature sensors (second value).
42 */
43
44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
50#include <linux/platform_device.h>
51#include <linux/hwmon.h>
52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
54#include <linux/err.h>
55#include <linux/mutex.h>
56#include <linux/acpi.h>
57#include <linux/io.h>
58#include "lm75.h"
59
aa136e5d
GR		 60#define USE_ALTERNATE
61
9de2e2e8
GR		 62enum kinds { nct6775, nct6776, nct6779 };
63
64/* used to set data->name = nct6775_device_names[data->sio_kind] */
65static const char * const nct6775_device_names[] = {
66 "nct6775",
67 "nct6776",
68 "nct6779",
69};
70
71static unsigned short force_id;
72module_param(force_id, ushort, 0);
73MODULE_PARM_DESC(force_id, "Override the detected device ID");
74
47ece964
GR		 75static unsigned short fan_debounce;
76module_param(fan_debounce, ushort, 0);
77MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
78
9de2e2e8
GR		 79#define DRVNAME "nct6775"
80
81/*
82 * Super-I/O constants and functions
83 */
84
a6bd5878 85#define NCT6775_LD_ACPI 0x0a
9de2e2e8
GR		 86#define NCT6775_LD_HWM 0x0b
87#define NCT6775_LD_VID 0x0d
88
89#define SIO_REG_LDSEL 0x07 /* Logical device select */
90#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
91#define SIO_REG_ENABLE 0x30 /* Logical device enable */
92#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
93
94#define SIO_NCT6775_ID 0xb470
95#define SIO_NCT6776_ID 0xc330
96#define SIO_NCT6779_ID 0xc560
97#define SIO_ID_MASK 0xFFF0
98
99static inline void
100superio_outb(int ioreg, int reg, int val)
101{
102 outb(reg, ioreg);
103 outb(val, ioreg + 1);
104}
105
106static inline int
107superio_inb(int ioreg, int reg)
108{
109 outb(reg, ioreg);
110 return inb(ioreg + 1);
111}
112
113static inline void
114superio_select(int ioreg, int ld)
115{
116 outb(SIO_REG_LDSEL, ioreg);
117 outb(ld, ioreg + 1);
118}
119
120static inline int
121superio_enter(int ioreg)
122{
123 /*
124 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
125 */
126 if (!request_muxed_region(ioreg, 2, DRVNAME))
127 return -EBUSY;
128
129 outb(0x87, ioreg);
130 outb(0x87, ioreg);
131
132 return 0;
133}
134
135static inline void
136superio_exit(int ioreg)
137{
138 outb(0xaa, ioreg);
139 outb(0x02, ioreg);
140 outb(0x02, ioreg + 1);
141 release_region(ioreg, 2);
142}
143
144/*
145 * ISA constants
146 */
147
148#define IOREGION_ALIGNMENT (~7)
149#define IOREGION_OFFSET 5
150#define IOREGION_LENGTH 2
151#define ADDR_REG_OFFSET 0
152#define DATA_REG_OFFSET 1
153
154#define NCT6775_REG_BANK 0x4E
155#define NCT6775_REG_CONFIG 0x40
156
157/*
158 * Not currently used:
159 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
160 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
161 * REG_MAN_ID is at port 0x4f
162 * REG_CHIP_ID is at port 0x58
163 */
164
aa136e5d
GR		 165#define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
166#define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
167
9de2e2e8
GR		 168#define NUM_REG_ALARM 4 /* Max number of alarm registers */
169
170/* Common and NCT6775 specific data */
171
172/* Voltage min/max registers for nr=7..14 are in bank 5 */
173
174static const u16 NCT6775_REG_IN_MAX[] = {
175 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
176 0x55c, 0x55e, 0x560, 0x562 };
177static const u16 NCT6775_REG_IN_MIN[] = {
178 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
179 0x55d, 0x55f, 0x561, 0x563 };
180static const u16 NCT6775_REG_IN[] = {
181 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
182};
183
184#define NCT6775_REG_VBAT 0x5D
aa136e5d 185#define NCT6775_REG_DIODE 0x5E
9de2e2e8 186
1c65dc36
GR		 187#define NCT6775_REG_FANDIV1 0x506
188#define NCT6775_REG_FANDIV2 0x507
189
47ece964
GR		 190#define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
191
9de2e2e8
GR		 192static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
193
194/* 0..15 voltages, 16..23 fans, 24..31 temperatures */
195
196static const s8 NCT6775_ALARM_BITS[] = {
197 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
198 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
199 -1, /* unused */
200 6, 7, 11, 10, 23, /* fan1..fan5 */
201 -1, -1, -1, /* unused */
202 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
203 12, -1 }; /* intrusion0, intrusion1 */
204
1c65dc36 205#define FAN_ALARM_BASE 16
aa136e5d 206#define TEMP_ALARM_BASE 24
a6bd5878
GR		 207#define INTRUSION_ALARM_BASE 30
208
209static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
210static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
211
1c65dc36
GR		 212static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
213static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
5c25d954 214static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
1c65dc36 215
aa136e5d
GR		 216static const u16 NCT6775_REG_TEMP[] = {
217 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
218
219static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
220 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
221static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
222 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
223static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
224 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
225
226static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
227 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
228
229static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
230
231static const char *const nct6775_temp_label[] = {
232 "",
233 "SYSTIN",
234 "CPUTIN",
235 "AUXTIN",
236 "AMD SB-TSI",
237 "PECI Agent 0",
238 "PECI Agent 1",
239 "PECI Agent 2",
240 "PECI Agent 3",
241 "PECI Agent 4",
242 "PECI Agent 5",
243 "PECI Agent 6",
244 "PECI Agent 7",
245 "PCH_CHIP_CPU_MAX_TEMP",
246 "PCH_CHIP_TEMP",
247 "PCH_CPU_TEMP",
248 "PCH_MCH_TEMP",
249 "PCH_DIM0_TEMP",
250 "PCH_DIM1_TEMP",
251 "PCH_DIM2_TEMP",
252 "PCH_DIM3_TEMP"
253};
254
255static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
256 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
257
258static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
259 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
260 0xa07 };
261
9de2e2e8
GR		 262/* NCT6776 specific data */
263
264static const s8 NCT6776_ALARM_BITS[] = {
265 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
266 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
267 -1, /* unused */
268 6, 7, 11, 10, 23, /* fan1..fan5 */
269 -1, -1, -1, /* unused */
270 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
271 12, 9 }; /* intrusion0, intrusion1 */
272
1c65dc36 273static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
5c25d954 274static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
1c65dc36 275
aa136e5d
GR		 276static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
277 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
278
279static const char *const nct6776_temp_label[] = {
280 "",
281 "SYSTIN",
282 "CPUTIN",
283 "AUXTIN",
284 "SMBUSMASTER 0",
285 "SMBUSMASTER 1",
286 "SMBUSMASTER 2",
287 "SMBUSMASTER 3",
288 "SMBUSMASTER 4",
289 "SMBUSMASTER 5",
290 "SMBUSMASTER 6",
291 "SMBUSMASTER 7",
292 "PECI Agent 0",
293 "PECI Agent 1",
294 "PCH_CHIP_CPU_MAX_TEMP",
295 "PCH_CHIP_TEMP",
296 "PCH_CPU_TEMP",
297 "PCH_MCH_TEMP",
298 "PCH_DIM0_TEMP",
299 "PCH_DIM1_TEMP",
300 "PCH_DIM2_TEMP",
301 "PCH_DIM3_TEMP",
302 "BYTE_TEMP"
303};
304
305static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
306 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
307
308static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
309 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
310
9de2e2e8
GR		 311/* NCT6779 specific data */
312
313static const u16 NCT6779_REG_IN[] = {
314 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
315 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
316
317static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
318 0x459, 0x45A, 0x45B, 0x568 };
319
320static const s8 NCT6779_ALARM_BITS[] = {
321 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
322 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
323 -1, /* unused */
324 6, 7, 11, 10, 23, /* fan1..fan5 */
325 -1, -1, -1, /* unused */
326 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
327 12, 9 }; /* intrusion0, intrusion1 */
328
1c65dc36 329static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
5c25d954
GR		 330static const u16 NCT6779_REG_FAN_PULSES[] = {
331 0x644, 0x645, 0x646, 0x647, 0x648 };
1c65dc36 332
aa136e5d
GR		 333static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
334static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
335 0x18, 0x152 };
336static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
337 0x3a, 0x153 };
338static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
339 0x39, 0x155 };
340
341static const u16 NCT6779_REG_TEMP_OFFSET[] = {
342 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
343
344static const char *const nct6779_temp_label[] = {
345 "",
346 "SYSTIN",
347 "CPUTIN",
348 "AUXTIN0",
349 "AUXTIN1",
350 "AUXTIN2",
351 "AUXTIN3",
352 "",
353 "SMBUSMASTER 0",
354 "SMBUSMASTER 1",
355 "SMBUSMASTER 2",
356 "SMBUSMASTER 3",
357 "SMBUSMASTER 4",
358 "SMBUSMASTER 5",
359 "SMBUSMASTER 6",
360 "SMBUSMASTER 7",
361 "PECI Agent 0",
362 "PECI Agent 1",
363 "PCH_CHIP_CPU_MAX_TEMP",
364 "PCH_CHIP_TEMP",
365 "PCH_CPU_TEMP",
366 "PCH_MCH_TEMP",
367 "PCH_DIM0_TEMP",
368 "PCH_DIM1_TEMP",
369 "PCH_DIM2_TEMP",
370 "PCH_DIM3_TEMP",
371 "BYTE_TEMP"
372};
373
374static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
375 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
376 0, 0, 0, 0, 0, 0, 0, 0,
377 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
378 0x408, 0 };
379
380static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
381 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
382
9de2e2e8
GR		 383/*
384 * Conversions
385 */
386
1c65dc36
GR		 387static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
388{
389 if (reg == 0 || reg == 255)
390 return 0;
391 return 1350000U / (reg << divreg);
392}
393
394static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
395{
396 if ((reg & 0xff1f) == 0xff1f)
397 return 0;
398
399 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
400
401 if (reg == 0)
402 return 0;
403
404 return 1350000U / reg;
405}
406
407static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
408{
409 if (reg == 0 || reg == 0xffff)
410 return 0;
411
412 /*
413 * Even though the registers are 16 bit wide, the fan divisor
414 * still applies.
415 */
416 return 1350000U / (reg << divreg);
417}
418
419static inline unsigned int
420div_from_reg(u8 reg)
421{
422 return 1 << reg;
423}
424
9de2e2e8
GR		 425/*
426 * Some of the voltage inputs have internal scaling, the tables below
427 * contain 8 (the ADC LSB in mV) * scaling factor * 100
428 */
429static const u16 scale_in[15] = {
430 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
431 800, 800
432};
433
434static inline long in_from_reg(u8 reg, u8 nr)
435{
436 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
437}
438
439static inline u8 in_to_reg(u32 val, u8 nr)
440{
441 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
442}
443
444/*
445 * Data structures and manipulation thereof
446 */
447
448struct nct6775_data {
449 int addr; /* IO base of hw monitor block */
450 enum kinds kind;
451 const char *name;
452
453 struct device *hwmon_dev;
454 struct mutex lock;
455
aa136e5d
GR		 456 u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
457 * 3=temp_crit
458 */
459 u8 temp_src[NUM_TEMP];
460 u16 reg_temp_config[NUM_TEMP];
461 const char * const *temp_label;
462 int temp_label_num;
463
9de2e2e8
GR		 464 u16 REG_CONFIG;
465 u16 REG_VBAT;
aa136e5d 466 u16 REG_DIODE;
9de2e2e8
GR		 467
468 const s8 *ALARM_BITS;
469
470 const u16 *REG_VIN;
471 const u16 *REG_IN_MINMAX[2];
472
1c65dc36
GR		 473 const u16 *REG_FAN;
474 const u16 *REG_FAN_MIN;
5c25d954 475 const u16 *REG_FAN_PULSES;
aa136e5d 476
1c65dc36 477 const u16 *REG_TEMP_SOURCE; /* temp register sources */
aa136e5d
GR		 478 const u16 *REG_TEMP_OFFSET;
479
9de2e2e8
GR		 480 const u16 *REG_ALARM;
481
1c65dc36
GR		 482 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
483 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
484
9de2e2e8
GR		 485 struct mutex update_lock;
486 bool valid; /* true if following fields are valid */
487 unsigned long last_updated; /* In jiffies */
488
489 /* Register values */
490 u8 bank; /* current register bank */
491 u8 in_num; /* number of in inputs we have */
492 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
1c65dc36
GR		 493 unsigned int rpm[5];
494 u16 fan_min[5];
5c25d954 495 u8 fan_pulses[5];
1c65dc36
GR		 496 u8 fan_div[5];
497 u8 has_fan; /* some fan inputs can be disabled */
498 u8 has_fan_min; /* some fans don't have min register */
499 bool has_fan_div;
9de2e2e8 500
aa136e5d
GR		 501 u8 temp_fixed_num; /* 3 or 6 */
502 u8 temp_type[NUM_TEMP_FIXED];
503 s8 temp_offset[NUM_TEMP_FIXED];
504 s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
505 * 3=temp_crit */
9de2e2e8
GR		 506 u64 alarms;
507
508 u8 vid;
509 u8 vrm;
510
aa136e5d
GR		 511 u16 have_temp;
512 u16 have_temp_fixed;
9de2e2e8
GR		 513 u16 have_in;
514};
515
516struct nct6775_sio_data {
517 int sioreg;
518 enum kinds kind;
519};
520
521static bool is_word_sized(struct nct6775_data *data, u16 reg)
522{
523 switch (data->kind) {
524 case nct6775:
525 return (((reg & 0xff00) == 0x100 ||
526 (reg & 0xff00) == 0x200) &&
527 ((reg & 0x00ff) == 0x50 ||
528 (reg & 0x00ff) == 0x53 ||
529 (reg & 0x00ff) == 0x55)) ||
530 (reg & 0xfff0) == 0x630 ||
531 reg == 0x640 || reg == 0x642 ||
532 reg == 0x662 ||
533 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
534 reg == 0x73 || reg == 0x75 || reg == 0x77;
535 case nct6776:
536 return (((reg & 0xff00) == 0x100 ||
537 (reg & 0xff00) == 0x200) &&
538 ((reg & 0x00ff) == 0x50 ||
539 (reg & 0x00ff) == 0x53 ||
540 (reg & 0x00ff) == 0x55)) ||
541 (reg & 0xfff0) == 0x630 ||
542 reg == 0x402 ||
543 reg == 0x640 || reg == 0x642 ||
544 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
545 reg == 0x73 || reg == 0x75 || reg == 0x77;
546 case nct6779:
547 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
548 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
549 reg == 0x402 ||
550 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
551 reg == 0x640 || reg == 0x642 ||
552 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
553 reg == 0x7b;
554 }
555 return false;
556}
557
558/*
559 * On older chips, only registers 0x50-0x5f are banked.
560 * On more recent chips, all registers are banked.
561 * Assume that is the case and set the bank number for each access.
562 * Cache the bank number so it only needs to be set if it changes.
563 */
564static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
565{
566 u8 bank = reg >> 8;
567 if (data->bank != bank) {
568 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
569 outb_p(bank, data->addr + DATA_REG_OFFSET);
570 data->bank = bank;
571 }
572}
573
574static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
575{
576 int res, word_sized = is_word_sized(data, reg);
577
578 mutex_lock(&data->lock);
579
580 nct6775_set_bank(data, reg);
581 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
582 res = inb_p(data->addr + DATA_REG_OFFSET);
583 if (word_sized) {
584 outb_p((reg & 0xff) + 1,
585 data->addr + ADDR_REG_OFFSET);
586 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
587 }
588
589 mutex_unlock(&data->lock);
590 return res;
591}
592
593static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
594{
595 int word_sized = is_word_sized(data, reg);
596
597 mutex_lock(&data->lock);
598
599 nct6775_set_bank(data, reg);
600 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
601 if (word_sized) {
602 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
603 outb_p((reg & 0xff) + 1,
604 data->addr + ADDR_REG_OFFSET);
605 }
606 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
607
608 mutex_unlock(&data->lock);
609 return 0;
610}
611
aa136e5d
GR		 612/* We left-align 8-bit temperature values to make the code simpler */
613static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
614{
615 u16 res;
616
617 res = nct6775_read_value(data, reg);
618 if (!is_word_sized(data, reg))
619 res <<= 8;
620
621 return res;
622}
623
624static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
625{
626 if (!is_word_sized(data, reg))
627 value >>= 8;
628 return nct6775_write_value(data, reg, value);
629}
630
1c65dc36
GR		 631/* This function assumes that the caller holds data->update_lock */
632static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
633{
634 u8 reg;
635
636 switch (nr) {
637 case 0:
638 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
639 | (data->fan_div[0] & 0x7);
640 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
641 break;
642 case 1:
643 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
644 | ((data->fan_div[1] << 4) & 0x70);
645 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
646 break;
647 case 2:
648 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
649 | (data->fan_div[2] & 0x7);
650 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
651 break;
652 case 3:
653 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
654 | ((data->fan_div[3] << 4) & 0x70);
655 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
656 break;
657 }
658}
659
660static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
661{
662 if (data->kind == nct6775)
663 nct6775_write_fan_div(data, nr);
664}
665
666static void nct6775_update_fan_div(struct nct6775_data *data)
667{
668 u8 i;
669
670 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
671 data->fan_div[0] = i & 0x7;
672 data->fan_div[1] = (i & 0x70) >> 4;
673 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
674 data->fan_div[2] = i & 0x7;
675 if (data->has_fan & (1<<3))
676 data->fan_div[3] = (i & 0x70) >> 4;
677}
678
679static void nct6775_update_fan_div_common(struct nct6775_data *data)
680{
681 if (data->kind == nct6775)
682 nct6775_update_fan_div(data);
683}
684
685static void nct6775_init_fan_div(struct nct6775_data *data)
686{
687 int i;
688
689 nct6775_update_fan_div_common(data);
690 /*
691 * For all fans, start with highest divider value if the divider
692 * register is not initialized. This ensures that we get a
693 * reading from the fan count register, even if it is not optimal.
694 * We'll compute a better divider later on.
695 */
696 for (i = 0; i < 3; i++) {
697 if (!(data->has_fan & (1 << i)))
698 continue;
699 if (data->fan_div[i] == 0) {
700 data->fan_div[i] = 7;
701 nct6775_write_fan_div_common(data, i);
702 }
703 }
704}
705
706static void nct6775_init_fan_common(struct device *dev,
707 struct nct6775_data *data)
708{
709 int i;
710 u8 reg;
711
712 if (data->has_fan_div)
713 nct6775_init_fan_div(data);
714
715 /*
716 * If fan_min is not set (0), set it to 0xff to disable it. This
717 * prevents the unnecessary warning when fanX_min is reported as 0.
718 */
719 for (i = 0; i < 5; i++) {
720 if (data->has_fan_min & (1 << i)) {
721 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
722 if (!reg)
723 nct6775_write_value(data, data->REG_FAN_MIN[i],
724 data->has_fan_div ? 0xff
725 : 0xff1f);
726 }
727 }
728}
729
730static void nct6775_select_fan_div(struct device *dev,
731 struct nct6775_data *data, int nr, u16 reg)
732{
733 u8 fan_div = data->fan_div[nr];
734 u16 fan_min;
735
736 if (!data->has_fan_div)
737 return;
738
739 /*
740 * If we failed to measure the fan speed, or the reported value is not
741 * in the optimal range, and the clock divider can be modified,
742 * let's try that for next time.
743 */
744 if (reg == 0x00 && fan_div < 0x07)
745 fan_div++;
746 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
747 fan_div--;
748
749 if (fan_div != data->fan_div[nr]) {
750 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
751 nr + 1, div_from_reg(data->fan_div[nr]),
752 div_from_reg(fan_div));
753
754 /* Preserve min limit if possible */
755 if (data->has_fan_min & (1 << nr)) {
756 fan_min = data->fan_min[nr];
757 if (fan_div > data->fan_div[nr]) {
758 if (fan_min != 255 && fan_min > 1)
759 fan_min >>= 1;
760 } else {
761 if (fan_min != 255) {
762 fan_min <<= 1;
763 if (fan_min > 254)
764 fan_min = 254;
765 }
766 }
767 if (fan_min != data->fan_min[nr]) {
768 data->fan_min[nr] = fan_min;
769 nct6775_write_value(data, data->REG_FAN_MIN[nr],
770 fan_min);
771 }
772 }
773 data->fan_div[nr] = fan_div;
774 nct6775_write_fan_div_common(data, nr);
775 }
776}
777
9de2e2e8
GR		 778static struct nct6775_data *nct6775_update_device(struct device *dev)
779{
780 struct nct6775_data *data = dev_get_drvdata(dev);
aa136e5d 781 int i, j;
9de2e2e8
GR		 782
783 mutex_lock(&data->update_lock);
784
785 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
786 || !data->valid) {
1c65dc36
GR		 787 /* Fan clock dividers */
788 nct6775_update_fan_div_common(data);
789
9de2e2e8
GR		 790 /* Measured voltages and limits */
791 for (i = 0; i < data->in_num; i++) {
792 if (!(data->have_in & (1 << i)))
793 continue;
794
795 data->in[i][0] = nct6775_read_value(data,
796 data->REG_VIN[i]);
797 data->in[i][1] = nct6775_read_value(data,
798 data->REG_IN_MINMAX[0][i]);
799 data->in[i][2] = nct6775_read_value(data,
800 data->REG_IN_MINMAX[1][i]);
801 }
802
1c65dc36
GR		 803 /* Measured fan speeds and limits */
804 for (i = 0; i < 5; i++) {
805 u16 reg;
806
807 if (!(data->has_fan & (1 << i)))
808 continue;
809
810 reg = nct6775_read_value(data, data->REG_FAN[i]);
811 data->rpm[i] = data->fan_from_reg(reg,
812 data->fan_div[i]);
813
814 if (data->has_fan_min & (1 << i))
815 data->fan_min[i] = nct6775_read_value(data,
816 data->REG_FAN_MIN[i]);
5c25d954
GR		 817 data->fan_pulses[i] =
818 nct6775_read_value(data, data->REG_FAN_PULSES[i]);
1c65dc36
GR		 819
820 nct6775_select_fan_div(dev, data, i, reg);
821 }
822
aa136e5d
GR		 823 /* Measured temperatures and limits */
824 for (i = 0; i < NUM_TEMP; i++) {
825 if (!(data->have_temp & (1 << i)))
826 continue;
827 for (j = 0; j < 4; j++) {
828 if (data->reg_temp[j][i])
829 data->temp[j][i]
830 = nct6775_read_temp(data,
831 data->reg_temp[j][i]);
832 }
833 if (!(data->have_temp_fixed & (1 << i)))
834 continue;
835 data->temp_offset[i]
836 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
837 }
838
9de2e2e8
GR		 839 data->alarms = 0;
840 for (i = 0; i < NUM_REG_ALARM; i++) {
841 u8 alarm;
842 if (!data->REG_ALARM[i])
843 continue;
844 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
845 data->alarms |= ((u64)alarm) << (i << 3);
846 }
847
848 data->last_updated = jiffies;
849 data->valid = true;
850 }
851
852 mutex_unlock(&data->update_lock);
853 return data;
854}
855
856/*
857 * Sysfs callback functions
858 */
859static ssize_t
860show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
861{
862 struct nct6775_data *data = nct6775_update_device(dev);
863 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
864 int nr = sattr->nr;
865 int index = sattr->index;
866 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
867}
868
869static ssize_t
870store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
871 size_t count)
872{
873 struct nct6775_data *data = dev_get_drvdata(dev);
874 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
875 int nr = sattr->nr;
876 int index = sattr->index;
877 unsigned long val;
878 int err = kstrtoul(buf, 10, &val);
879 if (err < 0)
880 return err;
881 mutex_lock(&data->update_lock);
882 data->in[nr][index] = in_to_reg(val, nr);
883 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
884 data->in[nr][index]);
885 mutex_unlock(&data->update_lock);
886 return count;
887}
888
889static ssize_t
890show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
891{
892 struct nct6775_data *data = nct6775_update_device(dev);
893 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
894 int nr = data->ALARM_BITS[sattr->index];
895 return sprintf(buf, "%u\n",
896 (unsigned int)((data->alarms >> nr) & 0x01));
897}
898
899static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
900static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
901static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
902static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
903static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
904static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
905static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
906static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
907static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
908static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
909static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
910static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
911static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
912static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
913static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
914
915static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
916static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
917static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
918static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
919static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
920static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
921static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
922static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
923static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
924static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
925static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
926static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
927static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
928static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
929static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
930
931static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
932 store_in_reg, 0, 1);
933static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
934 store_in_reg, 1, 1);
935static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
936 store_in_reg, 2, 1);
937static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
938 store_in_reg, 3, 1);
939static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
940 store_in_reg, 4, 1);
941static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
942 store_in_reg, 5, 1);
943static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
944 store_in_reg, 6, 1);
945static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
946 store_in_reg, 7, 1);
947static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
948 store_in_reg, 8, 1);
949static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
950 store_in_reg, 9, 1);
951static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
952 store_in_reg, 10, 1);
953static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
954 store_in_reg, 11, 1);
955static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
956 store_in_reg, 12, 1);
957static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
958 store_in_reg, 13, 1);
959static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
960 store_in_reg, 14, 1);
961
962static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
963 store_in_reg, 0, 2);
964static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
965 store_in_reg, 1, 2);
966static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
967 store_in_reg, 2, 2);
968static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
969 store_in_reg, 3, 2);
970static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
971 store_in_reg, 4, 2);
972static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
973 store_in_reg, 5, 2);
974static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
975 store_in_reg, 6, 2);
976static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
977 store_in_reg, 7, 2);
978static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
979 store_in_reg, 8, 2);
980static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
981 store_in_reg, 9, 2);
982static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
983 store_in_reg, 10, 2);
984static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
985 store_in_reg, 11, 2);
986static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
987 store_in_reg, 12, 2);
988static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
989 store_in_reg, 13, 2);
990static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
991 store_in_reg, 14, 2);
992
993static struct attribute *nct6775_attributes_in[15][5] = {
994 {
995 &sensor_dev_attr_in0_input.dev_attr.attr,
996 &sensor_dev_attr_in0_min.dev_attr.attr,
997 &sensor_dev_attr_in0_max.dev_attr.attr,
998 &sensor_dev_attr_in0_alarm.dev_attr.attr,
999 NULL
1000 },
1001 {
1002 &sensor_dev_attr_in1_input.dev_attr.attr,
1003 &sensor_dev_attr_in1_min.dev_attr.attr,
1004 &sensor_dev_attr_in1_max.dev_attr.attr,
1005 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1006 NULL
1007 },
1008 {
1009 &sensor_dev_attr_in2_input.dev_attr.attr,
1010 &sensor_dev_attr_in2_min.dev_attr.attr,
1011 &sensor_dev_attr_in2_max.dev_attr.attr,
1012 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1013 NULL
1014 },
1015 {
1016 &sensor_dev_attr_in3_input.dev_attr.attr,
1017 &sensor_dev_attr_in3_min.dev_attr.attr,
1018 &sensor_dev_attr_in3_max.dev_attr.attr,
1019 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1020 NULL
1021 },
1022 {
1023 &sensor_dev_attr_in4_input.dev_attr.attr,
1024 &sensor_dev_attr_in4_min.dev_attr.attr,
1025 &sensor_dev_attr_in4_max.dev_attr.attr,
1026 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1027 NULL
1028 },
1029 {
1030 &sensor_dev_attr_in5_input.dev_attr.attr,
1031 &sensor_dev_attr_in5_min.dev_attr.attr,
1032 &sensor_dev_attr_in5_max.dev_attr.attr,
1033 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1034 NULL
1035 },
1036 {
1037 &sensor_dev_attr_in6_input.dev_attr.attr,
1038 &sensor_dev_attr_in6_min.dev_attr.attr,
1039 &sensor_dev_attr_in6_max.dev_attr.attr,
1040 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1041 NULL
1042 },
1043 {
1044 &sensor_dev_attr_in7_input.dev_attr.attr,
1045 &sensor_dev_attr_in7_min.dev_attr.attr,
1046 &sensor_dev_attr_in7_max.dev_attr.attr,
1047 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1048 NULL
1049 },
1050 {
1051 &sensor_dev_attr_in8_input.dev_attr.attr,
1052 &sensor_dev_attr_in8_min.dev_attr.attr,
1053 &sensor_dev_attr_in8_max.dev_attr.attr,
1054 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1055 NULL
1056 },
1057 {
1058 &sensor_dev_attr_in9_input.dev_attr.attr,
1059 &sensor_dev_attr_in9_min.dev_attr.attr,
1060 &sensor_dev_attr_in9_max.dev_attr.attr,
1061 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1062 NULL
1063 },
1064 {
1065 &sensor_dev_attr_in10_input.dev_attr.attr,
1066 &sensor_dev_attr_in10_min.dev_attr.attr,
1067 &sensor_dev_attr_in10_max.dev_attr.attr,
1068 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1069 NULL
1070 },
1071 {
1072 &sensor_dev_attr_in11_input.dev_attr.attr,
1073 &sensor_dev_attr_in11_min.dev_attr.attr,
1074 &sensor_dev_attr_in11_max.dev_attr.attr,
1075 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1076 NULL
1077 },
1078 {
1079 &sensor_dev_attr_in12_input.dev_attr.attr,
1080 &sensor_dev_attr_in12_min.dev_attr.attr,
1081 &sensor_dev_attr_in12_max.dev_attr.attr,
1082 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1083 NULL
1084 },
1085 {
1086 &sensor_dev_attr_in13_input.dev_attr.attr,
1087 &sensor_dev_attr_in13_min.dev_attr.attr,
1088 &sensor_dev_attr_in13_max.dev_attr.attr,
1089 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1090 NULL
1091 },
1092 {
1093 &sensor_dev_attr_in14_input.dev_attr.attr,
1094 &sensor_dev_attr_in14_min.dev_attr.attr,
1095 &sensor_dev_attr_in14_max.dev_attr.attr,
1096 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1097 NULL
1098 },
1099};
1100
1101static const struct attribute_group nct6775_group_in[15] = {
1102 { .attrs = nct6775_attributes_in[0] },
1103 { .attrs = nct6775_attributes_in[1] },
1104 { .attrs = nct6775_attributes_in[2] },
1105 { .attrs = nct6775_attributes_in[3] },
1106 { .attrs = nct6775_attributes_in[4] },
1107 { .attrs = nct6775_attributes_in[5] },
1108 { .attrs = nct6775_attributes_in[6] },
1109 { .attrs = nct6775_attributes_in[7] },
1110 { .attrs = nct6775_attributes_in[8] },
1111 { .attrs = nct6775_attributes_in[9] },
1112 { .attrs = nct6775_attributes_in[10] },
1113 { .attrs = nct6775_attributes_in[11] },
1114 { .attrs = nct6775_attributes_in[12] },
1115 { .attrs = nct6775_attributes_in[13] },
1116 { .attrs = nct6775_attributes_in[14] },
1117};
1118
1c65dc36
GR		 1119static ssize_t
1120show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1121{
1122 struct nct6775_data *data = nct6775_update_device(dev);
1123 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1124 int nr = sattr->index;
1125 return sprintf(buf, "%d\n", data->rpm[nr]);
1126}
1127
1128static ssize_t
1129show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1130{
1131 struct nct6775_data *data = nct6775_update_device(dev);
1132 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1133 int nr = sattr->index;
1134 return sprintf(buf, "%d\n",
1135 data->fan_from_reg_min(data->fan_min[nr],
1136 data->fan_div[nr]));
1137}
1138
1139static ssize_t
1140show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1141{
1142 struct nct6775_data *data = nct6775_update_device(dev);
1143 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1144 int nr = sattr->index;
1145 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1146}
1147
1148static ssize_t
1149store_fan_min(struct device *dev, struct device_attribute *attr,
1150 const char *buf, size_t count)
1151{
1152 struct nct6775_data *data = dev_get_drvdata(dev);
1153 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1154 int nr = sattr->index;
1155 unsigned long val;
1156 int err;
1157 unsigned int reg;
1158 u8 new_div;
1159
1160 err = kstrtoul(buf, 10, &val);
1161 if (err < 0)
1162 return err;
1163
1164 mutex_lock(&data->update_lock);
1165 if (!data->has_fan_div) {
1166 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1167 if (!val) {
1168 val = 0xff1f;
1169 } else {
1170 if (val > 1350000U)
1171 val = 135000U;
1172 val = 1350000U / val;
1173 val = (val & 0x1f) | ((val << 3) & 0xff00);
1174 }
1175 data->fan_min[nr] = val;
1176 goto write_min; /* Leave fan divider alone */
1177 }
1178 if (!val) {
1179 /* No min limit, alarm disabled */
1180 data->fan_min[nr] = 255;
1181 new_div = data->fan_div[nr]; /* No change */
1182 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1183 goto write_div;
1184 }
1185 reg = 1350000U / val;
1186 if (reg >= 128 * 255) {
1187 /*
1188 * Speed below this value cannot possibly be represented,
1189 * even with the highest divider (128)
1190 */
1191 data->fan_min[nr] = 254;
1192 new_div = 7; /* 128 == (1 << 7) */
1193 dev_warn(dev,
1194 "fan%u low limit %lu below minimum %u, set to minimum\n",
1195 nr + 1, val, data->fan_from_reg_min(254, 7));
1196 } else if (!reg) {
1197 /*
1198 * Speed above this value cannot possibly be represented,
1199 * even with the lowest divider (1)
1200 */
1201 data->fan_min[nr] = 1;
1202 new_div = 0; /* 1 == (1 << 0) */
1203 dev_warn(dev,
1204 "fan%u low limit %lu above maximum %u, set to maximum\n",
1205 nr + 1, val, data->fan_from_reg_min(1, 0));
1206 } else {
1207 /*
1208 * Automatically pick the best divider, i.e. the one such
1209 * that the min limit will correspond to a register value
1210 * in the 96..192 range
1211 */
1212 new_div = 0;
1213 while (reg > 192 && new_div < 7) {
1214 reg >>= 1;
1215 new_div++;
1216 }
1217 data->fan_min[nr] = reg;
1218 }
1219
1220write_div:
1221 /*
1222 * Write both the fan clock divider (if it changed) and the new
1223 * fan min (unconditionally)
1224 */
1225 if (new_div != data->fan_div[nr]) {
1226 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1227 nr + 1, div_from_reg(data->fan_div[nr]),
1228 div_from_reg(new_div));
1229 data->fan_div[nr] = new_div;
1230 nct6775_write_fan_div_common(data, nr);
1231 /* Give the chip time to sample a new speed value */
1232 data->last_updated = jiffies;
1233 }
1234
1235write_min:
1236 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1237 mutex_unlock(&data->update_lock);
1238
1239 return count;
1240}
1241
5c25d954
GR		 1242static ssize_t
1243show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1244{
1245 struct nct6775_data *data = nct6775_update_device(dev);
1246 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1247 int p = data->fan_pulses[sattr->index];
1248
1249 return sprintf(buf, "%d\n", p ? : 4);
1250}
1251
1252static ssize_t
1253store_fan_pulses(struct device *dev, struct device_attribute *attr,
1254 const char *buf, size_t count)
1255{
1256 struct nct6775_data *data = dev_get_drvdata(dev);
1257 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1258 int nr = sattr->index;
1259 unsigned long val;
1260 int err;
1261
1262 err = kstrtoul(buf, 10, &val);
1263 if (err < 0)
1264 return err;
1265
1266 if (val > 4)
1267 return -EINVAL;
1268
1269 mutex_lock(&data->update_lock);
1270 data->fan_pulses[nr] = val & 3;
1271 nct6775_write_value(data, data->REG_FAN_PULSES[nr], val & 3);
1272 mutex_unlock(&data->update_lock);
1273
1274 return count;
1275}
1276
1c65dc36
GR		 1277static struct sensor_device_attribute sda_fan_input[] = {
1278 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1279 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1280 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1281 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1282 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1283};
1284
1285static struct sensor_device_attribute sda_fan_alarm[] = {
1286 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1287 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1288 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1289 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1290 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1291};
1292
1293static struct sensor_device_attribute sda_fan_min[] = {
1294 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1295 store_fan_min, 0),
1296 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1297 store_fan_min, 1),
1298 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1299 store_fan_min, 2),
1300 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1301 store_fan_min, 3),
1302 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1303 store_fan_min, 4),
1304};
1305
5c25d954
GR		 1306static struct sensor_device_attribute sda_fan_pulses[] = {
1307 SENSOR_ATTR(fan1_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1308 store_fan_pulses, 0),
1309 SENSOR_ATTR(fan2_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1310 store_fan_pulses, 1),
1311 SENSOR_ATTR(fan3_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1312 store_fan_pulses, 2),
1313 SENSOR_ATTR(fan4_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1314 store_fan_pulses, 3),
1315 SENSOR_ATTR(fan5_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1316 store_fan_pulses, 4),
1317};
1318
1c65dc36
GR		 1319static struct sensor_device_attribute sda_fan_div[] = {
1320 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1321 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1322 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1323 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1324 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1325};
1326
aa136e5d
GR		 1327static ssize_t
1328show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1329{
1330 struct nct6775_data *data = nct6775_update_device(dev);
1331 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1332 int nr = sattr->index;
1333 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1334}
1335
1336static ssize_t
1337show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1338{
1339 struct nct6775_data *data = nct6775_update_device(dev);
1340 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1341 int nr = sattr->nr;
1342 int index = sattr->index;
1343
1344 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1345}
1346
1347static ssize_t
1348store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1349 size_t count)
1350{
1351 struct nct6775_data *data = dev_get_drvdata(dev);
1352 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1353 int nr = sattr->nr;
1354 int index = sattr->index;
1355 int err;
1356 long val;
1357
1358 err = kstrtol(buf, 10, &val);
1359 if (err < 0)
1360 return err;
1361
1362 mutex_lock(&data->update_lock);
1363 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1364 nct6775_write_temp(data, data->reg_temp[index][nr],
1365 data->temp[index][nr]);
1366 mutex_unlock(&data->update_lock);
1367 return count;
1368}
1369
1370static ssize_t
1371show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1372{
1373 struct nct6775_data *data = nct6775_update_device(dev);
1374 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1375
1376 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1377}
1378
1379static ssize_t
1380store_temp_offset(struct device *dev, struct device_attribute *attr,
1381 const char *buf, size_t count)
1382{
1383 struct nct6775_data *data = dev_get_drvdata(dev);
1384 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1385 int nr = sattr->index;
1386 long val;
1387 int err;
1388
1389 err = kstrtol(buf, 10, &val);
1390 if (err < 0)
1391 return err;
1392
1393 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1394
1395 mutex_lock(&data->update_lock);
1396 data->temp_offset[nr] = val;
1397 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1398 mutex_unlock(&data->update_lock);
1399
1400 return count;
1401}
1402
1403static ssize_t
1404show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1405{
1406 struct nct6775_data *data = nct6775_update_device(dev);
1407 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1408 int nr = sattr->index;
1409 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1410}
1411
1412static ssize_t
1413store_temp_type(struct device *dev, struct device_attribute *attr,
1414 const char *buf, size_t count)
1415{
1416 struct nct6775_data *data = nct6775_update_device(dev);
1417 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1418 int nr = sattr->index;
1419 unsigned long val;
1420 int err;
1421 u8 vbat, diode, bit;
1422
1423 err = kstrtoul(buf, 10, &val);
1424 if (err < 0)
1425 return err;
1426
1427 if (val != 1 && val != 3 && val != 4)
1428 return -EINVAL;
1429
1430 mutex_lock(&data->update_lock);
1431
1432 data->temp_type[nr] = val;
1433 vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1434 diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1435 bit = 0x02 << nr;
1436 switch (val) {
1437 case 1: /* CPU diode (diode, current mode) */
1438 vbat |= bit;
1439 diode |= bit;
1440 break;
1441 case 3: /* diode, voltage mode */
1442 vbat |= bit;
1443 break;
1444 case 4: /* thermistor */
1445 break;
1446 }
1447 nct6775_write_value(data, data->REG_VBAT, vbat);
1448 nct6775_write_value(data, data->REG_DIODE, diode);
1449
1450 mutex_unlock(&data->update_lock);
1451 return count;
1452}
1453
1454static struct sensor_device_attribute_2 sda_temp_input[] = {
1455 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1456 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1457 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1458 SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1459 SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1460 SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1461 SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1462 SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1463 SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1464 SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1465};
1466
1467static struct sensor_device_attribute sda_temp_label[] = {
1468 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1469 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1470 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1471 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1472 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1473 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1474 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1475 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1476 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1477 SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1478};
1479
1480static struct sensor_device_attribute_2 sda_temp_max[] = {
1481 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1482 0, 1),
1483 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1484 1, 1),
1485 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1486 2, 1),
1487 SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1488 3, 1),
1489 SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1490 4, 1),
1491 SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1492 5, 1),
1493 SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1494 6, 1),
1495 SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1496 7, 1),
1497 SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1498 8, 1),
1499 SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1500 9, 1),
1501};
1502
1503static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1504 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1505 0, 2),
1506 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1507 1, 2),
1508 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1509 2, 2),
1510 SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1511 3, 2),
1512 SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1513 4, 2),
1514 SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1515 5, 2),
1516 SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1517 6, 2),
1518 SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1519 7, 2),
1520 SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1521 8, 2),
1522 SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1523 9, 2),
1524};
1525
1526static struct sensor_device_attribute_2 sda_temp_crit[] = {
1527 SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1528 0, 3),
1529 SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1530 1, 3),
1531 SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1532 2, 3),
1533 SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1534 3, 3),
1535 SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1536 4, 3),
1537 SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1538 5, 3),
1539 SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1540 6, 3),
1541 SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1542 7, 3),
1543 SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1544 8, 3),
1545 SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1546 9, 3),
1547};
1548
1549static struct sensor_device_attribute sda_temp_offset[] = {
1550 SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1551 store_temp_offset, 0),
1552 SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1553 store_temp_offset, 1),
1554 SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1555 store_temp_offset, 2),
1556 SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1557 store_temp_offset, 3),
1558 SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1559 store_temp_offset, 4),
1560 SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1561 store_temp_offset, 5),
1562};
1563
1564static struct sensor_device_attribute sda_temp_type[] = {
1565 SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1566 store_temp_type, 0),
1567 SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1568 store_temp_type, 1),
1569 SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1570 store_temp_type, 2),
1571 SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1572 store_temp_type, 3),
1573 SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1574 store_temp_type, 4),
1575 SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1576 store_temp_type, 5),
1577};
1578
1579static struct sensor_device_attribute sda_temp_alarm[] = {
1580 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1581 TEMP_ALARM_BASE),
1582 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1583 TEMP_ALARM_BASE + 1),
1584 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1585 TEMP_ALARM_BASE + 2),
1586 SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1587 TEMP_ALARM_BASE + 3),
1588 SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1589 TEMP_ALARM_BASE + 4),
1590 SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1591 TEMP_ALARM_BASE + 5),
1592};
1593
1594#define NUM_TEMP_ALARM ARRAY_SIZE(sda_temp_alarm)
1595
9de2e2e8
GR		 1596static ssize_t
1597show_name(struct device *dev, struct device_attribute *attr, char *buf)
1598{
1599 struct nct6775_data *data = dev_get_drvdata(dev);
1600
1601 return sprintf(buf, "%s\n", data->name);
1602}
1603
1604static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1605
1606static ssize_t
1607show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1608{
1609 struct nct6775_data *data = dev_get_drvdata(dev);
1610 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1611}
1612
1613static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1614
a6bd5878
GR		 1615/* Case open detection */
1616
1617static ssize_t
1618clear_caseopen(struct device *dev, struct device_attribute *attr,
1619 const char *buf, size_t count)
1620{
1621 struct nct6775_data *data = dev_get_drvdata(dev);
1622 struct nct6775_sio_data *sio_data = dev->platform_data;
1623 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
1624 unsigned long val;
1625 u8 reg;
1626 int ret;
1627
1628 if (kstrtoul(buf, 10, &val) || val != 0)
1629 return -EINVAL;
1630
1631 mutex_lock(&data->update_lock);
1632
1633 /*
1634 * Use CR registers to clear caseopen status.
1635 * The CR registers are the same for all chips, and not all chips
1636 * support clearing the caseopen status through "regular" registers.
1637 */
1638 ret = superio_enter(sio_data->sioreg);
1639 if (ret) {
1640 count = ret;
1641 goto error;
1642 }
1643
1644 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
1645 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
1646 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
1647 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
1648 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
1649 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
1650 superio_exit(sio_data->sioreg);
1651
1652 data->valid = false; /* Force cache refresh */
1653error:
1654 mutex_unlock(&data->update_lock);
1655 return count;
1656}
1657
1658static struct sensor_device_attribute sda_caseopen[] = {
1659 SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
1660 clear_caseopen, INTRUSION_ALARM_BASE),
1661 SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
1662 clear_caseopen, INTRUSION_ALARM_BASE + 1),
1663};
1664
9de2e2e8
GR		 1665/*
1666 * Driver and device management
1667 */
1668
1669static void nct6775_device_remove_files(struct device *dev)
1670{
1671 /*
1672 * some entries in the following arrays may not have been used in
1673 * device_create_file(), but device_remove_file() will ignore them
1674 */
1675 int i;
1676 struct nct6775_data *data = dev_get_drvdata(dev);
1677
1678 for (i = 0; i < data->in_num; i++)
1679 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
1680
1c65dc36
GR		 1681 for (i = 0; i < 5; i++) {
1682 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1683 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1684 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1685 device_remove_file(dev, &sda_fan_min[i].dev_attr);
5c25d954 1686 device_remove_file(dev, &sda_fan_pulses[i].dev_attr);
1c65dc36 1687 }
aa136e5d
GR		 1688 for (i = 0; i < NUM_TEMP; i++) {
1689 if (!(data->have_temp & (1 << i)))
1690 continue;
1691 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1692 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1693 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1694 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1695 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
1696 if (!(data->have_temp_fixed & (1 << i)))
1697 continue;
1698 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1699 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
1700 if (i >= NUM_TEMP_ALARM)
1701 continue;
1702 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1703 }
1704
a6bd5878
GR		 1705 device_remove_file(dev, &sda_caseopen[0].dev_attr);
1706 device_remove_file(dev, &sda_caseopen[1].dev_attr);
1707
9de2e2e8
GR		 1708 device_remove_file(dev, &dev_attr_name);
1709 device_remove_file(dev, &dev_attr_cpu0_vid);
1710}
1711
1712/* Get the monitoring functions started */
1713static inline void nct6775_init_device(struct nct6775_data *data)
1714{
aa136e5d
GR		 1715 int i;
1716 u8 tmp, diode;
9de2e2e8
GR		 1717
1718 /* Start monitoring if needed */
1719 if (data->REG_CONFIG) {
1720 tmp = nct6775_read_value(data, data->REG_CONFIG);
1721 if (!(tmp & 0x01))
1722 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
1723 }
1724
aa136e5d
GR		 1725 /* Enable temperature sensors if needed */
1726 for (i = 0; i < NUM_TEMP; i++) {
1727 if (!(data->have_temp & (1 << i)))
1728 continue;
1729 if (!data->reg_temp_config[i])
1730 continue;
1731 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
1732 if (tmp & 0x01)
1733 nct6775_write_value(data, data->reg_temp_config[i],
1734 tmp & 0xfe);
1735 }
1736
9de2e2e8
GR		 1737 /* Enable VBAT monitoring if needed */
1738 tmp = nct6775_read_value(data, data->REG_VBAT);
1739 if (!(tmp & 0x01))
1740 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
aa136e5d
GR		 1741
1742 diode = nct6775_read_value(data, data->REG_DIODE);
1743
1744 for (i = 0; i < data->temp_fixed_num; i++) {
1745 if (!(data->have_temp_fixed & (1 << i)))
1746 continue;
1747 if ((tmp & (0x02 << i))) /* diode */
1748 data->temp_type[i] = 3 - ((diode >> i) & 0x02);
1749 else /* thermistor */
1750 data->temp_type[i] = 4;
1751 }
9de2e2e8
GR		 1752}
1753
1c65dc36
GR		 1754static int
1755nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
1756 struct nct6775_data *data)
1757{
1758 int regval;
1759 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
1760 int ret;
1761
1762 ret = superio_enter(sio_data->sioreg);
1763 if (ret)
1764 return ret;
1765
1766 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1767 if (data->kind == nct6775) {
1768 regval = superio_inb(sio_data->sioreg, 0x2c);
1769
1770 fan3pin = regval & (1 << 6);
1771 fan3min = fan3pin;
1772
1773 /* On NCT6775, fan4 shares pins with the fdc interface */
1774 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
1775 fan4min = 0;
1776 fan5pin = 0;
1777 } else if (data->kind == nct6776) {
1778 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
1779
1780 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
1781 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
1782
1783 if (regval & 0x80)
1784 fan3pin = gpok;
1785 else
1786 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
1787
1788 if (regval & 0x40)
1789 fan4pin = gpok;
1790 else
1791 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
1792
1793 if (regval & 0x20)
1794 fan5pin = gpok;
1795 else
1796 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
1797
1798 fan4min = fan4pin;
1799 fan3min = fan3pin;
1800 } else { /* NCT6779D */
1801 regval = superio_inb(sio_data->sioreg, 0x1c);
1802
1803 fan3pin = !(regval & (1 << 5));
1804 fan4pin = !(regval & (1 << 6));
1805 fan5pin = !(regval & (1 << 7));
1806
1807 fan3min = fan3pin;
1808 fan4min = fan4pin;
1809 }
1810
1811 superio_exit(sio_data->sioreg);
1812
1813 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
1814 data->has_fan |= fan3pin << 2;
1815 data->has_fan_min |= fan3min << 2;
1816
1817 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
1818 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
1819
1820 return 0;
1821}
1822
9de2e2e8
GR		 1823static int nct6775_probe(struct platform_device *pdev)
1824{
1825 struct device *dev = &pdev->dev;
1826 struct nct6775_sio_data *sio_data = dev->platform_data;
1827 struct nct6775_data *data;
1828 struct resource *res;
aa136e5d
GR		 1829 int i, s, err = 0;
1830 int src, mask, available;
1831 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
1832 const u16 *reg_temp_alternate, *reg_temp_crit;
1833 int num_reg_temp;
9de2e2e8
GR		 1834
1835 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1836 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
1837 DRVNAME))
1838 return -EBUSY;
1839
1840 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
1841 GFP_KERNEL);
1842 if (!data)
1843 return -ENOMEM;
1844
1845 data->kind = sio_data->kind;
1846 data->addr = res->start;
1847 mutex_init(&data->lock);
1848 mutex_init(&data->update_lock);
1849 data->name = nct6775_device_names[data->kind];
1850 data->bank = 0xff; /* Force initial bank selection */
1851 platform_set_drvdata(pdev, data);
1852
1853 switch (data->kind) {
1854 case nct6775:
1855 data->in_num = 9;
1c65dc36 1856 data->has_fan_div = true;
aa136e5d 1857 data->temp_fixed_num = 3;
9de2e2e8
GR		 1858
1859 data->ALARM_BITS = NCT6775_ALARM_BITS;
1860
1c65dc36
GR		 1861 data->fan_from_reg = fan_from_reg16;
1862 data->fan_from_reg_min = fan_from_reg8;
1863
aa136e5d
GR		 1864 data->temp_label = nct6775_temp_label;
1865 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
1866
9de2e2e8
GR		 1867 data->REG_CONFIG = NCT6775_REG_CONFIG;
1868 data->REG_VBAT = NCT6775_REG_VBAT;
aa136e5d 1869 data->REG_DIODE = NCT6775_REG_DIODE;
9de2e2e8
GR		 1870 data->REG_VIN = NCT6775_REG_IN;
1871 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1872 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
1c65dc36
GR		 1873 data->REG_FAN = NCT6775_REG_FAN;
1874 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
5c25d954 1875 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
aa136e5d
GR		 1876 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
1877 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
9de2e2e8 1878 data->REG_ALARM = NCT6775_REG_ALARM;
aa136e5d
GR		 1879
1880 reg_temp = NCT6775_REG_TEMP;
1881 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
1882 reg_temp_over = NCT6775_REG_TEMP_OVER;
1883 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
1884 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
1885 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
1886 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
1887
9de2e2e8
GR		 1888 break;
1889 case nct6776:
1890 data->in_num = 9;
1c65dc36 1891 data->has_fan_div = false;
aa136e5d 1892 data->temp_fixed_num = 3;
9de2e2e8
GR		 1893
1894 data->ALARM_BITS = NCT6776_ALARM_BITS;
1895
1c65dc36
GR		 1896 data->fan_from_reg = fan_from_reg13;
1897 data->fan_from_reg_min = fan_from_reg13;
1898
aa136e5d
GR		 1899 data->temp_label = nct6776_temp_label;
1900 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
1901
9de2e2e8
GR		 1902 data->REG_CONFIG = NCT6775_REG_CONFIG;
1903 data->REG_VBAT = NCT6775_REG_VBAT;
aa136e5d 1904 data->REG_DIODE = NCT6775_REG_DIODE;
9de2e2e8
GR		 1905 data->REG_VIN = NCT6775_REG_IN;
1906 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1907 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
1c65dc36
GR		 1908 data->REG_FAN = NCT6775_REG_FAN;
1909 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
5c25d954 1910 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
aa136e5d
GR		 1911 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
1912 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
9de2e2e8 1913 data->REG_ALARM = NCT6775_REG_ALARM;
aa136e5d
GR		 1914
1915 reg_temp = NCT6775_REG_TEMP;
1916 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
1917 reg_temp_over = NCT6775_REG_TEMP_OVER;
1918 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
1919 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
1920 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
1921 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
1922
9de2e2e8
GR		 1923 break;
1924 case nct6779:
1925 data->in_num = 15;
1c65dc36 1926 data->has_fan_div = false;
aa136e5d 1927 data->temp_fixed_num = 6;
9de2e2e8
GR		 1928
1929 data->ALARM_BITS = NCT6779_ALARM_BITS;
1930
1c65dc36
GR		 1931 data->fan_from_reg = fan_from_reg13;
1932 data->fan_from_reg_min = fan_from_reg13;
1933
aa136e5d
GR		 1934 data->temp_label = nct6779_temp_label;
1935 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
1936
9de2e2e8
GR		 1937 data->REG_CONFIG = NCT6775_REG_CONFIG;
1938 data->REG_VBAT = NCT6775_REG_VBAT;
aa136e5d 1939 data->REG_DIODE = NCT6775_REG_DIODE;
9de2e2e8
GR		 1940 data->REG_VIN = NCT6779_REG_IN;
1941 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
1942 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
1c65dc36
GR		 1943 data->REG_FAN = NCT6779_REG_FAN;
1944 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
5c25d954 1945 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
aa136e5d
GR		 1946 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
1947 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
9de2e2e8 1948 data->REG_ALARM = NCT6779_REG_ALARM;
aa136e5d
GR		 1949
1950 reg_temp = NCT6779_REG_TEMP;
1951 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
1952 reg_temp_over = NCT6779_REG_TEMP_OVER;
1953 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
1954 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
1955 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
1956 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
1957
9de2e2e8
GR		 1958 break;
1959 default:
1960 return -ENODEV;
1961 }
1962 data->have_in = (1 << data->in_num) - 1;
aa136e5d
GR		 1963 data->have_temp = 0;
1964
1965 /*
1966 * On some boards, not all available temperature sources are monitored,
1967 * even though some of the monitoring registers are unused.
1968 * Get list of unused monitoring registers, then detect if any fan
1969 * controls are configured to use unmonitored temperature sources.
1970 * If so, assign the unmonitored temperature sources to available
1971 * monitoring registers.
1972 */
1973 mask = 0;
1974 available = 0;
1975 for (i = 0; i < num_reg_temp; i++) {
1976 if (reg_temp[i] == 0)
1977 continue;
1978
1979 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
1980 if (!src || (mask & (1 << src)))
1981 available |= 1 << i;
1982
1983 mask |= 1 << src;
1984 }
1985
1986 mask = 0;
1987 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
1988 for (i = 0; i < num_reg_temp; i++) {
1989 if (reg_temp[i] == 0)
1990 continue;
1991
1992 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
1993 if (!src || (mask & (1 << src)))
1994 continue;
1995
1996 if (src >= data->temp_label_num ||
1997 !strlen(data->temp_label[src])) {
1998 dev_info(dev,
1999 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
2000 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
2001 continue;
2002 }
2003
2004 mask |= 1 << src;
2005
2006 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
2007 if (src <= data->temp_fixed_num) {
2008 data->have_temp |= 1 << (src - 1);
2009 data->have_temp_fixed |= 1 << (src - 1);
2010 data->reg_temp[0][src - 1] = reg_temp[i];
2011 data->reg_temp[1][src - 1] = reg_temp_over[i];
2012 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
2013 data->reg_temp_config[src - 1] = reg_temp_config[i];
2014 data->temp_src[src - 1] = src;
2015 continue;
2016 }
2017
2018 if (s >= NUM_TEMP)
2019 continue;
2020
2021 /* Use dynamic index for other sources */
2022 data->have_temp |= 1 << s;
2023 data->reg_temp[0][s] = reg_temp[i];
2024 data->reg_temp[1][s] = reg_temp_over[i];
2025 data->reg_temp[2][s] = reg_temp_hyst[i];
2026 data->reg_temp_config[s] = reg_temp_config[i];
2027 if (reg_temp_crit[src - 1])
2028 data->reg_temp[3][s] = reg_temp_crit[src - 1];
2029
2030 data->temp_src[s] = src;
2031 s++;
2032 }
2033
2034#ifdef USE_ALTERNATE
2035 /*
2036 * Go through the list of alternate temp registers and enable
2037 * if possible.
2038 * The temperature is already monitored if the respective bit in <mask>
2039 * is set.
2040 */
2041 for (i = 0; i < data->temp_label_num - 1; i++) {
2042 if (!reg_temp_alternate[i])
2043 continue;
2044 if (mask & (1 << (i + 1)))
2045 continue;
2046 if (i < data->temp_fixed_num) {
2047 if (data->have_temp & (1 << i))
2048 continue;
2049 data->have_temp |= 1 << i;
2050 data->have_temp_fixed |= 1 << i;
2051 data->reg_temp[0][i] = reg_temp_alternate[i];
2052 data->reg_temp[1][i] = reg_temp_over[i];
2053 data->reg_temp[2][i] = reg_temp_hyst[i];
2054 data->temp_src[i] = i + 1;
2055 continue;
2056 }
2057
2058 if (s >= NUM_TEMP) /* Abort if no more space */
2059 break;
2060
2061 data->have_temp |= 1 << s;
2062 data->reg_temp[0][s] = reg_temp_alternate[i];
2063 data->temp_src[s] = i + 1;
2064 s++;
2065 }
2066#endif /* USE_ALTERNATE */
2067
2068 switch (data->kind) {
2069 case nct6775:
2070 break;
2071 case nct6776:
2072 /*
2073 * On NCT6776, AUXTIN and VIN3 pins are shared.
2074 * Only way to detect it is to check if AUXTIN is used
2075 * as a temperature source, and if that source is
2076 * enabled.
2077 *
2078 * If that is the case, disable in6, which reports VIN3.
2079 * Otherwise disable temp3.
2080 */
2081 if (data->have_temp & (1 << 2)) {
2082 u8 reg = nct6775_read_value(data,
2083 data->reg_temp_config[2]);
2084 if (reg & 0x01)
2085 data->have_temp &= ~(1 << 2);
2086 else
2087 data->have_in &= ~(1 << 6);
2088 }
2089 break;
2090 case nct6779:
2091 /*
2092 * Shared pins:
2093 * VIN4 / AUXTIN0
2094 * VIN5 / AUXTIN1
2095 * VIN6 / AUXTIN2
2096 * VIN7 / AUXTIN3
2097 *
2098 * There does not seem to be a clean way to detect if VINx or
2099 * AUXTINx is active, so for keep both sensor types enabled
2100 * for now.
2101 */
2102 break;
2103 }
9de2e2e8
GR		 2104
2105 /* Initialize the chip */
2106 nct6775_init_device(data);
2107
2108 data->vrm = vid_which_vrm();
2109 err = superio_enter(sio_data->sioreg);
2110 if (err)
2111 return err;
2112
2113 /*
2114 * Read VID value
2115 * We can get the VID input values directly at logical device D 0xe3.
2116 */
2117 superio_select(sio_data->sioreg, NCT6775_LD_VID);
2118 data->vid = superio_inb(sio_data->sioreg, 0xe3);
47ece964
GR		 2119
2120 if (fan_debounce) {
2121 u8 tmp;
2122
2123 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2124 tmp = superio_inb(sio_data->sioreg,
2125 NCT6775_REG_CR_FAN_DEBOUNCE);
2126 switch (data->kind) {
2127 case nct6775:
2128 tmp |= 0x1e;
2129 break;
2130 case nct6776:
2131 case nct6779:
2132 tmp |= 0x3e;
2133 break;
2134 }
2135 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
2136 tmp);
2137 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
2138 data->name);
2139 }
2140
9de2e2e8
GR		 2141 superio_exit(sio_data->sioreg);
2142
2143 err = device_create_file(dev, &dev_attr_cpu0_vid);
2144 if (err)
2145 return err;
2146
1c65dc36
GR		 2147 err = nct6775_check_fan_inputs(sio_data, data);
2148 if (err)
2149 goto exit_remove;
2150
2151 /* Read fan clock dividers immediately */
2152 nct6775_init_fan_common(dev, data);
2153
9de2e2e8
GR		 2154 for (i = 0; i < data->in_num; i++) {
2155 if (!(data->have_in & (1 << i)))
2156 continue;
2157 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
2158 if (err)
2159 goto exit_remove;
2160 }
2161
1c65dc36
GR		 2162 for (i = 0; i < 5; i++) {
2163 if (data->has_fan & (1 << i)) {
2164 err = device_create_file(dev,
2165 &sda_fan_input[i].dev_attr);
2166 if (err)
2167 goto exit_remove;
2168 err = device_create_file(dev,
2169 &sda_fan_alarm[i].dev_attr);
2170 if (err)
2171 goto exit_remove;
2172 if (data->kind != nct6776 &&
2173 data->kind != nct6779) {
2174 err = device_create_file(dev,
2175 &sda_fan_div[i].dev_attr);
2176 if (err)
2177 goto exit_remove;
2178 }
2179 if (data->has_fan_min & (1 << i)) {
2180 err = device_create_file(dev,
2181 &sda_fan_min[i].dev_attr);
2182 if (err)
2183 goto exit_remove;
2184 }
5c25d954
GR		 2185 err = device_create_file(dev,
2186 &sda_fan_pulses[i].dev_attr);
2187 if (err)
2188 goto exit_remove;
1c65dc36
GR		 2189 }
2190 }
2191
aa136e5d
GR		 2192 for (i = 0; i < NUM_TEMP; i++) {
2193 if (!(data->have_temp & (1 << i)))
2194 continue;
2195 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2196 if (err)
2197 goto exit_remove;
2198 if (data->temp_label) {
2199 err = device_create_file(dev,
2200 &sda_temp_label[i].dev_attr);
2201 if (err)
2202 goto exit_remove;
2203 }
2204 if (data->reg_temp[1][i]) {
2205 err = device_create_file(dev,
2206 &sda_temp_max[i].dev_attr);
2207 if (err)
2208 goto exit_remove;
2209 }
2210 if (data->reg_temp[2][i]) {
2211 err = device_create_file(dev,
2212 &sda_temp_max_hyst[i].dev_attr);
2213 if (err)
2214 goto exit_remove;
2215 }
2216 if (data->reg_temp[3][i]) {
2217 err = device_create_file(dev,
2218 &sda_temp_crit[i].dev_attr);
2219 if (err)
2220 goto exit_remove;
2221 }
2222 if (!(data->have_temp_fixed & (1 << i)))
2223 continue;
2224 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
2225 if (err)
2226 goto exit_remove;
2227 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
2228 if (err)
2229 goto exit_remove;
2230 if (i >= NUM_TEMP_ALARM ||
2231 data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
2232 continue;
2233 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
2234 if (err)
2235 goto exit_remove;
2236 }
2237
a6bd5878
GR		 2238 for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
2239 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
2240 continue;
2241 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
2242 if (err)
2243 goto exit_remove;
2244 }
2245
9de2e2e8
GR		 2246 err = device_create_file(dev, &dev_attr_name);
2247 if (err)
2248 goto exit_remove;
2249
2250 data->hwmon_dev = hwmon_device_register(dev);
2251 if (IS_ERR(data->hwmon_dev)) {
2252 err = PTR_ERR(data->hwmon_dev);
2253 goto exit_remove;
2254 }
2255
2256 return 0;
2257
2258exit_remove:
2259 nct6775_device_remove_files(dev);
2260 return err;
2261}
2262
2263static int nct6775_remove(struct platform_device *pdev)
2264{
2265 struct nct6775_data *data = platform_get_drvdata(pdev);
2266
2267 hwmon_device_unregister(data->hwmon_dev);
2268 nct6775_device_remove_files(&pdev->dev);
2269
2270 return 0;
2271}
2272
2273static struct platform_driver nct6775_driver = {
2274 .driver = {
2275 .owner = THIS_MODULE,
2276 .name = DRVNAME,
2277 },
2278 .probe = nct6775_probe,
2279 .remove = nct6775_remove,
2280};
2281
2282/* nct6775_find() looks for a '627 in the Super-I/O config space */
2283static int __init nct6775_find(int sioaddr, unsigned short *addr,
2284 struct nct6775_sio_data *sio_data)
2285{
2286 static const char sio_name_NCT6775[] __initconst = "NCT6775F";
2287 static const char sio_name_NCT6776[] __initconst = "NCT6776F";
2288 static const char sio_name_NCT6779[] __initconst = "NCT6779D";
2289
2290 u16 val;
2291 const char *sio_name;
2292 int err;
2293
2294 err = superio_enter(sioaddr);
2295 if (err)
2296 return err;
2297
2298 if (force_id)
2299 val = force_id;
2300 else
2301 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2302 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2303 switch (val & SIO_ID_MASK) {
2304 case SIO_NCT6775_ID:
2305 sio_data->kind = nct6775;
2306 sio_name = sio_name_NCT6775;
2307 break;
2308 case SIO_NCT6776_ID:
2309 sio_data->kind = nct6776;
2310 sio_name = sio_name_NCT6776;
2311 break;
2312 case SIO_NCT6779_ID:
2313 sio_data->kind = nct6779;
2314 sio_name = sio_name_NCT6779;
2315 break;
2316 default:
2317 if (val != 0xffff)
2318 pr_debug("unsupported chip ID: 0x%04x\n", val);
2319 superio_exit(sioaddr);
2320 return -ENODEV;
2321 }
2322
2323 /* We have a known chip, find the HWM I/O address */
2324 superio_select(sioaddr, NCT6775_LD_HWM);
2325 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2326 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2327 *addr = val & IOREGION_ALIGNMENT;
2328 if (*addr == 0) {
2329 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2330 superio_exit(sioaddr);
2331 return -ENODEV;
2332 }
2333
2334 /* Activate logical device if needed */
2335 val = superio_inb(sioaddr, SIO_REG_ENABLE);
2336 if (!(val & 0x01)) {
2337 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
2338 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2339 }
2340
2341 superio_exit(sioaddr);
2342 pr_info("Found %s chip at %#x\n", sio_name, *addr);
2343 sio_data->sioreg = sioaddr;
2344
2345 return 0;
2346}
2347
2348/*
2349 * when Super-I/O functions move to a separate file, the Super-I/O
2350 * bus will manage the lifetime of the device and this module will only keep
2351 * track of the nct6775 driver. But since we platform_device_alloc(), we
2352 * must keep track of the device
2353 */
2354static struct platform_device *pdev;
2355
2356static int __init sensors_nct6775_init(void)
2357{
2358 int err;
2359 unsigned short address;
2360 struct resource res;
2361 struct nct6775_sio_data sio_data;
2362
2363 /*
2364 * initialize sio_data->kind and sio_data->sioreg.
2365 *
2366 * when Super-I/O functions move to a separate file, the Super-I/O
2367 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2368 * nct6775 hardware monitor, and call probe()
2369 */
2370 if (nct6775_find(0x2e, &address, &sio_data) &&
2371 nct6775_find(0x4e, &address, &sio_data))
2372 return -ENODEV;
2373
2374 err = platform_driver_register(&nct6775_driver);
2375 if (err)
2376 goto exit;
2377
2378 pdev = platform_device_alloc(DRVNAME, address);
2379 if (!pdev) {
2380 err = -ENOMEM;
2381 pr_err("Device allocation failed\n");
2382 goto exit_unregister;
2383 }
2384
2385 err = platform_device_add_data(pdev, &sio_data,
2386 sizeof(struct nct6775_sio_data));
2387 if (err) {
2388 pr_err("Platform data allocation failed\n");
2389 goto exit_device_put;
2390 }
2391
2392 memset(&res, 0, sizeof(res));
2393 res.name = DRVNAME;
2394 res.start = address + IOREGION_OFFSET;
2395 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2396 res.flags = IORESOURCE_IO;
2397
2398 err = acpi_check_resource_conflict(&res);
2399 if (err)
2400 goto exit_device_put;
2401
2402 err = platform_device_add_resources(pdev, &res, 1);
2403 if (err) {
2404 pr_err("Device resource addition failed (%d)\n", err);
2405 goto exit_device_put;
2406 }
2407
2408 /* platform_device_add calls probe() */
2409 err = platform_device_add(pdev);
2410 if (err) {
2411 pr_err("Device addition failed (%d)\n", err);
2412 goto exit_device_put;
2413 }
2414
2415 return 0;
2416
2417exit_device_put:
2418 platform_device_put(pdev);
2419exit_unregister:
2420 platform_driver_unregister(&nct6775_driver);
2421exit:
2422 return err;
2423}
2424
2425static void __exit sensors_nct6775_exit(void)
2426{
2427 platform_device_unregister(pdev);
2428 platform_driver_unregister(&nct6775_driver);
2429}
2430
2431MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
2432MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
2433MODULE_LICENSE("GPL");
2434
2435module_init(sensors_nct6775_init);
2436module_exit(sensors_nct6775_exit);
Linux kernel - Deliverables
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