[deliverable/linux.git] / drivers / hwmon / pmbus / pmbus.h

/*
 * pmbus.h - Common defines and structures for PMBus devices
 *
 * Copyright (c) 2010, 2011 Ericsson AB.
 * Copyright (c) 2012 Guenter Roeck
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#ifndef PMBUS_H
#define PMBUS_H

/*
 * Registers
 */
#define PMBUS_PAGE			0x00
#define PMBUS_OPERATION			0x01
#define PMBUS_ON_OFF_CONFIG		0x02
#define PMBUS_CLEAR_FAULTS		0x03
#define PMBUS_PHASE			0x04

#define PMBUS_CAPABILITY		0x19
#define PMBUS_QUERY			0x1A

#define PMBUS_VOUT_MODE			0x20
#define PMBUS_VOUT_COMMAND		0x21
#define PMBUS_VOUT_TRIM			0x22
#define PMBUS_VOUT_CAL_OFFSET		0x23
#define PMBUS_VOUT_MAX			0x24
#define PMBUS_VOUT_MARGIN_HIGH		0x25
#define PMBUS_VOUT_MARGIN_LOW		0x26
#define PMBUS_VOUT_TRANSITION_RATE	0x27
#define PMBUS_VOUT_DROOP		0x28
#define PMBUS_VOUT_SCALE_LOOP		0x29
#define PMBUS_VOUT_SCALE_MONITOR	0x2A

#define PMBUS_COEFFICIENTS		0x30
#define PMBUS_POUT_MAX			0x31

#define PMBUS_FAN_CONFIG_12		0x3A
#define PMBUS_FAN_COMMAND_1		0x3B
#define PMBUS_FAN_COMMAND_2		0x3C
#define PMBUS_FAN_CONFIG_34		0x3D
#define PMBUS_FAN_COMMAND_3		0x3E
#define PMBUS_FAN_COMMAND_4		0x3F

#define PMBUS_VOUT_OV_FAULT_LIMIT	0x40
#define PMBUS_VOUT_OV_FAULT_RESPONSE	0x41
#define PMBUS_VOUT_OV_WARN_LIMIT	0x42
#define PMBUS_VOUT_UV_WARN_LIMIT	0x43
#define PMBUS_VOUT_UV_FAULT_LIMIT	0x44
#define PMBUS_VOUT_UV_FAULT_RESPONSE	0x45
#define PMBUS_IOUT_OC_FAULT_LIMIT	0x46
#define PMBUS_IOUT_OC_FAULT_RESPONSE	0x47
#define PMBUS_IOUT_OC_LV_FAULT_LIMIT	0x48
#define PMBUS_IOUT_OC_LV_FAULT_RESPONSE	0x49
#define PMBUS_IOUT_OC_WARN_LIMIT	0x4A
#define PMBUS_IOUT_UC_FAULT_LIMIT	0x4B
#define PMBUS_IOUT_UC_FAULT_RESPONSE	0x4C

#define PMBUS_OT_FAULT_LIMIT		0x4F
#define PMBUS_OT_FAULT_RESPONSE		0x50
#define PMBUS_OT_WARN_LIMIT		0x51
#define PMBUS_UT_WARN_LIMIT		0x52
#define PMBUS_UT_FAULT_LIMIT		0x53
#define PMBUS_UT_FAULT_RESPONSE		0x54
#define PMBUS_VIN_OV_FAULT_LIMIT	0x55
#define PMBUS_VIN_OV_FAULT_RESPONSE	0x56
#define PMBUS_VIN_OV_WARN_LIMIT		0x57
#define PMBUS_VIN_UV_WARN_LIMIT		0x58
#define PMBUS_VIN_UV_FAULT_LIMIT	0x59

#define PMBUS_IIN_OC_FAULT_LIMIT	0x5B
#define PMBUS_IIN_OC_WARN_LIMIT		0x5D

#define PMBUS_POUT_OP_FAULT_LIMIT	0x68
#define PMBUS_POUT_OP_WARN_LIMIT	0x6A
#define PMBUS_PIN_OP_WARN_LIMIT		0x6B

#define PMBUS_STATUS_BYTE		0x78
#define PMBUS_STATUS_WORD		0x79
#define PMBUS_STATUS_VOUT		0x7A
#define PMBUS_STATUS_IOUT		0x7B
#define PMBUS_STATUS_INPUT		0x7C
#define PMBUS_STATUS_TEMPERATURE	0x7D
#define PMBUS_STATUS_CML		0x7E
#define PMBUS_STATUS_OTHER		0x7F
#define PMBUS_STATUS_MFR_SPECIFIC	0x80
#define PMBUS_STATUS_FAN_12		0x81
#define PMBUS_STATUS_FAN_34		0x82

#define PMBUS_READ_VIN			0x88
#define PMBUS_READ_IIN			0x89
#define PMBUS_READ_VCAP			0x8A
#define PMBUS_READ_VOUT			0x8B
#define PMBUS_READ_IOUT			0x8C
#define PMBUS_READ_TEMPERATURE_1	0x8D
#define PMBUS_READ_TEMPERATURE_2	0x8E
#define PMBUS_READ_TEMPERATURE_3	0x8F
#define PMBUS_READ_FAN_SPEED_1		0x90
#define PMBUS_READ_FAN_SPEED_2		0x91
#define PMBUS_READ_FAN_SPEED_3		0x92
#define PMBUS_READ_FAN_SPEED_4		0x93
#define PMBUS_READ_DUTY_CYCLE		0x94
#define PMBUS_READ_FREQUENCY		0x95
#define PMBUS_READ_POUT			0x96
#define PMBUS_READ_PIN			0x97

#define PMBUS_REVISION			0x98
#define PMBUS_MFR_ID			0x99
#define PMBUS_MFR_MODEL			0x9A
#define PMBUS_MFR_REVISION		0x9B
#define PMBUS_MFR_LOCATION		0x9C
#define PMBUS_MFR_DATE			0x9D
#define PMBUS_MFR_SERIAL		0x9E

/*
 * Virtual registers.
 * Useful to support attributes which are not supported by standard PMBus
 * registers but exist as manufacturer specific registers on individual chips.
 * Must be mapped to real registers in device specific code.
 *
 * Semantics:
 * Virtual registers are all word size.
 * READ registers are read-only; writes are either ignored or return an error.
 * RESET registers are read/write. Reading reset registers returns zero
 * (used for detection), writing any value causes the associated history to be
 * reset.
 * Virtual registers have to be handled in device specific driver code. Chip
 * driver code returns non-negative register values if a virtual register is
 * supported, or a negative error code if not. The chip driver may return
 * -ENODATA or any other error code in this case, though an error code other
 * than -ENODATA is handled more efficiently and thus preferred. Either case,
 * the calling PMBus core code will abort if the chip driver returns an error
 * code when reading or writing virtual registers.
 */
#define PMBUS_VIRT_BASE			0x100
#define PMBUS_VIRT_READ_TEMP_AVG	(PMBUS_VIRT_BASE + 0)
#define PMBUS_VIRT_READ_TEMP_MIN	(PMBUS_VIRT_BASE + 1)
#define PMBUS_VIRT_READ_TEMP_MAX	(PMBUS_VIRT_BASE + 2)
#define PMBUS_VIRT_RESET_TEMP_HISTORY	(PMBUS_VIRT_BASE + 3)
#define PMBUS_VIRT_READ_VIN_AVG		(PMBUS_VIRT_BASE + 4)
#define PMBUS_VIRT_READ_VIN_MIN		(PMBUS_VIRT_BASE + 5)
#define PMBUS_VIRT_READ_VIN_MAX		(PMBUS_VIRT_BASE + 6)
#define PMBUS_VIRT_RESET_VIN_HISTORY	(PMBUS_VIRT_BASE + 7)
#define PMBUS_VIRT_READ_IIN_AVG		(PMBUS_VIRT_BASE + 8)
#define PMBUS_VIRT_READ_IIN_MIN		(PMBUS_VIRT_BASE + 9)
#define PMBUS_VIRT_READ_IIN_MAX		(PMBUS_VIRT_BASE + 10)
#define PMBUS_VIRT_RESET_IIN_HISTORY	(PMBUS_VIRT_BASE + 11)
#define PMBUS_VIRT_READ_PIN_AVG		(PMBUS_VIRT_BASE + 12)
#define PMBUS_VIRT_READ_PIN_MAX		(PMBUS_VIRT_BASE + 13)
#define PMBUS_VIRT_RESET_PIN_HISTORY	(PMBUS_VIRT_BASE + 14)
#define PMBUS_VIRT_READ_POUT_AVG	(PMBUS_VIRT_BASE + 15)
#define PMBUS_VIRT_READ_POUT_MAX	(PMBUS_VIRT_BASE + 16)
#define PMBUS_VIRT_RESET_POUT_HISTORY	(PMBUS_VIRT_BASE + 17)
#define PMBUS_VIRT_READ_VOUT_AVG	(PMBUS_VIRT_BASE + 18)
#define PMBUS_VIRT_READ_VOUT_MIN	(PMBUS_VIRT_BASE + 19)
#define PMBUS_VIRT_READ_VOUT_MAX	(PMBUS_VIRT_BASE + 20)
#define PMBUS_VIRT_RESET_VOUT_HISTORY	(PMBUS_VIRT_BASE + 21)
#define PMBUS_VIRT_READ_IOUT_AVG	(PMBUS_VIRT_BASE + 22)
#define PMBUS_VIRT_READ_IOUT_MIN	(PMBUS_VIRT_BASE + 23)
#define PMBUS_VIRT_READ_IOUT_MAX	(PMBUS_VIRT_BASE + 24)
#define PMBUS_VIRT_RESET_IOUT_HISTORY	(PMBUS_VIRT_BASE + 25)
#define PMBUS_VIRT_READ_TEMP2_AVG	(PMBUS_VIRT_BASE + 26)
#define PMBUS_VIRT_READ_TEMP2_MIN	(PMBUS_VIRT_BASE + 27)
#define PMBUS_VIRT_READ_TEMP2_MAX	(PMBUS_VIRT_BASE + 28)
#define PMBUS_VIRT_RESET_TEMP2_HISTORY	(PMBUS_VIRT_BASE + 29)

#define PMBUS_VIRT_READ_VMON		(PMBUS_VIRT_BASE + 30)
#define PMBUS_VIRT_VMON_UV_WARN_LIMIT	(PMBUS_VIRT_BASE + 31)
#define PMBUS_VIRT_VMON_OV_WARN_LIMIT	(PMBUS_VIRT_BASE + 32)
#define PMBUS_VIRT_VMON_UV_FAULT_LIMIT	(PMBUS_VIRT_BASE + 33)
#define PMBUS_VIRT_VMON_OV_FAULT_LIMIT	(PMBUS_VIRT_BASE + 34)
#define PMBUS_VIRT_STATUS_VMON		(PMBUS_VIRT_BASE + 35)

/*
 * CAPABILITY
 */
#define PB_CAPABILITY_SMBALERT		(1<<4)
#define PB_CAPABILITY_ERROR_CHECK	(1<<7)

/*
 * VOUT_MODE
 */
#define PB_VOUT_MODE_MODE_MASK		0xe0
#define PB_VOUT_MODE_PARAM_MASK		0x1f

#define PB_VOUT_MODE_LINEAR		0x00
#define PB_VOUT_MODE_VID		0x20
#define PB_VOUT_MODE_DIRECT		0x40

/*
 * Fan configuration
 */
#define PB_FAN_2_PULSE_MASK		((1 << 0) | (1 << 1))
#define PB_FAN_2_RPM			(1 << 2)
#define PB_FAN_2_INSTALLED		(1 << 3)
#define PB_FAN_1_PULSE_MASK		((1 << 4) | (1 << 5))
#define PB_FAN_1_RPM			(1 << 6)
#define PB_FAN_1_INSTALLED		(1 << 7)

/*
 * STATUS_BYTE, STATUS_WORD (lower)
 */
#define PB_STATUS_NONE_ABOVE		(1<<0)
#define PB_STATUS_CML			(1<<1)
#define PB_STATUS_TEMPERATURE		(1<<2)
#define PB_STATUS_VIN_UV		(1<<3)
#define PB_STATUS_IOUT_OC		(1<<4)
#define PB_STATUS_VOUT_OV		(1<<5)
#define PB_STATUS_OFF			(1<<6)
#define PB_STATUS_BUSY			(1<<7)

/*
 * STATUS_WORD (upper)
 */
#define PB_STATUS_UNKNOWN		(1<<8)
#define PB_STATUS_OTHER			(1<<9)
#define PB_STATUS_FANS			(1<<10)
#define PB_STATUS_POWER_GOOD_N		(1<<11)
#define PB_STATUS_WORD_MFR		(1<<12)
#define PB_STATUS_INPUT			(1<<13)
#define PB_STATUS_IOUT_POUT		(1<<14)
#define PB_STATUS_VOUT			(1<<15)

/*
 * STATUS_IOUT
 */
#define PB_POUT_OP_WARNING		(1<<0)
#define PB_POUT_OP_FAULT		(1<<1)
#define PB_POWER_LIMITING		(1<<2)
#define PB_CURRENT_SHARE_FAULT		(1<<3)
#define PB_IOUT_UC_FAULT		(1<<4)
#define PB_IOUT_OC_WARNING		(1<<5)
#define PB_IOUT_OC_LV_FAULT		(1<<6)
#define PB_IOUT_OC_FAULT		(1<<7)

/*
 * STATUS_VOUT, STATUS_INPUT
 */
#define PB_VOLTAGE_UV_FAULT		(1<<4)
#define PB_VOLTAGE_UV_WARNING		(1<<5)
#define PB_VOLTAGE_OV_WARNING		(1<<6)
#define PB_VOLTAGE_OV_FAULT		(1<<7)

/*
 * STATUS_INPUT
 */
#define PB_PIN_OP_WARNING		(1<<0)
#define PB_IIN_OC_WARNING		(1<<1)
#define PB_IIN_OC_FAULT			(1<<2)

/*
 * STATUS_TEMPERATURE
 */
#define PB_TEMP_UT_FAULT		(1<<4)
#define PB_TEMP_UT_WARNING		(1<<5)
#define PB_TEMP_OT_WARNING		(1<<6)
#define PB_TEMP_OT_FAULT		(1<<7)

/*
 * STATUS_FAN
 */
#define PB_FAN_AIRFLOW_WARNING		(1<<0)
#define PB_FAN_AIRFLOW_FAULT		(1<<1)
#define PB_FAN_FAN2_SPEED_OVERRIDE	(1<<2)
#define PB_FAN_FAN1_SPEED_OVERRIDE	(1<<3)
#define PB_FAN_FAN2_WARNING		(1<<4)
#define PB_FAN_FAN1_WARNING		(1<<5)
#define PB_FAN_FAN2_FAULT		(1<<6)
#define PB_FAN_FAN1_FAULT		(1<<7)

/*
 * CML_FAULT_STATUS
 */
#define PB_CML_FAULT_OTHER_MEM_LOGIC	(1<<0)
#define PB_CML_FAULT_OTHER_COMM		(1<<1)
#define PB_CML_FAULT_PROCESSOR		(1<<3)
#define PB_CML_FAULT_MEMORY		(1<<4)
#define PB_CML_FAULT_PACKET_ERROR	(1<<5)
#define PB_CML_FAULT_INVALID_DATA	(1<<6)
#define PB_CML_FAULT_INVALID_COMMAND	(1<<7)

enum pmbus_sensor_classes {
	PSC_VOLTAGE_IN = 0,
	PSC_VOLTAGE_OUT,
	PSC_CURRENT_IN,
	PSC_CURRENT_OUT,
	PSC_POWER,
	PSC_TEMPERATURE,
	PSC_FAN,
	PSC_NUM_CLASSES		/* Number of power sensor classes */
};

#define PMBUS_PAGES	32	/* Per PMBus specification */

/* Functionality bit mask */
#define PMBUS_HAVE_VIN		(1 << 0)
#define PMBUS_HAVE_VCAP		(1 << 1)
#define PMBUS_HAVE_VOUT		(1 << 2)
#define PMBUS_HAVE_IIN		(1 << 3)
#define PMBUS_HAVE_IOUT		(1 << 4)
#define PMBUS_HAVE_PIN		(1 << 5)
#define PMBUS_HAVE_POUT		(1 << 6)
#define PMBUS_HAVE_FAN12	(1 << 7)
#define PMBUS_HAVE_FAN34	(1 << 8)
#define PMBUS_HAVE_TEMP		(1 << 9)
#define PMBUS_HAVE_TEMP2	(1 << 10)
#define PMBUS_HAVE_TEMP3	(1 << 11)
#define PMBUS_HAVE_STATUS_VOUT	(1 << 12)
#define PMBUS_HAVE_STATUS_IOUT	(1 << 13)
#define PMBUS_HAVE_STATUS_INPUT	(1 << 14)
#define PMBUS_HAVE_STATUS_TEMP	(1 << 15)
#define PMBUS_HAVE_STATUS_FAN12	(1 << 16)
#define PMBUS_HAVE_STATUS_FAN34	(1 << 17)
#define PMBUS_HAVE_VMON		(1 << 18)
#define PMBUS_HAVE_STATUS_VMON	(1 << 19)

enum pmbus_data_format { linear = 0, direct, vid };

struct pmbus_driver_info {
	int pages;		/* Total number of pages */
	enum pmbus_data_format format[PSC_NUM_CLASSES];
	/*
	 * Support one set of coefficients for each sensor type
	 * Used for chips providing data in direct mode.
	 */
	int m[PSC_NUM_CLASSES];	/* mantissa for direct data format */
	int b[PSC_NUM_CLASSES];	/* offset */
	int R[PSC_NUM_CLASSES];	/* exponent */

	u32 func[PMBUS_PAGES];	/* Functionality, per page */
	/*
	 * The following functions map manufacturing specific register values
	 * to PMBus standard register values. Specify only if mapping is
	 * necessary.
	 * Functions return the register value (read) or zero (write) if
	 * successful. A return value of -ENODATA indicates that there is no
	 * manufacturer specific register, but that a standard PMBus register
	 * may exist. Any other negative return value indicates that the
	 * register does not exist, and that no attempt should be made to read
	 * the standard register.
	 */
	int (*read_byte_data)(struct i2c_client *client, int page, int reg);
	int (*read_word_data)(struct i2c_client *client, int page, int reg);
	int (*write_word_data)(struct i2c_client *client, int page, int reg,
			       u16 word);
	int (*write_byte)(struct i2c_client *client, int page, u8 value);
	/*
	 * The identify function determines supported PMBus functionality.
	 * This function is only necessary if a chip driver supports multiple
	 * chips, and the chip functionality is not pre-determined.
	 */
	int (*identify)(struct i2c_client *client,
			struct pmbus_driver_info *info);
};

/* Function declarations */

void pmbus_clear_cache(struct i2c_client *client);
int pmbus_set_page(struct i2c_client *client, u8 page);
int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg);
int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word);
int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
			  u8 value);
int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
			   u8 mask, u8 value);
void pmbus_clear_faults(struct i2c_client *client);
bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id,
		   struct pmbus_driver_info *info);
int pmbus_do_remove(struct i2c_client *client);
const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
						      *client);

#endif /* PMBUS_H */
Commit	Line	Data
442aba78 GR	1	/*
	2	* pmbus.h - Common defines and structures for PMBus devices
	3	*
	4	* Copyright (c) 2010, 2011 Ericsson AB.
aebcbbfc	5	* Copyright (c) 2012 Guenter Roeck
442aba78 GR	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	20	*/
	21
	22	#ifndef PMBUS_H
	23	#define PMBUS_H
	24
	25	/*
	26	* Registers
	27	*/
	28	#define PMBUS_PAGE 0x00
	29	#define PMBUS_OPERATION 0x01
	30	#define PMBUS_ON_OFF_CONFIG 0x02
	31	#define PMBUS_CLEAR_FAULTS 0x03
	32	#define PMBUS_PHASE 0x04
	33
	34	#define PMBUS_CAPABILITY 0x19
	35	#define PMBUS_QUERY 0x1A
	36
	37	#define PMBUS_VOUT_MODE 0x20
	38	#define PMBUS_VOUT_COMMAND 0x21
	39	#define PMBUS_VOUT_TRIM 0x22
	40	#define PMBUS_VOUT_CAL_OFFSET 0x23
	41	#define PMBUS_VOUT_MAX 0x24
	42	#define PMBUS_VOUT_MARGIN_HIGH 0x25
	43	#define PMBUS_VOUT_MARGIN_LOW 0x26
	44	#define PMBUS_VOUT_TRANSITION_RATE 0x27
	45	#define PMBUS_VOUT_DROOP 0x28
	46	#define PMBUS_VOUT_SCALE_LOOP 0x29
	47	#define PMBUS_VOUT_SCALE_MONITOR 0x2A
	48
	49	#define PMBUS_COEFFICIENTS 0x30
	50	#define PMBUS_POUT_MAX 0x31
	51
	52	#define PMBUS_FAN_CONFIG_12 0x3A
	53	#define PMBUS_FAN_COMMAND_1 0x3B
	54	#define PMBUS_FAN_COMMAND_2 0x3C
	55	#define PMBUS_FAN_CONFIG_34 0x3D
	56	#define PMBUS_FAN_COMMAND_3 0x3E
	57	#define PMBUS_FAN_COMMAND_4 0x3F
	58
	59	#define PMBUS_VOUT_OV_FAULT_LIMIT 0x40
	60	#define PMBUS_VOUT_OV_FAULT_RESPONSE 0x41
	61	#define PMBUS_VOUT_OV_WARN_LIMIT 0x42
	62	#define PMBUS_VOUT_UV_WARN_LIMIT 0x43
	63	#define PMBUS_VOUT_UV_FAULT_LIMIT 0x44
	64	#define PMBUS_VOUT_UV_FAULT_RESPONSE 0x45
	65	#define PMBUS_IOUT_OC_FAULT_LIMIT 0x46
	66	#define PMBUS_IOUT_OC_FAULT_RESPONSE 0x47
	67	#define PMBUS_IOUT_OC_LV_FAULT_LIMIT 0x48
	68	#define PMBUS_IOUT_OC_LV_FAULT_RESPONSE 0x49
	69	#define PMBUS_IOUT_OC_WARN_LIMIT 0x4A
70	#define PMBUS_IOUT_UC_FAULT_LIMIT 0x4B
71	#define PMBUS_IOUT_UC_FAULT_RESPONSE 0x4C
72
73	#define PMBUS_OT_FAULT_LIMIT 0x4F
74	#define PMBUS_OT_FAULT_RESPONSE 0x50
75	#define PMBUS_OT_WARN_LIMIT 0x51
76	#define PMBUS_UT_WARN_LIMIT 0x52
77	#define PMBUS_UT_FAULT_LIMIT 0x53
78	#define PMBUS_UT_FAULT_RESPONSE 0x54
79	#define PMBUS_VIN_OV_FAULT_LIMIT 0x55
80	#define PMBUS_VIN_OV_FAULT_RESPONSE 0x56
81	#define PMBUS_VIN_OV_WARN_LIMIT 0x57
82	#define PMBUS_VIN_UV_WARN_LIMIT 0x58
83	#define PMBUS_VIN_UV_FAULT_LIMIT 0x59
84
85	#define PMBUS_IIN_OC_FAULT_LIMIT 0x5B
86	#define PMBUS_IIN_OC_WARN_LIMIT 0x5D
87
88	#define PMBUS_POUT_OP_FAULT_LIMIT 0x68
89	#define PMBUS_POUT_OP_WARN_LIMIT 0x6A
90	#define PMBUS_PIN_OP_WARN_LIMIT 0x6B
91
92	#define PMBUS_STATUS_BYTE 0x78
93	#define PMBUS_STATUS_WORD 0x79
94	#define PMBUS_STATUS_VOUT 0x7A
95	#define PMBUS_STATUS_IOUT 0x7B
96	#define PMBUS_STATUS_INPUT 0x7C
97	#define PMBUS_STATUS_TEMPERATURE 0x7D
98	#define PMBUS_STATUS_CML 0x7E
99	#define PMBUS_STATUS_OTHER 0x7F
100	#define PMBUS_STATUS_MFR_SPECIFIC 0x80
101	#define PMBUS_STATUS_FAN_12 0x81
102	#define PMBUS_STATUS_FAN_34 0x82
103
104	#define PMBUS_READ_VIN 0x88
105	#define PMBUS_READ_IIN 0x89
106	#define PMBUS_READ_VCAP 0x8A
107	#define PMBUS_READ_VOUT 0x8B
108	#define PMBUS_READ_IOUT 0x8C
109	#define PMBUS_READ_TEMPERATURE_1 0x8D
110	#define PMBUS_READ_TEMPERATURE_2 0x8E
111	#define PMBUS_READ_TEMPERATURE_3 0x8F
112	#define PMBUS_READ_FAN_SPEED_1 0x90
113	#define PMBUS_READ_FAN_SPEED_2 0x91
114	#define PMBUS_READ_FAN_SPEED_3 0x92
115	#define PMBUS_READ_FAN_SPEED_4 0x93
116	#define PMBUS_READ_DUTY_CYCLE 0x94
117	#define PMBUS_READ_FREQUENCY 0x95
118	#define PMBUS_READ_POUT 0x96
119	#define PMBUS_READ_PIN 0x97
120
121	#define PMBUS_REVISION 0x98
122	#define PMBUS_MFR_ID 0x99
123	#define PMBUS_MFR_MODEL 0x9A
124	#define PMBUS_MFR_REVISION 0x9B
125	#define PMBUS_MFR_LOCATION 0x9C
126	#define PMBUS_MFR_DATE 0x9D
127	#define PMBUS_MFR_SERIAL 0x9E
128
6f183d33 GR	129	/*
	130	* Virtual registers.
	131	* Useful to support attributes which are not supported by standard PMBus
	132	* registers but exist as manufacturer specific registers on individual chips.
	133	* Must be mapped to real registers in device specific code.
	134	*
	135	* Semantics:
	136	* Virtual registers are all word size.
	137	* READ registers are read-only; writes are either ignored or return an error.
20fcfe17 GR	138	* RESET registers are read/write. Reading reset registers returns zero
	139	* (used for detection), writing any value causes the associated history to be
	140	* reset.
	141	* Virtual registers have to be handled in device specific driver code. Chip
	142	* driver code returns non-negative register values if a virtual register is
	143	* supported, or a negative error code if not. The chip driver may return
	144	* -ENODATA or any other error code in this case, though an error code other
	145	* than -ENODATA is handled more efficiently and thus preferred. Either case,
	146	* the calling PMBus core code will abort if the chip driver returns an error
	147	* code when reading or writing virtual registers.
6f183d33 GR	148	*/
6f183d33 GR	149	#define PMBUS_VIRT_BASE 0x100
60b873e3 GR	150	#define PMBUS_VIRT_READ_TEMP_AVG (PMBUS_VIRT_BASE + 0)
	151	#define PMBUS_VIRT_READ_TEMP_MIN (PMBUS_VIRT_BASE + 1)
	152	#define PMBUS_VIRT_READ_TEMP_MAX (PMBUS_VIRT_BASE + 2)
	153	#define PMBUS_VIRT_RESET_TEMP_HISTORY (PMBUS_VIRT_BASE + 3)
	154	#define PMBUS_VIRT_READ_VIN_AVG (PMBUS_VIRT_BASE + 4)
	155	#define PMBUS_VIRT_READ_VIN_MIN (PMBUS_VIRT_BASE + 5)
	156	#define PMBUS_VIRT_READ_VIN_MAX (PMBUS_VIRT_BASE + 6)
	157	#define PMBUS_VIRT_RESET_VIN_HISTORY (PMBUS_VIRT_BASE + 7)
	158	#define PMBUS_VIRT_READ_IIN_AVG (PMBUS_VIRT_BASE + 8)
	159	#define PMBUS_VIRT_READ_IIN_MIN (PMBUS_VIRT_BASE + 9)
	160	#define PMBUS_VIRT_READ_IIN_MAX (PMBUS_VIRT_BASE + 10)
	161	#define PMBUS_VIRT_RESET_IIN_HISTORY (PMBUS_VIRT_BASE + 11)
	162	#define PMBUS_VIRT_READ_PIN_AVG (PMBUS_VIRT_BASE + 12)
	163	#define PMBUS_VIRT_READ_PIN_MAX (PMBUS_VIRT_BASE + 13)
	164	#define PMBUS_VIRT_RESET_PIN_HISTORY (PMBUS_VIRT_BASE + 14)
	165	#define PMBUS_VIRT_READ_POUT_AVG (PMBUS_VIRT_BASE + 15)
	166	#define PMBUS_VIRT_READ_POUT_MAX (PMBUS_VIRT_BASE + 16)
	167	#define PMBUS_VIRT_RESET_POUT_HISTORY (PMBUS_VIRT_BASE + 17)
	168	#define PMBUS_VIRT_READ_VOUT_AVG (PMBUS_VIRT_BASE + 18)
	169	#define PMBUS_VIRT_READ_VOUT_MIN (PMBUS_VIRT_BASE + 19)
	170	#define PMBUS_VIRT_READ_VOUT_MAX (PMBUS_VIRT_BASE + 20)
	171	#define PMBUS_VIRT_RESET_VOUT_HISTORY (PMBUS_VIRT_BASE + 21)
	172	#define PMBUS_VIRT_READ_IOUT_AVG (PMBUS_VIRT_BASE + 22)
	173	#define PMBUS_VIRT_READ_IOUT_MIN (PMBUS_VIRT_BASE + 23)
	174	#define PMBUS_VIRT_READ_IOUT_MAX (PMBUS_VIRT_BASE + 24)
	175	#define PMBUS_VIRT_RESET_IOUT_HISTORY (PMBUS_VIRT_BASE + 25)
	176	#define PMBUS_VIRT_READ_TEMP2_AVG (PMBUS_VIRT_BASE + 26)
	177	#define PMBUS_VIRT_READ_TEMP2_MIN (PMBUS_VIRT_BASE + 27)
	178	#define PMBUS_VIRT_READ_TEMP2_MAX (PMBUS_VIRT_BASE + 28)
	179	#define PMBUS_VIRT_RESET_TEMP2_HISTORY (PMBUS_VIRT_BASE + 29)
6f183d33	180
aebcbbfc GR	181	#define PMBUS_VIRT_READ_VMON (PMBUS_VIRT_BASE + 30)
	182	#define PMBUS_VIRT_VMON_UV_WARN_LIMIT (PMBUS_VIRT_BASE + 31)
	183	#define PMBUS_VIRT_VMON_OV_WARN_LIMIT (PMBUS_VIRT_BASE + 32)
	184	#define PMBUS_VIRT_VMON_UV_FAULT_LIMIT (PMBUS_VIRT_BASE + 33)
	185	#define PMBUS_VIRT_VMON_OV_FAULT_LIMIT (PMBUS_VIRT_BASE + 34)
	186	#define PMBUS_VIRT_STATUS_VMON (PMBUS_VIRT_BASE + 35)
	187
442aba78 GR	188	/*
	189	* CAPABILITY
	190	*/
	191	#define PB_CAPABILITY_SMBALERT (1<<4)
	192	#define PB_CAPABILITY_ERROR_CHECK (1<<7)
	193
	194	/*
	195	* VOUT_MODE
	196	*/
	197	#define PB_VOUT_MODE_MODE_MASK 0xe0
	198	#define PB_VOUT_MODE_PARAM_MASK 0x1f
	199
	200	#define PB_VOUT_MODE_LINEAR 0x00
	201	#define PB_VOUT_MODE_VID 0x20
	202	#define PB_VOUT_MODE_DIRECT 0x40
	203
	204	/*
	205	* Fan configuration
	206	*/
	207	#define PB_FAN_2_PULSE_MASK ((1 << 0) \| (1 << 1))
	208	#define PB_FAN_2_RPM (1 << 2)
	209	#define PB_FAN_2_INSTALLED (1 << 3)
	210	#define PB_FAN_1_PULSE_MASK ((1 << 4) \| (1 << 5))
	211	#define PB_FAN_1_RPM (1 << 6)
	212	#define PB_FAN_1_INSTALLED (1 << 7)
	213
	214	/*
	215	* STATUS_BYTE, STATUS_WORD (lower)
	216	*/
	217	#define PB_STATUS_NONE_ABOVE (1<<0)
	218	#define PB_STATUS_CML (1<<1)
	219	#define PB_STATUS_TEMPERATURE (1<<2)
	220	#define PB_STATUS_VIN_UV (1<<3)
	221	#define PB_STATUS_IOUT_OC (1<<4)
	222	#define PB_STATUS_VOUT_OV (1<<5)
	223	#define PB_STATUS_OFF (1<<6)
	224	#define PB_STATUS_BUSY (1<<7)
	225
	226	/*
	227	* STATUS_WORD (upper)
	228	*/
	229	#define PB_STATUS_UNKNOWN (1<<8)
	230	#define PB_STATUS_OTHER (1<<9)
	231	#define PB_STATUS_FANS (1<<10)
	232	#define PB_STATUS_POWER_GOOD_N (1<<11)
	233	#define PB_STATUS_WORD_MFR (1<<12)
	234	#define PB_STATUS_INPUT (1<<13)
	235	#define PB_STATUS_IOUT_POUT (1<<14)
	236	#define PB_STATUS_VOUT (1<<15)
	237
	238	/*
	239	* STATUS_IOUT
	240	*/
	241	#define PB_POUT_OP_WARNING (1<<0)
	242	#define PB_POUT_OP_FAULT (1<<1)
	243	#define PB_POWER_LIMITING (1<<2)
	244	#define PB_CURRENT_SHARE_FAULT (1<<3)
	245	#define PB_IOUT_UC_FAULT (1<<4)
	246	#define PB_IOUT_OC_WARNING (1<<5)
	247	#define PB_IOUT_OC_LV_FAULT (1<<6)
	248	#define PB_IOUT_OC_FAULT (1<<7)
	249
	250	/*
	251	* STATUS_VOUT, STATUS_INPUT
252	*/
253	#define PB_VOLTAGE_UV_FAULT (1<<4)
254	#define PB_VOLTAGE_UV_WARNING (1<<5)
255	#define PB_VOLTAGE_OV_WARNING (1<<6)
256	#define PB_VOLTAGE_OV_FAULT (1<<7)
257
258	/*
259	* STATUS_INPUT
260	*/
261	#define PB_PIN_OP_WARNING (1<<0)
262	#define PB_IIN_OC_WARNING (1<<1)
263	#define PB_IIN_OC_FAULT (1<<2)
264
265	/*
266	* STATUS_TEMPERATURE
267	*/
268	#define PB_TEMP_UT_FAULT (1<<4)
269	#define PB_TEMP_UT_WARNING (1<<5)
270	#define PB_TEMP_OT_WARNING (1<<6)
271	#define PB_TEMP_OT_FAULT (1<<7)
272
273	/*
274	* STATUS_FAN
275	*/
276	#define PB_FAN_AIRFLOW_WARNING (1<<0)
277	#define PB_FAN_AIRFLOW_FAULT (1<<1)
278	#define PB_FAN_FAN2_SPEED_OVERRIDE (1<<2)
279	#define PB_FAN_FAN1_SPEED_OVERRIDE (1<<3)
280	#define PB_FAN_FAN2_WARNING (1<<4)
281	#define PB_FAN_FAN1_WARNING (1<<5)
282	#define PB_FAN_FAN2_FAULT (1<<6)
283	#define PB_FAN_FAN1_FAULT (1<<7)
284
285	/*
286	* CML_FAULT_STATUS
287	*/
288	#define PB_CML_FAULT_OTHER_MEM_LOGIC (1<<0)
289	#define PB_CML_FAULT_OTHER_COMM (1<<1)
290	#define PB_CML_FAULT_PROCESSOR (1<<3)
291	#define PB_CML_FAULT_MEMORY (1<<4)
292	#define PB_CML_FAULT_PACKET_ERROR (1<<5)
293	#define PB_CML_FAULT_INVALID_DATA (1<<6)
294	#define PB_CML_FAULT_INVALID_COMMAND (1<<7)
295
296	enum pmbus_sensor_classes {
297	PSC_VOLTAGE_IN = 0,
298	PSC_VOLTAGE_OUT,
299	PSC_CURRENT_IN,
300	PSC_CURRENT_OUT,
301	PSC_POWER,
302	PSC_TEMPERATURE,
303	PSC_FAN,
304	PSC_NUM_CLASSES /* Number of power sensor classes */
305	};
306
307	#define PMBUS_PAGES 32 /* Per PMBus specification */
308
309	/* Functionality bit mask */
310	#define PMBUS_HAVE_VIN (1 << 0)
311	#define PMBUS_HAVE_VCAP (1 << 1)
312	#define PMBUS_HAVE_VOUT (1 << 2)
313	#define PMBUS_HAVE_IIN (1 << 3)
314	#define PMBUS_HAVE_IOUT (1 << 4)
315	#define PMBUS_HAVE_PIN (1 << 5)
316	#define PMBUS_HAVE_POUT (1 << 6)
317	#define PMBUS_HAVE_FAN12 (1 << 7)
318	#define PMBUS_HAVE_FAN34 (1 << 8)
319	#define PMBUS_HAVE_TEMP (1 << 9)
320	#define PMBUS_HAVE_TEMP2 (1 << 10)
321	#define PMBUS_HAVE_TEMP3 (1 << 11)
322	#define PMBUS_HAVE_STATUS_VOUT (1 << 12)
323	#define PMBUS_HAVE_STATUS_IOUT (1 << 13)
324	#define PMBUS_HAVE_STATUS_INPUT (1 << 14)
325	#define PMBUS_HAVE_STATUS_TEMP (1 << 15)
326	#define PMBUS_HAVE_STATUS_FAN12 (1 << 16)
327	#define PMBUS_HAVE_STATUS_FAN34 (1 << 17)
aebcbbfc GR	328	#define PMBUS_HAVE_VMON (1 << 18)
aebcbbfc GR	329	#define PMBUS_HAVE_STATUS_VMON (1 << 19)
442aba78	330
1061d851 GR	331	enum pmbus_data_format { linear = 0, direct, vid };
1061d851 GR	332
442aba78 GR	333	struct pmbus_driver_info {
442aba78 GR	334	int pages; /* Total number of pages */
1061d851	335	enum pmbus_data_format format[PSC_NUM_CLASSES];
442aba78 GR	336	/*
	337	* Support one set of coefficients for each sensor type
	338	* Used for chips providing data in direct mode.
	339	*/
	340	int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */
	341	int b[PSC_NUM_CLASSES]; /* offset */
	342	int R[PSC_NUM_CLASSES]; /* exponent */
	343
	344	u32 func[PMBUS_PAGES]; /* Functionality, per page */
	345	/*
2cfa6aed GR	346	* The following functions map manufacturing specific register values
	347	* to PMBus standard register values. Specify only if mapping is
	348	* necessary.
20fcfe17 GR	349	* Functions return the register value (read) or zero (write) if
	350	* successful. A return value of -ENODATA indicates that there is no
	351	* manufacturer specific register, but that a standard PMBus register
	352	* may exist. Any other negative return value indicates that the
	353	* register does not exist, and that no attempt should be made to read
	354	* the standard register.
442aba78	355	*/
2cfa6aed	356	int (read_byte_data)(struct i2c_client client, int page, int reg);
46243f3a GR	357	int (read_word_data)(struct i2c_client client, int page, int reg);
	358	int (write_word_data)(struct i2c_client client, int page, int reg,
	359	u16 word);
044cd3a5	360	int (write_byte)(struct i2c_client client, int page, u8 value);
442aba78 GR	361	/*
	362	* The identify function determines supported PMBus functionality.
	363	* This function is only necessary if a chip driver supports multiple
	364	* chips, and the chip functionality is not pre-determined.
	365	*/
	366	int (identify)(struct i2c_client client,
	367	struct pmbus_driver_info *info);
	368	};
	369
	370	/* Function declarations */
	371
ce603b18	372	void pmbus_clear_cache(struct i2c_client *client);
442aba78 GR	373	int pmbus_set_page(struct i2c_client *client, u8 page);
442aba78 GR	374	int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg);
46243f3a	375	int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word);
9c1ed894	376	int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
03e9bd8d	377	int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
11c11998 AT	378	int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
	379	u8 value);
	380	int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
	381	u8 mask, u8 value);
442aba78 GR	382	void pmbus_clear_faults(struct i2c_client *client);
	383	bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
	384	bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
	385	int pmbus_do_probe(struct i2c_client client, const struct i2c_device_id id,
	386	struct pmbus_driver_info *info);
dd285ad7	387	int pmbus_do_remove(struct i2c_client *client);
442aba78 GR	388	const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
	389	*client);
	390
	391	#endif /* PMBUS_H */