hwmon: (tmp401) Add support for TI TMP435
[deliverable/linux.git] / drivers / hwmon / tmp401.c
CommitLineData
ab2b79d5
HG
1/* tmp401.c
2 *
3 * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>
fce0758f
AP
4 * Preliminary tmp411 support by:
5 * Gabriel Konat, Sander Leget, Wouter Willems
6 * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
ab2b79d5 7 *
29dd3b64
GR
8 * Cleanup and support for TMP431 and TMP432 by Guenter Roeck
9 * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>
10 *
ab2b79d5
HG
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26/*
27 * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
28 *
29 * Note this IC is in some aspect similar to the LM90, but it has quite a
30 * few differences too, for example the local temp has a higher resolution
31 * and thus has 16 bits registers for its value and limit instead of 8 bits.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
947e9271 36#include <linux/bitops.h>
ab2b79d5
HG
37#include <linux/slab.h>
38#include <linux/jiffies.h>
39#include <linux/i2c.h>
40#include <linux/hwmon.h>
41#include <linux/hwmon-sysfs.h>
42#include <linux/err.h>
43#include <linux/mutex.h>
44#include <linux/sysfs.h>
45
46/* Addresses to scan */
a1fac92b 47static const unsigned short normal_i2c[] = { 0x4c, 0x4d, 0x4e, I2C_CLIENT_END };
ab2b79d5 48
06adbaec 49enum chips { tmp401, tmp411, tmp431, tmp432, tmp435 };
ab2b79d5
HG
50
51/*
52 * The TMP401 registers, note some registers have different addresses for
53 * reading and writing
54 */
55#define TMP401_STATUS 0x02
56#define TMP401_CONFIG_READ 0x03
57#define TMP401_CONFIG_WRITE 0x09
58#define TMP401_CONVERSION_RATE_READ 0x04
59#define TMP401_CONVERSION_RATE_WRITE 0x0A
60#define TMP401_TEMP_CRIT_HYST 0x21
ab2b79d5
HG
61#define TMP401_MANUFACTURER_ID_REG 0xFE
62#define TMP401_DEVICE_ID_REG 0xFF
63
14f2a665
GR
64static const u8 TMP401_TEMP_MSB_READ[6][2] = {
65 { 0x00, 0x01 }, /* temp */
66 { 0x06, 0x08 }, /* low limit */
67 { 0x05, 0x07 }, /* high limit */
68 { 0x20, 0x19 }, /* therm (crit) limit */
69 { 0x30, 0x34 }, /* lowest */
70 { 0x32, 0x36 }, /* highest */
71};
72
73static const u8 TMP401_TEMP_MSB_WRITE[6][2] = {
74 { 0, 0 }, /* temp (unused) */
75 { 0x0C, 0x0E }, /* low limit */
76 { 0x0B, 0x0D }, /* high limit */
77 { 0x20, 0x19 }, /* therm (crit) limit */
78 { 0x30, 0x34 }, /* lowest */
79 { 0x32, 0x36 }, /* highest */
80};
81
82static const u8 TMP401_TEMP_LSB[6][2] = {
83 { 0x15, 0x10 }, /* temp */
84 { 0x17, 0x14 }, /* low limit */
85 { 0x16, 0x13 }, /* high limit */
86 { 0, 0 }, /* therm (crit) limit (unused) */
87 { 0x31, 0x35 }, /* lowest */
88 { 0x33, 0x37 }, /* highest */
89};
fce0758f 90
29dd3b64
GR
91static const u8 TMP432_TEMP_MSB_READ[4][3] = {
92 { 0x00, 0x01, 0x23 }, /* temp */
93 { 0x06, 0x08, 0x16 }, /* low limit */
94 { 0x05, 0x07, 0x15 }, /* high limit */
95 { 0x20, 0x19, 0x1A }, /* therm (crit) limit */
96};
97
98static const u8 TMP432_TEMP_MSB_WRITE[4][3] = {
99 { 0, 0, 0 }, /* temp - unused */
100 { 0x0C, 0x0E, 0x16 }, /* low limit */
101 { 0x0B, 0x0D, 0x15 }, /* high limit */
102 { 0x20, 0x19, 0x1A }, /* therm (crit) limit */
103};
104
105static const u8 TMP432_TEMP_LSB[3][3] = {
106 { 0x29, 0x10, 0x24 }, /* temp */
107 { 0x3E, 0x14, 0x18 }, /* low limit */
108 { 0x3D, 0x13, 0x17 }, /* high limit */
109};
110
111/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
112static const u8 TMP432_STATUS_REG[] = {
113 0x1b, 0x36, 0x35, 0x37 };
114
ab2b79d5 115/* Flags */
947e9271
GR
116#define TMP401_CONFIG_RANGE BIT(2)
117#define TMP401_CONFIG_SHUTDOWN BIT(6)
118#define TMP401_STATUS_LOCAL_CRIT BIT(0)
119#define TMP401_STATUS_REMOTE_CRIT BIT(1)
120#define TMP401_STATUS_REMOTE_OPEN BIT(2)
121#define TMP401_STATUS_REMOTE_LOW BIT(3)
122#define TMP401_STATUS_REMOTE_HIGH BIT(4)
123#define TMP401_STATUS_LOCAL_LOW BIT(5)
124#define TMP401_STATUS_LOCAL_HIGH BIT(6)
ab2b79d5 125
29dd3b64
GR
126/* On TMP432, each status has its own register */
127#define TMP432_STATUS_LOCAL BIT(0)
128#define TMP432_STATUS_REMOTE1 BIT(1)
129#define TMP432_STATUS_REMOTE2 BIT(2)
130
ab2b79d5
HG
131/* Manufacturer / Device ID's */
132#define TMP401_MANUFACTURER_ID 0x55
133#define TMP401_DEVICE_ID 0x11
4ce5b1fe
GR
134#define TMP411A_DEVICE_ID 0x12
135#define TMP411B_DEVICE_ID 0x13
136#define TMP411C_DEVICE_ID 0x10
a1fac92b 137#define TMP431_DEVICE_ID 0x31
29dd3b64 138#define TMP432_DEVICE_ID 0x32
06adbaec 139#define TMP435_DEVICE_ID 0x35
ab2b79d5 140
ab2b79d5
HG
141/*
142 * Driver data (common to all clients)
143 */
144
145static const struct i2c_device_id tmp401_id[] = {
146 { "tmp401", tmp401 },
fce0758f 147 { "tmp411", tmp411 },
a1fac92b 148 { "tmp431", tmp431 },
29dd3b64 149 { "tmp432", tmp432 },
06adbaec 150 { "tmp435", tmp435 },
ab2b79d5
HG
151 { }
152};
153MODULE_DEVICE_TABLE(i2c, tmp401_id);
154
ab2b79d5
HG
155/*
156 * Client data (each client gets its own)
157 */
158
159struct tmp401_data {
f3643ac7
GR
160 struct i2c_client *client;
161 const struct attribute_group *groups[3];
ab2b79d5
HG
162 struct mutex update_lock;
163 char valid; /* zero until following fields are valid */
164 unsigned long last_updated; /* in jiffies */
dc71afe5 165 enum chips kind;
ab2b79d5 166
0846e30d
GR
167 unsigned int update_interval; /* in milliseconds */
168
ab2b79d5 169 /* register values */
29dd3b64 170 u8 status[4];
ab2b79d5 171 u8 config;
29dd3b64 172 u16 temp[6][3];
ab2b79d5
HG
173 u8 temp_crit_hyst;
174};
175
176/*
177 * Sysfs attr show / store functions
178 */
179
180static int tmp401_register_to_temp(u16 reg, u8 config)
181{
182 int temp = reg;
183
184 if (config & TMP401_CONFIG_RANGE)
185 temp -= 64 * 256;
186
14f2a665 187 return DIV_ROUND_CLOSEST(temp * 125, 32);
ab2b79d5
HG
188}
189
14f2a665 190static u16 tmp401_temp_to_register(long temp, u8 config, int zbits)
ab2b79d5
HG
191{
192 if (config & TMP401_CONFIG_RANGE) {
2a844c14 193 temp = clamp_val(temp, -64000, 191000);
ab2b79d5
HG
194 temp += 64000;
195 } else
2a844c14 196 temp = clamp_val(temp, 0, 127000);
ab2b79d5 197
14f2a665 198 return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
ab2b79d5
HG
199}
200
14f2a665
GR
201static int tmp401_update_device_reg16(struct i2c_client *client,
202 struct tmp401_data *data)
ea63c2b9 203{
14f2a665
GR
204 int i, j, val;
205 int num_regs = data->kind == tmp411 ? 6 : 4;
29dd3b64 206 int num_sensors = data->kind == tmp432 ? 3 : 2;
14f2a665 207
29dd3b64 208 for (i = 0; i < num_sensors; i++) { /* local / r1 / r2 */
14f2a665 209 for (j = 0; j < num_regs; j++) { /* temp / low / ... */
29dd3b64 210 u8 regaddr;
14f2a665
GR
211 /*
212 * High byte must be read first immediately followed
213 * by the low byte
214 */
29dd3b64
GR
215 regaddr = data->kind == tmp432 ?
216 TMP432_TEMP_MSB_READ[j][i] :
217 TMP401_TEMP_MSB_READ[j][i];
218 val = i2c_smbus_read_byte_data(client, regaddr);
14f2a665
GR
219 if (val < 0)
220 return val;
221 data->temp[j][i] = val << 8;
222 if (j == 3) /* crit is msb only */
223 continue;
29dd3b64
GR
224 regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[j][i]
225 : TMP401_TEMP_LSB[j][i];
226 val = i2c_smbus_read_byte_data(client, regaddr);
14f2a665
GR
227 if (val < 0)
228 return val;
229 data->temp[j][i] |= val;
ea63c2b9
AP
230 }
231 }
14f2a665 232 return 0;
ea63c2b9
AP
233}
234
235static struct tmp401_data *tmp401_update_device(struct device *dev)
236{
f3643ac7
GR
237 struct tmp401_data *data = dev_get_drvdata(dev);
238 struct i2c_client *client = data->client;
14f2a665 239 struct tmp401_data *ret = data;
29dd3b64 240 int i, val;
0846e30d 241 unsigned long next_update;
ea63c2b9
AP
242
243 mutex_lock(&data->update_lock);
244
0846e30d 245 next_update = data->last_updated +
4e2284d2 246 msecs_to_jiffies(data->update_interval);
0846e30d 247 if (time_after(jiffies, next_update) || !data->valid) {
29dd3b64
GR
248 if (data->kind != tmp432) {
249 /*
250 * The driver uses the TMP432 status format internally.
251 * Convert status to TMP432 format for other chips.
252 */
253 val = i2c_smbus_read_byte_data(client, TMP401_STATUS);
254 if (val < 0) {
255 ret = ERR_PTR(val);
256 goto abort;
257 }
258 data->status[0] =
259 (val & TMP401_STATUS_REMOTE_OPEN) >> 1;
260 data->status[1] =
261 ((val & TMP401_STATUS_REMOTE_LOW) >> 2) |
262 ((val & TMP401_STATUS_LOCAL_LOW) >> 5);
263 data->status[2] =
264 ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) |
265 ((val & TMP401_STATUS_LOCAL_HIGH) >> 6);
266 data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT
267 | TMP401_STATUS_REMOTE_CRIT);
268 } else {
269 for (i = 0; i < ARRAY_SIZE(data->status); i++) {
270 val = i2c_smbus_read_byte_data(client,
271 TMP432_STATUS_REG[i]);
272 if (val < 0) {
273 ret = ERR_PTR(val);
274 goto abort;
275 }
276 data->status[i] = val;
277 }
14f2a665 278 }
29dd3b64 279
14f2a665
GR
280 val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
281 if (val < 0) {
282 ret = ERR_PTR(val);
283 goto abort;
284 }
285 data->config = val;
286 val = tmp401_update_device_reg16(client, data);
287 if (val < 0) {
288 ret = ERR_PTR(val);
289 goto abort;
290 }
291 val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST);
292 if (val < 0) {
293 ret = ERR_PTR(val);
294 goto abort;
295 }
296 data->temp_crit_hyst = val;
ea63c2b9
AP
297
298 data->last_updated = jiffies;
299 data->valid = 1;
300 }
301
14f2a665 302abort:
ea63c2b9 303 mutex_unlock(&data->update_lock);
14f2a665 304 return ret;
ab2b79d5
HG
305}
306
14f2a665
GR
307static ssize_t show_temp(struct device *dev,
308 struct device_attribute *devattr, char *buf)
ab2b79d5 309{
14f2a665
GR
310 int nr = to_sensor_dev_attr_2(devattr)->nr;
311 int index = to_sensor_dev_attr_2(devattr)->index;
ab2b79d5
HG
312 struct tmp401_data *data = tmp401_update_device(dev);
313
14f2a665
GR
314 if (IS_ERR(data))
315 return PTR_ERR(data);
ab2b79d5
HG
316
317 return sprintf(buf, "%d\n",
14f2a665 318 tmp401_register_to_temp(data->temp[nr][index], data->config));
ab2b79d5
HG
319}
320
321static ssize_t show_temp_crit_hyst(struct device *dev,
322 struct device_attribute *devattr, char *buf)
323{
324 int temp, index = to_sensor_dev_attr(devattr)->index;
325 struct tmp401_data *data = tmp401_update_device(dev);
326
14f2a665
GR
327 if (IS_ERR(data))
328 return PTR_ERR(data);
329
ab2b79d5 330 mutex_lock(&data->update_lock);
14f2a665 331 temp = tmp401_register_to_temp(data->temp[3][index], data->config);
ab2b79d5
HG
332 temp -= data->temp_crit_hyst * 1000;
333 mutex_unlock(&data->update_lock);
334
335 return sprintf(buf, "%d\n", temp);
336}
337
338static ssize_t show_status(struct device *dev,
339 struct device_attribute *devattr, char *buf)
340{
29dd3b64
GR
341 int nr = to_sensor_dev_attr_2(devattr)->nr;
342 int mask = to_sensor_dev_attr_2(devattr)->index;
ab2b79d5
HG
343 struct tmp401_data *data = tmp401_update_device(dev);
344
14f2a665
GR
345 if (IS_ERR(data))
346 return PTR_ERR(data);
ab2b79d5 347
29dd3b64 348 return sprintf(buf, "%d\n", !!(data->status[nr] & mask));
ab2b79d5
HG
349}
350
14f2a665
GR
351static ssize_t store_temp(struct device *dev, struct device_attribute *devattr,
352 const char *buf, size_t count)
ab2b79d5 353{
14f2a665
GR
354 int nr = to_sensor_dev_attr_2(devattr)->nr;
355 int index = to_sensor_dev_attr_2(devattr)->index;
f3643ac7
GR
356 struct tmp401_data *data = dev_get_drvdata(dev);
357 struct i2c_client *client = data->client;
ab2b79d5
HG
358 long val;
359 u16 reg;
29dd3b64 360 u8 regaddr;
ab2b79d5 361
179c4fdb 362 if (kstrtol(buf, 10, &val))
ab2b79d5
HG
363 return -EINVAL;
364
14f2a665 365 reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4);
ab2b79d5
HG
366
367 mutex_lock(&data->update_lock);
368
29dd3b64
GR
369 regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index]
370 : TMP401_TEMP_MSB_WRITE[nr][index];
371 i2c_smbus_write_byte_data(client, regaddr, reg >> 8);
14f2a665 372 if (nr != 3) {
29dd3b64
GR
373 regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[nr][index]
374 : TMP401_TEMP_LSB[nr][index];
375 i2c_smbus_write_byte_data(client, regaddr, reg & 0xFF);
14f2a665
GR
376 }
377 data->temp[nr][index] = reg;
ab2b79d5
HG
378
379 mutex_unlock(&data->update_lock);
380
381 return count;
382}
383
384static ssize_t store_temp_crit_hyst(struct device *dev, struct device_attribute
385 *devattr, const char *buf, size_t count)
386{
387 int temp, index = to_sensor_dev_attr(devattr)->index;
388 struct tmp401_data *data = tmp401_update_device(dev);
389 long val;
390 u8 reg;
391
14f2a665
GR
392 if (IS_ERR(data))
393 return PTR_ERR(data);
394
179c4fdb 395 if (kstrtol(buf, 10, &val))
ab2b79d5
HG
396 return -EINVAL;
397
398 if (data->config & TMP401_CONFIG_RANGE)
2a844c14 399 val = clamp_val(val, -64000, 191000);
ab2b79d5 400 else
2a844c14 401 val = clamp_val(val, 0, 127000);
ab2b79d5
HG
402
403 mutex_lock(&data->update_lock);
14f2a665 404 temp = tmp401_register_to_temp(data->temp[3][index], data->config);
2a844c14 405 val = clamp_val(val, temp - 255000, temp);
ab2b79d5
HG
406 reg = ((temp - val) + 500) / 1000;
407
f3643ac7 408 i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST,
14f2a665 409 reg);
ab2b79d5
HG
410
411 data->temp_crit_hyst = reg;
412
413 mutex_unlock(&data->update_lock);
414
415 return count;
416}
417
fce0758f
AP
418/*
419 * Resets the historical measurements of minimum and maximum temperatures.
420 * This is done by writing any value to any of the minimum/maximum registers
421 * (0x30-0x37).
422 */
423static ssize_t reset_temp_history(struct device *dev,
424 struct device_attribute *devattr, const char *buf, size_t count)
425{
f3643ac7
GR
426 struct tmp401_data *data = dev_get_drvdata(dev);
427 struct i2c_client *client = data->client;
fce0758f
AP
428 long val;
429
179c4fdb 430 if (kstrtol(buf, 10, &val))
fce0758f
AP
431 return -EINVAL;
432
433 if (val != 1) {
b55f3757
GR
434 dev_err(dev,
435 "temp_reset_history value %ld not supported. Use 1 to reset the history!\n",
436 val);
fce0758f
AP
437 return -EINVAL;
438 }
8eb6d90f
GR
439 mutex_lock(&data->update_lock);
440 i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val);
441 data->valid = 0;
442 mutex_unlock(&data->update_lock);
fce0758f
AP
443
444 return count;
445}
446
0846e30d
GR
447static ssize_t show_update_interval(struct device *dev,
448 struct device_attribute *attr, char *buf)
449{
f3643ac7 450 struct tmp401_data *data = dev_get_drvdata(dev);
0846e30d
GR
451
452 return sprintf(buf, "%u\n", data->update_interval);
453}
454
455static ssize_t set_update_interval(struct device *dev,
456 struct device_attribute *attr,
457 const char *buf, size_t count)
458{
f3643ac7
GR
459 struct tmp401_data *data = dev_get_drvdata(dev);
460 struct i2c_client *client = data->client;
0846e30d
GR
461 unsigned long val;
462 int err, rate;
463
464 err = kstrtoul(buf, 10, &val);
465 if (err)
466 return err;
467
468 /*
469 * For valid rates, interval can be calculated as
470 * interval = (1 << (7 - rate)) * 125;
471 * Rounded rate is therefore
472 * rate = 7 - __fls(interval * 4 / (125 * 3));
473 * Use clamp_val() to avoid overflows, and to ensure valid input
474 * for __fls.
475 */
476 val = clamp_val(val, 125, 16000);
477 rate = 7 - __fls(val * 4 / (125 * 3));
478 mutex_lock(&data->update_lock);
479 i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate);
480 data->update_interval = (1 << (7 - rate)) * 125;
481 mutex_unlock(&data->update_lock);
482
483 return count;
484}
485
14f2a665
GR
486static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
487static SENSOR_DEVICE_ATTR_2(temp1_min, S_IWUSR | S_IRUGO, show_temp,
488 store_temp, 1, 0);
489static SENSOR_DEVICE_ATTR_2(temp1_max, S_IWUSR | S_IRUGO, show_temp,
490 store_temp, 2, 0);
491static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IWUSR | S_IRUGO, show_temp,
492 store_temp, 3, 0);
b4e665c7
GR
493static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO,
494 show_temp_crit_hyst, store_temp_crit_hyst, 0);
29dd3b64
GR
495static SENSOR_DEVICE_ATTR_2(temp1_min_alarm, S_IRUGO, show_status, NULL,
496 1, TMP432_STATUS_LOCAL);
497static SENSOR_DEVICE_ATTR_2(temp1_max_alarm, S_IRUGO, show_status, NULL,
498 2, TMP432_STATUS_LOCAL);
499static SENSOR_DEVICE_ATTR_2(temp1_crit_alarm, S_IRUGO, show_status, NULL,
500 3, TMP432_STATUS_LOCAL);
14f2a665
GR
501static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1);
502static SENSOR_DEVICE_ATTR_2(temp2_min, S_IWUSR | S_IRUGO, show_temp,
503 store_temp, 1, 1);
504static SENSOR_DEVICE_ATTR_2(temp2_max, S_IWUSR | S_IRUGO, show_temp,
505 store_temp, 2, 1);
506static SENSOR_DEVICE_ATTR_2(temp2_crit, S_IWUSR | S_IRUGO, show_temp,
507 store_temp, 3, 1);
b4e665c7
GR
508static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst,
509 NULL, 1);
29dd3b64
GR
510static SENSOR_DEVICE_ATTR_2(temp2_fault, S_IRUGO, show_status, NULL,
511 0, TMP432_STATUS_REMOTE1);
512static SENSOR_DEVICE_ATTR_2(temp2_min_alarm, S_IRUGO, show_status, NULL,
513 1, TMP432_STATUS_REMOTE1);
514static SENSOR_DEVICE_ATTR_2(temp2_max_alarm, S_IRUGO, show_status, NULL,
515 2, TMP432_STATUS_REMOTE1);
516static SENSOR_DEVICE_ATTR_2(temp2_crit_alarm, S_IRUGO, show_status, NULL,
517 3, TMP432_STATUS_REMOTE1);
b4e665c7 518
0846e30d
GR
519static DEVICE_ATTR(update_interval, S_IRUGO | S_IWUSR, show_update_interval,
520 set_update_interval);
521
b4e665c7
GR
522static struct attribute *tmp401_attributes[] = {
523 &sensor_dev_attr_temp1_input.dev_attr.attr,
524 &sensor_dev_attr_temp1_min.dev_attr.attr,
525 &sensor_dev_attr_temp1_max.dev_attr.attr,
526 &sensor_dev_attr_temp1_crit.dev_attr.attr,
527 &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
528 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
529 &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
530 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
531
532 &sensor_dev_attr_temp2_input.dev_attr.attr,
533 &sensor_dev_attr_temp2_min.dev_attr.attr,
534 &sensor_dev_attr_temp2_max.dev_attr.attr,
535 &sensor_dev_attr_temp2_crit.dev_attr.attr,
536 &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
537 &sensor_dev_attr_temp2_fault.dev_attr.attr,
538 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
539 &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
540 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
541
0846e30d
GR
542 &dev_attr_update_interval.attr,
543
b4e665c7
GR
544 NULL
545};
546
547static const struct attribute_group tmp401_group = {
548 .attrs = tmp401_attributes,
ab2b79d5
HG
549};
550
fce0758f
AP
551/*
552 * Additional features of the TMP411 chip.
553 * The TMP411 stores the minimum and maximum
554 * temperature measured since power-on, chip-reset, or
555 * minimum and maximum register reset for both the local
556 * and remote channels.
557 */
14f2a665
GR
558static SENSOR_DEVICE_ATTR_2(temp1_lowest, S_IRUGO, show_temp, NULL, 4, 0);
559static SENSOR_DEVICE_ATTR_2(temp1_highest, S_IRUGO, show_temp, NULL, 5, 0);
560static SENSOR_DEVICE_ATTR_2(temp2_lowest, S_IRUGO, show_temp, NULL, 4, 1);
561static SENSOR_DEVICE_ATTR_2(temp2_highest, S_IRUGO, show_temp, NULL, 5, 1);
b4e665c7
GR
562static SENSOR_DEVICE_ATTR(temp_reset_history, S_IWUSR, NULL, reset_temp_history,
563 0);
564
565static struct attribute *tmp411_attributes[] = {
566 &sensor_dev_attr_temp1_highest.dev_attr.attr,
567 &sensor_dev_attr_temp1_lowest.dev_attr.attr,
568 &sensor_dev_attr_temp2_highest.dev_attr.attr,
569 &sensor_dev_attr_temp2_lowest.dev_attr.attr,
570 &sensor_dev_attr_temp_reset_history.dev_attr.attr,
571 NULL
572};
573
574static const struct attribute_group tmp411_group = {
575 .attrs = tmp411_attributes,
fce0758f
AP
576};
577
29dd3b64
GR
578static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2);
579static SENSOR_DEVICE_ATTR_2(temp3_min, S_IWUSR | S_IRUGO, show_temp,
580 store_temp, 1, 2);
581static SENSOR_DEVICE_ATTR_2(temp3_max, S_IWUSR | S_IRUGO, show_temp,
582 store_temp, 2, 2);
583static SENSOR_DEVICE_ATTR_2(temp3_crit, S_IWUSR | S_IRUGO, show_temp,
584 store_temp, 3, 2);
585static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst,
586 NULL, 2);
587static SENSOR_DEVICE_ATTR_2(temp3_fault, S_IRUGO, show_status, NULL,
588 0, TMP432_STATUS_REMOTE2);
589static SENSOR_DEVICE_ATTR_2(temp3_min_alarm, S_IRUGO, show_status, NULL,
590 1, TMP432_STATUS_REMOTE2);
591static SENSOR_DEVICE_ATTR_2(temp3_max_alarm, S_IRUGO, show_status, NULL,
592 2, TMP432_STATUS_REMOTE2);
593static SENSOR_DEVICE_ATTR_2(temp3_crit_alarm, S_IRUGO, show_status, NULL,
594 3, TMP432_STATUS_REMOTE2);
595
596static struct attribute *tmp432_attributes[] = {
597 &sensor_dev_attr_temp3_input.dev_attr.attr,
598 &sensor_dev_attr_temp3_min.dev_attr.attr,
599 &sensor_dev_attr_temp3_max.dev_attr.attr,
600 &sensor_dev_attr_temp3_crit.dev_attr.attr,
601 &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
602 &sensor_dev_attr_temp3_fault.dev_attr.attr,
603 &sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
604 &sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
605 &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
606
607 NULL
608};
609
610static const struct attribute_group tmp432_group = {
611 .attrs = tmp432_attributes,
612};
613
ab2b79d5
HG
614/*
615 * Begin non sysfs callback code (aka Real code)
616 */
617
f3643ac7
GR
618static void tmp401_init_client(struct tmp401_data *data,
619 struct i2c_client *client)
ab2b79d5
HG
620{
621 int config, config_orig;
622
623 /* Set the conversion rate to 2 Hz */
624 i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5);
0846e30d 625 data->update_interval = 500;
ab2b79d5
HG
626
627 /* Start conversions (disable shutdown if necessary) */
628 config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
629 if (config < 0) {
630 dev_warn(&client->dev, "Initialization failed!\n");
631 return;
632 }
633
634 config_orig = config;
635 config &= ~TMP401_CONFIG_SHUTDOWN;
636
637 if (config != config_orig)
638 i2c_smbus_write_byte_data(client, TMP401_CONFIG_WRITE, config);
639}
640
310ec792 641static int tmp401_detect(struct i2c_client *client,
ab2b79d5
HG
642 struct i2c_board_info *info)
643{
dbe73c8f 644 enum chips kind;
ab2b79d5 645 struct i2c_adapter *adapter = client->adapter;
dbe73c8f 646 u8 reg;
ab2b79d5
HG
647
648 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
649 return -ENODEV;
650
651 /* Detect and identify the chip */
dbe73c8f
JD
652 reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
653 if (reg != TMP401_MANUFACTURER_ID)
654 return -ENODEV;
ab2b79d5 655
dbe73c8f 656 reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
ab2b79d5 657
dbe73c8f
JD
658 switch (reg) {
659 case TMP401_DEVICE_ID:
a1fac92b
GR
660 if (client->addr != 0x4c)
661 return -ENODEV;
dbe73c8f
JD
662 kind = tmp401;
663 break;
4ce5b1fe
GR
664 case TMP411A_DEVICE_ID:
665 if (client->addr != 0x4c)
666 return -ENODEV;
667 kind = tmp411;
668 break;
669 case TMP411B_DEVICE_ID:
670 if (client->addr != 0x4d)
671 return -ENODEV;
672 kind = tmp411;
673 break;
674 case TMP411C_DEVICE_ID:
675 if (client->addr != 0x4e)
676 return -ENODEV;
dbe73c8f
JD
677 kind = tmp411;
678 break;
a1fac92b
GR
679 case TMP431_DEVICE_ID:
680 if (client->addr == 0x4e)
681 return -ENODEV;
682 kind = tmp431;
683 break;
29dd3b64
GR
684 case TMP432_DEVICE_ID:
685 if (client->addr == 0x4e)
686 return -ENODEV;
687 kind = tmp432;
688 break;
06adbaec
PT
689 case TMP435_DEVICE_ID:
690 if (client->addr != 0x4c)
691 return -ENODEV;
692 kind = tmp435;
693 break;
dbe73c8f
JD
694 default:
695 return -ENODEV;
ab2b79d5 696 }
dbe73c8f
JD
697
698 reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
699 if (reg & 0x1b)
700 return -ENODEV;
701
702 reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ);
703 /* Datasheet says: 0x1-0x6 */
704 if (reg > 15)
705 return -ENODEV;
706
dc71afe5 707 strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
ab2b79d5
HG
708
709 return 0;
710}
711
712static int tmp401_probe(struct i2c_client *client,
713 const struct i2c_device_id *id)
714{
06adbaec
PT
715 static const char * const names[] = {
716 "TMP401", "TMP411", "TMP431", "TMP432", "TMP435"
717 };
b4e665c7 718 struct device *dev = &client->dev;
f3643ac7 719 struct device *hwmon_dev;
ab2b79d5 720 struct tmp401_data *data;
f3643ac7 721 int groups = 0;
ab2b79d5 722
b4e665c7 723 data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
ab2b79d5
HG
724 if (!data)
725 return -ENOMEM;
726
f3643ac7 727 data->client = client;
ab2b79d5 728 mutex_init(&data->update_lock);
fce0758f 729 data->kind = id->driver_data;
ab2b79d5
HG
730
731 /* Initialize the TMP401 chip */
f3643ac7 732 tmp401_init_client(data, client);
ab2b79d5
HG
733
734 /* Register sysfs hooks */
f3643ac7 735 data->groups[groups++] = &tmp401_group;
ab2b79d5 736
a80581d0 737 /* Register additional tmp411 sysfs hooks */
f3643ac7
GR
738 if (data->kind == tmp411)
739 data->groups[groups++] = &tmp411_group;
fce0758f 740
29dd3b64 741 /* Register additional tmp432 sysfs hooks */
f3643ac7
GR
742 if (data->kind == tmp432)
743 data->groups[groups++] = &tmp432_group;
29dd3b64 744
f3643ac7
GR
745 hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
746 data, data->groups);
747 if (IS_ERR(hwmon_dev))
748 return PTR_ERR(hwmon_dev);
ab2b79d5 749
b4e665c7 750 dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
ab2b79d5
HG
751
752 return 0;
ab2b79d5
HG
753}
754
ea63c2b9
AP
755static struct i2c_driver tmp401_driver = {
756 .class = I2C_CLASS_HWMON,
757 .driver = {
758 .name = "tmp401",
759 },
760 .probe = tmp401_probe,
ea63c2b9
AP
761 .id_table = tmp401_id,
762 .detect = tmp401_detect,
763 .address_list = normal_i2c,
764};
ab2b79d5 765
f0967eea 766module_i2c_driver(tmp401_driver);
ab2b79d5
HG
767
768MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
769MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
770MODULE_LICENSE("GPL");
This page took 0.401654 seconds and 5 git commands to generate.