Commit | Line | Data |
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1da177e4 | 1 | /* |
27b9de3c GR |
2 | * w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware |
3 | * monitoring | |
4 | * Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>, | |
5 | * Philip Edelbrock <phil@netroedge.com>, | |
6 | * and Mark Studebaker <mdsxyz123@yahoo.com> | |
7 | * Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org> | |
7c81c60f | 8 | * Copyright (c) 2007 - 1012 Jean Delvare <jdelvare@suse.de> |
27b9de3c GR |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
1da177e4 LT |
24 | |
25 | /* | |
27b9de3c GR |
26 | * Supports following chips: |
27 | * | |
4101ece3 | 28 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
27b9de3c GR |
29 | * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) |
30 | * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) | |
31 | * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) | |
32 | * w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) | |
33 | * w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC) | |
34 | * | |
35 | * For other winbond chips, and for i2c support in the above chips, | |
36 | * use w83781d.c. | |
37 | * | |
38 | * Note: automatic ("cruise") fan control for 697, 637 & 627thf not | |
39 | * supported yet. | |
40 | */ | |
1da177e4 | 41 | |
18de030f JP |
42 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
43 | ||
1da177e4 LT |
44 | #include <linux/module.h> |
45 | #include <linux/init.h> | |
46 | #include <linux/slab.h> | |
47 | #include <linux/jiffies.h> | |
787c72b1 | 48 | #include <linux/platform_device.h> |
943b0830 | 49 | #include <linux/hwmon.h> |
07584c76 | 50 | #include <linux/hwmon-sysfs.h> |
303760b4 | 51 | #include <linux/hwmon-vid.h> |
943b0830 | 52 | #include <linux/err.h> |
9a61bf63 | 53 | #include <linux/mutex.h> |
d27c37c0 | 54 | #include <linux/ioport.h> |
b9acb64a | 55 | #include <linux/acpi.h> |
6055fae8 | 56 | #include <linux/io.h> |
1da177e4 LT |
57 | #include "lm75.h" |
58 | ||
787c72b1 | 59 | static struct platform_device *pdev; |
d27c37c0 JD |
60 | |
61 | #define DRVNAME "w83627hf" | |
62 | enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf }; | |
63 | ||
b72656db JD |
64 | struct w83627hf_sio_data { |
65 | enum chips type; | |
66 | int sioaddr; | |
67 | }; | |
68 | ||
1da177e4 LT |
69 | static u8 force_i2c = 0x1f; |
70 | module_param(force_i2c, byte, 0); | |
71 | MODULE_PARM_DESC(force_i2c, | |
72 | "Initialize the i2c address of the sensors"); | |
73 | ||
90ab5ee9 | 74 | static bool init = 1; |
1da177e4 LT |
75 | module_param(init, bool, 0); |
76 | MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); | |
77 | ||
67b671bc JD |
78 | static unsigned short force_id; |
79 | module_param(force_id, ushort, 0); | |
80 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
81 | ||
1da177e4 | 82 | /* modified from kernel/include/traps.c */ |
27b9de3c | 83 | #define DEV 0x07 /* Register: Logical device select */ |
1da177e4 LT |
84 | |
85 | /* logical device numbers for superio_select (below) */ | |
86 | #define W83627HF_LD_FDC 0x00 | |
87 | #define W83627HF_LD_PRT 0x01 | |
88 | #define W83627HF_LD_UART1 0x02 | |
89 | #define W83627HF_LD_UART2 0x03 | |
90 | #define W83627HF_LD_KBC 0x05 | |
91 | #define W83627HF_LD_CIR 0x06 /* w83627hf only */ | |
92 | #define W83627HF_LD_GAME 0x07 | |
93 | #define W83627HF_LD_MIDI 0x07 | |
94 | #define W83627HF_LD_GPIO1 0x07 | |
95 | #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */ | |
96 | #define W83627HF_LD_GPIO2 0x08 | |
97 | #define W83627HF_LD_GPIO3 0x09 | |
98 | #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */ | |
99 | #define W83627HF_LD_ACPI 0x0a | |
100 | #define W83627HF_LD_HWM 0x0b | |
101 | ||
27b9de3c | 102 | #define DEVID 0x20 /* Register: Device ID */ |
1da177e4 LT |
103 | |
104 | #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */ | |
105 | #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */ | |
106 | #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */ | |
107 | ||
c2db6ce1 JD |
108 | #define W83687THF_VID_EN 0x29 /* w83687thf only */ |
109 | #define W83687THF_VID_CFG 0xF0 /* w83687thf only */ | |
110 | #define W83687THF_VID_DATA 0xF1 /* w83687thf only */ | |
111 | ||
1da177e4 | 112 | static inline void |
b72656db | 113 | superio_outb(struct w83627hf_sio_data *sio, int reg, int val) |
1da177e4 | 114 | { |
b72656db JD |
115 | outb(reg, sio->sioaddr); |
116 | outb(val, sio->sioaddr + 1); | |
1da177e4 LT |
117 | } |
118 | ||
119 | static inline int | |
b72656db | 120 | superio_inb(struct w83627hf_sio_data *sio, int reg) |
1da177e4 | 121 | { |
b72656db JD |
122 | outb(reg, sio->sioaddr); |
123 | return inb(sio->sioaddr + 1); | |
1da177e4 LT |
124 | } |
125 | ||
126 | static inline void | |
b72656db | 127 | superio_select(struct w83627hf_sio_data *sio, int ld) |
1da177e4 | 128 | { |
b72656db JD |
129 | outb(DEV, sio->sioaddr); |
130 | outb(ld, sio->sioaddr + 1); | |
1da177e4 LT |
131 | } |
132 | ||
133 | static inline void | |
b72656db | 134 | superio_enter(struct w83627hf_sio_data *sio) |
1da177e4 | 135 | { |
b72656db JD |
136 | outb(0x87, sio->sioaddr); |
137 | outb(0x87, sio->sioaddr); | |
1da177e4 LT |
138 | } |
139 | ||
140 | static inline void | |
b72656db | 141 | superio_exit(struct w83627hf_sio_data *sio) |
1da177e4 | 142 | { |
b72656db | 143 | outb(0xAA, sio->sioaddr); |
1da177e4 LT |
144 | } |
145 | ||
146 | #define W627_DEVID 0x52 | |
147 | #define W627THF_DEVID 0x82 | |
148 | #define W697_DEVID 0x60 | |
149 | #define W637_DEVID 0x70 | |
c2db6ce1 | 150 | #define W687THF_DEVID 0x85 |
1da177e4 LT |
151 | #define WINB_ACT_REG 0x30 |
152 | #define WINB_BASE_REG 0x60 | |
153 | /* Constants specified below */ | |
154 | ||
ada0c2f8 PV |
155 | /* Alignment of the base address */ |
156 | #define WINB_ALIGNMENT ~7 | |
1da177e4 | 157 | |
ada0c2f8 PV |
158 | /* Offset & size of I/O region we are interested in */ |
159 | #define WINB_REGION_OFFSET 5 | |
160 | #define WINB_REGION_SIZE 2 | |
161 | ||
787c72b1 JD |
162 | /* Where are the sensors address/data registers relative to the region offset */ |
163 | #define W83781D_ADDR_REG_OFFSET 0 | |
164 | #define W83781D_DATA_REG_OFFSET 1 | |
1da177e4 LT |
165 | |
166 | /* The W83781D registers */ | |
167 | /* The W83782D registers for nr=7,8 are in bank 5 */ | |
168 | #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ | |
169 | (0x554 + (((nr) - 7) * 2))) | |
170 | #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
171 | (0x555 + (((nr) - 7) * 2))) | |
172 | #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
173 | (0x550 + (nr) - 7)) | |
174 | ||
2ca2fcd1 JC |
175 | /* nr:0-2 for fans:1-3 */ |
176 | #define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr)) | |
177 | #define W83627HF_REG_FAN(nr) (0x28 + (nr)) | |
1da177e4 | 178 | |
df48ed80 JC |
179 | #define W83627HF_REG_TEMP2_CONFIG 0x152 |
180 | #define W83627HF_REG_TEMP3_CONFIG 0x252 | |
181 | /* these are zero-based, unlike config constants above */ | |
182 | static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 }; | |
183 | static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 }; | |
184 | static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 }; | |
1da177e4 LT |
185 | |
186 | #define W83781D_REG_BANK 0x4E | |
187 | ||
188 | #define W83781D_REG_CONFIG 0x40 | |
4a1c4447 YM |
189 | #define W83781D_REG_ALARM1 0x459 |
190 | #define W83781D_REG_ALARM2 0x45A | |
191 | #define W83781D_REG_ALARM3 0x45B | |
1da177e4 | 192 | |
1da177e4 LT |
193 | #define W83781D_REG_BEEP_CONFIG 0x4D |
194 | #define W83781D_REG_BEEP_INTS1 0x56 | |
195 | #define W83781D_REG_BEEP_INTS2 0x57 | |
196 | #define W83781D_REG_BEEP_INTS3 0x453 | |
197 | ||
198 | #define W83781D_REG_VID_FANDIV 0x47 | |
199 | ||
200 | #define W83781D_REG_CHIPID 0x49 | |
201 | #define W83781D_REG_WCHIPID 0x58 | |
202 | #define W83781D_REG_CHIPMAN 0x4F | |
203 | #define W83781D_REG_PIN 0x4B | |
204 | ||
205 | #define W83781D_REG_VBAT 0x5D | |
206 | ||
207 | #define W83627HF_REG_PWM1 0x5A | |
208 | #define W83627HF_REG_PWM2 0x5B | |
1da177e4 | 209 | |
a95a5ed8 DG |
210 | static const u8 W83627THF_REG_PWM_ENABLE[] = { |
211 | 0x04, /* FAN 1 mode */ | |
212 | 0x04, /* FAN 2 mode */ | |
213 | 0x12, /* FAN AUX mode */ | |
214 | }; | |
215 | static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 }; | |
216 | ||
c2db6ce1 JD |
217 | #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */ |
218 | #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */ | |
219 | #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */ | |
1da177e4 | 220 | |
c2db6ce1 | 221 | #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */ |
1da177e4 LT |
222 | |
223 | static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 }; | |
224 | static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2, | |
225 | W83627THF_REG_PWM3 }; | |
226 | #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \ | |
07584c76 | 227 | regpwm_627hf[nr] : regpwm[nr]) |
1da177e4 | 228 | |
1550cb6d COM |
229 | #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */ |
230 | ||
231 | #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */ | |
232 | #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */ | |
233 | #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */ | |
234 | ||
235 | static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1, | |
236 | W83637HF_REG_PWM_FREQ2, | |
237 | W83637HF_REG_PWM_FREQ3 }; | |
238 | ||
239 | #define W83627HF_BASE_PWM_FREQ 46870 | |
240 | ||
1da177e4 LT |
241 | #define W83781D_REG_I2C_ADDR 0x48 |
242 | #define W83781D_REG_I2C_SUBADDR 0x4A | |
243 | ||
244 | /* Sensor selection */ | |
245 | #define W83781D_REG_SCFG1 0x5D | |
246 | static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; | |
247 | #define W83781D_REG_SCFG2 0x59 | |
248 | static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; | |
249 | #define W83781D_DEFAULT_BETA 3435 | |
250 | ||
27b9de3c GR |
251 | /* |
252 | * Conversions. Limit checking is only done on the TO_REG | |
253 | * variants. Note that you should be a bit careful with which arguments | |
254 | * these macros are called: arguments may be evaluated more than once. | |
255 | * Fixing this is just not worth it. | |
256 | */ | |
2a844c14 | 257 | #define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255)) |
1da177e4 LT |
258 | #define IN_FROM_REG(val) ((val) * 16) |
259 | ||
260 | static inline u8 FAN_TO_REG(long rpm, int div) | |
261 | { | |
262 | if (rpm == 0) | |
263 | return 255; | |
2a844c14 GR |
264 | rpm = clamp_val(rpm, 1, 1000000); |
265 | return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
1da177e4 LT |
266 | } |
267 | ||
268 | #define TEMP_MIN (-128000) | |
269 | #define TEMP_MAX ( 127000) | |
270 | ||
27b9de3c GR |
271 | /* |
272 | * TEMP: 0.001C/bit (-128C to +127C) | |
273 | * REG: 1C/bit, two's complement | |
274 | */ | |
5bfedac0 | 275 | static u8 TEMP_TO_REG(long temp) |
1da177e4 | 276 | { |
2a844c14 GR |
277 | int ntemp = clamp_val(temp, TEMP_MIN, TEMP_MAX); |
278 | ntemp += (ntemp < 0 ? -500 : 500); | |
279 | return (u8)(ntemp / 1000); | |
1da177e4 LT |
280 | } |
281 | ||
282 | static int TEMP_FROM_REG(u8 reg) | |
283 | { | |
284 | return (s8)reg * 1000; | |
285 | } | |
286 | ||
287 | #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div))) | |
288 | ||
2a844c14 | 289 | #define PWM_TO_REG(val) (clamp_val((val), 0, 255)) |
1da177e4 | 290 | |
1550cb6d COM |
291 | static inline unsigned long pwm_freq_from_reg_627hf(u8 reg) |
292 | { | |
293 | unsigned long freq; | |
294 | freq = W83627HF_BASE_PWM_FREQ >> reg; | |
295 | return freq; | |
296 | } | |
297 | static inline u8 pwm_freq_to_reg_627hf(unsigned long val) | |
298 | { | |
299 | u8 i; | |
27b9de3c GR |
300 | /* |
301 | * Only 5 dividers (1 2 4 8 16) | |
302 | * Search for the nearest available frequency | |
303 | */ | |
1550cb6d COM |
304 | for (i = 0; i < 4; i++) { |
305 | if (val > (((W83627HF_BASE_PWM_FREQ >> i) + | |
306 | (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2)) | |
307 | break; | |
308 | } | |
309 | return i; | |
310 | } | |
311 | ||
312 | static inline unsigned long pwm_freq_from_reg(u8 reg) | |
313 | { | |
314 | /* Clock bit 8 -> 180 kHz or 24 MHz */ | |
315 | unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL; | |
316 | ||
317 | reg &= 0x7f; | |
318 | /* This should not happen but anyway... */ | |
319 | if (reg == 0) | |
320 | reg++; | |
7fe83ad8 | 321 | return clock / (reg << 8); |
1550cb6d COM |
322 | } |
323 | static inline u8 pwm_freq_to_reg(unsigned long val) | |
324 | { | |
325 | /* Minimum divider value is 0x01 and maximum is 0x7F */ | |
326 | if (val >= 93750) /* The highest we can do */ | |
327 | return 0x01; | |
328 | if (val >= 720) /* Use 24 MHz clock */ | |
7fe83ad8 | 329 | return 24000000UL / (val << 8); |
1550cb6d COM |
330 | if (val < 6) /* The lowest we can do */ |
331 | return 0xFF; | |
332 | else /* Use 180 kHz clock */ | |
7fe83ad8 | 333 | return 0x80 | (180000UL / (val << 8)); |
1550cb6d COM |
334 | } |
335 | ||
1c138107 JD |
336 | #define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff) |
337 | #define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff) | |
1da177e4 LT |
338 | |
339 | #define DIV_FROM_REG(val) (1 << (val)) | |
340 | ||
341 | static inline u8 DIV_TO_REG(long val) | |
342 | { | |
343 | int i; | |
2a844c14 | 344 | val = clamp_val(val, 1, 128) >> 1; |
abc01922 | 345 | for (i = 0; i < 7; i++) { |
1da177e4 LT |
346 | if (val == 0) |
347 | break; | |
348 | val >>= 1; | |
349 | } | |
7fe83ad8 | 350 | return (u8)i; |
1da177e4 LT |
351 | } |
352 | ||
27b9de3c GR |
353 | /* |
354 | * For each registered chip, we need to keep some data in memory. | |
355 | * The structure is dynamically allocated. | |
356 | */ | |
1da177e4 | 357 | struct w83627hf_data { |
787c72b1 JD |
358 | unsigned short addr; |
359 | const char *name; | |
1beeffe4 | 360 | struct device *hwmon_dev; |
9a61bf63 | 361 | struct mutex lock; |
1da177e4 LT |
362 | enum chips type; |
363 | ||
9a61bf63 | 364 | struct mutex update_lock; |
1da177e4 LT |
365 | char valid; /* !=0 if following fields are valid */ |
366 | unsigned long last_updated; /* In jiffies */ | |
367 | ||
1da177e4 LT |
368 | u8 in[9]; /* Register value */ |
369 | u8 in_max[9]; /* Register value */ | |
370 | u8 in_min[9]; /* Register value */ | |
371 | u8 fan[3]; /* Register value */ | |
372 | u8 fan_min[3]; /* Register value */ | |
df48ed80 JC |
373 | u16 temp[3]; /* Register value */ |
374 | u16 temp_max[3]; /* Register value */ | |
375 | u16 temp_max_hyst[3]; /* Register value */ | |
1da177e4 LT |
376 | u8 fan_div[3]; /* Register encoding, shifted right */ |
377 | u8 vid; /* Register encoding, combined */ | |
378 | u32 alarms; /* Register encoding, combined */ | |
379 | u32 beep_mask; /* Register encoding, combined */ | |
1da177e4 | 380 | u8 pwm[3]; /* Register value */ |
a95a5ed8 | 381 | u8 pwm_enable[3]; /* 1 = manual |
27b9de3c GR |
382 | * 2 = thermal cruise (also called SmartFan I) |
383 | * 3 = fan speed cruise | |
384 | */ | |
1550cb6d | 385 | u8 pwm_freq[3]; /* Register value */ |
b26f9330 | 386 | u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode; |
27b9de3c GR |
387 | * 4 = thermistor |
388 | */ | |
1da177e4 | 389 | u8 vrm; |
c2db6ce1 | 390 | u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */ |
275b7d6e JD |
391 | |
392 | #ifdef CONFIG_PM | |
393 | /* Remember extra register values over suspend/resume */ | |
394 | u8 scfg1; | |
395 | u8 scfg2; | |
396 | #endif | |
1da177e4 LT |
397 | }; |
398 | ||
1da177e4 | 399 | |
787c72b1 | 400 | static int w83627hf_probe(struct platform_device *pdev); |
281dfd0b | 401 | static int w83627hf_remove(struct platform_device *pdev); |
787c72b1 JD |
402 | |
403 | static int w83627hf_read_value(struct w83627hf_data *data, u16 reg); | |
404 | static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value); | |
c09c5184 | 405 | static void w83627hf_update_fan_div(struct w83627hf_data *data); |
1da177e4 | 406 | static struct w83627hf_data *w83627hf_update_device(struct device *dev); |
787c72b1 | 407 | static void w83627hf_init_device(struct platform_device *pdev); |
1da177e4 | 408 | |
275b7d6e JD |
409 | #ifdef CONFIG_PM |
410 | static int w83627hf_suspend(struct device *dev) | |
411 | { | |
412 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
413 | ||
414 | mutex_lock(&data->update_lock); | |
415 | data->scfg1 = w83627hf_read_value(data, W83781D_REG_SCFG1); | |
416 | data->scfg2 = w83627hf_read_value(data, W83781D_REG_SCFG2); | |
417 | mutex_unlock(&data->update_lock); | |
418 | ||
419 | return 0; | |
420 | } | |
421 | ||
422 | static int w83627hf_resume(struct device *dev) | |
423 | { | |
424 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
425 | int i, num_temps = (data->type == w83697hf) ? 2 : 3; | |
426 | ||
427 | /* Restore limits */ | |
428 | mutex_lock(&data->update_lock); | |
429 | for (i = 0; i <= 8; i++) { | |
430 | /* skip missing sensors */ | |
431 | if (((data->type == w83697hf) && (i == 1)) || | |
432 | ((data->type != w83627hf && data->type != w83697hf) | |
433 | && (i == 5 || i == 6))) | |
434 | continue; | |
435 | w83627hf_write_value(data, W83781D_REG_IN_MAX(i), | |
436 | data->in_max[i]); | |
437 | w83627hf_write_value(data, W83781D_REG_IN_MIN(i), | |
438 | data->in_min[i]); | |
439 | } | |
440 | for (i = 0; i <= 2; i++) | |
441 | w83627hf_write_value(data, W83627HF_REG_FAN_MIN(i), | |
442 | data->fan_min[i]); | |
443 | for (i = 0; i < num_temps; i++) { | |
444 | w83627hf_write_value(data, w83627hf_reg_temp_over[i], | |
445 | data->temp_max[i]); | |
446 | w83627hf_write_value(data, w83627hf_reg_temp_hyst[i], | |
447 | data->temp_max_hyst[i]); | |
448 | } | |
449 | ||
450 | /* Fixup BIOS bugs */ | |
451 | if (data->type == w83627thf || data->type == w83637hf || | |
452 | data->type == w83687thf) | |
453 | w83627hf_write_value(data, W83627THF_REG_VRM_OVT_CFG, | |
454 | data->vrm_ovt); | |
455 | w83627hf_write_value(data, W83781D_REG_SCFG1, data->scfg1); | |
456 | w83627hf_write_value(data, W83781D_REG_SCFG2, data->scfg2); | |
457 | ||
458 | /* Force re-reading all values */ | |
459 | data->valid = 0; | |
460 | mutex_unlock(&data->update_lock); | |
461 | ||
462 | return 0; | |
463 | } | |
464 | ||
465 | static const struct dev_pm_ops w83627hf_dev_pm_ops = { | |
466 | .suspend = w83627hf_suspend, | |
467 | .resume = w83627hf_resume, | |
468 | }; | |
469 | ||
470 | #define W83627HF_DEV_PM_OPS (&w83627hf_dev_pm_ops) | |
471 | #else | |
472 | #define W83627HF_DEV_PM_OPS NULL | |
473 | #endif /* CONFIG_PM */ | |
474 | ||
787c72b1 | 475 | static struct platform_driver w83627hf_driver = { |
cdaf7934 | 476 | .driver = { |
87218842 | 477 | .owner = THIS_MODULE, |
d27c37c0 | 478 | .name = DRVNAME, |
275b7d6e | 479 | .pm = W83627HF_DEV_PM_OPS, |
cdaf7934 | 480 | }, |
787c72b1 | 481 | .probe = w83627hf_probe, |
9e5e9b7a | 482 | .remove = w83627hf_remove, |
1da177e4 LT |
483 | }; |
484 | ||
07584c76 JC |
485 | static ssize_t |
486 | show_in_input(struct device *dev, struct device_attribute *devattr, char *buf) | |
487 | { | |
488 | int nr = to_sensor_dev_attr(devattr)->index; | |
489 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
490 | return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr])); | |
1da177e4 | 491 | } |
07584c76 JC |
492 | static ssize_t |
493 | show_in_min(struct device *dev, struct device_attribute *devattr, char *buf) | |
494 | { | |
495 | int nr = to_sensor_dev_attr(devattr)->index; | |
496 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
497 | return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr])); | |
498 | } | |
499 | static ssize_t | |
500 | show_in_max(struct device *dev, struct device_attribute *devattr, char *buf) | |
501 | { | |
502 | int nr = to_sensor_dev_attr(devattr)->index; | |
503 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
504 | return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr])); | |
1da177e4 | 505 | } |
07584c76 JC |
506 | static ssize_t |
507 | store_in_min(struct device *dev, struct device_attribute *devattr, | |
508 | const char *buf, size_t count) | |
509 | { | |
510 | int nr = to_sensor_dev_attr(devattr)->index; | |
511 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
27b9de3c GR |
512 | long val; |
513 | int err; | |
514 | ||
515 | err = kstrtol(buf, 10, &val); | |
516 | if (err) | |
517 | return err; | |
1da177e4 | 518 | |
07584c76 JC |
519 | mutex_lock(&data->update_lock); |
520 | data->in_min[nr] = IN_TO_REG(val); | |
521 | w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]); | |
522 | mutex_unlock(&data->update_lock); | |
523 | return count; | |
524 | } | |
525 | static ssize_t | |
526 | store_in_max(struct device *dev, struct device_attribute *devattr, | |
527 | const char *buf, size_t count) | |
528 | { | |
529 | int nr = to_sensor_dev_attr(devattr)->index; | |
530 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
27b9de3c GR |
531 | long val; |
532 | int err; | |
533 | ||
534 | err = kstrtol(buf, 10, &val); | |
535 | if (err) | |
536 | return err; | |
1da177e4 | 537 | |
07584c76 JC |
538 | mutex_lock(&data->update_lock); |
539 | data->in_max[nr] = IN_TO_REG(val); | |
540 | w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]); | |
541 | mutex_unlock(&data->update_lock); | |
542 | return count; | |
543 | } | |
544 | #define sysfs_vin_decl(offset) \ | |
545 | static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ | |
546 | show_in_input, NULL, offset); \ | |
547 | static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \ | |
548 | show_in_min, store_in_min, offset); \ | |
549 | static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \ | |
550 | show_in_max, store_in_max, offset); | |
551 | ||
552 | sysfs_vin_decl(1); | |
553 | sysfs_vin_decl(2); | |
554 | sysfs_vin_decl(3); | |
555 | sysfs_vin_decl(4); | |
556 | sysfs_vin_decl(5); | |
557 | sysfs_vin_decl(6); | |
558 | sysfs_vin_decl(7); | |
559 | sysfs_vin_decl(8); | |
1da177e4 LT |
560 | |
561 | /* use a different set of functions for in0 */ | |
562 | static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg) | |
563 | { | |
564 | long in0; | |
565 | ||
566 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
567 | (w83627thf == data->type || w83637hf == data->type |
568 | || w83687thf == data->type)) | |
1da177e4 LT |
569 | |
570 | /* use VRM9 calculation */ | |
571 | in0 = (long)((reg * 488 + 70000 + 50) / 100); | |
572 | else | |
573 | /* use VRM8 (standard) calculation */ | |
574 | in0 = (long)IN_FROM_REG(reg); | |
575 | ||
576 | return sprintf(buf,"%ld\n", in0); | |
577 | } | |
578 | ||
a5099cfc | 579 | static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
580 | { |
581 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
582 | return show_in_0(data, buf, data->in[0]); | |
583 | } | |
584 | ||
a5099cfc | 585 | static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
586 | { |
587 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
588 | return show_in_0(data, buf, data->in_min[0]); | |
589 | } | |
590 | ||
a5099cfc | 591 | static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
592 | { |
593 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
594 | return show_in_0(data, buf, data->in_max[0]); | |
595 | } | |
596 | ||
a5099cfc | 597 | static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr, |
1da177e4 LT |
598 | const char *buf, size_t count) |
599 | { | |
787c72b1 | 600 | struct w83627hf_data *data = dev_get_drvdata(dev); |
27b9de3c GR |
601 | unsigned long val; |
602 | int err; | |
1da177e4 | 603 | |
27b9de3c GR |
604 | err = kstrtoul(buf, 10, &val); |
605 | if (err) | |
606 | return err; | |
1da177e4 | 607 | |
9a61bf63 | 608 | mutex_lock(&data->update_lock); |
1da177e4 LT |
609 | |
610 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
611 | (w83627thf == data->type || w83637hf == data->type |
612 | || w83687thf == data->type)) | |
1da177e4 LT |
613 | |
614 | /* use VRM9 calculation */ | |
2723ab91 | 615 | data->in_min[0] = |
2a844c14 | 616 | clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255); |
1da177e4 LT |
617 | else |
618 | /* use VRM8 (standard) calculation */ | |
619 | data->in_min[0] = IN_TO_REG(val); | |
620 | ||
787c72b1 | 621 | w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]); |
9a61bf63 | 622 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
623 | return count; |
624 | } | |
625 | ||
a5099cfc | 626 | static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr, |
1da177e4 LT |
627 | const char *buf, size_t count) |
628 | { | |
787c72b1 | 629 | struct w83627hf_data *data = dev_get_drvdata(dev); |
27b9de3c GR |
630 | unsigned long val; |
631 | int err; | |
1da177e4 | 632 | |
27b9de3c GR |
633 | err = kstrtoul(buf, 10, &val); |
634 | if (err) | |
635 | return err; | |
1da177e4 | 636 | |
9a61bf63 | 637 | mutex_lock(&data->update_lock); |
1da177e4 LT |
638 | |
639 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
640 | (w83627thf == data->type || w83637hf == data->type |
641 | || w83687thf == data->type)) | |
1da177e4 LT |
642 | |
643 | /* use VRM9 calculation */ | |
2723ab91 | 644 | data->in_max[0] = |
2a844c14 | 645 | clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255); |
1da177e4 LT |
646 | else |
647 | /* use VRM8 (standard) calculation */ | |
648 | data->in_max[0] = IN_TO_REG(val); | |
649 | ||
787c72b1 | 650 | w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]); |
9a61bf63 | 651 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
652 | return count; |
653 | } | |
654 | ||
655 | static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL); | |
656 | static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR, | |
657 | show_regs_in_min0, store_regs_in_min0); | |
658 | static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR, | |
659 | show_regs_in_max0, store_regs_in_max0); | |
660 | ||
07584c76 JC |
661 | static ssize_t |
662 | show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf) | |
663 | { | |
664 | int nr = to_sensor_dev_attr(devattr)->index; | |
665 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
666 | return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr], | |
667 | (long)DIV_FROM_REG(data->fan_div[nr]))); | |
668 | } | |
669 | static ssize_t | |
670 | show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf) | |
671 | { | |
672 | int nr = to_sensor_dev_attr(devattr)->index; | |
673 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
674 | return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr], | |
675 | (long)DIV_FROM_REG(data->fan_div[nr]))); | |
1da177e4 | 676 | } |
1da177e4 | 677 | static ssize_t |
07584c76 JC |
678 | store_fan_min(struct device *dev, struct device_attribute *devattr, |
679 | const char *buf, size_t count) | |
1da177e4 | 680 | { |
07584c76 | 681 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 682 | struct w83627hf_data *data = dev_get_drvdata(dev); |
27b9de3c GR |
683 | unsigned long val; |
684 | int err; | |
685 | ||
686 | err = kstrtoul(buf, 10, &val); | |
687 | if (err) | |
688 | return err; | |
1da177e4 | 689 | |
9a61bf63 | 690 | mutex_lock(&data->update_lock); |
07584c76 | 691 | data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); |
2ca2fcd1 | 692 | w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), |
07584c76 | 693 | data->fan_min[nr]); |
1da177e4 | 694 | |
9a61bf63 | 695 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
696 | return count; |
697 | } | |
07584c76 JC |
698 | #define sysfs_fan_decl(offset) \ |
699 | static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \ | |
700 | show_fan_input, NULL, offset - 1); \ | |
701 | static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \ | |
702 | show_fan_min, store_fan_min, offset - 1); | |
1da177e4 | 703 | |
07584c76 JC |
704 | sysfs_fan_decl(1); |
705 | sysfs_fan_decl(2); | |
706 | sysfs_fan_decl(3); | |
1da177e4 | 707 | |
07584c76 JC |
708 | static ssize_t |
709 | show_temp(struct device *dev, struct device_attribute *devattr, char *buf) | |
710 | { | |
711 | int nr = to_sensor_dev_attr(devattr)->index; | |
712 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
df48ed80 JC |
713 | |
714 | u16 tmp = data->temp[nr]; | |
715 | return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) | |
716 | : (long) TEMP_FROM_REG(tmp)); | |
1da177e4 | 717 | } |
1da177e4 | 718 | |
07584c76 JC |
719 | static ssize_t |
720 | show_temp_max(struct device *dev, struct device_attribute *devattr, | |
721 | char *buf) | |
722 | { | |
723 | int nr = to_sensor_dev_attr(devattr)->index; | |
724 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
df48ed80 JC |
725 | |
726 | u16 tmp = data->temp_max[nr]; | |
727 | return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) | |
728 | : (long) TEMP_FROM_REG(tmp)); | |
1da177e4 | 729 | } |
1da177e4 | 730 | |
07584c76 JC |
731 | static ssize_t |
732 | show_temp_max_hyst(struct device *dev, struct device_attribute *devattr, | |
733 | char *buf) | |
734 | { | |
735 | int nr = to_sensor_dev_attr(devattr)->index; | |
736 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
df48ed80 JC |
737 | |
738 | u16 tmp = data->temp_max_hyst[nr]; | |
739 | return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) | |
740 | : (long) TEMP_FROM_REG(tmp)); | |
07584c76 | 741 | } |
1da177e4 | 742 | |
07584c76 JC |
743 | static ssize_t |
744 | store_temp_max(struct device *dev, struct device_attribute *devattr, | |
745 | const char *buf, size_t count) | |
746 | { | |
747 | int nr = to_sensor_dev_attr(devattr)->index; | |
748 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
27b9de3c GR |
749 | u16 tmp; |
750 | long val; | |
751 | int err; | |
1da177e4 | 752 | |
27b9de3c GR |
753 | err = kstrtol(buf, 10, &val); |
754 | if (err) | |
755 | return err; | |
756 | ||
757 | tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val); | |
07584c76 | 758 | mutex_lock(&data->update_lock); |
df48ed80 JC |
759 | data->temp_max[nr] = tmp; |
760 | w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp); | |
07584c76 JC |
761 | mutex_unlock(&data->update_lock); |
762 | return count; | |
763 | } | |
764 | ||
765 | static ssize_t | |
766 | store_temp_max_hyst(struct device *dev, struct device_attribute *devattr, | |
767 | const char *buf, size_t count) | |
768 | { | |
769 | int nr = to_sensor_dev_attr(devattr)->index; | |
770 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
27b9de3c GR |
771 | u16 tmp; |
772 | long val; | |
773 | int err; | |
774 | ||
775 | err = kstrtol(buf, 10, &val); | |
776 | if (err) | |
777 | return err; | |
07584c76 | 778 | |
27b9de3c | 779 | tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val); |
07584c76 | 780 | mutex_lock(&data->update_lock); |
df48ed80 JC |
781 | data->temp_max_hyst[nr] = tmp; |
782 | w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp); | |
07584c76 JC |
783 | mutex_unlock(&data->update_lock); |
784 | return count; | |
785 | } | |
786 | ||
787 | #define sysfs_temp_decl(offset) \ | |
788 | static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \ | |
df48ed80 | 789 | show_temp, NULL, offset - 1); \ |
07584c76 | 790 | static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \ |
df48ed80 | 791 | show_temp_max, store_temp_max, offset - 1); \ |
07584c76 | 792 | static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \ |
df48ed80 | 793 | show_temp_max_hyst, store_temp_max_hyst, offset - 1); |
07584c76 JC |
794 | |
795 | sysfs_temp_decl(1); | |
796 | sysfs_temp_decl(2); | |
797 | sysfs_temp_decl(3); | |
1da177e4 | 798 | |
1da177e4 | 799 | static ssize_t |
a5099cfc | 800 | show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
801 | { |
802 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
803 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
804 | } | |
805 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
1da177e4 LT |
806 | |
807 | static ssize_t | |
a5099cfc | 808 | show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 | 809 | { |
90d6619a | 810 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
811 | return sprintf(buf, "%ld\n", (long) data->vrm); |
812 | } | |
813 | static ssize_t | |
a5099cfc | 814 | store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) |
1da177e4 | 815 | { |
787c72b1 | 816 | struct w83627hf_data *data = dev_get_drvdata(dev); |
27b9de3c GR |
817 | unsigned long val; |
818 | int err; | |
1da177e4 | 819 | |
27b9de3c GR |
820 | err = kstrtoul(buf, 10, &val); |
821 | if (err) | |
822 | return err; | |
970255b7 AL |
823 | |
824 | if (val > 255) | |
825 | return -EINVAL; | |
1da177e4 LT |
826 | data->vrm = val; |
827 | ||
828 | return count; | |
829 | } | |
830 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
1da177e4 LT |
831 | |
832 | static ssize_t | |
a5099cfc | 833 | show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
834 | { |
835 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
836 | return sprintf(buf, "%ld\n", (long) data->alarms); | |
837 | } | |
838 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); | |
1da177e4 | 839 | |
e3604c62 JD |
840 | static ssize_t |
841 | show_alarm(struct device *dev, struct device_attribute *attr, char *buf) | |
842 | { | |
843 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
844 | int bitnr = to_sensor_dev_attr(attr)->index; | |
845 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
846 | } | |
847 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); | |
848 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); | |
849 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); | |
850 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); | |
851 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8); | |
852 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9); | |
853 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10); | |
854 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16); | |
855 | static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17); | |
856 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6); | |
857 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7); | |
858 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11); | |
859 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4); | |
860 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5); | |
861 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13); | |
862 | ||
1c138107 JD |
863 | static ssize_t |
864 | show_beep_mask(struct device *dev, struct device_attribute *attr, char *buf) | |
865 | { | |
866 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
867 | return sprintf(buf, "%ld\n", | |
868 | (long)BEEP_MASK_FROM_REG(data->beep_mask)); | |
1da177e4 | 869 | } |
1da177e4 LT |
870 | |
871 | static ssize_t | |
1c138107 JD |
872 | store_beep_mask(struct device *dev, struct device_attribute *attr, |
873 | const char *buf, size_t count) | |
1da177e4 | 874 | { |
787c72b1 | 875 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1c138107 | 876 | unsigned long val; |
27b9de3c | 877 | int err; |
1da177e4 | 878 | |
27b9de3c GR |
879 | err = kstrtoul(buf, 10, &val); |
880 | if (err) | |
881 | return err; | |
1da177e4 | 882 | |
9a61bf63 | 883 | mutex_lock(&data->update_lock); |
1da177e4 | 884 | |
1c138107 JD |
885 | /* preserve beep enable */ |
886 | data->beep_mask = (data->beep_mask & 0x8000) | |
887 | | BEEP_MASK_TO_REG(val); | |
888 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, | |
889 | data->beep_mask & 0xff); | |
890 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, | |
891 | ((data->beep_mask) >> 16) & 0xff); | |
787c72b1 | 892 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, |
1c138107 | 893 | (data->beep_mask >> 8) & 0xff); |
1da177e4 | 894 | |
9a61bf63 | 895 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
896 | return count; |
897 | } | |
898 | ||
1c138107 JD |
899 | static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR, |
900 | show_beep_mask, store_beep_mask); | |
1da177e4 | 901 | |
e3604c62 JD |
902 | static ssize_t |
903 | show_beep(struct device *dev, struct device_attribute *attr, char *buf) | |
904 | { | |
905 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
906 | int bitnr = to_sensor_dev_attr(attr)->index; | |
907 | return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); | |
908 | } | |
909 | ||
910 | static ssize_t | |
911 | store_beep(struct device *dev, struct device_attribute *attr, | |
912 | const char *buf, size_t count) | |
913 | { | |
914 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
915 | int bitnr = to_sensor_dev_attr(attr)->index; | |
e3604c62 | 916 | u8 reg; |
27b9de3c GR |
917 | unsigned long bit; |
918 | int err; | |
919 | ||
920 | err = kstrtoul(buf, 10, &bit); | |
921 | if (err) | |
922 | return err; | |
e3604c62 | 923 | |
e3604c62 JD |
924 | if (bit & ~1) |
925 | return -EINVAL; | |
926 | ||
927 | mutex_lock(&data->update_lock); | |
928 | if (bit) | |
929 | data->beep_mask |= (1 << bitnr); | |
930 | else | |
931 | data->beep_mask &= ~(1 << bitnr); | |
932 | ||
933 | if (bitnr < 8) { | |
934 | reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1); | |
935 | if (bit) | |
936 | reg |= (1 << bitnr); | |
937 | else | |
938 | reg &= ~(1 << bitnr); | |
939 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg); | |
940 | } else if (bitnr < 16) { | |
941 | reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2); | |
942 | if (bit) | |
943 | reg |= (1 << (bitnr - 8)); | |
944 | else | |
945 | reg &= ~(1 << (bitnr - 8)); | |
946 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg); | |
947 | } else { | |
948 | reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3); | |
949 | if (bit) | |
950 | reg |= (1 << (bitnr - 16)); | |
951 | else | |
952 | reg &= ~(1 << (bitnr - 16)); | |
953 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg); | |
954 | } | |
955 | mutex_unlock(&data->update_lock); | |
956 | ||
957 | return count; | |
958 | } | |
959 | ||
960 | static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, | |
961 | show_beep, store_beep, 0); | |
962 | static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR, | |
963 | show_beep, store_beep, 1); | |
964 | static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR, | |
965 | show_beep, store_beep, 2); | |
966 | static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR, | |
967 | show_beep, store_beep, 3); | |
968 | static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR, | |
969 | show_beep, store_beep, 8); | |
970 | static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR, | |
971 | show_beep, store_beep, 9); | |
972 | static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR, | |
973 | show_beep, store_beep, 10); | |
974 | static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR, | |
975 | show_beep, store_beep, 16); | |
976 | static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR, | |
977 | show_beep, store_beep, 17); | |
978 | static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR, | |
979 | show_beep, store_beep, 6); | |
980 | static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR, | |
981 | show_beep, store_beep, 7); | |
982 | static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR, | |
983 | show_beep, store_beep, 11); | |
984 | static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, | |
985 | show_beep, store_beep, 4); | |
986 | static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR, | |
987 | show_beep, store_beep, 5); | |
988 | static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR, | |
989 | show_beep, store_beep, 13); | |
1c138107 JD |
990 | static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR, |
991 | show_beep, store_beep, 15); | |
e3604c62 | 992 | |
1da177e4 | 993 | static ssize_t |
07584c76 | 994 | show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf) |
1da177e4 | 995 | { |
07584c76 | 996 | int nr = to_sensor_dev_attr(devattr)->index; |
1da177e4 LT |
997 | struct w83627hf_data *data = w83627hf_update_device(dev); |
998 | return sprintf(buf, "%ld\n", | |
07584c76 | 999 | (long) DIV_FROM_REG(data->fan_div[nr])); |
1da177e4 | 1000 | } |
27b9de3c GR |
1001 | /* |
1002 | * Note: we save and restore the fan minimum here, because its value is | |
1003 | * determined in part by the fan divisor. This follows the principle of | |
1004 | * least surprise; the user doesn't expect the fan minimum to change just | |
1005 | * because the divisor changed. | |
1006 | */ | |
1da177e4 | 1007 | static ssize_t |
07584c76 JC |
1008 | store_fan_div(struct device *dev, struct device_attribute *devattr, |
1009 | const char *buf, size_t count) | |
1da177e4 | 1010 | { |
07584c76 | 1011 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 1012 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
1013 | unsigned long min; |
1014 | u8 reg; | |
27b9de3c GR |
1015 | unsigned long val; |
1016 | int err; | |
1017 | ||
1018 | err = kstrtoul(buf, 10, &val); | |
1019 | if (err) | |
1020 | return err; | |
1da177e4 | 1021 | |
9a61bf63 | 1022 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1023 | |
1024 | /* Save fan_min */ | |
1025 | min = FAN_FROM_REG(data->fan_min[nr], | |
1026 | DIV_FROM_REG(data->fan_div[nr])); | |
1027 | ||
1028 | data->fan_div[nr] = DIV_TO_REG(val); | |
1029 | ||
787c72b1 | 1030 | reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) |
1da177e4 LT |
1031 | & (nr==0 ? 0xcf : 0x3f)) |
1032 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); | |
787c72b1 | 1033 | w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); |
1da177e4 | 1034 | |
787c72b1 | 1035 | reg = (w83627hf_read_value(data, W83781D_REG_VBAT) |
1da177e4 LT |
1036 | & ~(1 << (5 + nr))) |
1037 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | |
787c72b1 | 1038 | w83627hf_write_value(data, W83781D_REG_VBAT, reg); |
1da177e4 LT |
1039 | |
1040 | /* Restore fan_min */ | |
1041 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | |
2ca2fcd1 | 1042 | w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]); |
1da177e4 | 1043 | |
9a61bf63 | 1044 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1045 | return count; |
1046 | } | |
1047 | ||
07584c76 JC |
1048 | static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR, |
1049 | show_fan_div, store_fan_div, 0); | |
1050 | static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR, | |
1051 | show_fan_div, store_fan_div, 1); | |
1052 | static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR, | |
1053 | show_fan_div, store_fan_div, 2); | |
1da177e4 | 1054 | |
1da177e4 | 1055 | static ssize_t |
07584c76 | 1056 | show_pwm(struct device *dev, struct device_attribute *devattr, char *buf) |
1da177e4 | 1057 | { |
07584c76 | 1058 | int nr = to_sensor_dev_attr(devattr)->index; |
1da177e4 | 1059 | struct w83627hf_data *data = w83627hf_update_device(dev); |
07584c76 | 1060 | return sprintf(buf, "%ld\n", (long) data->pwm[nr]); |
1da177e4 LT |
1061 | } |
1062 | ||
1063 | static ssize_t | |
07584c76 JC |
1064 | store_pwm(struct device *dev, struct device_attribute *devattr, |
1065 | const char *buf, size_t count) | |
1da177e4 | 1066 | { |
07584c76 | 1067 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 1068 | struct w83627hf_data *data = dev_get_drvdata(dev); |
27b9de3c GR |
1069 | unsigned long val; |
1070 | int err; | |
1071 | ||
1072 | err = kstrtoul(buf, 10, &val); | |
1073 | if (err) | |
1074 | return err; | |
1da177e4 | 1075 | |
9a61bf63 | 1076 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1077 | |
1078 | if (data->type == w83627thf) { | |
1079 | /* bits 0-3 are reserved in 627THF */ | |
07584c76 | 1080 | data->pwm[nr] = PWM_TO_REG(val) & 0xf0; |
787c72b1 | 1081 | w83627hf_write_value(data, |
1da177e4 | 1082 | W836X7HF_REG_PWM(data->type, nr), |
07584c76 | 1083 | data->pwm[nr] | |
787c72b1 | 1084 | (w83627hf_read_value(data, |
1da177e4 LT |
1085 | W836X7HF_REG_PWM(data->type, nr)) & 0x0f)); |
1086 | } else { | |
07584c76 | 1087 | data->pwm[nr] = PWM_TO_REG(val); |
787c72b1 | 1088 | w83627hf_write_value(data, |
1da177e4 | 1089 | W836X7HF_REG_PWM(data->type, nr), |
07584c76 | 1090 | data->pwm[nr]); |
1da177e4 LT |
1091 | } |
1092 | ||
9a61bf63 | 1093 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1094 | return count; |
1095 | } | |
1096 | ||
07584c76 JC |
1097 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0); |
1098 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1); | |
1099 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2); | |
1da177e4 | 1100 | |
a95a5ed8 DG |
1101 | static ssize_t |
1102 | show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf) | |
1103 | { | |
1104 | int nr = to_sensor_dev_attr(devattr)->index; | |
1105 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
1106 | return sprintf(buf, "%d\n", data->pwm_enable[nr]); | |
1107 | } | |
1108 | ||
1109 | static ssize_t | |
1110 | store_pwm_enable(struct device *dev, struct device_attribute *devattr, | |
1111 | const char *buf, size_t count) | |
1112 | { | |
1113 | int nr = to_sensor_dev_attr(devattr)->index; | |
1114 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
a95a5ed8 | 1115 | u8 reg; |
27b9de3c GR |
1116 | unsigned long val; |
1117 | int err; | |
a95a5ed8 | 1118 | |
27b9de3c GR |
1119 | err = kstrtoul(buf, 10, &val); |
1120 | if (err) | |
1121 | return err; | |
1122 | ||
1123 | if (!val || val > 3) /* modes 1, 2 and 3 are supported */ | |
a95a5ed8 DG |
1124 | return -EINVAL; |
1125 | mutex_lock(&data->update_lock); | |
1126 | data->pwm_enable[nr] = val; | |
1127 | reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]); | |
1128 | reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]); | |
1129 | reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr]; | |
1130 | w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg); | |
1131 | mutex_unlock(&data->update_lock); | |
1132 | return count; | |
1133 | } | |
1134 | ||
1135 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable, | |
1136 | store_pwm_enable, 0); | |
1137 | static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable, | |
1138 | store_pwm_enable, 1); | |
1139 | static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable, | |
1140 | store_pwm_enable, 2); | |
1141 | ||
1550cb6d | 1142 | static ssize_t |
07584c76 | 1143 | show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf) |
1550cb6d | 1144 | { |
07584c76 | 1145 | int nr = to_sensor_dev_attr(devattr)->index; |
1550cb6d COM |
1146 | struct w83627hf_data *data = w83627hf_update_device(dev); |
1147 | if (data->type == w83627hf) | |
1148 | return sprintf(buf, "%ld\n", | |
07584c76 | 1149 | pwm_freq_from_reg_627hf(data->pwm_freq[nr])); |
1550cb6d COM |
1150 | else |
1151 | return sprintf(buf, "%ld\n", | |
07584c76 | 1152 | pwm_freq_from_reg(data->pwm_freq[nr])); |
1550cb6d COM |
1153 | } |
1154 | ||
1155 | static ssize_t | |
07584c76 JC |
1156 | store_pwm_freq(struct device *dev, struct device_attribute *devattr, |
1157 | const char *buf, size_t count) | |
1550cb6d | 1158 | { |
07584c76 | 1159 | int nr = to_sensor_dev_attr(devattr)->index; |
1550cb6d COM |
1160 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1161 | static const u8 mask[]={0xF8, 0x8F}; | |
27b9de3c GR |
1162 | unsigned long val; |
1163 | int err; | |
1550cb6d | 1164 | |
27b9de3c GR |
1165 | err = kstrtoul(buf, 10, &val); |
1166 | if (err) | |
1167 | return err; | |
1550cb6d COM |
1168 | |
1169 | mutex_lock(&data->update_lock); | |
1170 | ||
1171 | if (data->type == w83627hf) { | |
07584c76 | 1172 | data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val); |
1550cb6d | 1173 | w83627hf_write_value(data, W83627HF_REG_PWM_FREQ, |
07584c76 | 1174 | (data->pwm_freq[nr] << (nr*4)) | |
1550cb6d | 1175 | (w83627hf_read_value(data, |
07584c76 | 1176 | W83627HF_REG_PWM_FREQ) & mask[nr])); |
1550cb6d | 1177 | } else { |
07584c76 JC |
1178 | data->pwm_freq[nr] = pwm_freq_to_reg(val); |
1179 | w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr], | |
1180 | data->pwm_freq[nr]); | |
1550cb6d COM |
1181 | } |
1182 | ||
1183 | mutex_unlock(&data->update_lock); | |
1184 | return count; | |
1185 | } | |
1186 | ||
07584c76 JC |
1187 | static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR, |
1188 | show_pwm_freq, store_pwm_freq, 0); | |
1189 | static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR, | |
1190 | show_pwm_freq, store_pwm_freq, 1); | |
1191 | static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR, | |
1192 | show_pwm_freq, store_pwm_freq, 2); | |
1550cb6d | 1193 | |
1da177e4 | 1194 | static ssize_t |
07584c76 JC |
1195 | show_temp_type(struct device *dev, struct device_attribute *devattr, |
1196 | char *buf) | |
1da177e4 | 1197 | { |
07584c76 | 1198 | int nr = to_sensor_dev_attr(devattr)->index; |
1da177e4 | 1199 | struct w83627hf_data *data = w83627hf_update_device(dev); |
07584c76 | 1200 | return sprintf(buf, "%ld\n", (long) data->sens[nr]); |
1da177e4 LT |
1201 | } |
1202 | ||
1203 | static ssize_t | |
07584c76 JC |
1204 | store_temp_type(struct device *dev, struct device_attribute *devattr, |
1205 | const char *buf, size_t count) | |
1da177e4 | 1206 | { |
07584c76 | 1207 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 1208 | struct w83627hf_data *data = dev_get_drvdata(dev); |
27b9de3c GR |
1209 | unsigned long val; |
1210 | u32 tmp; | |
1211 | int err; | |
1da177e4 | 1212 | |
27b9de3c GR |
1213 | err = kstrtoul(buf, 10, &val); |
1214 | if (err) | |
1215 | return err; | |
1da177e4 | 1216 | |
9a61bf63 | 1217 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1218 | |
1219 | switch (val) { | |
1220 | case 1: /* PII/Celeron diode */ | |
787c72b1 JD |
1221 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1222 | w83627hf_write_value(data, W83781D_REG_SCFG1, | |
07584c76 | 1223 | tmp | BIT_SCFG1[nr]); |
787c72b1 JD |
1224 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG2); |
1225 | w83627hf_write_value(data, W83781D_REG_SCFG2, | |
07584c76 JC |
1226 | tmp | BIT_SCFG2[nr]); |
1227 | data->sens[nr] = val; | |
1da177e4 LT |
1228 | break; |
1229 | case 2: /* 3904 */ | |
787c72b1 JD |
1230 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1231 | w83627hf_write_value(data, W83781D_REG_SCFG1, | |
07584c76 | 1232 | tmp | BIT_SCFG1[nr]); |
787c72b1 JD |
1233 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG2); |
1234 | w83627hf_write_value(data, W83781D_REG_SCFG2, | |
07584c76 JC |
1235 | tmp & ~BIT_SCFG2[nr]); |
1236 | data->sens[nr] = val; | |
1da177e4 | 1237 | break; |
b26f9330 JD |
1238 | case W83781D_DEFAULT_BETA: |
1239 | dev_warn(dev, "Sensor type %d is deprecated, please use 4 " | |
1240 | "instead\n", W83781D_DEFAULT_BETA); | |
1241 | /* fall through */ | |
1242 | case 4: /* thermistor */ | |
787c72b1 JD |
1243 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1244 | w83627hf_write_value(data, W83781D_REG_SCFG1, | |
07584c76 JC |
1245 | tmp & ~BIT_SCFG1[nr]); |
1246 | data->sens[nr] = val; | |
1da177e4 LT |
1247 | break; |
1248 | default: | |
787c72b1 | 1249 | dev_err(dev, |
b26f9330 JD |
1250 | "Invalid sensor type %ld; must be 1, 2, or 4\n", |
1251 | (long) val); | |
1da177e4 LT |
1252 | break; |
1253 | } | |
1254 | ||
9a61bf63 | 1255 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1256 | return count; |
1257 | } | |
1258 | ||
07584c76 JC |
1259 | #define sysfs_temp_type(offset) \ |
1260 | static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \ | |
1261 | show_temp_type, store_temp_type, offset - 1); | |
1da177e4 | 1262 | |
07584c76 JC |
1263 | sysfs_temp_type(1); |
1264 | sysfs_temp_type(2); | |
1265 | sysfs_temp_type(3); | |
1da177e4 | 1266 | |
07584c76 JC |
1267 | static ssize_t |
1268 | show_name(struct device *dev, struct device_attribute *devattr, char *buf) | |
787c72b1 JD |
1269 | { |
1270 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
1271 | ||
1272 | return sprintf(buf, "%s\n", data->name); | |
1273 | } | |
1274 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
1275 | ||
1276 | static int __init w83627hf_find(int sioaddr, unsigned short *addr, | |
1277 | struct w83627hf_sio_data *sio_data) | |
1da177e4 | 1278 | { |
d27c37c0 | 1279 | int err = -ENODEV; |
1da177e4 LT |
1280 | u16 val; |
1281 | ||
64f50307 | 1282 | static __initconst char *const names[] = { |
787c72b1 JD |
1283 | "W83627HF", |
1284 | "W83627THF", | |
1285 | "W83697HF", | |
1286 | "W83637HF", | |
1287 | "W83687THF", | |
1288 | }; | |
1289 | ||
c46c0e91 | 1290 | sio_data->sioaddr = sioaddr; |
b72656db JD |
1291 | superio_enter(sio_data); |
1292 | val = force_id ? force_id : superio_inb(sio_data, DEVID); | |
787c72b1 JD |
1293 | switch (val) { |
1294 | case W627_DEVID: | |
1295 | sio_data->type = w83627hf; | |
1296 | break; | |
1297 | case W627THF_DEVID: | |
1298 | sio_data->type = w83627thf; | |
1299 | break; | |
1300 | case W697_DEVID: | |
1301 | sio_data->type = w83697hf; | |
1302 | break; | |
1303 | case W637_DEVID: | |
1304 | sio_data->type = w83637hf; | |
1305 | break; | |
1306 | case W687THF_DEVID: | |
1307 | sio_data->type = w83687thf; | |
1308 | break; | |
e142e2a3 JD |
1309 | case 0xff: /* No device at all */ |
1310 | goto exit; | |
787c72b1 | 1311 | default: |
e142e2a3 | 1312 | pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val); |
d27c37c0 | 1313 | goto exit; |
1da177e4 LT |
1314 | } |
1315 | ||
b72656db JD |
1316 | superio_select(sio_data, W83627HF_LD_HWM); |
1317 | val = (superio_inb(sio_data, WINB_BASE_REG) << 8) | | |
1318 | superio_inb(sio_data, WINB_BASE_REG + 1); | |
ada0c2f8 | 1319 | *addr = val & WINB_ALIGNMENT; |
d27c37c0 | 1320 | if (*addr == 0) { |
18de030f | 1321 | pr_warn("Base address not set, skipping\n"); |
d27c37c0 | 1322 | goto exit; |
1da177e4 | 1323 | } |
1da177e4 | 1324 | |
b72656db | 1325 | val = superio_inb(sio_data, WINB_ACT_REG); |
d27c37c0 | 1326 | if (!(val & 0x01)) { |
18de030f | 1327 | pr_warn("Enabling HWM logical device\n"); |
b72656db | 1328 | superio_outb(sio_data, WINB_ACT_REG, val | 0x01); |
d27c37c0 JD |
1329 | } |
1330 | ||
1331 | err = 0; | |
787c72b1 JD |
1332 | pr_info(DRVNAME ": Found %s chip at %#x\n", |
1333 | names[sio_data->type], *addr); | |
d27c37c0 JD |
1334 | |
1335 | exit: | |
b72656db | 1336 | superio_exit(sio_data); |
d27c37c0 | 1337 | return err; |
1da177e4 LT |
1338 | } |
1339 | ||
07584c76 JC |
1340 | #define VIN_UNIT_ATTRS(_X_) \ |
1341 | &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \ | |
1342 | &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \ | |
e3604c62 JD |
1343 | &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \ |
1344 | &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \ | |
1345 | &sensor_dev_attr_in##_X_##_beep.dev_attr.attr | |
07584c76 JC |
1346 | |
1347 | #define FAN_UNIT_ATTRS(_X_) \ | |
1348 | &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \ | |
1349 | &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \ | |
e3604c62 JD |
1350 | &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \ |
1351 | &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \ | |
1352 | &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr | |
07584c76 JC |
1353 | |
1354 | #define TEMP_UNIT_ATTRS(_X_) \ | |
1355 | &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \ | |
1356 | &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \ | |
1357 | &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \ | |
e3604c62 JD |
1358 | &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \ |
1359 | &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \ | |
1360 | &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr | |
07584c76 | 1361 | |
c1685f61 MH |
1362 | static struct attribute *w83627hf_attributes[] = { |
1363 | &dev_attr_in0_input.attr, | |
1364 | &dev_attr_in0_min.attr, | |
1365 | &dev_attr_in0_max.attr, | |
e3604c62 JD |
1366 | &sensor_dev_attr_in0_alarm.dev_attr.attr, |
1367 | &sensor_dev_attr_in0_beep.dev_attr.attr, | |
07584c76 JC |
1368 | VIN_UNIT_ATTRS(2), |
1369 | VIN_UNIT_ATTRS(3), | |
1370 | VIN_UNIT_ATTRS(4), | |
1371 | VIN_UNIT_ATTRS(7), | |
1372 | VIN_UNIT_ATTRS(8), | |
1373 | ||
1374 | FAN_UNIT_ATTRS(1), | |
1375 | FAN_UNIT_ATTRS(2), | |
1376 | ||
1377 | TEMP_UNIT_ATTRS(1), | |
1378 | TEMP_UNIT_ATTRS(2), | |
c1685f61 MH |
1379 | |
1380 | &dev_attr_alarms.attr, | |
1c138107 | 1381 | &sensor_dev_attr_beep_enable.dev_attr.attr, |
c1685f61 MH |
1382 | &dev_attr_beep_mask.attr, |
1383 | ||
07584c76 JC |
1384 | &sensor_dev_attr_pwm1.dev_attr.attr, |
1385 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
787c72b1 | 1386 | &dev_attr_name.attr, |
c1685f61 MH |
1387 | NULL |
1388 | }; | |
1389 | ||
1390 | static const struct attribute_group w83627hf_group = { | |
1391 | .attrs = w83627hf_attributes, | |
1392 | }; | |
1393 | ||
1394 | static struct attribute *w83627hf_attributes_opt[] = { | |
07584c76 JC |
1395 | VIN_UNIT_ATTRS(1), |
1396 | VIN_UNIT_ATTRS(5), | |
1397 | VIN_UNIT_ATTRS(6), | |
1398 | ||
1399 | FAN_UNIT_ATTRS(3), | |
1400 | TEMP_UNIT_ATTRS(3), | |
1401 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1402 | ||
1403 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | |
1404 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, | |
1405 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, | |
a95a5ed8 DG |
1406 | |
1407 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | |
1408 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1409 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1410 | ||
c1685f61 MH |
1411 | NULL |
1412 | }; | |
1413 | ||
1414 | static const struct attribute_group w83627hf_group_opt = { | |
1415 | .attrs = w83627hf_attributes_opt, | |
1416 | }; | |
1417 | ||
6c931ae1 | 1418 | static int w83627hf_probe(struct platform_device *pdev) |
1da177e4 | 1419 | { |
787c72b1 | 1420 | struct device *dev = &pdev->dev; |
a8b3a3a5 | 1421 | struct w83627hf_sio_data *sio_data = dev_get_platdata(dev); |
1da177e4 | 1422 | struct w83627hf_data *data; |
787c72b1 | 1423 | struct resource *res; |
2ca2fcd1 | 1424 | int err, i; |
1da177e4 | 1425 | |
787c72b1 JD |
1426 | static const char *names[] = { |
1427 | "w83627hf", | |
1428 | "w83627thf", | |
1429 | "w83697hf", | |
1430 | "w83637hf", | |
1431 | "w83687thf", | |
1432 | }; | |
1433 | ||
1434 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
0cf46997 | 1435 | if (!devm_request_region(dev, res->start, WINB_REGION_SIZE, DRVNAME)) { |
787c72b1 JD |
1436 | dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", |
1437 | (unsigned long)res->start, | |
1438 | (unsigned long)(res->start + WINB_REGION_SIZE - 1)); | |
0cf46997 | 1439 | return -EBUSY; |
1da177e4 LT |
1440 | } |
1441 | ||
0cf46997 GR |
1442 | data = devm_kzalloc(dev, sizeof(struct w83627hf_data), GFP_KERNEL); |
1443 | if (!data) | |
1444 | return -ENOMEM; | |
1445 | ||
787c72b1 JD |
1446 | data->addr = res->start; |
1447 | data->type = sio_data->type; | |
1448 | data->name = names[sio_data->type]; | |
9a61bf63 | 1449 | mutex_init(&data->lock); |
9a61bf63 | 1450 | mutex_init(&data->update_lock); |
787c72b1 | 1451 | platform_set_drvdata(pdev, data); |
1da177e4 | 1452 | |
1da177e4 | 1453 | /* Initialize the chip */ |
787c72b1 | 1454 | w83627hf_init_device(pdev); |
1da177e4 LT |
1455 | |
1456 | /* A few vars need to be filled upon startup */ | |
2ca2fcd1 JC |
1457 | for (i = 0; i <= 2; i++) |
1458 | data->fan_min[i] = w83627hf_read_value( | |
1459 | data, W83627HF_REG_FAN_MIN(i)); | |
c09c5184 | 1460 | w83627hf_update_fan_div(data); |
1da177e4 | 1461 | |
c1685f61 | 1462 | /* Register common device attributes */ |
27b9de3c GR |
1463 | err = sysfs_create_group(&dev->kobj, &w83627hf_group); |
1464 | if (err) | |
0cf46997 | 1465 | return err; |
1da177e4 | 1466 | |
c1685f61 | 1467 | /* Register chip-specific device attributes */ |
787c72b1 | 1468 | if (data->type == w83627hf || data->type == w83697hf) |
07584c76 JC |
1469 | if ((err = device_create_file(dev, |
1470 | &sensor_dev_attr_in5_input.dev_attr)) | |
1471 | || (err = device_create_file(dev, | |
1472 | &sensor_dev_attr_in5_min.dev_attr)) | |
1473 | || (err = device_create_file(dev, | |
1474 | &sensor_dev_attr_in5_max.dev_attr)) | |
e3604c62 JD |
1475 | || (err = device_create_file(dev, |
1476 | &sensor_dev_attr_in5_alarm.dev_attr)) | |
1477 | || (err = device_create_file(dev, | |
1478 | &sensor_dev_attr_in5_beep.dev_attr)) | |
07584c76 JC |
1479 | || (err = device_create_file(dev, |
1480 | &sensor_dev_attr_in6_input.dev_attr)) | |
1481 | || (err = device_create_file(dev, | |
1482 | &sensor_dev_attr_in6_min.dev_attr)) | |
1483 | || (err = device_create_file(dev, | |
1484 | &sensor_dev_attr_in6_max.dev_attr)) | |
e3604c62 JD |
1485 | || (err = device_create_file(dev, |
1486 | &sensor_dev_attr_in6_alarm.dev_attr)) | |
1487 | || (err = device_create_file(dev, | |
1488 | &sensor_dev_attr_in6_beep.dev_attr)) | |
07584c76 JC |
1489 | || (err = device_create_file(dev, |
1490 | &sensor_dev_attr_pwm1_freq.dev_attr)) | |
1491 | || (err = device_create_file(dev, | |
1492 | &sensor_dev_attr_pwm2_freq.dev_attr))) | |
0cf46997 | 1493 | goto error; |
1da177e4 | 1494 | |
787c72b1 | 1495 | if (data->type != w83697hf) |
07584c76 JC |
1496 | if ((err = device_create_file(dev, |
1497 | &sensor_dev_attr_in1_input.dev_attr)) | |
1498 | || (err = device_create_file(dev, | |
1499 | &sensor_dev_attr_in1_min.dev_attr)) | |
1500 | || (err = device_create_file(dev, | |
1501 | &sensor_dev_attr_in1_max.dev_attr)) | |
e3604c62 JD |
1502 | || (err = device_create_file(dev, |
1503 | &sensor_dev_attr_in1_alarm.dev_attr)) | |
1504 | || (err = device_create_file(dev, | |
1505 | &sensor_dev_attr_in1_beep.dev_attr)) | |
07584c76 JC |
1506 | || (err = device_create_file(dev, |
1507 | &sensor_dev_attr_fan3_input.dev_attr)) | |
1508 | || (err = device_create_file(dev, | |
1509 | &sensor_dev_attr_fan3_min.dev_attr)) | |
1510 | || (err = device_create_file(dev, | |
1511 | &sensor_dev_attr_fan3_div.dev_attr)) | |
e3604c62 JD |
1512 | || (err = device_create_file(dev, |
1513 | &sensor_dev_attr_fan3_alarm.dev_attr)) | |
1514 | || (err = device_create_file(dev, | |
1515 | &sensor_dev_attr_fan3_beep.dev_attr)) | |
07584c76 JC |
1516 | || (err = device_create_file(dev, |
1517 | &sensor_dev_attr_temp3_input.dev_attr)) | |
1518 | || (err = device_create_file(dev, | |
1519 | &sensor_dev_attr_temp3_max.dev_attr)) | |
1520 | || (err = device_create_file(dev, | |
1521 | &sensor_dev_attr_temp3_max_hyst.dev_attr)) | |
e3604c62 JD |
1522 | || (err = device_create_file(dev, |
1523 | &sensor_dev_attr_temp3_alarm.dev_attr)) | |
1524 | || (err = device_create_file(dev, | |
1525 | &sensor_dev_attr_temp3_beep.dev_attr)) | |
07584c76 JC |
1526 | || (err = device_create_file(dev, |
1527 | &sensor_dev_attr_temp3_type.dev_attr))) | |
0cf46997 | 1528 | goto error; |
c1685f61 | 1529 | |
787c72b1 | 1530 | if (data->type != w83697hf && data->vid != 0xff) { |
8a665a05 JD |
1531 | /* Convert VID to voltage based on VRM */ |
1532 | data->vrm = vid_which_vrm(); | |
1533 | ||
787c72b1 JD |
1534 | if ((err = device_create_file(dev, &dev_attr_cpu0_vid)) |
1535 | || (err = device_create_file(dev, &dev_attr_vrm))) | |
0cf46997 | 1536 | goto error; |
8a665a05 | 1537 | } |
1da177e4 | 1538 | |
787c72b1 | 1539 | if (data->type == w83627thf || data->type == w83637hf |
27b9de3c GR |
1540 | || data->type == w83687thf) { |
1541 | err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr); | |
1542 | if (err) | |
0cf46997 | 1543 | goto error; |
27b9de3c | 1544 | } |
1da177e4 | 1545 | |
1550cb6d | 1546 | if (data->type == w83637hf || data->type == w83687thf) |
07584c76 JC |
1547 | if ((err = device_create_file(dev, |
1548 | &sensor_dev_attr_pwm1_freq.dev_attr)) | |
1549 | || (err = device_create_file(dev, | |
1550 | &sensor_dev_attr_pwm2_freq.dev_attr)) | |
1551 | || (err = device_create_file(dev, | |
1552 | &sensor_dev_attr_pwm3_freq.dev_attr))) | |
0cf46997 | 1553 | goto error; |
1550cb6d | 1554 | |
a95a5ed8 DG |
1555 | if (data->type != w83627hf) |
1556 | if ((err = device_create_file(dev, | |
1557 | &sensor_dev_attr_pwm1_enable.dev_attr)) | |
1558 | || (err = device_create_file(dev, | |
1559 | &sensor_dev_attr_pwm2_enable.dev_attr))) | |
0cf46997 | 1560 | goto error; |
a95a5ed8 DG |
1561 | |
1562 | if (data->type == w83627thf || data->type == w83637hf | |
27b9de3c GR |
1563 | || data->type == w83687thf) { |
1564 | err = device_create_file(dev, | |
1565 | &sensor_dev_attr_pwm3_enable.dev_attr); | |
1566 | if (err) | |
0cf46997 | 1567 | goto error; |
27b9de3c | 1568 | } |
a95a5ed8 | 1569 | |
1beeffe4 TJ |
1570 | data->hwmon_dev = hwmon_device_register(dev); |
1571 | if (IS_ERR(data->hwmon_dev)) { | |
1572 | err = PTR_ERR(data->hwmon_dev); | |
0cf46997 | 1573 | goto error; |
c1685f61 | 1574 | } |
1da177e4 LT |
1575 | |
1576 | return 0; | |
1577 | ||
0cf46997 | 1578 | error: |
787c72b1 JD |
1579 | sysfs_remove_group(&dev->kobj, &w83627hf_group); |
1580 | sysfs_remove_group(&dev->kobj, &w83627hf_group_opt); | |
1da177e4 LT |
1581 | return err; |
1582 | } | |
1583 | ||
281dfd0b | 1584 | static int w83627hf_remove(struct platform_device *pdev) |
1da177e4 | 1585 | { |
787c72b1 | 1586 | struct w83627hf_data *data = platform_get_drvdata(pdev); |
1da177e4 | 1587 | |
1beeffe4 | 1588 | hwmon_device_unregister(data->hwmon_dev); |
943b0830 | 1589 | |
787c72b1 JD |
1590 | sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group); |
1591 | sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt); | |
787c72b1 | 1592 | |
1da177e4 LT |
1593 | return 0; |
1594 | } | |
1595 | ||
1596 | ||
d58df9cd JD |
1597 | /* Registers 0x50-0x5f are banked */ |
1598 | static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg) | |
1599 | { | |
1600 | if ((reg & 0x00f0) == 0x50) { | |
1601 | outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET); | |
1602 | outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET); | |
1603 | } | |
1604 | } | |
1605 | ||
1606 | /* Not strictly necessary, but play it safe for now */ | |
1607 | static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg) | |
1608 | { | |
1609 | if (reg & 0xff00) { | |
1610 | outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET); | |
1611 | outb_p(0, data->addr + W83781D_DATA_REG_OFFSET); | |
1612 | } | |
1613 | } | |
1614 | ||
787c72b1 | 1615 | static int w83627hf_read_value(struct w83627hf_data *data, u16 reg) |
1da177e4 | 1616 | { |
1da177e4 LT |
1617 | int res, word_sized; |
1618 | ||
9a61bf63 | 1619 | mutex_lock(&data->lock); |
1da177e4 LT |
1620 | word_sized = (((reg & 0xff00) == 0x100) |
1621 | || ((reg & 0xff00) == 0x200)) | |
1622 | && (((reg & 0x00ff) == 0x50) | |
1623 | || ((reg & 0x00ff) == 0x53) | |
1624 | || ((reg & 0x00ff) == 0x55)); | |
d58df9cd | 1625 | w83627hf_set_bank(data, reg); |
787c72b1 JD |
1626 | outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET); |
1627 | res = inb_p(data->addr + W83781D_DATA_REG_OFFSET); | |
1da177e4 LT |
1628 | if (word_sized) { |
1629 | outb_p((reg & 0xff) + 1, | |
787c72b1 | 1630 | data->addr + W83781D_ADDR_REG_OFFSET); |
1da177e4 | 1631 | res = |
787c72b1 | 1632 | (res << 8) + inb_p(data->addr + |
1da177e4 LT |
1633 | W83781D_DATA_REG_OFFSET); |
1634 | } | |
d58df9cd | 1635 | w83627hf_reset_bank(data, reg); |
9a61bf63 | 1636 | mutex_unlock(&data->lock); |
1da177e4 LT |
1637 | return res; |
1638 | } | |
1639 | ||
6c931ae1 | 1640 | static int w83627thf_read_gpio5(struct platform_device *pdev) |
1da177e4 | 1641 | { |
a8b3a3a5 | 1642 | struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev); |
1da177e4 LT |
1643 | int res = 0xff, sel; |
1644 | ||
b72656db JD |
1645 | superio_enter(sio_data); |
1646 | superio_select(sio_data, W83627HF_LD_GPIO5); | |
1da177e4 LT |
1647 | |
1648 | /* Make sure these GPIO pins are enabled */ | |
b72656db | 1649 | if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) { |
787c72b1 | 1650 | dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n"); |
1da177e4 LT |
1651 | goto exit; |
1652 | } | |
1653 | ||
27b9de3c GR |
1654 | /* |
1655 | * Make sure the pins are configured for input | |
1656 | * There must be at least five (VRM 9), and possibly 6 (VRM 10) | |
1657 | */ | |
b72656db | 1658 | sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f; |
1da177e4 | 1659 | if ((sel & 0x1f) != 0x1f) { |
787c72b1 | 1660 | dev_dbg(&pdev->dev, "GPIO5 not configured for VID " |
1da177e4 LT |
1661 | "function\n"); |
1662 | goto exit; | |
1663 | } | |
1664 | ||
787c72b1 | 1665 | dev_info(&pdev->dev, "Reading VID from GPIO5\n"); |
b72656db | 1666 | res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel; |
1da177e4 LT |
1667 | |
1668 | exit: | |
b72656db | 1669 | superio_exit(sio_data); |
1da177e4 LT |
1670 | return res; |
1671 | } | |
1672 | ||
6c931ae1 | 1673 | static int w83687thf_read_vid(struct platform_device *pdev) |
c2db6ce1 | 1674 | { |
a8b3a3a5 | 1675 | struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev); |
c2db6ce1 JD |
1676 | int res = 0xff; |
1677 | ||
b72656db JD |
1678 | superio_enter(sio_data); |
1679 | superio_select(sio_data, W83627HF_LD_HWM); | |
c2db6ce1 JD |
1680 | |
1681 | /* Make sure these GPIO pins are enabled */ | |
b72656db | 1682 | if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) { |
787c72b1 | 1683 | dev_dbg(&pdev->dev, "VID disabled, no VID function\n"); |
c2db6ce1 JD |
1684 | goto exit; |
1685 | } | |
1686 | ||
1687 | /* Make sure the pins are configured for input */ | |
b72656db | 1688 | if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) { |
787c72b1 | 1689 | dev_dbg(&pdev->dev, "VID configured as output, " |
c2db6ce1 JD |
1690 | "no VID function\n"); |
1691 | goto exit; | |
1692 | } | |
1693 | ||
b72656db | 1694 | res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f; |
c2db6ce1 JD |
1695 | |
1696 | exit: | |
b72656db | 1697 | superio_exit(sio_data); |
c2db6ce1 JD |
1698 | return res; |
1699 | } | |
1700 | ||
787c72b1 | 1701 | static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value) |
1da177e4 | 1702 | { |
1da177e4 LT |
1703 | int word_sized; |
1704 | ||
9a61bf63 | 1705 | mutex_lock(&data->lock); |
1da177e4 LT |
1706 | word_sized = (((reg & 0xff00) == 0x100) |
1707 | || ((reg & 0xff00) == 0x200)) | |
1708 | && (((reg & 0x00ff) == 0x53) | |
1709 | || ((reg & 0x00ff) == 0x55)); | |
d58df9cd | 1710 | w83627hf_set_bank(data, reg); |
787c72b1 | 1711 | outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET); |
1da177e4 LT |
1712 | if (word_sized) { |
1713 | outb_p(value >> 8, | |
787c72b1 | 1714 | data->addr + W83781D_DATA_REG_OFFSET); |
1da177e4 | 1715 | outb_p((reg & 0xff) + 1, |
787c72b1 | 1716 | data->addr + W83781D_ADDR_REG_OFFSET); |
1da177e4 LT |
1717 | } |
1718 | outb_p(value & 0xff, | |
787c72b1 | 1719 | data->addr + W83781D_DATA_REG_OFFSET); |
d58df9cd | 1720 | w83627hf_reset_bank(data, reg); |
9a61bf63 | 1721 | mutex_unlock(&data->lock); |
1da177e4 LT |
1722 | return 0; |
1723 | } | |
1724 | ||
6c931ae1 | 1725 | static void w83627hf_init_device(struct platform_device *pdev) |
1da177e4 | 1726 | { |
787c72b1 | 1727 | struct w83627hf_data *data = platform_get_drvdata(pdev); |
1da177e4 | 1728 | int i; |
d27c37c0 | 1729 | enum chips type = data->type; |
1da177e4 LT |
1730 | u8 tmp; |
1731 | ||
1da177e4 LT |
1732 | /* Minimize conflicts with other winbond i2c-only clients... */ |
1733 | /* disable i2c subclients... how to disable main i2c client?? */ | |
1734 | /* force i2c address to relatively uncommon address */ | |
8f3c7c54 JD |
1735 | if (type == w83627hf) { |
1736 | w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89); | |
1737 | w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c); | |
1738 | } | |
1da177e4 LT |
1739 | |
1740 | /* Read VID only once */ | |
d27c37c0 | 1741 | if (type == w83627hf || type == w83637hf) { |
787c72b1 JD |
1742 | int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV); |
1743 | int hi = w83627hf_read_value(data, W83781D_REG_CHIPID); | |
1da177e4 | 1744 | data->vid = (lo & 0x0f) | ((hi & 0x01) << 4); |
d27c37c0 | 1745 | } else if (type == w83627thf) { |
787c72b1 | 1746 | data->vid = w83627thf_read_gpio5(pdev); |
d27c37c0 | 1747 | } else if (type == w83687thf) { |
787c72b1 | 1748 | data->vid = w83687thf_read_vid(pdev); |
1da177e4 LT |
1749 | } |
1750 | ||
1751 | /* Read VRM & OVT Config only once */ | |
d27c37c0 | 1752 | if (type == w83627thf || type == w83637hf || type == w83687thf) { |
1da177e4 | 1753 | data->vrm_ovt = |
787c72b1 | 1754 | w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG); |
1da177e4 LT |
1755 | } |
1756 | ||
787c72b1 | 1757 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1da177e4 LT |
1758 | for (i = 1; i <= 3; i++) { |
1759 | if (!(tmp & BIT_SCFG1[i - 1])) { | |
b26f9330 | 1760 | data->sens[i - 1] = 4; |
1da177e4 LT |
1761 | } else { |
1762 | if (w83627hf_read_value | |
787c72b1 | 1763 | (data, |
1da177e4 LT |
1764 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) |
1765 | data->sens[i - 1] = 1; | |
1766 | else | |
1767 | data->sens[i - 1] = 2; | |
1768 | } | |
1769 | if ((type == w83697hf) && (i == 2)) | |
1770 | break; | |
1771 | } | |
1772 | ||
1773 | if(init) { | |
1774 | /* Enable temp2 */ | |
df48ed80 | 1775 | tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG); |
1da177e4 | 1776 | if (tmp & 0x01) { |
787c72b1 | 1777 | dev_warn(&pdev->dev, "Enabling temp2, readings " |
1da177e4 | 1778 | "might not make sense\n"); |
df48ed80 | 1779 | w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG, |
1da177e4 LT |
1780 | tmp & 0xfe); |
1781 | } | |
1782 | ||
1783 | /* Enable temp3 */ | |
1784 | if (type != w83697hf) { | |
787c72b1 | 1785 | tmp = w83627hf_read_value(data, |
df48ed80 | 1786 | W83627HF_REG_TEMP3_CONFIG); |
1da177e4 | 1787 | if (tmp & 0x01) { |
787c72b1 | 1788 | dev_warn(&pdev->dev, "Enabling temp3, " |
1da177e4 | 1789 | "readings might not make sense\n"); |
787c72b1 | 1790 | w83627hf_write_value(data, |
df48ed80 | 1791 | W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe); |
1da177e4 LT |
1792 | } |
1793 | } | |
1da177e4 LT |
1794 | } |
1795 | ||
1796 | /* Start monitoring */ | |
787c72b1 JD |
1797 | w83627hf_write_value(data, W83781D_REG_CONFIG, |
1798 | (w83627hf_read_value(data, | |
1da177e4 LT |
1799 | W83781D_REG_CONFIG) & 0xf7) |
1800 | | 0x01); | |
ef878b11 JD |
1801 | |
1802 | /* Enable VBAT monitoring if needed */ | |
1803 | tmp = w83627hf_read_value(data, W83781D_REG_VBAT); | |
1804 | if (!(tmp & 0x01)) | |
1805 | w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01); | |
1da177e4 LT |
1806 | } |
1807 | ||
c09c5184 JD |
1808 | static void w83627hf_update_fan_div(struct w83627hf_data *data) |
1809 | { | |
1810 | int reg; | |
1811 | ||
1812 | reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV); | |
1813 | data->fan_div[0] = (reg >> 4) & 0x03; | |
1814 | data->fan_div[1] = (reg >> 6) & 0x03; | |
1815 | if (data->type != w83697hf) { | |
1816 | data->fan_div[2] = (w83627hf_read_value(data, | |
1817 | W83781D_REG_PIN) >> 6) & 0x03; | |
1818 | } | |
1819 | reg = w83627hf_read_value(data, W83781D_REG_VBAT); | |
1820 | data->fan_div[0] |= (reg >> 3) & 0x04; | |
1821 | data->fan_div[1] |= (reg >> 4) & 0x04; | |
1822 | if (data->type != w83697hf) | |
1823 | data->fan_div[2] |= (reg >> 5) & 0x04; | |
1824 | } | |
1825 | ||
1da177e4 LT |
1826 | static struct w83627hf_data *w83627hf_update_device(struct device *dev) |
1827 | { | |
787c72b1 | 1828 | struct w83627hf_data *data = dev_get_drvdata(dev); |
df48ed80 | 1829 | int i, num_temps = (data->type == w83697hf) ? 2 : 3; |
a95a5ed8 | 1830 | int num_pwms = (data->type == w83697hf) ? 2 : 3; |
1da177e4 | 1831 | |
9a61bf63 | 1832 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1833 | |
1834 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
1835 | || !data->valid) { | |
1836 | for (i = 0; i <= 8; i++) { | |
1837 | /* skip missing sensors */ | |
1838 | if (((data->type == w83697hf) && (i == 1)) || | |
c2db6ce1 | 1839 | ((data->type != w83627hf && data->type != w83697hf) |
4a1c4447 | 1840 | && (i == 5 || i == 6))) |
1da177e4 LT |
1841 | continue; |
1842 | data->in[i] = | |
787c72b1 | 1843 | w83627hf_read_value(data, W83781D_REG_IN(i)); |
1da177e4 | 1844 | data->in_min[i] = |
787c72b1 | 1845 | w83627hf_read_value(data, |
1da177e4 LT |
1846 | W83781D_REG_IN_MIN(i)); |
1847 | data->in_max[i] = | |
787c72b1 | 1848 | w83627hf_read_value(data, |
1da177e4 LT |
1849 | W83781D_REG_IN_MAX(i)); |
1850 | } | |
2ca2fcd1 JC |
1851 | for (i = 0; i <= 2; i++) { |
1852 | data->fan[i] = | |
1853 | w83627hf_read_value(data, W83627HF_REG_FAN(i)); | |
1854 | data->fan_min[i] = | |
787c72b1 | 1855 | w83627hf_read_value(data, |
2ca2fcd1 | 1856 | W83627HF_REG_FAN_MIN(i)); |
1da177e4 | 1857 | } |
07584c76 | 1858 | for (i = 0; i <= 2; i++) { |
787c72b1 | 1859 | u8 tmp = w83627hf_read_value(data, |
1da177e4 LT |
1860 | W836X7HF_REG_PWM(data->type, i)); |
1861 | /* bits 0-3 are reserved in 627THF */ | |
1862 | if (data->type == w83627thf) | |
1863 | tmp &= 0xf0; | |
07584c76 JC |
1864 | data->pwm[i] = tmp; |
1865 | if (i == 1 && | |
1866 | (data->type == w83627hf || data->type == w83697hf)) | |
1da177e4 LT |
1867 | break; |
1868 | } | |
1550cb6d COM |
1869 | if (data->type == w83627hf) { |
1870 | u8 tmp = w83627hf_read_value(data, | |
1871 | W83627HF_REG_PWM_FREQ); | |
1872 | data->pwm_freq[0] = tmp & 0x07; | |
1873 | data->pwm_freq[1] = (tmp >> 4) & 0x07; | |
1874 | } else if (data->type != w83627thf) { | |
1875 | for (i = 1; i <= 3; i++) { | |
1876 | data->pwm_freq[i - 1] = | |
1877 | w83627hf_read_value(data, | |
1878 | W83637HF_REG_PWM_FREQ[i - 1]); | |
1879 | if (i == 2 && (data->type == w83697hf)) | |
1880 | break; | |
1881 | } | |
1882 | } | |
a95a5ed8 DG |
1883 | if (data->type != w83627hf) { |
1884 | for (i = 0; i < num_pwms; i++) { | |
1885 | u8 tmp = w83627hf_read_value(data, | |
1886 | W83627THF_REG_PWM_ENABLE[i]); | |
1887 | data->pwm_enable[i] = | |
1888 | ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i]) | |
1889 | & 0x03) + 1; | |
1890 | } | |
1891 | } | |
df48ed80 JC |
1892 | for (i = 0; i < num_temps; i++) { |
1893 | data->temp[i] = w83627hf_read_value( | |
1894 | data, w83627hf_reg_temp[i]); | |
1895 | data->temp_max[i] = w83627hf_read_value( | |
1896 | data, w83627hf_reg_temp_over[i]); | |
1897 | data->temp_max_hyst[i] = w83627hf_read_value( | |
1898 | data, w83627hf_reg_temp_hyst[i]); | |
1da177e4 LT |
1899 | } |
1900 | ||
c09c5184 JD |
1901 | w83627hf_update_fan_div(data); |
1902 | ||
1da177e4 | 1903 | data->alarms = |
787c72b1 JD |
1904 | w83627hf_read_value(data, W83781D_REG_ALARM1) | |
1905 | (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) | | |
1906 | (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16); | |
1907 | i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2); | |
1c138107 | 1908 | data->beep_mask = (i << 8) | |
787c72b1 JD |
1909 | w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) | |
1910 | w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16; | |
1da177e4 LT |
1911 | data->last_updated = jiffies; |
1912 | data->valid = 1; | |
1913 | } | |
1914 | ||
9a61bf63 | 1915 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1916 | |
1917 | return data; | |
1918 | } | |
1919 | ||
787c72b1 JD |
1920 | static int __init w83627hf_device_add(unsigned short address, |
1921 | const struct w83627hf_sio_data *sio_data) | |
1922 | { | |
1923 | struct resource res = { | |
1924 | .start = address + WINB_REGION_OFFSET, | |
1925 | .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1, | |
1926 | .name = DRVNAME, | |
1927 | .flags = IORESOURCE_IO, | |
1928 | }; | |
1929 | int err; | |
1930 | ||
b9acb64a JD |
1931 | err = acpi_check_resource_conflict(&res); |
1932 | if (err) | |
1933 | goto exit; | |
1934 | ||
787c72b1 JD |
1935 | pdev = platform_device_alloc(DRVNAME, address); |
1936 | if (!pdev) { | |
1937 | err = -ENOMEM; | |
18de030f | 1938 | pr_err("Device allocation failed\n"); |
787c72b1 JD |
1939 | goto exit; |
1940 | } | |
1941 | ||
1942 | err = platform_device_add_resources(pdev, &res, 1); | |
1943 | if (err) { | |
18de030f | 1944 | pr_err("Device resource addition failed (%d)\n", err); |
787c72b1 JD |
1945 | goto exit_device_put; |
1946 | } | |
1947 | ||
2df6d811 JD |
1948 | err = platform_device_add_data(pdev, sio_data, |
1949 | sizeof(struct w83627hf_sio_data)); | |
1950 | if (err) { | |
18de030f | 1951 | pr_err("Platform data allocation failed\n"); |
787c72b1 JD |
1952 | goto exit_device_put; |
1953 | } | |
787c72b1 JD |
1954 | |
1955 | err = platform_device_add(pdev); | |
1956 | if (err) { | |
18de030f | 1957 | pr_err("Device addition failed (%d)\n", err); |
787c72b1 JD |
1958 | goto exit_device_put; |
1959 | } | |
1960 | ||
1961 | return 0; | |
1962 | ||
1963 | exit_device_put: | |
1964 | platform_device_put(pdev); | |
1965 | exit: | |
1966 | return err; | |
1967 | } | |
1968 | ||
1da177e4 LT |
1969 | static int __init sensors_w83627hf_init(void) |
1970 | { | |
787c72b1 JD |
1971 | int err; |
1972 | unsigned short address; | |
1973 | struct w83627hf_sio_data sio_data; | |
1974 | ||
1975 | if (w83627hf_find(0x2e, &address, &sio_data) | |
1976 | && w83627hf_find(0x4e, &address, &sio_data)) | |
1da177e4 | 1977 | return -ENODEV; |
1da177e4 | 1978 | |
787c72b1 JD |
1979 | err = platform_driver_register(&w83627hf_driver); |
1980 | if (err) | |
1981 | goto exit; | |
1982 | ||
1983 | /* Sets global pdev as a side effect */ | |
1984 | err = w83627hf_device_add(address, &sio_data); | |
1985 | if (err) | |
1986 | goto exit_driver; | |
1987 | ||
1988 | return 0; | |
1989 | ||
1990 | exit_driver: | |
1991 | platform_driver_unregister(&w83627hf_driver); | |
1992 | exit: | |
1993 | return err; | |
1da177e4 LT |
1994 | } |
1995 | ||
1996 | static void __exit sensors_w83627hf_exit(void) | |
1997 | { | |
787c72b1 JD |
1998 | platform_device_unregister(pdev); |
1999 | platform_driver_unregister(&w83627hf_driver); | |
1da177e4 LT |
2000 | } |
2001 | ||
2002 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " | |
2003 | "Philip Edelbrock <phil@netroedge.com>, " | |
2004 | "and Mark Studebaker <mdsxyz123@yahoo.com>"); | |
2005 | MODULE_DESCRIPTION("W83627HF driver"); | |
2006 | MODULE_LICENSE("GPL"); | |
2007 | ||
2008 | module_init(sensors_w83627hf_init); | |
2009 | module_exit(sensors_w83627hf_exit); |