Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware | |
3 | monitoring | |
4 | Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>, | |
5 | Philip Edelbrock <phil@netroedge.com>, | |
6 | and Mark Studebaker <mdsxyz123@yahoo.com> | |
7 | Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org> | |
787c72b1 | 8 | Copyright (c) 2007 Jean Delvare <khali@linux-fr.org> |
1da177e4 LT |
9 | |
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | /* | |
26 | Supports following chips: | |
27 | ||
28 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
29 | w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) | |
30 | w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) | |
31 | w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) | |
c2db6ce1 | 32 | w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) |
1da177e4 LT |
33 | w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC) |
34 | ||
35 | For other winbond chips, and for i2c support in the above chips, | |
36 | use w83781d.c. | |
37 | ||
38 | Note: automatic ("cruise") fan control for 697, 637 & 627thf not | |
39 | supported yet. | |
40 | */ | |
41 | ||
42 | #include <linux/module.h> | |
43 | #include <linux/init.h> | |
44 | #include <linux/slab.h> | |
45 | #include <linux/jiffies.h> | |
787c72b1 | 46 | #include <linux/platform_device.h> |
943b0830 | 47 | #include <linux/hwmon.h> |
07584c76 | 48 | #include <linux/hwmon-sysfs.h> |
303760b4 | 49 | #include <linux/hwmon-vid.h> |
943b0830 | 50 | #include <linux/err.h> |
9a61bf63 | 51 | #include <linux/mutex.h> |
d27c37c0 | 52 | #include <linux/ioport.h> |
b9acb64a | 53 | #include <linux/acpi.h> |
1da177e4 LT |
54 | #include <asm/io.h> |
55 | #include "lm75.h" | |
56 | ||
787c72b1 | 57 | static struct platform_device *pdev; |
d27c37c0 JD |
58 | |
59 | #define DRVNAME "w83627hf" | |
60 | enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf }; | |
61 | ||
1da177e4 LT |
62 | static u16 force_addr; |
63 | module_param(force_addr, ushort, 0); | |
64 | MODULE_PARM_DESC(force_addr, | |
65 | "Initialize the base address of the sensors"); | |
66 | static u8 force_i2c = 0x1f; | |
67 | module_param(force_i2c, byte, 0); | |
68 | MODULE_PARM_DESC(force_i2c, | |
69 | "Initialize the i2c address of the sensors"); | |
70 | ||
1da177e4 LT |
71 | static int init = 1; |
72 | module_param(init, bool, 0); | |
73 | MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); | |
74 | ||
67b671bc JD |
75 | static unsigned short force_id; |
76 | module_param(force_id, ushort, 0); | |
77 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
78 | ||
1da177e4 LT |
79 | /* modified from kernel/include/traps.c */ |
80 | static int REG; /* The register to read/write */ | |
81 | #define DEV 0x07 /* Register: Logical device select */ | |
82 | static int VAL; /* The value to read/write */ | |
83 | ||
84 | /* logical device numbers for superio_select (below) */ | |
85 | #define W83627HF_LD_FDC 0x00 | |
86 | #define W83627HF_LD_PRT 0x01 | |
87 | #define W83627HF_LD_UART1 0x02 | |
88 | #define W83627HF_LD_UART2 0x03 | |
89 | #define W83627HF_LD_KBC 0x05 | |
90 | #define W83627HF_LD_CIR 0x06 /* w83627hf only */ | |
91 | #define W83627HF_LD_GAME 0x07 | |
92 | #define W83627HF_LD_MIDI 0x07 | |
93 | #define W83627HF_LD_GPIO1 0x07 | |
94 | #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */ | |
95 | #define W83627HF_LD_GPIO2 0x08 | |
96 | #define W83627HF_LD_GPIO3 0x09 | |
97 | #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */ | |
98 | #define W83627HF_LD_ACPI 0x0a | |
99 | #define W83627HF_LD_HWM 0x0b | |
100 | ||
101 | #define DEVID 0x20 /* Register: Device ID */ | |
102 | ||
103 | #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */ | |
104 | #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */ | |
105 | #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */ | |
106 | ||
c2db6ce1 JD |
107 | #define W83687THF_VID_EN 0x29 /* w83687thf only */ |
108 | #define W83687THF_VID_CFG 0xF0 /* w83687thf only */ | |
109 | #define W83687THF_VID_DATA 0xF1 /* w83687thf only */ | |
110 | ||
1da177e4 LT |
111 | static inline void |
112 | superio_outb(int reg, int val) | |
113 | { | |
114 | outb(reg, REG); | |
115 | outb(val, VAL); | |
116 | } | |
117 | ||
118 | static inline int | |
119 | superio_inb(int reg) | |
120 | { | |
121 | outb(reg, REG); | |
122 | return inb(VAL); | |
123 | } | |
124 | ||
125 | static inline void | |
126 | superio_select(int ld) | |
127 | { | |
128 | outb(DEV, REG); | |
129 | outb(ld, VAL); | |
130 | } | |
131 | ||
132 | static inline void | |
133 | superio_enter(void) | |
134 | { | |
135 | outb(0x87, REG); | |
136 | outb(0x87, REG); | |
137 | } | |
138 | ||
139 | static inline void | |
140 | superio_exit(void) | |
141 | { | |
142 | outb(0xAA, REG); | |
143 | } | |
144 | ||
145 | #define W627_DEVID 0x52 | |
146 | #define W627THF_DEVID 0x82 | |
147 | #define W697_DEVID 0x60 | |
148 | #define W637_DEVID 0x70 | |
c2db6ce1 | 149 | #define W687THF_DEVID 0x85 |
1da177e4 LT |
150 | #define WINB_ACT_REG 0x30 |
151 | #define WINB_BASE_REG 0x60 | |
152 | /* Constants specified below */ | |
153 | ||
ada0c2f8 PV |
154 | /* Alignment of the base address */ |
155 | #define WINB_ALIGNMENT ~7 | |
1da177e4 | 156 | |
ada0c2f8 PV |
157 | /* Offset & size of I/O region we are interested in */ |
158 | #define WINB_REGION_OFFSET 5 | |
159 | #define WINB_REGION_SIZE 2 | |
160 | ||
787c72b1 JD |
161 | /* Where are the sensors address/data registers relative to the region offset */ |
162 | #define W83781D_ADDR_REG_OFFSET 0 | |
163 | #define W83781D_DATA_REG_OFFSET 1 | |
1da177e4 LT |
164 | |
165 | /* The W83781D registers */ | |
166 | /* The W83782D registers for nr=7,8 are in bank 5 */ | |
167 | #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ | |
168 | (0x554 + (((nr) - 7) * 2))) | |
169 | #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
170 | (0x555 + (((nr) - 7) * 2))) | |
171 | #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
172 | (0x550 + (nr) - 7)) | |
173 | ||
2ca2fcd1 JC |
174 | /* nr:0-2 for fans:1-3 */ |
175 | #define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr)) | |
176 | #define W83627HF_REG_FAN(nr) (0x28 + (nr)) | |
1da177e4 | 177 | |
df48ed80 JC |
178 | #define W83627HF_REG_TEMP2_CONFIG 0x152 |
179 | #define W83627HF_REG_TEMP3_CONFIG 0x252 | |
180 | /* these are zero-based, unlike config constants above */ | |
181 | static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 }; | |
182 | static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 }; | |
183 | static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 }; | |
1da177e4 LT |
184 | |
185 | #define W83781D_REG_BANK 0x4E | |
186 | ||
187 | #define W83781D_REG_CONFIG 0x40 | |
4a1c4447 YM |
188 | #define W83781D_REG_ALARM1 0x459 |
189 | #define W83781D_REG_ALARM2 0x45A | |
190 | #define W83781D_REG_ALARM3 0x45B | |
1da177e4 | 191 | |
1da177e4 LT |
192 | #define W83781D_REG_BEEP_CONFIG 0x4D |
193 | #define W83781D_REG_BEEP_INTS1 0x56 | |
194 | #define W83781D_REG_BEEP_INTS2 0x57 | |
195 | #define W83781D_REG_BEEP_INTS3 0x453 | |
196 | ||
197 | #define W83781D_REG_VID_FANDIV 0x47 | |
198 | ||
199 | #define W83781D_REG_CHIPID 0x49 | |
200 | #define W83781D_REG_WCHIPID 0x58 | |
201 | #define W83781D_REG_CHIPMAN 0x4F | |
202 | #define W83781D_REG_PIN 0x4B | |
203 | ||
204 | #define W83781D_REG_VBAT 0x5D | |
205 | ||
206 | #define W83627HF_REG_PWM1 0x5A | |
207 | #define W83627HF_REG_PWM2 0x5B | |
1da177e4 | 208 | |
a95a5ed8 DG |
209 | static const u8 W83627THF_REG_PWM_ENABLE[] = { |
210 | 0x04, /* FAN 1 mode */ | |
211 | 0x04, /* FAN 2 mode */ | |
212 | 0x12, /* FAN AUX mode */ | |
213 | }; | |
214 | static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 }; | |
215 | ||
c2db6ce1 JD |
216 | #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */ |
217 | #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */ | |
218 | #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */ | |
1da177e4 | 219 | |
c2db6ce1 | 220 | #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */ |
1da177e4 LT |
221 | |
222 | static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 }; | |
223 | static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2, | |
224 | W83627THF_REG_PWM3 }; | |
225 | #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \ | |
07584c76 | 226 | regpwm_627hf[nr] : regpwm[nr]) |
1da177e4 | 227 | |
1550cb6d COM |
228 | #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */ |
229 | ||
230 | #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */ | |
231 | #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */ | |
232 | #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */ | |
233 | ||
234 | static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1, | |
235 | W83637HF_REG_PWM_FREQ2, | |
236 | W83637HF_REG_PWM_FREQ3 }; | |
237 | ||
238 | #define W83627HF_BASE_PWM_FREQ 46870 | |
239 | ||
1da177e4 LT |
240 | #define W83781D_REG_I2C_ADDR 0x48 |
241 | #define W83781D_REG_I2C_SUBADDR 0x4A | |
242 | ||
243 | /* Sensor selection */ | |
244 | #define W83781D_REG_SCFG1 0x5D | |
245 | static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; | |
246 | #define W83781D_REG_SCFG2 0x59 | |
247 | static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; | |
248 | #define W83781D_DEFAULT_BETA 3435 | |
249 | ||
250 | /* Conversions. Limit checking is only done on the TO_REG | |
251 | variants. Note that you should be a bit careful with which arguments | |
252 | these macros are called: arguments may be evaluated more than once. | |
253 | Fixing this is just not worth it. */ | |
254 | #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255)) | |
255 | #define IN_FROM_REG(val) ((val) * 16) | |
256 | ||
257 | static inline u8 FAN_TO_REG(long rpm, int div) | |
258 | { | |
259 | if (rpm == 0) | |
260 | return 255; | |
261 | rpm = SENSORS_LIMIT(rpm, 1, 1000000); | |
262 | return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, | |
263 | 254); | |
264 | } | |
265 | ||
266 | #define TEMP_MIN (-128000) | |
267 | #define TEMP_MAX ( 127000) | |
268 | ||
269 | /* TEMP: 0.001C/bit (-128C to +127C) | |
270 | REG: 1C/bit, two's complement */ | |
5bfedac0 | 271 | static u8 TEMP_TO_REG(long temp) |
1da177e4 LT |
272 | { |
273 | int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX); | |
274 | ntemp += (ntemp<0 ? -500 : 500); | |
275 | return (u8)(ntemp / 1000); | |
276 | } | |
277 | ||
278 | static int TEMP_FROM_REG(u8 reg) | |
279 | { | |
280 | return (s8)reg * 1000; | |
281 | } | |
282 | ||
283 | #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div))) | |
284 | ||
285 | #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) | |
286 | ||
1550cb6d COM |
287 | static inline unsigned long pwm_freq_from_reg_627hf(u8 reg) |
288 | { | |
289 | unsigned long freq; | |
290 | freq = W83627HF_BASE_PWM_FREQ >> reg; | |
291 | return freq; | |
292 | } | |
293 | static inline u8 pwm_freq_to_reg_627hf(unsigned long val) | |
294 | { | |
295 | u8 i; | |
296 | /* Only 5 dividers (1 2 4 8 16) | |
297 | Search for the nearest available frequency */ | |
298 | for (i = 0; i < 4; i++) { | |
299 | if (val > (((W83627HF_BASE_PWM_FREQ >> i) + | |
300 | (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2)) | |
301 | break; | |
302 | } | |
303 | return i; | |
304 | } | |
305 | ||
306 | static inline unsigned long pwm_freq_from_reg(u8 reg) | |
307 | { | |
308 | /* Clock bit 8 -> 180 kHz or 24 MHz */ | |
309 | unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL; | |
310 | ||
311 | reg &= 0x7f; | |
312 | /* This should not happen but anyway... */ | |
313 | if (reg == 0) | |
314 | reg++; | |
315 | return (clock / (reg << 8)); | |
316 | } | |
317 | static inline u8 pwm_freq_to_reg(unsigned long val) | |
318 | { | |
319 | /* Minimum divider value is 0x01 and maximum is 0x7F */ | |
320 | if (val >= 93750) /* The highest we can do */ | |
321 | return 0x01; | |
322 | if (val >= 720) /* Use 24 MHz clock */ | |
323 | return (24000000UL / (val << 8)); | |
324 | if (val < 6) /* The lowest we can do */ | |
325 | return 0xFF; | |
326 | else /* Use 180 kHz clock */ | |
327 | return (0x80 | (180000UL / (val << 8))); | |
328 | } | |
329 | ||
1c138107 JD |
330 | #define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff) |
331 | #define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff) | |
1da177e4 LT |
332 | |
333 | #define DIV_FROM_REG(val) (1 << (val)) | |
334 | ||
335 | static inline u8 DIV_TO_REG(long val) | |
336 | { | |
337 | int i; | |
338 | val = SENSORS_LIMIT(val, 1, 128) >> 1; | |
abc01922 | 339 | for (i = 0; i < 7; i++) { |
1da177e4 LT |
340 | if (val == 0) |
341 | break; | |
342 | val >>= 1; | |
343 | } | |
344 | return ((u8) i); | |
345 | } | |
346 | ||
ed6bafbf JD |
347 | /* For each registered chip, we need to keep some data in memory. |
348 | The structure is dynamically allocated. */ | |
1da177e4 | 349 | struct w83627hf_data { |
787c72b1 JD |
350 | unsigned short addr; |
351 | const char *name; | |
1beeffe4 | 352 | struct device *hwmon_dev; |
9a61bf63 | 353 | struct mutex lock; |
1da177e4 LT |
354 | enum chips type; |
355 | ||
9a61bf63 | 356 | struct mutex update_lock; |
1da177e4 LT |
357 | char valid; /* !=0 if following fields are valid */ |
358 | unsigned long last_updated; /* In jiffies */ | |
359 | ||
1da177e4 LT |
360 | u8 in[9]; /* Register value */ |
361 | u8 in_max[9]; /* Register value */ | |
362 | u8 in_min[9]; /* Register value */ | |
363 | u8 fan[3]; /* Register value */ | |
364 | u8 fan_min[3]; /* Register value */ | |
df48ed80 JC |
365 | u16 temp[3]; /* Register value */ |
366 | u16 temp_max[3]; /* Register value */ | |
367 | u16 temp_max_hyst[3]; /* Register value */ | |
1da177e4 LT |
368 | u8 fan_div[3]; /* Register encoding, shifted right */ |
369 | u8 vid; /* Register encoding, combined */ | |
370 | u32 alarms; /* Register encoding, combined */ | |
371 | u32 beep_mask; /* Register encoding, combined */ | |
1da177e4 | 372 | u8 pwm[3]; /* Register value */ |
a95a5ed8 DG |
373 | u8 pwm_enable[3]; /* 1 = manual |
374 | 2 = thermal cruise (also called SmartFan I) | |
375 | 3 = fan speed cruise */ | |
1550cb6d | 376 | u8 pwm_freq[3]; /* Register value */ |
b26f9330 JD |
377 | u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode; |
378 | 4 = thermistor */ | |
1da177e4 | 379 | u8 vrm; |
c2db6ce1 | 380 | u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */ |
1da177e4 LT |
381 | }; |
382 | ||
787c72b1 JD |
383 | struct w83627hf_sio_data { |
384 | enum chips type; | |
385 | }; | |
1da177e4 | 386 | |
1da177e4 | 387 | |
787c72b1 | 388 | static int w83627hf_probe(struct platform_device *pdev); |
d0546128 | 389 | static int __devexit w83627hf_remove(struct platform_device *pdev); |
787c72b1 JD |
390 | |
391 | static int w83627hf_read_value(struct w83627hf_data *data, u16 reg); | |
392 | static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value); | |
c09c5184 | 393 | static void w83627hf_update_fan_div(struct w83627hf_data *data); |
1da177e4 | 394 | static struct w83627hf_data *w83627hf_update_device(struct device *dev); |
787c72b1 | 395 | static void w83627hf_init_device(struct platform_device *pdev); |
1da177e4 | 396 | |
787c72b1 | 397 | static struct platform_driver w83627hf_driver = { |
cdaf7934 | 398 | .driver = { |
87218842 | 399 | .owner = THIS_MODULE, |
d27c37c0 | 400 | .name = DRVNAME, |
cdaf7934 | 401 | }, |
787c72b1 JD |
402 | .probe = w83627hf_probe, |
403 | .remove = __devexit_p(w83627hf_remove), | |
1da177e4 LT |
404 | }; |
405 | ||
07584c76 JC |
406 | static ssize_t |
407 | show_in_input(struct device *dev, struct device_attribute *devattr, char *buf) | |
408 | { | |
409 | int nr = to_sensor_dev_attr(devattr)->index; | |
410 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
411 | return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr])); | |
1da177e4 | 412 | } |
07584c76 JC |
413 | static ssize_t |
414 | show_in_min(struct device *dev, struct device_attribute *devattr, char *buf) | |
415 | { | |
416 | int nr = to_sensor_dev_attr(devattr)->index; | |
417 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
418 | return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr])); | |
419 | } | |
420 | static ssize_t | |
421 | show_in_max(struct device *dev, struct device_attribute *devattr, char *buf) | |
422 | { | |
423 | int nr = to_sensor_dev_attr(devattr)->index; | |
424 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
425 | return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr])); | |
1da177e4 | 426 | } |
07584c76 JC |
427 | static ssize_t |
428 | store_in_min(struct device *dev, struct device_attribute *devattr, | |
429 | const char *buf, size_t count) | |
430 | { | |
431 | int nr = to_sensor_dev_attr(devattr)->index; | |
432 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
433 | long val = simple_strtol(buf, NULL, 10); | |
1da177e4 | 434 | |
07584c76 JC |
435 | mutex_lock(&data->update_lock); |
436 | data->in_min[nr] = IN_TO_REG(val); | |
437 | w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]); | |
438 | mutex_unlock(&data->update_lock); | |
439 | return count; | |
440 | } | |
441 | static ssize_t | |
442 | store_in_max(struct device *dev, struct device_attribute *devattr, | |
443 | const char *buf, size_t count) | |
444 | { | |
445 | int nr = to_sensor_dev_attr(devattr)->index; | |
446 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
447 | long val = simple_strtol(buf, NULL, 10); | |
1da177e4 | 448 | |
07584c76 JC |
449 | mutex_lock(&data->update_lock); |
450 | data->in_max[nr] = IN_TO_REG(val); | |
451 | w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]); | |
452 | mutex_unlock(&data->update_lock); | |
453 | return count; | |
454 | } | |
455 | #define sysfs_vin_decl(offset) \ | |
456 | static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ | |
457 | show_in_input, NULL, offset); \ | |
458 | static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \ | |
459 | show_in_min, store_in_min, offset); \ | |
460 | static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \ | |
461 | show_in_max, store_in_max, offset); | |
462 | ||
463 | sysfs_vin_decl(1); | |
464 | sysfs_vin_decl(2); | |
465 | sysfs_vin_decl(3); | |
466 | sysfs_vin_decl(4); | |
467 | sysfs_vin_decl(5); | |
468 | sysfs_vin_decl(6); | |
469 | sysfs_vin_decl(7); | |
470 | sysfs_vin_decl(8); | |
1da177e4 LT |
471 | |
472 | /* use a different set of functions for in0 */ | |
473 | static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg) | |
474 | { | |
475 | long in0; | |
476 | ||
477 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
478 | (w83627thf == data->type || w83637hf == data->type |
479 | || w83687thf == data->type)) | |
1da177e4 LT |
480 | |
481 | /* use VRM9 calculation */ | |
482 | in0 = (long)((reg * 488 + 70000 + 50) / 100); | |
483 | else | |
484 | /* use VRM8 (standard) calculation */ | |
485 | in0 = (long)IN_FROM_REG(reg); | |
486 | ||
487 | return sprintf(buf,"%ld\n", in0); | |
488 | } | |
489 | ||
a5099cfc | 490 | static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
491 | { |
492 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
493 | return show_in_0(data, buf, data->in[0]); | |
494 | } | |
495 | ||
a5099cfc | 496 | static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
497 | { |
498 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
499 | return show_in_0(data, buf, data->in_min[0]); | |
500 | } | |
501 | ||
a5099cfc | 502 | static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
503 | { |
504 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
505 | return show_in_0(data, buf, data->in_max[0]); | |
506 | } | |
507 | ||
a5099cfc | 508 | static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr, |
1da177e4 LT |
509 | const char *buf, size_t count) |
510 | { | |
787c72b1 | 511 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
512 | u32 val; |
513 | ||
514 | val = simple_strtoul(buf, NULL, 10); | |
515 | ||
9a61bf63 | 516 | mutex_lock(&data->update_lock); |
1da177e4 LT |
517 | |
518 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
519 | (w83627thf == data->type || w83637hf == data->type |
520 | || w83687thf == data->type)) | |
1da177e4 LT |
521 | |
522 | /* use VRM9 calculation */ | |
2723ab91 YM |
523 | data->in_min[0] = |
524 | SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0, | |
525 | 255); | |
1da177e4 LT |
526 | else |
527 | /* use VRM8 (standard) calculation */ | |
528 | data->in_min[0] = IN_TO_REG(val); | |
529 | ||
787c72b1 | 530 | w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]); |
9a61bf63 | 531 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
532 | return count; |
533 | } | |
534 | ||
a5099cfc | 535 | static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr, |
1da177e4 LT |
536 | const char *buf, size_t count) |
537 | { | |
787c72b1 | 538 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
539 | u32 val; |
540 | ||
541 | val = simple_strtoul(buf, NULL, 10); | |
542 | ||
9a61bf63 | 543 | mutex_lock(&data->update_lock); |
1da177e4 LT |
544 | |
545 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
546 | (w83627thf == data->type || w83637hf == data->type |
547 | || w83687thf == data->type)) | |
1da177e4 LT |
548 | |
549 | /* use VRM9 calculation */ | |
2723ab91 YM |
550 | data->in_max[0] = |
551 | SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0, | |
552 | 255); | |
1da177e4 LT |
553 | else |
554 | /* use VRM8 (standard) calculation */ | |
555 | data->in_max[0] = IN_TO_REG(val); | |
556 | ||
787c72b1 | 557 | w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]); |
9a61bf63 | 558 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
559 | return count; |
560 | } | |
561 | ||
562 | static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL); | |
563 | static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR, | |
564 | show_regs_in_min0, store_regs_in_min0); | |
565 | static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR, | |
566 | show_regs_in_max0, store_regs_in_max0); | |
567 | ||
07584c76 JC |
568 | static ssize_t |
569 | show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf) | |
570 | { | |
571 | int nr = to_sensor_dev_attr(devattr)->index; | |
572 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
573 | return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr], | |
574 | (long)DIV_FROM_REG(data->fan_div[nr]))); | |
575 | } | |
576 | static ssize_t | |
577 | show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf) | |
578 | { | |
579 | int nr = to_sensor_dev_attr(devattr)->index; | |
580 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
581 | return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr], | |
582 | (long)DIV_FROM_REG(data->fan_div[nr]))); | |
1da177e4 | 583 | } |
1da177e4 | 584 | static ssize_t |
07584c76 JC |
585 | store_fan_min(struct device *dev, struct device_attribute *devattr, |
586 | const char *buf, size_t count) | |
1da177e4 | 587 | { |
07584c76 | 588 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 589 | struct w83627hf_data *data = dev_get_drvdata(dev); |
07584c76 | 590 | u32 val = simple_strtoul(buf, NULL, 10); |
1da177e4 | 591 | |
9a61bf63 | 592 | mutex_lock(&data->update_lock); |
07584c76 | 593 | data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); |
2ca2fcd1 | 594 | w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), |
07584c76 | 595 | data->fan_min[nr]); |
1da177e4 | 596 | |
9a61bf63 | 597 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
598 | return count; |
599 | } | |
07584c76 JC |
600 | #define sysfs_fan_decl(offset) \ |
601 | static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \ | |
602 | show_fan_input, NULL, offset - 1); \ | |
603 | static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \ | |
604 | show_fan_min, store_fan_min, offset - 1); | |
1da177e4 | 605 | |
07584c76 JC |
606 | sysfs_fan_decl(1); |
607 | sysfs_fan_decl(2); | |
608 | sysfs_fan_decl(3); | |
1da177e4 | 609 | |
07584c76 JC |
610 | static ssize_t |
611 | show_temp(struct device *dev, struct device_attribute *devattr, char *buf) | |
612 | { | |
613 | int nr = to_sensor_dev_attr(devattr)->index; | |
614 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
df48ed80 JC |
615 | |
616 | u16 tmp = data->temp[nr]; | |
617 | return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) | |
618 | : (long) TEMP_FROM_REG(tmp)); | |
1da177e4 | 619 | } |
1da177e4 | 620 | |
07584c76 JC |
621 | static ssize_t |
622 | show_temp_max(struct device *dev, struct device_attribute *devattr, | |
623 | char *buf) | |
624 | { | |
625 | int nr = to_sensor_dev_attr(devattr)->index; | |
626 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
df48ed80 JC |
627 | |
628 | u16 tmp = data->temp_max[nr]; | |
629 | return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) | |
630 | : (long) TEMP_FROM_REG(tmp)); | |
1da177e4 | 631 | } |
1da177e4 | 632 | |
07584c76 JC |
633 | static ssize_t |
634 | show_temp_max_hyst(struct device *dev, struct device_attribute *devattr, | |
635 | char *buf) | |
636 | { | |
637 | int nr = to_sensor_dev_attr(devattr)->index; | |
638 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
df48ed80 JC |
639 | |
640 | u16 tmp = data->temp_max_hyst[nr]; | |
641 | return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) | |
642 | : (long) TEMP_FROM_REG(tmp)); | |
07584c76 | 643 | } |
1da177e4 | 644 | |
07584c76 JC |
645 | static ssize_t |
646 | store_temp_max(struct device *dev, struct device_attribute *devattr, | |
647 | const char *buf, size_t count) | |
648 | { | |
649 | int nr = to_sensor_dev_attr(devattr)->index; | |
650 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
651 | long val = simple_strtol(buf, NULL, 10); | |
df48ed80 | 652 | u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val); |
1da177e4 | 653 | |
07584c76 | 654 | mutex_lock(&data->update_lock); |
df48ed80 JC |
655 | data->temp_max[nr] = tmp; |
656 | w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp); | |
07584c76 JC |
657 | mutex_unlock(&data->update_lock); |
658 | return count; | |
659 | } | |
660 | ||
661 | static ssize_t | |
662 | store_temp_max_hyst(struct device *dev, struct device_attribute *devattr, | |
663 | const char *buf, size_t count) | |
664 | { | |
665 | int nr = to_sensor_dev_attr(devattr)->index; | |
666 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
667 | long val = simple_strtol(buf, NULL, 10); | |
df48ed80 | 668 | u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val); |
07584c76 JC |
669 | |
670 | mutex_lock(&data->update_lock); | |
df48ed80 JC |
671 | data->temp_max_hyst[nr] = tmp; |
672 | w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp); | |
07584c76 JC |
673 | mutex_unlock(&data->update_lock); |
674 | return count; | |
675 | } | |
676 | ||
677 | #define sysfs_temp_decl(offset) \ | |
678 | static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \ | |
df48ed80 | 679 | show_temp, NULL, offset - 1); \ |
07584c76 | 680 | static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \ |
df48ed80 | 681 | show_temp_max, store_temp_max, offset - 1); \ |
07584c76 | 682 | static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \ |
df48ed80 | 683 | show_temp_max_hyst, store_temp_max_hyst, offset - 1); |
07584c76 JC |
684 | |
685 | sysfs_temp_decl(1); | |
686 | sysfs_temp_decl(2); | |
687 | sysfs_temp_decl(3); | |
1da177e4 | 688 | |
1da177e4 | 689 | static ssize_t |
a5099cfc | 690 | show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
691 | { |
692 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
693 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
694 | } | |
695 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
1da177e4 LT |
696 | |
697 | static ssize_t | |
a5099cfc | 698 | show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 | 699 | { |
90d6619a | 700 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
701 | return sprintf(buf, "%ld\n", (long) data->vrm); |
702 | } | |
703 | static ssize_t | |
a5099cfc | 704 | store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) |
1da177e4 | 705 | { |
787c72b1 | 706 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
707 | u32 val; |
708 | ||
709 | val = simple_strtoul(buf, NULL, 10); | |
710 | data->vrm = val; | |
711 | ||
712 | return count; | |
713 | } | |
714 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
1da177e4 LT |
715 | |
716 | static ssize_t | |
a5099cfc | 717 | show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
718 | { |
719 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
720 | return sprintf(buf, "%ld\n", (long) data->alarms); | |
721 | } | |
722 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); | |
1da177e4 | 723 | |
e3604c62 JD |
724 | static ssize_t |
725 | show_alarm(struct device *dev, struct device_attribute *attr, char *buf) | |
726 | { | |
727 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
728 | int bitnr = to_sensor_dev_attr(attr)->index; | |
729 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
730 | } | |
731 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); | |
732 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); | |
733 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); | |
734 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); | |
735 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8); | |
736 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9); | |
737 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10); | |
738 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16); | |
739 | static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17); | |
740 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6); | |
741 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7); | |
742 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11); | |
743 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4); | |
744 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5); | |
745 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13); | |
746 | ||
1c138107 JD |
747 | static ssize_t |
748 | show_beep_mask(struct device *dev, struct device_attribute *attr, char *buf) | |
749 | { | |
750 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
751 | return sprintf(buf, "%ld\n", | |
752 | (long)BEEP_MASK_FROM_REG(data->beep_mask)); | |
1da177e4 | 753 | } |
1da177e4 LT |
754 | |
755 | static ssize_t | |
1c138107 JD |
756 | store_beep_mask(struct device *dev, struct device_attribute *attr, |
757 | const char *buf, size_t count) | |
1da177e4 | 758 | { |
787c72b1 | 759 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1c138107 | 760 | unsigned long val; |
1da177e4 LT |
761 | |
762 | val = simple_strtoul(buf, NULL, 10); | |
763 | ||
9a61bf63 | 764 | mutex_lock(&data->update_lock); |
1da177e4 | 765 | |
1c138107 JD |
766 | /* preserve beep enable */ |
767 | data->beep_mask = (data->beep_mask & 0x8000) | |
768 | | BEEP_MASK_TO_REG(val); | |
769 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, | |
770 | data->beep_mask & 0xff); | |
771 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, | |
772 | ((data->beep_mask) >> 16) & 0xff); | |
787c72b1 | 773 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, |
1c138107 | 774 | (data->beep_mask >> 8) & 0xff); |
1da177e4 | 775 | |
9a61bf63 | 776 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
777 | return count; |
778 | } | |
779 | ||
1c138107 JD |
780 | static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR, |
781 | show_beep_mask, store_beep_mask); | |
1da177e4 | 782 | |
e3604c62 JD |
783 | static ssize_t |
784 | show_beep(struct device *dev, struct device_attribute *attr, char *buf) | |
785 | { | |
786 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
787 | int bitnr = to_sensor_dev_attr(attr)->index; | |
788 | return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); | |
789 | } | |
790 | ||
791 | static ssize_t | |
792 | store_beep(struct device *dev, struct device_attribute *attr, | |
793 | const char *buf, size_t count) | |
794 | { | |
795 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
796 | int bitnr = to_sensor_dev_attr(attr)->index; | |
797 | unsigned long bit; | |
798 | u8 reg; | |
799 | ||
800 | bit = simple_strtoul(buf, NULL, 10); | |
801 | if (bit & ~1) | |
802 | return -EINVAL; | |
803 | ||
804 | mutex_lock(&data->update_lock); | |
805 | if (bit) | |
806 | data->beep_mask |= (1 << bitnr); | |
807 | else | |
808 | data->beep_mask &= ~(1 << bitnr); | |
809 | ||
810 | if (bitnr < 8) { | |
811 | reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1); | |
812 | if (bit) | |
813 | reg |= (1 << bitnr); | |
814 | else | |
815 | reg &= ~(1 << bitnr); | |
816 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg); | |
817 | } else if (bitnr < 16) { | |
818 | reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2); | |
819 | if (bit) | |
820 | reg |= (1 << (bitnr - 8)); | |
821 | else | |
822 | reg &= ~(1 << (bitnr - 8)); | |
823 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg); | |
824 | } else { | |
825 | reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3); | |
826 | if (bit) | |
827 | reg |= (1 << (bitnr - 16)); | |
828 | else | |
829 | reg &= ~(1 << (bitnr - 16)); | |
830 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg); | |
831 | } | |
832 | mutex_unlock(&data->update_lock); | |
833 | ||
834 | return count; | |
835 | } | |
836 | ||
837 | static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, | |
838 | show_beep, store_beep, 0); | |
839 | static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR, | |
840 | show_beep, store_beep, 1); | |
841 | static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR, | |
842 | show_beep, store_beep, 2); | |
843 | static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR, | |
844 | show_beep, store_beep, 3); | |
845 | static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR, | |
846 | show_beep, store_beep, 8); | |
847 | static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR, | |
848 | show_beep, store_beep, 9); | |
849 | static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR, | |
850 | show_beep, store_beep, 10); | |
851 | static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR, | |
852 | show_beep, store_beep, 16); | |
853 | static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR, | |
854 | show_beep, store_beep, 17); | |
855 | static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR, | |
856 | show_beep, store_beep, 6); | |
857 | static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR, | |
858 | show_beep, store_beep, 7); | |
859 | static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR, | |
860 | show_beep, store_beep, 11); | |
861 | static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, | |
862 | show_beep, store_beep, 4); | |
863 | static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR, | |
864 | show_beep, store_beep, 5); | |
865 | static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR, | |
866 | show_beep, store_beep, 13); | |
1c138107 JD |
867 | static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR, |
868 | show_beep, store_beep, 15); | |
e3604c62 | 869 | |
1da177e4 | 870 | static ssize_t |
07584c76 | 871 | show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf) |
1da177e4 | 872 | { |
07584c76 | 873 | int nr = to_sensor_dev_attr(devattr)->index; |
1da177e4 LT |
874 | struct w83627hf_data *data = w83627hf_update_device(dev); |
875 | return sprintf(buf, "%ld\n", | |
07584c76 | 876 | (long) DIV_FROM_REG(data->fan_div[nr])); |
1da177e4 | 877 | } |
1da177e4 LT |
878 | /* Note: we save and restore the fan minimum here, because its value is |
879 | determined in part by the fan divisor. This follows the principle of | |
d6e05edc | 880 | least surprise; the user doesn't expect the fan minimum to change just |
1da177e4 LT |
881 | because the divisor changed. */ |
882 | static ssize_t | |
07584c76 JC |
883 | store_fan_div(struct device *dev, struct device_attribute *devattr, |
884 | const char *buf, size_t count) | |
1da177e4 | 885 | { |
07584c76 | 886 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 887 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
888 | unsigned long min; |
889 | u8 reg; | |
890 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
891 | ||
9a61bf63 | 892 | mutex_lock(&data->update_lock); |
1da177e4 LT |
893 | |
894 | /* Save fan_min */ | |
895 | min = FAN_FROM_REG(data->fan_min[nr], | |
896 | DIV_FROM_REG(data->fan_div[nr])); | |
897 | ||
898 | data->fan_div[nr] = DIV_TO_REG(val); | |
899 | ||
787c72b1 | 900 | reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) |
1da177e4 LT |
901 | & (nr==0 ? 0xcf : 0x3f)) |
902 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); | |
787c72b1 | 903 | w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); |
1da177e4 | 904 | |
787c72b1 | 905 | reg = (w83627hf_read_value(data, W83781D_REG_VBAT) |
1da177e4 LT |
906 | & ~(1 << (5 + nr))) |
907 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | |
787c72b1 | 908 | w83627hf_write_value(data, W83781D_REG_VBAT, reg); |
1da177e4 LT |
909 | |
910 | /* Restore fan_min */ | |
911 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | |
2ca2fcd1 | 912 | w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]); |
1da177e4 | 913 | |
9a61bf63 | 914 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
915 | return count; |
916 | } | |
917 | ||
07584c76 JC |
918 | static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR, |
919 | show_fan_div, store_fan_div, 0); | |
920 | static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR, | |
921 | show_fan_div, store_fan_div, 1); | |
922 | static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR, | |
923 | show_fan_div, store_fan_div, 2); | |
1da177e4 | 924 | |
1da177e4 | 925 | static ssize_t |
07584c76 | 926 | show_pwm(struct device *dev, struct device_attribute *devattr, char *buf) |
1da177e4 | 927 | { |
07584c76 | 928 | int nr = to_sensor_dev_attr(devattr)->index; |
1da177e4 | 929 | struct w83627hf_data *data = w83627hf_update_device(dev); |
07584c76 | 930 | return sprintf(buf, "%ld\n", (long) data->pwm[nr]); |
1da177e4 LT |
931 | } |
932 | ||
933 | static ssize_t | |
07584c76 JC |
934 | store_pwm(struct device *dev, struct device_attribute *devattr, |
935 | const char *buf, size_t count) | |
1da177e4 | 936 | { |
07584c76 | 937 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 938 | struct w83627hf_data *data = dev_get_drvdata(dev); |
07584c76 | 939 | u32 val = simple_strtoul(buf, NULL, 10); |
1da177e4 | 940 | |
9a61bf63 | 941 | mutex_lock(&data->update_lock); |
1da177e4 LT |
942 | |
943 | if (data->type == w83627thf) { | |
944 | /* bits 0-3 are reserved in 627THF */ | |
07584c76 | 945 | data->pwm[nr] = PWM_TO_REG(val) & 0xf0; |
787c72b1 | 946 | w83627hf_write_value(data, |
1da177e4 | 947 | W836X7HF_REG_PWM(data->type, nr), |
07584c76 | 948 | data->pwm[nr] | |
787c72b1 | 949 | (w83627hf_read_value(data, |
1da177e4 LT |
950 | W836X7HF_REG_PWM(data->type, nr)) & 0x0f)); |
951 | } else { | |
07584c76 | 952 | data->pwm[nr] = PWM_TO_REG(val); |
787c72b1 | 953 | w83627hf_write_value(data, |
1da177e4 | 954 | W836X7HF_REG_PWM(data->type, nr), |
07584c76 | 955 | data->pwm[nr]); |
1da177e4 LT |
956 | } |
957 | ||
9a61bf63 | 958 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
959 | return count; |
960 | } | |
961 | ||
07584c76 JC |
962 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0); |
963 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1); | |
964 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2); | |
1da177e4 | 965 | |
a95a5ed8 DG |
966 | static ssize_t |
967 | show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf) | |
968 | { | |
969 | int nr = to_sensor_dev_attr(devattr)->index; | |
970 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
971 | return sprintf(buf, "%d\n", data->pwm_enable[nr]); | |
972 | } | |
973 | ||
974 | static ssize_t | |
975 | store_pwm_enable(struct device *dev, struct device_attribute *devattr, | |
976 | const char *buf, size_t count) | |
977 | { | |
978 | int nr = to_sensor_dev_attr(devattr)->index; | |
979 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
980 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
981 | u8 reg; | |
982 | ||
983 | if (!val || (val > 3)) /* modes 1, 2 and 3 are supported */ | |
984 | return -EINVAL; | |
985 | mutex_lock(&data->update_lock); | |
986 | data->pwm_enable[nr] = val; | |
987 | reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]); | |
988 | reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]); | |
989 | reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr]; | |
990 | w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg); | |
991 | mutex_unlock(&data->update_lock); | |
992 | return count; | |
993 | } | |
994 | ||
995 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable, | |
996 | store_pwm_enable, 0); | |
997 | static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable, | |
998 | store_pwm_enable, 1); | |
999 | static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable, | |
1000 | store_pwm_enable, 2); | |
1001 | ||
1550cb6d | 1002 | static ssize_t |
07584c76 | 1003 | show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf) |
1550cb6d | 1004 | { |
07584c76 | 1005 | int nr = to_sensor_dev_attr(devattr)->index; |
1550cb6d COM |
1006 | struct w83627hf_data *data = w83627hf_update_device(dev); |
1007 | if (data->type == w83627hf) | |
1008 | return sprintf(buf, "%ld\n", | |
07584c76 | 1009 | pwm_freq_from_reg_627hf(data->pwm_freq[nr])); |
1550cb6d COM |
1010 | else |
1011 | return sprintf(buf, "%ld\n", | |
07584c76 | 1012 | pwm_freq_from_reg(data->pwm_freq[nr])); |
1550cb6d COM |
1013 | } |
1014 | ||
1015 | static ssize_t | |
07584c76 JC |
1016 | store_pwm_freq(struct device *dev, struct device_attribute *devattr, |
1017 | const char *buf, size_t count) | |
1550cb6d | 1018 | { |
07584c76 | 1019 | int nr = to_sensor_dev_attr(devattr)->index; |
1550cb6d COM |
1020 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1021 | static const u8 mask[]={0xF8, 0x8F}; | |
1022 | u32 val; | |
1023 | ||
1024 | val = simple_strtoul(buf, NULL, 10); | |
1025 | ||
1026 | mutex_lock(&data->update_lock); | |
1027 | ||
1028 | if (data->type == w83627hf) { | |
07584c76 | 1029 | data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val); |
1550cb6d | 1030 | w83627hf_write_value(data, W83627HF_REG_PWM_FREQ, |
07584c76 | 1031 | (data->pwm_freq[nr] << (nr*4)) | |
1550cb6d | 1032 | (w83627hf_read_value(data, |
07584c76 | 1033 | W83627HF_REG_PWM_FREQ) & mask[nr])); |
1550cb6d | 1034 | } else { |
07584c76 JC |
1035 | data->pwm_freq[nr] = pwm_freq_to_reg(val); |
1036 | w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr], | |
1037 | data->pwm_freq[nr]); | |
1550cb6d COM |
1038 | } |
1039 | ||
1040 | mutex_unlock(&data->update_lock); | |
1041 | return count; | |
1042 | } | |
1043 | ||
07584c76 JC |
1044 | static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR, |
1045 | show_pwm_freq, store_pwm_freq, 0); | |
1046 | static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR, | |
1047 | show_pwm_freq, store_pwm_freq, 1); | |
1048 | static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR, | |
1049 | show_pwm_freq, store_pwm_freq, 2); | |
1550cb6d | 1050 | |
1da177e4 | 1051 | static ssize_t |
07584c76 JC |
1052 | show_temp_type(struct device *dev, struct device_attribute *devattr, |
1053 | char *buf) | |
1da177e4 | 1054 | { |
07584c76 | 1055 | int nr = to_sensor_dev_attr(devattr)->index; |
1da177e4 | 1056 | struct w83627hf_data *data = w83627hf_update_device(dev); |
07584c76 | 1057 | return sprintf(buf, "%ld\n", (long) data->sens[nr]); |
1da177e4 LT |
1058 | } |
1059 | ||
1060 | static ssize_t | |
07584c76 JC |
1061 | store_temp_type(struct device *dev, struct device_attribute *devattr, |
1062 | const char *buf, size_t count) | |
1da177e4 | 1063 | { |
07584c76 | 1064 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 1065 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
1066 | u32 val, tmp; |
1067 | ||
1068 | val = simple_strtoul(buf, NULL, 10); | |
1069 | ||
9a61bf63 | 1070 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1071 | |
1072 | switch (val) { | |
1073 | case 1: /* PII/Celeron diode */ | |
787c72b1 JD |
1074 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1075 | w83627hf_write_value(data, W83781D_REG_SCFG1, | |
07584c76 | 1076 | tmp | BIT_SCFG1[nr]); |
787c72b1 JD |
1077 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG2); |
1078 | w83627hf_write_value(data, W83781D_REG_SCFG2, | |
07584c76 JC |
1079 | tmp | BIT_SCFG2[nr]); |
1080 | data->sens[nr] = val; | |
1da177e4 LT |
1081 | break; |
1082 | case 2: /* 3904 */ | |
787c72b1 JD |
1083 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1084 | w83627hf_write_value(data, W83781D_REG_SCFG1, | |
07584c76 | 1085 | tmp | BIT_SCFG1[nr]); |
787c72b1 JD |
1086 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG2); |
1087 | w83627hf_write_value(data, W83781D_REG_SCFG2, | |
07584c76 JC |
1088 | tmp & ~BIT_SCFG2[nr]); |
1089 | data->sens[nr] = val; | |
1da177e4 | 1090 | break; |
b26f9330 JD |
1091 | case W83781D_DEFAULT_BETA: |
1092 | dev_warn(dev, "Sensor type %d is deprecated, please use 4 " | |
1093 | "instead\n", W83781D_DEFAULT_BETA); | |
1094 | /* fall through */ | |
1095 | case 4: /* thermistor */ | |
787c72b1 JD |
1096 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1097 | w83627hf_write_value(data, W83781D_REG_SCFG1, | |
07584c76 JC |
1098 | tmp & ~BIT_SCFG1[nr]); |
1099 | data->sens[nr] = val; | |
1da177e4 LT |
1100 | break; |
1101 | default: | |
787c72b1 | 1102 | dev_err(dev, |
b26f9330 JD |
1103 | "Invalid sensor type %ld; must be 1, 2, or 4\n", |
1104 | (long) val); | |
1da177e4 LT |
1105 | break; |
1106 | } | |
1107 | ||
9a61bf63 | 1108 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1109 | return count; |
1110 | } | |
1111 | ||
07584c76 JC |
1112 | #define sysfs_temp_type(offset) \ |
1113 | static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \ | |
1114 | show_temp_type, store_temp_type, offset - 1); | |
1da177e4 | 1115 | |
07584c76 JC |
1116 | sysfs_temp_type(1); |
1117 | sysfs_temp_type(2); | |
1118 | sysfs_temp_type(3); | |
1da177e4 | 1119 | |
07584c76 JC |
1120 | static ssize_t |
1121 | show_name(struct device *dev, struct device_attribute *devattr, char *buf) | |
787c72b1 JD |
1122 | { |
1123 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
1124 | ||
1125 | return sprintf(buf, "%s\n", data->name); | |
1126 | } | |
1127 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
1128 | ||
1129 | static int __init w83627hf_find(int sioaddr, unsigned short *addr, | |
1130 | struct w83627hf_sio_data *sio_data) | |
1da177e4 | 1131 | { |
d27c37c0 | 1132 | int err = -ENODEV; |
1da177e4 LT |
1133 | u16 val; |
1134 | ||
787c72b1 JD |
1135 | static const __initdata char *names[] = { |
1136 | "W83627HF", | |
1137 | "W83627THF", | |
1138 | "W83697HF", | |
1139 | "W83637HF", | |
1140 | "W83687THF", | |
1141 | }; | |
1142 | ||
1da177e4 LT |
1143 | REG = sioaddr; |
1144 | VAL = sioaddr + 1; | |
1145 | ||
1146 | superio_enter(); | |
67b671bc | 1147 | val = force_id ? force_id : superio_inb(DEVID); |
787c72b1 JD |
1148 | switch (val) { |
1149 | case W627_DEVID: | |
1150 | sio_data->type = w83627hf; | |
1151 | break; | |
1152 | case W627THF_DEVID: | |
1153 | sio_data->type = w83627thf; | |
1154 | break; | |
1155 | case W697_DEVID: | |
1156 | sio_data->type = w83697hf; | |
1157 | break; | |
1158 | case W637_DEVID: | |
1159 | sio_data->type = w83637hf; | |
1160 | break; | |
1161 | case W687THF_DEVID: | |
1162 | sio_data->type = w83687thf; | |
1163 | break; | |
e142e2a3 JD |
1164 | case 0xff: /* No device at all */ |
1165 | goto exit; | |
787c72b1 | 1166 | default: |
e142e2a3 | 1167 | pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val); |
d27c37c0 | 1168 | goto exit; |
1da177e4 LT |
1169 | } |
1170 | ||
1171 | superio_select(W83627HF_LD_HWM); | |
d27c37c0 JD |
1172 | force_addr &= WINB_ALIGNMENT; |
1173 | if (force_addr) { | |
1174 | printk(KERN_WARNING DRVNAME ": Forcing address 0x%x\n", | |
1175 | force_addr); | |
1176 | superio_outb(WINB_BASE_REG, force_addr >> 8); | |
1177 | superio_outb(WINB_BASE_REG + 1, force_addr & 0xff); | |
1178 | } | |
1da177e4 LT |
1179 | val = (superio_inb(WINB_BASE_REG) << 8) | |
1180 | superio_inb(WINB_BASE_REG + 1); | |
ada0c2f8 | 1181 | *addr = val & WINB_ALIGNMENT; |
d27c37c0 JD |
1182 | if (*addr == 0) { |
1183 | printk(KERN_WARNING DRVNAME ": Base address not set, " | |
1184 | "skipping\n"); | |
1185 | goto exit; | |
1da177e4 | 1186 | } |
1da177e4 | 1187 | |
d27c37c0 JD |
1188 | val = superio_inb(WINB_ACT_REG); |
1189 | if (!(val & 0x01)) { | |
1190 | printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n"); | |
1191 | superio_outb(WINB_ACT_REG, val | 0x01); | |
1192 | } | |
1193 | ||
1194 | err = 0; | |
787c72b1 JD |
1195 | pr_info(DRVNAME ": Found %s chip at %#x\n", |
1196 | names[sio_data->type], *addr); | |
d27c37c0 JD |
1197 | |
1198 | exit: | |
1da177e4 | 1199 | superio_exit(); |
d27c37c0 | 1200 | return err; |
1da177e4 LT |
1201 | } |
1202 | ||
07584c76 JC |
1203 | #define VIN_UNIT_ATTRS(_X_) \ |
1204 | &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \ | |
1205 | &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \ | |
e3604c62 JD |
1206 | &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \ |
1207 | &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \ | |
1208 | &sensor_dev_attr_in##_X_##_beep.dev_attr.attr | |
07584c76 JC |
1209 | |
1210 | #define FAN_UNIT_ATTRS(_X_) \ | |
1211 | &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \ | |
1212 | &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \ | |
e3604c62 JD |
1213 | &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \ |
1214 | &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \ | |
1215 | &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr | |
07584c76 JC |
1216 | |
1217 | #define TEMP_UNIT_ATTRS(_X_) \ | |
1218 | &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \ | |
1219 | &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \ | |
1220 | &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \ | |
e3604c62 JD |
1221 | &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \ |
1222 | &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \ | |
1223 | &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr | |
07584c76 | 1224 | |
c1685f61 MH |
1225 | static struct attribute *w83627hf_attributes[] = { |
1226 | &dev_attr_in0_input.attr, | |
1227 | &dev_attr_in0_min.attr, | |
1228 | &dev_attr_in0_max.attr, | |
e3604c62 JD |
1229 | &sensor_dev_attr_in0_alarm.dev_attr.attr, |
1230 | &sensor_dev_attr_in0_beep.dev_attr.attr, | |
07584c76 JC |
1231 | VIN_UNIT_ATTRS(2), |
1232 | VIN_UNIT_ATTRS(3), | |
1233 | VIN_UNIT_ATTRS(4), | |
1234 | VIN_UNIT_ATTRS(7), | |
1235 | VIN_UNIT_ATTRS(8), | |
1236 | ||
1237 | FAN_UNIT_ATTRS(1), | |
1238 | FAN_UNIT_ATTRS(2), | |
1239 | ||
1240 | TEMP_UNIT_ATTRS(1), | |
1241 | TEMP_UNIT_ATTRS(2), | |
c1685f61 MH |
1242 | |
1243 | &dev_attr_alarms.attr, | |
1c138107 | 1244 | &sensor_dev_attr_beep_enable.dev_attr.attr, |
c1685f61 MH |
1245 | &dev_attr_beep_mask.attr, |
1246 | ||
07584c76 JC |
1247 | &sensor_dev_attr_pwm1.dev_attr.attr, |
1248 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
787c72b1 | 1249 | &dev_attr_name.attr, |
c1685f61 MH |
1250 | NULL |
1251 | }; | |
1252 | ||
1253 | static const struct attribute_group w83627hf_group = { | |
1254 | .attrs = w83627hf_attributes, | |
1255 | }; | |
1256 | ||
1257 | static struct attribute *w83627hf_attributes_opt[] = { | |
07584c76 JC |
1258 | VIN_UNIT_ATTRS(1), |
1259 | VIN_UNIT_ATTRS(5), | |
1260 | VIN_UNIT_ATTRS(6), | |
1261 | ||
1262 | FAN_UNIT_ATTRS(3), | |
1263 | TEMP_UNIT_ATTRS(3), | |
1264 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1265 | ||
1266 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | |
1267 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, | |
1268 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, | |
a95a5ed8 DG |
1269 | |
1270 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | |
1271 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1272 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1273 | ||
c1685f61 MH |
1274 | NULL |
1275 | }; | |
1276 | ||
1277 | static const struct attribute_group w83627hf_group_opt = { | |
1278 | .attrs = w83627hf_attributes_opt, | |
1279 | }; | |
1280 | ||
787c72b1 | 1281 | static int __devinit w83627hf_probe(struct platform_device *pdev) |
1da177e4 | 1282 | { |
787c72b1 JD |
1283 | struct device *dev = &pdev->dev; |
1284 | struct w83627hf_sio_data *sio_data = dev->platform_data; | |
1da177e4 | 1285 | struct w83627hf_data *data; |
787c72b1 | 1286 | struct resource *res; |
2ca2fcd1 | 1287 | int err, i; |
1da177e4 | 1288 | |
787c72b1 JD |
1289 | static const char *names[] = { |
1290 | "w83627hf", | |
1291 | "w83627thf", | |
1292 | "w83697hf", | |
1293 | "w83637hf", | |
1294 | "w83687thf", | |
1295 | }; | |
1296 | ||
1297 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
1298 | if (!request_region(res->start, WINB_REGION_SIZE, DRVNAME)) { | |
1299 | dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", | |
1300 | (unsigned long)res->start, | |
1301 | (unsigned long)(res->start + WINB_REGION_SIZE - 1)); | |
1da177e4 LT |
1302 | err = -EBUSY; |
1303 | goto ERROR0; | |
1304 | } | |
1305 | ||
ba9c2e8d | 1306 | if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) { |
1da177e4 LT |
1307 | err = -ENOMEM; |
1308 | goto ERROR1; | |
1309 | } | |
787c72b1 JD |
1310 | data->addr = res->start; |
1311 | data->type = sio_data->type; | |
1312 | data->name = names[sio_data->type]; | |
9a61bf63 | 1313 | mutex_init(&data->lock); |
9a61bf63 | 1314 | mutex_init(&data->update_lock); |
787c72b1 | 1315 | platform_set_drvdata(pdev, data); |
1da177e4 | 1316 | |
1da177e4 | 1317 | /* Initialize the chip */ |
787c72b1 | 1318 | w83627hf_init_device(pdev); |
1da177e4 LT |
1319 | |
1320 | /* A few vars need to be filled upon startup */ | |
2ca2fcd1 JC |
1321 | for (i = 0; i <= 2; i++) |
1322 | data->fan_min[i] = w83627hf_read_value( | |
1323 | data, W83627HF_REG_FAN_MIN(i)); | |
c09c5184 | 1324 | w83627hf_update_fan_div(data); |
1da177e4 | 1325 | |
c1685f61 | 1326 | /* Register common device attributes */ |
787c72b1 | 1327 | if ((err = sysfs_create_group(&dev->kobj, &w83627hf_group))) |
943b0830 | 1328 | goto ERROR3; |
1da177e4 | 1329 | |
c1685f61 | 1330 | /* Register chip-specific device attributes */ |
787c72b1 | 1331 | if (data->type == w83627hf || data->type == w83697hf) |
07584c76 JC |
1332 | if ((err = device_create_file(dev, |
1333 | &sensor_dev_attr_in5_input.dev_attr)) | |
1334 | || (err = device_create_file(dev, | |
1335 | &sensor_dev_attr_in5_min.dev_attr)) | |
1336 | || (err = device_create_file(dev, | |
1337 | &sensor_dev_attr_in5_max.dev_attr)) | |
e3604c62 JD |
1338 | || (err = device_create_file(dev, |
1339 | &sensor_dev_attr_in5_alarm.dev_attr)) | |
1340 | || (err = device_create_file(dev, | |
1341 | &sensor_dev_attr_in5_beep.dev_attr)) | |
07584c76 JC |
1342 | || (err = device_create_file(dev, |
1343 | &sensor_dev_attr_in6_input.dev_attr)) | |
1344 | || (err = device_create_file(dev, | |
1345 | &sensor_dev_attr_in6_min.dev_attr)) | |
1346 | || (err = device_create_file(dev, | |
1347 | &sensor_dev_attr_in6_max.dev_attr)) | |
e3604c62 JD |
1348 | || (err = device_create_file(dev, |
1349 | &sensor_dev_attr_in6_alarm.dev_attr)) | |
1350 | || (err = device_create_file(dev, | |
1351 | &sensor_dev_attr_in6_beep.dev_attr)) | |
07584c76 JC |
1352 | || (err = device_create_file(dev, |
1353 | &sensor_dev_attr_pwm1_freq.dev_attr)) | |
1354 | || (err = device_create_file(dev, | |
1355 | &sensor_dev_attr_pwm2_freq.dev_attr))) | |
c1685f61 | 1356 | goto ERROR4; |
1da177e4 | 1357 | |
787c72b1 | 1358 | if (data->type != w83697hf) |
07584c76 JC |
1359 | if ((err = device_create_file(dev, |
1360 | &sensor_dev_attr_in1_input.dev_attr)) | |
1361 | || (err = device_create_file(dev, | |
1362 | &sensor_dev_attr_in1_min.dev_attr)) | |
1363 | || (err = device_create_file(dev, | |
1364 | &sensor_dev_attr_in1_max.dev_attr)) | |
e3604c62 JD |
1365 | || (err = device_create_file(dev, |
1366 | &sensor_dev_attr_in1_alarm.dev_attr)) | |
1367 | || (err = device_create_file(dev, | |
1368 | &sensor_dev_attr_in1_beep.dev_attr)) | |
07584c76 JC |
1369 | || (err = device_create_file(dev, |
1370 | &sensor_dev_attr_fan3_input.dev_attr)) | |
1371 | || (err = device_create_file(dev, | |
1372 | &sensor_dev_attr_fan3_min.dev_attr)) | |
1373 | || (err = device_create_file(dev, | |
1374 | &sensor_dev_attr_fan3_div.dev_attr)) | |
e3604c62 JD |
1375 | || (err = device_create_file(dev, |
1376 | &sensor_dev_attr_fan3_alarm.dev_attr)) | |
1377 | || (err = device_create_file(dev, | |
1378 | &sensor_dev_attr_fan3_beep.dev_attr)) | |
07584c76 JC |
1379 | || (err = device_create_file(dev, |
1380 | &sensor_dev_attr_temp3_input.dev_attr)) | |
1381 | || (err = device_create_file(dev, | |
1382 | &sensor_dev_attr_temp3_max.dev_attr)) | |
1383 | || (err = device_create_file(dev, | |
1384 | &sensor_dev_attr_temp3_max_hyst.dev_attr)) | |
e3604c62 JD |
1385 | || (err = device_create_file(dev, |
1386 | &sensor_dev_attr_temp3_alarm.dev_attr)) | |
1387 | || (err = device_create_file(dev, | |
1388 | &sensor_dev_attr_temp3_beep.dev_attr)) | |
07584c76 JC |
1389 | || (err = device_create_file(dev, |
1390 | &sensor_dev_attr_temp3_type.dev_attr))) | |
c1685f61 MH |
1391 | goto ERROR4; |
1392 | ||
787c72b1 | 1393 | if (data->type != w83697hf && data->vid != 0xff) { |
8a665a05 JD |
1394 | /* Convert VID to voltage based on VRM */ |
1395 | data->vrm = vid_which_vrm(); | |
1396 | ||
787c72b1 JD |
1397 | if ((err = device_create_file(dev, &dev_attr_cpu0_vid)) |
1398 | || (err = device_create_file(dev, &dev_attr_vrm))) | |
c1685f61 | 1399 | goto ERROR4; |
8a665a05 | 1400 | } |
1da177e4 | 1401 | |
787c72b1 JD |
1402 | if (data->type == w83627thf || data->type == w83637hf |
1403 | || data->type == w83687thf) | |
07584c76 JC |
1404 | if ((err = device_create_file(dev, |
1405 | &sensor_dev_attr_pwm3.dev_attr))) | |
c1685f61 | 1406 | goto ERROR4; |
1da177e4 | 1407 | |
1550cb6d | 1408 | if (data->type == w83637hf || data->type == w83687thf) |
07584c76 JC |
1409 | if ((err = device_create_file(dev, |
1410 | &sensor_dev_attr_pwm1_freq.dev_attr)) | |
1411 | || (err = device_create_file(dev, | |
1412 | &sensor_dev_attr_pwm2_freq.dev_attr)) | |
1413 | || (err = device_create_file(dev, | |
1414 | &sensor_dev_attr_pwm3_freq.dev_attr))) | |
1550cb6d COM |
1415 | goto ERROR4; |
1416 | ||
a95a5ed8 DG |
1417 | if (data->type != w83627hf) |
1418 | if ((err = device_create_file(dev, | |
1419 | &sensor_dev_attr_pwm1_enable.dev_attr)) | |
1420 | || (err = device_create_file(dev, | |
1421 | &sensor_dev_attr_pwm2_enable.dev_attr))) | |
1422 | goto ERROR4; | |
1423 | ||
1424 | if (data->type == w83627thf || data->type == w83637hf | |
1425 | || data->type == w83687thf) | |
1426 | if ((err = device_create_file(dev, | |
1427 | &sensor_dev_attr_pwm3_enable.dev_attr))) | |
1428 | goto ERROR4; | |
1429 | ||
1beeffe4 TJ |
1430 | data->hwmon_dev = hwmon_device_register(dev); |
1431 | if (IS_ERR(data->hwmon_dev)) { | |
1432 | err = PTR_ERR(data->hwmon_dev); | |
c1685f61 MH |
1433 | goto ERROR4; |
1434 | } | |
1da177e4 LT |
1435 | |
1436 | return 0; | |
1437 | ||
c1685f61 | 1438 | ERROR4: |
787c72b1 JD |
1439 | sysfs_remove_group(&dev->kobj, &w83627hf_group); |
1440 | sysfs_remove_group(&dev->kobj, &w83627hf_group_opt); | |
943b0830 | 1441 | ERROR3: |
04a6217d | 1442 | platform_set_drvdata(pdev, NULL); |
1da177e4 LT |
1443 | kfree(data); |
1444 | ERROR1: | |
787c72b1 | 1445 | release_region(res->start, WINB_REGION_SIZE); |
1da177e4 LT |
1446 | ERROR0: |
1447 | return err; | |
1448 | } | |
1449 | ||
787c72b1 | 1450 | static int __devexit w83627hf_remove(struct platform_device *pdev) |
1da177e4 | 1451 | { |
787c72b1 JD |
1452 | struct w83627hf_data *data = platform_get_drvdata(pdev); |
1453 | struct resource *res; | |
1da177e4 | 1454 | |
1beeffe4 | 1455 | hwmon_device_unregister(data->hwmon_dev); |
943b0830 | 1456 | |
787c72b1 JD |
1457 | sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group); |
1458 | sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt); | |
04a6217d | 1459 | platform_set_drvdata(pdev, NULL); |
943b0830 | 1460 | kfree(data); |
1da177e4 | 1461 | |
787c72b1 JD |
1462 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
1463 | release_region(res->start, WINB_REGION_SIZE); | |
1464 | ||
1da177e4 LT |
1465 | return 0; |
1466 | } | |
1467 | ||
1468 | ||
d58df9cd JD |
1469 | /* Registers 0x50-0x5f are banked */ |
1470 | static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg) | |
1471 | { | |
1472 | if ((reg & 0x00f0) == 0x50) { | |
1473 | outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET); | |
1474 | outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET); | |
1475 | } | |
1476 | } | |
1477 | ||
1478 | /* Not strictly necessary, but play it safe for now */ | |
1479 | static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg) | |
1480 | { | |
1481 | if (reg & 0xff00) { | |
1482 | outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET); | |
1483 | outb_p(0, data->addr + W83781D_DATA_REG_OFFSET); | |
1484 | } | |
1485 | } | |
1486 | ||
787c72b1 | 1487 | static int w83627hf_read_value(struct w83627hf_data *data, u16 reg) |
1da177e4 | 1488 | { |
1da177e4 LT |
1489 | int res, word_sized; |
1490 | ||
9a61bf63 | 1491 | mutex_lock(&data->lock); |
1da177e4 LT |
1492 | word_sized = (((reg & 0xff00) == 0x100) |
1493 | || ((reg & 0xff00) == 0x200)) | |
1494 | && (((reg & 0x00ff) == 0x50) | |
1495 | || ((reg & 0x00ff) == 0x53) | |
1496 | || ((reg & 0x00ff) == 0x55)); | |
d58df9cd | 1497 | w83627hf_set_bank(data, reg); |
787c72b1 JD |
1498 | outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET); |
1499 | res = inb_p(data->addr + W83781D_DATA_REG_OFFSET); | |
1da177e4 LT |
1500 | if (word_sized) { |
1501 | outb_p((reg & 0xff) + 1, | |
787c72b1 | 1502 | data->addr + W83781D_ADDR_REG_OFFSET); |
1da177e4 | 1503 | res = |
787c72b1 | 1504 | (res << 8) + inb_p(data->addr + |
1da177e4 LT |
1505 | W83781D_DATA_REG_OFFSET); |
1506 | } | |
d58df9cd | 1507 | w83627hf_reset_bank(data, reg); |
9a61bf63 | 1508 | mutex_unlock(&data->lock); |
1da177e4 LT |
1509 | return res; |
1510 | } | |
1511 | ||
787c72b1 | 1512 | static int __devinit w83627thf_read_gpio5(struct platform_device *pdev) |
1da177e4 LT |
1513 | { |
1514 | int res = 0xff, sel; | |
1515 | ||
1516 | superio_enter(); | |
1517 | superio_select(W83627HF_LD_GPIO5); | |
1518 | ||
1519 | /* Make sure these GPIO pins are enabled */ | |
1520 | if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) { | |
787c72b1 | 1521 | dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n"); |
1da177e4 LT |
1522 | goto exit; |
1523 | } | |
1524 | ||
1525 | /* Make sure the pins are configured for input | |
1526 | There must be at least five (VRM 9), and possibly 6 (VRM 10) */ | |
dd149c52 | 1527 | sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f; |
1da177e4 | 1528 | if ((sel & 0x1f) != 0x1f) { |
787c72b1 | 1529 | dev_dbg(&pdev->dev, "GPIO5 not configured for VID " |
1da177e4 LT |
1530 | "function\n"); |
1531 | goto exit; | |
1532 | } | |
1533 | ||
787c72b1 | 1534 | dev_info(&pdev->dev, "Reading VID from GPIO5\n"); |
1da177e4 LT |
1535 | res = superio_inb(W83627THF_GPIO5_DR) & sel; |
1536 | ||
1537 | exit: | |
1538 | superio_exit(); | |
1539 | return res; | |
1540 | } | |
1541 | ||
787c72b1 | 1542 | static int __devinit w83687thf_read_vid(struct platform_device *pdev) |
c2db6ce1 JD |
1543 | { |
1544 | int res = 0xff; | |
1545 | ||
1546 | superio_enter(); | |
1547 | superio_select(W83627HF_LD_HWM); | |
1548 | ||
1549 | /* Make sure these GPIO pins are enabled */ | |
1550 | if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) { | |
787c72b1 | 1551 | dev_dbg(&pdev->dev, "VID disabled, no VID function\n"); |
c2db6ce1 JD |
1552 | goto exit; |
1553 | } | |
1554 | ||
1555 | /* Make sure the pins are configured for input */ | |
1556 | if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) { | |
787c72b1 | 1557 | dev_dbg(&pdev->dev, "VID configured as output, " |
c2db6ce1 JD |
1558 | "no VID function\n"); |
1559 | goto exit; | |
1560 | } | |
1561 | ||
1562 | res = superio_inb(W83687THF_VID_DATA) & 0x3f; | |
1563 | ||
1564 | exit: | |
1565 | superio_exit(); | |
1566 | return res; | |
1567 | } | |
1568 | ||
787c72b1 | 1569 | static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value) |
1da177e4 | 1570 | { |
1da177e4 LT |
1571 | int word_sized; |
1572 | ||
9a61bf63 | 1573 | mutex_lock(&data->lock); |
1da177e4 LT |
1574 | word_sized = (((reg & 0xff00) == 0x100) |
1575 | || ((reg & 0xff00) == 0x200)) | |
1576 | && (((reg & 0x00ff) == 0x53) | |
1577 | || ((reg & 0x00ff) == 0x55)); | |
d58df9cd | 1578 | w83627hf_set_bank(data, reg); |
787c72b1 | 1579 | outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET); |
1da177e4 LT |
1580 | if (word_sized) { |
1581 | outb_p(value >> 8, | |
787c72b1 | 1582 | data->addr + W83781D_DATA_REG_OFFSET); |
1da177e4 | 1583 | outb_p((reg & 0xff) + 1, |
787c72b1 | 1584 | data->addr + W83781D_ADDR_REG_OFFSET); |
1da177e4 LT |
1585 | } |
1586 | outb_p(value & 0xff, | |
787c72b1 | 1587 | data->addr + W83781D_DATA_REG_OFFSET); |
d58df9cd | 1588 | w83627hf_reset_bank(data, reg); |
9a61bf63 | 1589 | mutex_unlock(&data->lock); |
1da177e4 LT |
1590 | return 0; |
1591 | } | |
1592 | ||
787c72b1 | 1593 | static void __devinit w83627hf_init_device(struct platform_device *pdev) |
1da177e4 | 1594 | { |
787c72b1 | 1595 | struct w83627hf_data *data = platform_get_drvdata(pdev); |
1da177e4 | 1596 | int i; |
d27c37c0 | 1597 | enum chips type = data->type; |
1da177e4 LT |
1598 | u8 tmp; |
1599 | ||
1da177e4 LT |
1600 | /* Minimize conflicts with other winbond i2c-only clients... */ |
1601 | /* disable i2c subclients... how to disable main i2c client?? */ | |
1602 | /* force i2c address to relatively uncommon address */ | |
787c72b1 JD |
1603 | w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89); |
1604 | w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c); | |
1da177e4 LT |
1605 | |
1606 | /* Read VID only once */ | |
d27c37c0 | 1607 | if (type == w83627hf || type == w83637hf) { |
787c72b1 JD |
1608 | int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV); |
1609 | int hi = w83627hf_read_value(data, W83781D_REG_CHIPID); | |
1da177e4 | 1610 | data->vid = (lo & 0x0f) | ((hi & 0x01) << 4); |
d27c37c0 | 1611 | } else if (type == w83627thf) { |
787c72b1 | 1612 | data->vid = w83627thf_read_gpio5(pdev); |
d27c37c0 | 1613 | } else if (type == w83687thf) { |
787c72b1 | 1614 | data->vid = w83687thf_read_vid(pdev); |
1da177e4 LT |
1615 | } |
1616 | ||
1617 | /* Read VRM & OVT Config only once */ | |
d27c37c0 | 1618 | if (type == w83627thf || type == w83637hf || type == w83687thf) { |
1da177e4 | 1619 | data->vrm_ovt = |
787c72b1 | 1620 | w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG); |
1da177e4 LT |
1621 | } |
1622 | ||
787c72b1 | 1623 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1da177e4 LT |
1624 | for (i = 1; i <= 3; i++) { |
1625 | if (!(tmp & BIT_SCFG1[i - 1])) { | |
b26f9330 | 1626 | data->sens[i - 1] = 4; |
1da177e4 LT |
1627 | } else { |
1628 | if (w83627hf_read_value | |
787c72b1 | 1629 | (data, |
1da177e4 LT |
1630 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) |
1631 | data->sens[i - 1] = 1; | |
1632 | else | |
1633 | data->sens[i - 1] = 2; | |
1634 | } | |
1635 | if ((type == w83697hf) && (i == 2)) | |
1636 | break; | |
1637 | } | |
1638 | ||
1639 | if(init) { | |
1640 | /* Enable temp2 */ | |
df48ed80 | 1641 | tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG); |
1da177e4 | 1642 | if (tmp & 0x01) { |
787c72b1 | 1643 | dev_warn(&pdev->dev, "Enabling temp2, readings " |
1da177e4 | 1644 | "might not make sense\n"); |
df48ed80 | 1645 | w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG, |
1da177e4 LT |
1646 | tmp & 0xfe); |
1647 | } | |
1648 | ||
1649 | /* Enable temp3 */ | |
1650 | if (type != w83697hf) { | |
787c72b1 | 1651 | tmp = w83627hf_read_value(data, |
df48ed80 | 1652 | W83627HF_REG_TEMP3_CONFIG); |
1da177e4 | 1653 | if (tmp & 0x01) { |
787c72b1 | 1654 | dev_warn(&pdev->dev, "Enabling temp3, " |
1da177e4 | 1655 | "readings might not make sense\n"); |
787c72b1 | 1656 | w83627hf_write_value(data, |
df48ed80 | 1657 | W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe); |
1da177e4 LT |
1658 | } |
1659 | } | |
1da177e4 LT |
1660 | } |
1661 | ||
1662 | /* Start monitoring */ | |
787c72b1 JD |
1663 | w83627hf_write_value(data, W83781D_REG_CONFIG, |
1664 | (w83627hf_read_value(data, | |
1da177e4 LT |
1665 | W83781D_REG_CONFIG) & 0xf7) |
1666 | | 0x01); | |
ef878b11 JD |
1667 | |
1668 | /* Enable VBAT monitoring if needed */ | |
1669 | tmp = w83627hf_read_value(data, W83781D_REG_VBAT); | |
1670 | if (!(tmp & 0x01)) | |
1671 | w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01); | |
1da177e4 LT |
1672 | } |
1673 | ||
c09c5184 JD |
1674 | static void w83627hf_update_fan_div(struct w83627hf_data *data) |
1675 | { | |
1676 | int reg; | |
1677 | ||
1678 | reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV); | |
1679 | data->fan_div[0] = (reg >> 4) & 0x03; | |
1680 | data->fan_div[1] = (reg >> 6) & 0x03; | |
1681 | if (data->type != w83697hf) { | |
1682 | data->fan_div[2] = (w83627hf_read_value(data, | |
1683 | W83781D_REG_PIN) >> 6) & 0x03; | |
1684 | } | |
1685 | reg = w83627hf_read_value(data, W83781D_REG_VBAT); | |
1686 | data->fan_div[0] |= (reg >> 3) & 0x04; | |
1687 | data->fan_div[1] |= (reg >> 4) & 0x04; | |
1688 | if (data->type != w83697hf) | |
1689 | data->fan_div[2] |= (reg >> 5) & 0x04; | |
1690 | } | |
1691 | ||
1da177e4 LT |
1692 | static struct w83627hf_data *w83627hf_update_device(struct device *dev) |
1693 | { | |
787c72b1 | 1694 | struct w83627hf_data *data = dev_get_drvdata(dev); |
df48ed80 | 1695 | int i, num_temps = (data->type == w83697hf) ? 2 : 3; |
a95a5ed8 | 1696 | int num_pwms = (data->type == w83697hf) ? 2 : 3; |
1da177e4 | 1697 | |
9a61bf63 | 1698 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1699 | |
1700 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
1701 | || !data->valid) { | |
1702 | for (i = 0; i <= 8; i++) { | |
1703 | /* skip missing sensors */ | |
1704 | if (((data->type == w83697hf) && (i == 1)) || | |
c2db6ce1 | 1705 | ((data->type != w83627hf && data->type != w83697hf) |
4a1c4447 | 1706 | && (i == 5 || i == 6))) |
1da177e4 LT |
1707 | continue; |
1708 | data->in[i] = | |
787c72b1 | 1709 | w83627hf_read_value(data, W83781D_REG_IN(i)); |
1da177e4 | 1710 | data->in_min[i] = |
787c72b1 | 1711 | w83627hf_read_value(data, |
1da177e4 LT |
1712 | W83781D_REG_IN_MIN(i)); |
1713 | data->in_max[i] = | |
787c72b1 | 1714 | w83627hf_read_value(data, |
1da177e4 LT |
1715 | W83781D_REG_IN_MAX(i)); |
1716 | } | |
2ca2fcd1 JC |
1717 | for (i = 0; i <= 2; i++) { |
1718 | data->fan[i] = | |
1719 | w83627hf_read_value(data, W83627HF_REG_FAN(i)); | |
1720 | data->fan_min[i] = | |
787c72b1 | 1721 | w83627hf_read_value(data, |
2ca2fcd1 | 1722 | W83627HF_REG_FAN_MIN(i)); |
1da177e4 | 1723 | } |
07584c76 | 1724 | for (i = 0; i <= 2; i++) { |
787c72b1 | 1725 | u8 tmp = w83627hf_read_value(data, |
1da177e4 LT |
1726 | W836X7HF_REG_PWM(data->type, i)); |
1727 | /* bits 0-3 are reserved in 627THF */ | |
1728 | if (data->type == w83627thf) | |
1729 | tmp &= 0xf0; | |
07584c76 JC |
1730 | data->pwm[i] = tmp; |
1731 | if (i == 1 && | |
1732 | (data->type == w83627hf || data->type == w83697hf)) | |
1da177e4 LT |
1733 | break; |
1734 | } | |
1550cb6d COM |
1735 | if (data->type == w83627hf) { |
1736 | u8 tmp = w83627hf_read_value(data, | |
1737 | W83627HF_REG_PWM_FREQ); | |
1738 | data->pwm_freq[0] = tmp & 0x07; | |
1739 | data->pwm_freq[1] = (tmp >> 4) & 0x07; | |
1740 | } else if (data->type != w83627thf) { | |
1741 | for (i = 1; i <= 3; i++) { | |
1742 | data->pwm_freq[i - 1] = | |
1743 | w83627hf_read_value(data, | |
1744 | W83637HF_REG_PWM_FREQ[i - 1]); | |
1745 | if (i == 2 && (data->type == w83697hf)) | |
1746 | break; | |
1747 | } | |
1748 | } | |
a95a5ed8 DG |
1749 | if (data->type != w83627hf) { |
1750 | for (i = 0; i < num_pwms; i++) { | |
1751 | u8 tmp = w83627hf_read_value(data, | |
1752 | W83627THF_REG_PWM_ENABLE[i]); | |
1753 | data->pwm_enable[i] = | |
1754 | ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i]) | |
1755 | & 0x03) + 1; | |
1756 | } | |
1757 | } | |
df48ed80 JC |
1758 | for (i = 0; i < num_temps; i++) { |
1759 | data->temp[i] = w83627hf_read_value( | |
1760 | data, w83627hf_reg_temp[i]); | |
1761 | data->temp_max[i] = w83627hf_read_value( | |
1762 | data, w83627hf_reg_temp_over[i]); | |
1763 | data->temp_max_hyst[i] = w83627hf_read_value( | |
1764 | data, w83627hf_reg_temp_hyst[i]); | |
1da177e4 LT |
1765 | } |
1766 | ||
c09c5184 JD |
1767 | w83627hf_update_fan_div(data); |
1768 | ||
1da177e4 | 1769 | data->alarms = |
787c72b1 JD |
1770 | w83627hf_read_value(data, W83781D_REG_ALARM1) | |
1771 | (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) | | |
1772 | (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16); | |
1773 | i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2); | |
1c138107 | 1774 | data->beep_mask = (i << 8) | |
787c72b1 JD |
1775 | w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) | |
1776 | w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16; | |
1da177e4 LT |
1777 | data->last_updated = jiffies; |
1778 | data->valid = 1; | |
1779 | } | |
1780 | ||
9a61bf63 | 1781 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1782 | |
1783 | return data; | |
1784 | } | |
1785 | ||
787c72b1 JD |
1786 | static int __init w83627hf_device_add(unsigned short address, |
1787 | const struct w83627hf_sio_data *sio_data) | |
1788 | { | |
1789 | struct resource res = { | |
1790 | .start = address + WINB_REGION_OFFSET, | |
1791 | .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1, | |
1792 | .name = DRVNAME, | |
1793 | .flags = IORESOURCE_IO, | |
1794 | }; | |
1795 | int err; | |
1796 | ||
b9acb64a JD |
1797 | err = acpi_check_resource_conflict(&res); |
1798 | if (err) | |
1799 | goto exit; | |
1800 | ||
787c72b1 JD |
1801 | pdev = platform_device_alloc(DRVNAME, address); |
1802 | if (!pdev) { | |
1803 | err = -ENOMEM; | |
1804 | printk(KERN_ERR DRVNAME ": Device allocation failed\n"); | |
1805 | goto exit; | |
1806 | } | |
1807 | ||
1808 | err = platform_device_add_resources(pdev, &res, 1); | |
1809 | if (err) { | |
1810 | printk(KERN_ERR DRVNAME ": Device resource addition failed " | |
1811 | "(%d)\n", err); | |
1812 | goto exit_device_put; | |
1813 | } | |
1814 | ||
2df6d811 JD |
1815 | err = platform_device_add_data(pdev, sio_data, |
1816 | sizeof(struct w83627hf_sio_data)); | |
1817 | if (err) { | |
787c72b1 JD |
1818 | printk(KERN_ERR DRVNAME ": Platform data allocation failed\n"); |
1819 | goto exit_device_put; | |
1820 | } | |
787c72b1 JD |
1821 | |
1822 | err = platform_device_add(pdev); | |
1823 | if (err) { | |
1824 | printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", | |
1825 | err); | |
1826 | goto exit_device_put; | |
1827 | } | |
1828 | ||
1829 | return 0; | |
1830 | ||
1831 | exit_device_put: | |
1832 | platform_device_put(pdev); | |
1833 | exit: | |
1834 | return err; | |
1835 | } | |
1836 | ||
1da177e4 LT |
1837 | static int __init sensors_w83627hf_init(void) |
1838 | { | |
787c72b1 JD |
1839 | int err; |
1840 | unsigned short address; | |
1841 | struct w83627hf_sio_data sio_data; | |
1842 | ||
1843 | if (w83627hf_find(0x2e, &address, &sio_data) | |
1844 | && w83627hf_find(0x4e, &address, &sio_data)) | |
1da177e4 | 1845 | return -ENODEV; |
1da177e4 | 1846 | |
787c72b1 JD |
1847 | err = platform_driver_register(&w83627hf_driver); |
1848 | if (err) | |
1849 | goto exit; | |
1850 | ||
1851 | /* Sets global pdev as a side effect */ | |
1852 | err = w83627hf_device_add(address, &sio_data); | |
1853 | if (err) | |
1854 | goto exit_driver; | |
1855 | ||
1856 | return 0; | |
1857 | ||
1858 | exit_driver: | |
1859 | platform_driver_unregister(&w83627hf_driver); | |
1860 | exit: | |
1861 | return err; | |
1da177e4 LT |
1862 | } |
1863 | ||
1864 | static void __exit sensors_w83627hf_exit(void) | |
1865 | { | |
787c72b1 JD |
1866 | platform_device_unregister(pdev); |
1867 | platform_driver_unregister(&w83627hf_driver); | |
1da177e4 LT |
1868 | } |
1869 | ||
1870 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " | |
1871 | "Philip Edelbrock <phil@netroedge.com>, " | |
1872 | "and Mark Studebaker <mdsxyz123@yahoo.com>"); | |
1873 | MODULE_DESCRIPTION("W83627HF driver"); | |
1874 | MODULE_LICENSE("GPL"); | |
1875 | ||
1876 | module_init(sensors_w83627hf_init); | |
1877 | module_exit(sensors_w83627hf_exit); |