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1da177e4 LT |
1 | /* |
2 | w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware | |
3 | monitoring | |
4 | Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>, | |
5 | Philip Edelbrock <phil@netroedge.com>, | |
6 | and Mark Studebaker <mdsxyz123@yahoo.com> | |
7 | Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org> | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program; if not, write to the Free Software | |
21 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
24 | /* | |
25 | Supports following chips: | |
26 | ||
27 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
28 | w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) | |
29 | w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) | |
30 | w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) | |
c2db6ce1 | 31 | w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) |
1da177e4 LT |
32 | w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC) |
33 | ||
34 | For other winbond chips, and for i2c support in the above chips, | |
35 | use w83781d.c. | |
36 | ||
37 | Note: automatic ("cruise") fan control for 697, 637 & 627thf not | |
38 | supported yet. | |
39 | */ | |
40 | ||
41 | #include <linux/module.h> | |
42 | #include <linux/init.h> | |
43 | #include <linux/slab.h> | |
44 | #include <linux/jiffies.h> | |
45 | #include <linux/i2c.h> | |
fde09509 | 46 | #include <linux/i2c-isa.h> |
943b0830 | 47 | #include <linux/hwmon.h> |
303760b4 | 48 | #include <linux/hwmon-vid.h> |
943b0830 | 49 | #include <linux/err.h> |
9a61bf63 | 50 | #include <linux/mutex.h> |
1da177e4 LT |
51 | #include <asm/io.h> |
52 | #include "lm75.h" | |
53 | ||
54 | static u16 force_addr; | |
55 | module_param(force_addr, ushort, 0); | |
56 | MODULE_PARM_DESC(force_addr, | |
57 | "Initialize the base address of the sensors"); | |
58 | static u8 force_i2c = 0x1f; | |
59 | module_param(force_i2c, byte, 0); | |
60 | MODULE_PARM_DESC(force_i2c, | |
61 | "Initialize the i2c address of the sensors"); | |
62 | ||
2d8672c5 JD |
63 | /* The actual ISA address is read from Super-I/O configuration space */ |
64 | static unsigned short address; | |
1da177e4 LT |
65 | |
66 | /* Insmod parameters */ | |
c2db6ce1 | 67 | enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf, w83687thf }; |
1da177e4 | 68 | |
2251cf1a JD |
69 | static int reset; |
70 | module_param(reset, bool, 0); | |
71 | MODULE_PARM_DESC(reset, "Set to one to reset chip on load"); | |
72 | ||
1da177e4 LT |
73 | static int init = 1; |
74 | module_param(init, bool, 0); | |
75 | MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); | |
76 | ||
77 | /* modified from kernel/include/traps.c */ | |
78 | static int REG; /* The register to read/write */ | |
79 | #define DEV 0x07 /* Register: Logical device select */ | |
80 | static int VAL; /* The value to read/write */ | |
81 | ||
82 | /* logical device numbers for superio_select (below) */ | |
83 | #define W83627HF_LD_FDC 0x00 | |
84 | #define W83627HF_LD_PRT 0x01 | |
85 | #define W83627HF_LD_UART1 0x02 | |
86 | #define W83627HF_LD_UART2 0x03 | |
87 | #define W83627HF_LD_KBC 0x05 | |
88 | #define W83627HF_LD_CIR 0x06 /* w83627hf only */ | |
89 | #define W83627HF_LD_GAME 0x07 | |
90 | #define W83627HF_LD_MIDI 0x07 | |
91 | #define W83627HF_LD_GPIO1 0x07 | |
92 | #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */ | |
93 | #define W83627HF_LD_GPIO2 0x08 | |
94 | #define W83627HF_LD_GPIO3 0x09 | |
95 | #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */ | |
96 | #define W83627HF_LD_ACPI 0x0a | |
97 | #define W83627HF_LD_HWM 0x0b | |
98 | ||
99 | #define DEVID 0x20 /* Register: Device ID */ | |
100 | ||
101 | #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */ | |
102 | #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */ | |
103 | #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */ | |
104 | ||
c2db6ce1 JD |
105 | #define W83687THF_VID_EN 0x29 /* w83687thf only */ |
106 | #define W83687THF_VID_CFG 0xF0 /* w83687thf only */ | |
107 | #define W83687THF_VID_DATA 0xF1 /* w83687thf only */ | |
108 | ||
1da177e4 LT |
109 | static inline void |
110 | superio_outb(int reg, int val) | |
111 | { | |
112 | outb(reg, REG); | |
113 | outb(val, VAL); | |
114 | } | |
115 | ||
116 | static inline int | |
117 | superio_inb(int reg) | |
118 | { | |
119 | outb(reg, REG); | |
120 | return inb(VAL); | |
121 | } | |
122 | ||
123 | static inline void | |
124 | superio_select(int ld) | |
125 | { | |
126 | outb(DEV, REG); | |
127 | outb(ld, VAL); | |
128 | } | |
129 | ||
130 | static inline void | |
131 | superio_enter(void) | |
132 | { | |
133 | outb(0x87, REG); | |
134 | outb(0x87, REG); | |
135 | } | |
136 | ||
137 | static inline void | |
138 | superio_exit(void) | |
139 | { | |
140 | outb(0xAA, REG); | |
141 | } | |
142 | ||
143 | #define W627_DEVID 0x52 | |
144 | #define W627THF_DEVID 0x82 | |
145 | #define W697_DEVID 0x60 | |
146 | #define W637_DEVID 0x70 | |
c2db6ce1 | 147 | #define W687THF_DEVID 0x85 |
1da177e4 LT |
148 | #define WINB_ACT_REG 0x30 |
149 | #define WINB_BASE_REG 0x60 | |
150 | /* Constants specified below */ | |
151 | ||
ada0c2f8 PV |
152 | /* Alignment of the base address */ |
153 | #define WINB_ALIGNMENT ~7 | |
1da177e4 | 154 | |
ada0c2f8 PV |
155 | /* Offset & size of I/O region we are interested in */ |
156 | #define WINB_REGION_OFFSET 5 | |
157 | #define WINB_REGION_SIZE 2 | |
158 | ||
159 | /* Where are the sensors address/data registers relative to the base address */ | |
1da177e4 LT |
160 | #define W83781D_ADDR_REG_OFFSET 5 |
161 | #define W83781D_DATA_REG_OFFSET 6 | |
162 | ||
163 | /* The W83781D registers */ | |
164 | /* The W83782D registers for nr=7,8 are in bank 5 */ | |
165 | #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ | |
166 | (0x554 + (((nr) - 7) * 2))) | |
167 | #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
168 | (0x555 + (((nr) - 7) * 2))) | |
169 | #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
170 | (0x550 + (nr) - 7)) | |
171 | ||
172 | #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr)) | |
173 | #define W83781D_REG_FAN(nr) (0x27 + (nr)) | |
174 | ||
175 | #define W83781D_REG_TEMP2_CONFIG 0x152 | |
176 | #define W83781D_REG_TEMP3_CONFIG 0x252 | |
177 | #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ | |
178 | ((nr == 2) ? (0x0150) : \ | |
179 | (0x27))) | |
180 | #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ | |
181 | ((nr == 2) ? (0x153) : \ | |
182 | (0x3A))) | |
183 | #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ | |
184 | ((nr == 2) ? (0x155) : \ | |
185 | (0x39))) | |
186 | ||
187 | #define W83781D_REG_BANK 0x4E | |
188 | ||
189 | #define W83781D_REG_CONFIG 0x40 | |
4a1c4447 YM |
190 | #define W83781D_REG_ALARM1 0x459 |
191 | #define W83781D_REG_ALARM2 0x45A | |
192 | #define W83781D_REG_ALARM3 0x45B | |
1da177e4 | 193 | |
1da177e4 LT |
194 | #define W83781D_REG_BEEP_CONFIG 0x4D |
195 | #define W83781D_REG_BEEP_INTS1 0x56 | |
196 | #define W83781D_REG_BEEP_INTS2 0x57 | |
197 | #define W83781D_REG_BEEP_INTS3 0x453 | |
198 | ||
199 | #define W83781D_REG_VID_FANDIV 0x47 | |
200 | ||
201 | #define W83781D_REG_CHIPID 0x49 | |
202 | #define W83781D_REG_WCHIPID 0x58 | |
203 | #define W83781D_REG_CHIPMAN 0x4F | |
204 | #define W83781D_REG_PIN 0x4B | |
205 | ||
206 | #define W83781D_REG_VBAT 0x5D | |
207 | ||
208 | #define W83627HF_REG_PWM1 0x5A | |
209 | #define W83627HF_REG_PWM2 0x5B | |
1da177e4 | 210 | |
c2db6ce1 JD |
211 | #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */ |
212 | #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */ | |
213 | #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */ | |
1da177e4 | 214 | |
c2db6ce1 | 215 | #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */ |
1da177e4 LT |
216 | |
217 | static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 }; | |
218 | static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2, | |
219 | W83627THF_REG_PWM3 }; | |
220 | #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \ | |
221 | regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1]) | |
222 | ||
223 | #define W83781D_REG_I2C_ADDR 0x48 | |
224 | #define W83781D_REG_I2C_SUBADDR 0x4A | |
225 | ||
226 | /* Sensor selection */ | |
227 | #define W83781D_REG_SCFG1 0x5D | |
228 | static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; | |
229 | #define W83781D_REG_SCFG2 0x59 | |
230 | static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; | |
231 | #define W83781D_DEFAULT_BETA 3435 | |
232 | ||
233 | /* Conversions. Limit checking is only done on the TO_REG | |
234 | variants. Note that you should be a bit careful with which arguments | |
235 | these macros are called: arguments may be evaluated more than once. | |
236 | Fixing this is just not worth it. */ | |
237 | #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255)) | |
238 | #define IN_FROM_REG(val) ((val) * 16) | |
239 | ||
240 | static inline u8 FAN_TO_REG(long rpm, int div) | |
241 | { | |
242 | if (rpm == 0) | |
243 | return 255; | |
244 | rpm = SENSORS_LIMIT(rpm, 1, 1000000); | |
245 | return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, | |
246 | 254); | |
247 | } | |
248 | ||
249 | #define TEMP_MIN (-128000) | |
250 | #define TEMP_MAX ( 127000) | |
251 | ||
252 | /* TEMP: 0.001C/bit (-128C to +127C) | |
253 | REG: 1C/bit, two's complement */ | |
254 | static u8 TEMP_TO_REG(int temp) | |
255 | { | |
256 | int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX); | |
257 | ntemp += (ntemp<0 ? -500 : 500); | |
258 | return (u8)(ntemp / 1000); | |
259 | } | |
260 | ||
261 | static int TEMP_FROM_REG(u8 reg) | |
262 | { | |
263 | return (s8)reg * 1000; | |
264 | } | |
265 | ||
266 | #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div))) | |
267 | ||
268 | #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) | |
269 | ||
270 | #define BEEP_MASK_FROM_REG(val) (val) | |
271 | #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff) | |
272 | #define BEEP_ENABLE_TO_REG(val) ((val)?1:0) | |
273 | #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0) | |
274 | ||
275 | #define DIV_FROM_REG(val) (1 << (val)) | |
276 | ||
277 | static inline u8 DIV_TO_REG(long val) | |
278 | { | |
279 | int i; | |
280 | val = SENSORS_LIMIT(val, 1, 128) >> 1; | |
abc01922 | 281 | for (i = 0; i < 7; i++) { |
1da177e4 LT |
282 | if (val == 0) |
283 | break; | |
284 | val >>= 1; | |
285 | } | |
286 | return ((u8) i); | |
287 | } | |
288 | ||
ed6bafbf JD |
289 | /* For each registered chip, we need to keep some data in memory. |
290 | The structure is dynamically allocated. */ | |
1da177e4 LT |
291 | struct w83627hf_data { |
292 | struct i2c_client client; | |
943b0830 | 293 | struct class_device *class_dev; |
9a61bf63 | 294 | struct mutex lock; |
1da177e4 LT |
295 | enum chips type; |
296 | ||
9a61bf63 | 297 | struct mutex update_lock; |
1da177e4 LT |
298 | char valid; /* !=0 if following fields are valid */ |
299 | unsigned long last_updated; /* In jiffies */ | |
300 | ||
301 | struct i2c_client *lm75; /* for secondary I2C addresses */ | |
302 | /* pointer to array of 2 subclients */ | |
303 | ||
304 | u8 in[9]; /* Register value */ | |
305 | u8 in_max[9]; /* Register value */ | |
306 | u8 in_min[9]; /* Register value */ | |
307 | u8 fan[3]; /* Register value */ | |
308 | u8 fan_min[3]; /* Register value */ | |
309 | u8 temp; | |
310 | u8 temp_max; /* Register value */ | |
311 | u8 temp_max_hyst; /* Register value */ | |
312 | u16 temp_add[2]; /* Register value */ | |
313 | u16 temp_max_add[2]; /* Register value */ | |
314 | u16 temp_max_hyst_add[2]; /* Register value */ | |
315 | u8 fan_div[3]; /* Register encoding, shifted right */ | |
316 | u8 vid; /* Register encoding, combined */ | |
317 | u32 alarms; /* Register encoding, combined */ | |
318 | u32 beep_mask; /* Register encoding, combined */ | |
319 | u8 beep_enable; /* Boolean */ | |
320 | u8 pwm[3]; /* Register value */ | |
321 | u16 sens[3]; /* 782D/783S only. | |
322 | 1 = pentium diode; 2 = 3904 diode; | |
323 | 3000-5000 = thermistor beta. | |
324 | Default = 3435. | |
325 | Other Betas unimplemented */ | |
326 | u8 vrm; | |
c2db6ce1 | 327 | u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */ |
1da177e4 LT |
328 | }; |
329 | ||
330 | ||
2d8672c5 | 331 | static int w83627hf_detect(struct i2c_adapter *adapter); |
1da177e4 LT |
332 | static int w83627hf_detach_client(struct i2c_client *client); |
333 | ||
f6c27fc1 DJ |
334 | static int w83627hf_read_value(struct i2c_client *client, u16 reg); |
335 | static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value); | |
1da177e4 LT |
336 | static struct w83627hf_data *w83627hf_update_device(struct device *dev); |
337 | static void w83627hf_init_client(struct i2c_client *client); | |
338 | ||
339 | static struct i2c_driver w83627hf_driver = { | |
cdaf7934 | 340 | .driver = { |
87218842 | 341 | .owner = THIS_MODULE, |
cdaf7934 LR |
342 | .name = "w83627hf", |
343 | }, | |
2d8672c5 | 344 | .attach_adapter = w83627hf_detect, |
1da177e4 LT |
345 | .detach_client = w83627hf_detach_client, |
346 | }; | |
347 | ||
348 | /* following are the sysfs callback functions */ | |
349 | #define show_in_reg(reg) \ | |
350 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
351 | { \ | |
352 | struct w83627hf_data *data = w83627hf_update_device(dev); \ | |
353 | return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \ | |
354 | } | |
355 | show_in_reg(in) | |
356 | show_in_reg(in_min) | |
357 | show_in_reg(in_max) | |
358 | ||
359 | #define store_in_reg(REG, reg) \ | |
360 | static ssize_t \ | |
361 | store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | |
362 | { \ | |
363 | struct i2c_client *client = to_i2c_client(dev); \ | |
364 | struct w83627hf_data *data = i2c_get_clientdata(client); \ | |
365 | u32 val; \ | |
366 | \ | |
367 | val = simple_strtoul(buf, NULL, 10); \ | |
368 | \ | |
9a61bf63 | 369 | mutex_lock(&data->update_lock); \ |
1da177e4 LT |
370 | data->in_##reg[nr] = IN_TO_REG(val); \ |
371 | w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \ | |
372 | data->in_##reg[nr]); \ | |
373 | \ | |
9a61bf63 | 374 | mutex_unlock(&data->update_lock); \ |
1da177e4 LT |
375 | return count; \ |
376 | } | |
377 | store_in_reg(MIN, min) | |
378 | store_in_reg(MAX, max) | |
379 | ||
380 | #define sysfs_in_offset(offset) \ | |
381 | static ssize_t \ | |
a5099cfc | 382 | show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
383 | { \ |
384 | return show_in(dev, buf, offset); \ | |
385 | } \ | |
386 | static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL); | |
387 | ||
388 | #define sysfs_in_reg_offset(reg, offset) \ | |
a5099cfc | 389 | static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
390 | { \ |
391 | return show_in_##reg (dev, buf, offset); \ | |
392 | } \ | |
393 | static ssize_t \ | |
a5099cfc | 394 | store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
395 | const char *buf, size_t count) \ |
396 | { \ | |
397 | return store_in_##reg (dev, buf, count, offset); \ | |
398 | } \ | |
399 | static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \ | |
400 | show_regs_in_##reg##offset, store_regs_in_##reg##offset); | |
401 | ||
402 | #define sysfs_in_offsets(offset) \ | |
403 | sysfs_in_offset(offset) \ | |
404 | sysfs_in_reg_offset(min, offset) \ | |
405 | sysfs_in_reg_offset(max, offset) | |
406 | ||
407 | sysfs_in_offsets(1); | |
408 | sysfs_in_offsets(2); | |
409 | sysfs_in_offsets(3); | |
410 | sysfs_in_offsets(4); | |
411 | sysfs_in_offsets(5); | |
412 | sysfs_in_offsets(6); | |
413 | sysfs_in_offsets(7); | |
414 | sysfs_in_offsets(8); | |
415 | ||
416 | /* use a different set of functions for in0 */ | |
417 | static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg) | |
418 | { | |
419 | long in0; | |
420 | ||
421 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
422 | (w83627thf == data->type || w83637hf == data->type |
423 | || w83687thf == data->type)) | |
1da177e4 LT |
424 | |
425 | /* use VRM9 calculation */ | |
426 | in0 = (long)((reg * 488 + 70000 + 50) / 100); | |
427 | else | |
428 | /* use VRM8 (standard) calculation */ | |
429 | in0 = (long)IN_FROM_REG(reg); | |
430 | ||
431 | return sprintf(buf,"%ld\n", in0); | |
432 | } | |
433 | ||
a5099cfc | 434 | static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
435 | { |
436 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
437 | return show_in_0(data, buf, data->in[0]); | |
438 | } | |
439 | ||
a5099cfc | 440 | static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
441 | { |
442 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
443 | return show_in_0(data, buf, data->in_min[0]); | |
444 | } | |
445 | ||
a5099cfc | 446 | static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
447 | { |
448 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
449 | return show_in_0(data, buf, data->in_max[0]); | |
450 | } | |
451 | ||
a5099cfc | 452 | static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr, |
1da177e4 LT |
453 | const char *buf, size_t count) |
454 | { | |
455 | struct i2c_client *client = to_i2c_client(dev); | |
456 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
457 | u32 val; | |
458 | ||
459 | val = simple_strtoul(buf, NULL, 10); | |
460 | ||
9a61bf63 | 461 | mutex_lock(&data->update_lock); |
1da177e4 LT |
462 | |
463 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
464 | (w83627thf == data->type || w83637hf == data->type |
465 | || w83687thf == data->type)) | |
1da177e4 LT |
466 | |
467 | /* use VRM9 calculation */ | |
2723ab91 YM |
468 | data->in_min[0] = |
469 | SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0, | |
470 | 255); | |
1da177e4 LT |
471 | else |
472 | /* use VRM8 (standard) calculation */ | |
473 | data->in_min[0] = IN_TO_REG(val); | |
474 | ||
475 | w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]); | |
9a61bf63 | 476 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
477 | return count; |
478 | } | |
479 | ||
a5099cfc | 480 | static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr, |
1da177e4 LT |
481 | const char *buf, size_t count) |
482 | { | |
483 | struct i2c_client *client = to_i2c_client(dev); | |
484 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
485 | u32 val; | |
486 | ||
487 | val = simple_strtoul(buf, NULL, 10); | |
488 | ||
9a61bf63 | 489 | mutex_lock(&data->update_lock); |
1da177e4 LT |
490 | |
491 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
492 | (w83627thf == data->type || w83637hf == data->type |
493 | || w83687thf == data->type)) | |
1da177e4 LT |
494 | |
495 | /* use VRM9 calculation */ | |
2723ab91 YM |
496 | data->in_max[0] = |
497 | SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0, | |
498 | 255); | |
1da177e4 LT |
499 | else |
500 | /* use VRM8 (standard) calculation */ | |
501 | data->in_max[0] = IN_TO_REG(val); | |
502 | ||
503 | w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]); | |
9a61bf63 | 504 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
505 | return count; |
506 | } | |
507 | ||
508 | static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL); | |
509 | static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR, | |
510 | show_regs_in_min0, store_regs_in_min0); | |
511 | static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR, | |
512 | show_regs_in_max0, store_regs_in_max0); | |
513 | ||
1da177e4 LT |
514 | #define show_fan_reg(reg) \ |
515 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
516 | { \ | |
517 | struct w83627hf_data *data = w83627hf_update_device(dev); \ | |
518 | return sprintf(buf,"%ld\n", \ | |
519 | FAN_FROM_REG(data->reg[nr-1], \ | |
520 | (long)DIV_FROM_REG(data->fan_div[nr-1]))); \ | |
521 | } | |
522 | show_fan_reg(fan); | |
523 | show_fan_reg(fan_min); | |
524 | ||
525 | static ssize_t | |
526 | store_fan_min(struct device *dev, const char *buf, size_t count, int nr) | |
527 | { | |
528 | struct i2c_client *client = to_i2c_client(dev); | |
529 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
530 | u32 val; | |
531 | ||
532 | val = simple_strtoul(buf, NULL, 10); | |
533 | ||
9a61bf63 | 534 | mutex_lock(&data->update_lock); |
1da177e4 LT |
535 | data->fan_min[nr - 1] = |
536 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1])); | |
537 | w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr), | |
538 | data->fan_min[nr - 1]); | |
539 | ||
9a61bf63 | 540 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
541 | return count; |
542 | } | |
543 | ||
544 | #define sysfs_fan_offset(offset) \ | |
a5099cfc | 545 | static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
546 | { \ |
547 | return show_fan(dev, buf, offset); \ | |
548 | } \ | |
549 | static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL); | |
550 | ||
551 | #define sysfs_fan_min_offset(offset) \ | |
a5099cfc | 552 | static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
553 | { \ |
554 | return show_fan_min(dev, buf, offset); \ | |
555 | } \ | |
556 | static ssize_t \ | |
a5099cfc | 557 | store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
558 | { \ |
559 | return store_fan_min(dev, buf, count, offset); \ | |
560 | } \ | |
561 | static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \ | |
562 | show_regs_fan_min##offset, store_regs_fan_min##offset); | |
563 | ||
564 | sysfs_fan_offset(1); | |
565 | sysfs_fan_min_offset(1); | |
566 | sysfs_fan_offset(2); | |
567 | sysfs_fan_min_offset(2); | |
568 | sysfs_fan_offset(3); | |
569 | sysfs_fan_min_offset(3); | |
570 | ||
1da177e4 LT |
571 | #define show_temp_reg(reg) \ |
572 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
573 | { \ | |
574 | struct w83627hf_data *data = w83627hf_update_device(dev); \ | |
575 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
576 | return sprintf(buf,"%ld\n", \ | |
577 | (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ | |
578 | } else { /* TEMP1 */ \ | |
579 | return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ | |
580 | } \ | |
581 | } | |
582 | show_temp_reg(temp); | |
583 | show_temp_reg(temp_max); | |
584 | show_temp_reg(temp_max_hyst); | |
585 | ||
586 | #define store_temp_reg(REG, reg) \ | |
587 | static ssize_t \ | |
588 | store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | |
589 | { \ | |
590 | struct i2c_client *client = to_i2c_client(dev); \ | |
591 | struct w83627hf_data *data = i2c_get_clientdata(client); \ | |
592 | u32 val; \ | |
593 | \ | |
594 | val = simple_strtoul(buf, NULL, 10); \ | |
595 | \ | |
9a61bf63 | 596 | mutex_lock(&data->update_lock); \ |
1da177e4 LT |
597 | \ |
598 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
599 | data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ | |
600 | w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | |
601 | data->temp_##reg##_add[nr-2]); \ | |
602 | } else { /* TEMP1 */ \ | |
603 | data->temp_##reg = TEMP_TO_REG(val); \ | |
604 | w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | |
605 | data->temp_##reg); \ | |
606 | } \ | |
607 | \ | |
9a61bf63 | 608 | mutex_unlock(&data->update_lock); \ |
1da177e4 LT |
609 | return count; \ |
610 | } | |
611 | store_temp_reg(OVER, max); | |
612 | store_temp_reg(HYST, max_hyst); | |
613 | ||
614 | #define sysfs_temp_offset(offset) \ | |
615 | static ssize_t \ | |
a5099cfc | 616 | show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
617 | { \ |
618 | return show_temp(dev, buf, offset); \ | |
619 | } \ | |
620 | static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL); | |
621 | ||
622 | #define sysfs_temp_reg_offset(reg, offset) \ | |
a5099cfc | 623 | static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
624 | { \ |
625 | return show_temp_##reg (dev, buf, offset); \ | |
626 | } \ | |
627 | static ssize_t \ | |
a5099cfc | 628 | store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
629 | const char *buf, size_t count) \ |
630 | { \ | |
631 | return store_temp_##reg (dev, buf, count, offset); \ | |
632 | } \ | |
633 | static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \ | |
634 | show_regs_temp_##reg##offset, store_regs_temp_##reg##offset); | |
635 | ||
636 | #define sysfs_temp_offsets(offset) \ | |
637 | sysfs_temp_offset(offset) \ | |
638 | sysfs_temp_reg_offset(max, offset) \ | |
639 | sysfs_temp_reg_offset(max_hyst, offset) | |
640 | ||
641 | sysfs_temp_offsets(1); | |
642 | sysfs_temp_offsets(2); | |
643 | sysfs_temp_offsets(3); | |
644 | ||
1da177e4 | 645 | static ssize_t |
a5099cfc | 646 | show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
647 | { |
648 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
649 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
650 | } | |
651 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
1da177e4 LT |
652 | |
653 | static ssize_t | |
a5099cfc | 654 | show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
655 | { |
656 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
657 | return sprintf(buf, "%ld\n", (long) data->vrm); | |
658 | } | |
659 | static ssize_t | |
a5099cfc | 660 | store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) |
1da177e4 LT |
661 | { |
662 | struct i2c_client *client = to_i2c_client(dev); | |
663 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
664 | u32 val; | |
665 | ||
666 | val = simple_strtoul(buf, NULL, 10); | |
667 | data->vrm = val; | |
668 | ||
669 | return count; | |
670 | } | |
671 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
1da177e4 LT |
672 | |
673 | static ssize_t | |
a5099cfc | 674 | show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
675 | { |
676 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
677 | return sprintf(buf, "%ld\n", (long) data->alarms); | |
678 | } | |
679 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); | |
1da177e4 LT |
680 | |
681 | #define show_beep_reg(REG, reg) \ | |
a5099cfc | 682 | static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
683 | { \ |
684 | struct w83627hf_data *data = w83627hf_update_device(dev); \ | |
685 | return sprintf(buf,"%ld\n", \ | |
686 | (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \ | |
687 | } | |
688 | show_beep_reg(ENABLE, enable) | |
689 | show_beep_reg(MASK, mask) | |
690 | ||
691 | #define BEEP_ENABLE 0 /* Store beep_enable */ | |
692 | #define BEEP_MASK 1 /* Store beep_mask */ | |
693 | ||
694 | static ssize_t | |
695 | store_beep_reg(struct device *dev, const char *buf, size_t count, | |
696 | int update_mask) | |
697 | { | |
698 | struct i2c_client *client = to_i2c_client(dev); | |
699 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
700 | u32 val, val2; | |
701 | ||
702 | val = simple_strtoul(buf, NULL, 10); | |
703 | ||
9a61bf63 | 704 | mutex_lock(&data->update_lock); |
1da177e4 LT |
705 | |
706 | if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ | |
707 | data->beep_mask = BEEP_MASK_TO_REG(val); | |
708 | w83627hf_write_value(client, W83781D_REG_BEEP_INTS1, | |
709 | data->beep_mask & 0xff); | |
710 | w83627hf_write_value(client, W83781D_REG_BEEP_INTS3, | |
711 | ((data->beep_mask) >> 16) & 0xff); | |
712 | val2 = (data->beep_mask >> 8) & 0x7f; | |
713 | } else { /* We are storing beep_enable */ | |
714 | val2 = | |
715 | w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f; | |
716 | data->beep_enable = BEEP_ENABLE_TO_REG(val); | |
717 | } | |
718 | ||
719 | w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, | |
720 | val2 | data->beep_enable << 7); | |
721 | ||
9a61bf63 | 722 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
723 | return count; |
724 | } | |
725 | ||
726 | #define sysfs_beep(REG, reg) \ | |
a5099cfc | 727 | static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 | 728 | { \ |
a5099cfc | 729 | return show_beep_##reg(dev, attr, buf); \ |
1da177e4 LT |
730 | } \ |
731 | static ssize_t \ | |
a5099cfc | 732 | store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
733 | { \ |
734 | return store_beep_reg(dev, buf, count, BEEP_##REG); \ | |
735 | } \ | |
736 | static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \ | |
737 | show_regs_beep_##reg, store_regs_beep_##reg); | |
738 | ||
739 | sysfs_beep(ENABLE, enable); | |
740 | sysfs_beep(MASK, mask); | |
741 | ||
1da177e4 LT |
742 | static ssize_t |
743 | show_fan_div_reg(struct device *dev, char *buf, int nr) | |
744 | { | |
745 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
746 | return sprintf(buf, "%ld\n", | |
747 | (long) DIV_FROM_REG(data->fan_div[nr - 1])); | |
748 | } | |
749 | ||
750 | /* Note: we save and restore the fan minimum here, because its value is | |
751 | determined in part by the fan divisor. This follows the principle of | |
d6e05edc | 752 | least surprise; the user doesn't expect the fan minimum to change just |
1da177e4 LT |
753 | because the divisor changed. */ |
754 | static ssize_t | |
755 | store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) | |
756 | { | |
757 | struct i2c_client *client = to_i2c_client(dev); | |
758 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
759 | unsigned long min; | |
760 | u8 reg; | |
761 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
762 | ||
9a61bf63 | 763 | mutex_lock(&data->update_lock); |
1da177e4 LT |
764 | |
765 | /* Save fan_min */ | |
766 | min = FAN_FROM_REG(data->fan_min[nr], | |
767 | DIV_FROM_REG(data->fan_div[nr])); | |
768 | ||
769 | data->fan_div[nr] = DIV_TO_REG(val); | |
770 | ||
771 | reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) | |
772 | & (nr==0 ? 0xcf : 0x3f)) | |
773 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); | |
774 | w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); | |
775 | ||
776 | reg = (w83627hf_read_value(client, W83781D_REG_VBAT) | |
777 | & ~(1 << (5 + nr))) | |
778 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | |
779 | w83627hf_write_value(client, W83781D_REG_VBAT, reg); | |
780 | ||
781 | /* Restore fan_min */ | |
782 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | |
783 | w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); | |
784 | ||
9a61bf63 | 785 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
786 | return count; |
787 | } | |
788 | ||
789 | #define sysfs_fan_div(offset) \ | |
a5099cfc | 790 | static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
791 | { \ |
792 | return show_fan_div_reg(dev, buf, offset); \ | |
793 | } \ | |
794 | static ssize_t \ | |
a5099cfc | 795 | store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
796 | const char *buf, size_t count) \ |
797 | { \ | |
798 | return store_fan_div_reg(dev, buf, count, offset - 1); \ | |
799 | } \ | |
800 | static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \ | |
801 | show_regs_fan_div_##offset, store_regs_fan_div_##offset); | |
802 | ||
803 | sysfs_fan_div(1); | |
804 | sysfs_fan_div(2); | |
805 | sysfs_fan_div(3); | |
806 | ||
1da177e4 LT |
807 | static ssize_t |
808 | show_pwm_reg(struct device *dev, char *buf, int nr) | |
809 | { | |
810 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
811 | return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]); | |
812 | } | |
813 | ||
814 | static ssize_t | |
815 | store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr) | |
816 | { | |
817 | struct i2c_client *client = to_i2c_client(dev); | |
818 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
819 | u32 val; | |
820 | ||
821 | val = simple_strtoul(buf, NULL, 10); | |
822 | ||
9a61bf63 | 823 | mutex_lock(&data->update_lock); |
1da177e4 LT |
824 | |
825 | if (data->type == w83627thf) { | |
826 | /* bits 0-3 are reserved in 627THF */ | |
827 | data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0; | |
828 | w83627hf_write_value(client, | |
829 | W836X7HF_REG_PWM(data->type, nr), | |
830 | data->pwm[nr - 1] | | |
831 | (w83627hf_read_value(client, | |
832 | W836X7HF_REG_PWM(data->type, nr)) & 0x0f)); | |
833 | } else { | |
834 | data->pwm[nr - 1] = PWM_TO_REG(val); | |
835 | w83627hf_write_value(client, | |
836 | W836X7HF_REG_PWM(data->type, nr), | |
837 | data->pwm[nr - 1]); | |
838 | } | |
839 | ||
9a61bf63 | 840 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
841 | return count; |
842 | } | |
843 | ||
844 | #define sysfs_pwm(offset) \ | |
a5099cfc | 845 | static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
846 | { \ |
847 | return show_pwm_reg(dev, buf, offset); \ | |
848 | } \ | |
849 | static ssize_t \ | |
a5099cfc | 850 | store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
851 | { \ |
852 | return store_pwm_reg(dev, buf, count, offset); \ | |
853 | } \ | |
854 | static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \ | |
855 | show_regs_pwm_##offset, store_regs_pwm_##offset); | |
856 | ||
857 | sysfs_pwm(1); | |
858 | sysfs_pwm(2); | |
859 | sysfs_pwm(3); | |
860 | ||
1da177e4 LT |
861 | static ssize_t |
862 | show_sensor_reg(struct device *dev, char *buf, int nr) | |
863 | { | |
864 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
865 | return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]); | |
866 | } | |
867 | ||
868 | static ssize_t | |
869 | store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) | |
870 | { | |
871 | struct i2c_client *client = to_i2c_client(dev); | |
872 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
873 | u32 val, tmp; | |
874 | ||
875 | val = simple_strtoul(buf, NULL, 10); | |
876 | ||
9a61bf63 | 877 | mutex_lock(&data->update_lock); |
1da177e4 LT |
878 | |
879 | switch (val) { | |
880 | case 1: /* PII/Celeron diode */ | |
881 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); | |
882 | w83627hf_write_value(client, W83781D_REG_SCFG1, | |
883 | tmp | BIT_SCFG1[nr - 1]); | |
884 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG2); | |
885 | w83627hf_write_value(client, W83781D_REG_SCFG2, | |
886 | tmp | BIT_SCFG2[nr - 1]); | |
887 | data->sens[nr - 1] = val; | |
888 | break; | |
889 | case 2: /* 3904 */ | |
890 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); | |
891 | w83627hf_write_value(client, W83781D_REG_SCFG1, | |
892 | tmp | BIT_SCFG1[nr - 1]); | |
893 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG2); | |
894 | w83627hf_write_value(client, W83781D_REG_SCFG2, | |
895 | tmp & ~BIT_SCFG2[nr - 1]); | |
896 | data->sens[nr - 1] = val; | |
897 | break; | |
898 | case W83781D_DEFAULT_BETA: /* thermistor */ | |
899 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); | |
900 | w83627hf_write_value(client, W83781D_REG_SCFG1, | |
901 | tmp & ~BIT_SCFG1[nr - 1]); | |
902 | data->sens[nr - 1] = val; | |
903 | break; | |
904 | default: | |
905 | dev_err(&client->dev, | |
906 | "Invalid sensor type %ld; must be 1, 2, or %d\n", | |
907 | (long) val, W83781D_DEFAULT_BETA); | |
908 | break; | |
909 | } | |
910 | ||
9a61bf63 | 911 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
912 | return count; |
913 | } | |
914 | ||
915 | #define sysfs_sensor(offset) \ | |
a5099cfc | 916 | static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
917 | { \ |
918 | return show_sensor_reg(dev, buf, offset); \ | |
919 | } \ | |
920 | static ssize_t \ | |
a5099cfc | 921 | store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
922 | { \ |
923 | return store_sensor_reg(dev, buf, count, offset); \ | |
924 | } \ | |
925 | static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \ | |
926 | show_regs_sensor_##offset, store_regs_sensor_##offset); | |
927 | ||
928 | sysfs_sensor(1); | |
929 | sysfs_sensor(2); | |
930 | sysfs_sensor(3); | |
931 | ||
e6cfb3ad | 932 | static int __init w83627hf_find(int sioaddr, unsigned short *addr) |
1da177e4 LT |
933 | { |
934 | u16 val; | |
935 | ||
936 | REG = sioaddr; | |
937 | VAL = sioaddr + 1; | |
938 | ||
939 | superio_enter(); | |
940 | val= superio_inb(DEVID); | |
941 | if(val != W627_DEVID && | |
942 | val != W627THF_DEVID && | |
943 | val != W697_DEVID && | |
c2db6ce1 JD |
944 | val != W637_DEVID && |
945 | val != W687THF_DEVID) { | |
1da177e4 LT |
946 | superio_exit(); |
947 | return -ENODEV; | |
948 | } | |
949 | ||
950 | superio_select(W83627HF_LD_HWM); | |
951 | val = (superio_inb(WINB_BASE_REG) << 8) | | |
952 | superio_inb(WINB_BASE_REG + 1); | |
ada0c2f8 | 953 | *addr = val & WINB_ALIGNMENT; |
2d8672c5 | 954 | if (*addr == 0 && force_addr == 0) { |
1da177e4 LT |
955 | superio_exit(); |
956 | return -ENODEV; | |
957 | } | |
1da177e4 LT |
958 | |
959 | superio_exit(); | |
960 | return 0; | |
961 | } | |
962 | ||
c1685f61 MH |
963 | static struct attribute *w83627hf_attributes[] = { |
964 | &dev_attr_in0_input.attr, | |
965 | &dev_attr_in0_min.attr, | |
966 | &dev_attr_in0_max.attr, | |
967 | &dev_attr_in2_input.attr, | |
968 | &dev_attr_in2_min.attr, | |
969 | &dev_attr_in2_max.attr, | |
970 | &dev_attr_in3_input.attr, | |
971 | &dev_attr_in3_min.attr, | |
972 | &dev_attr_in3_max.attr, | |
973 | &dev_attr_in4_input.attr, | |
974 | &dev_attr_in4_min.attr, | |
975 | &dev_attr_in4_max.attr, | |
976 | &dev_attr_in7_input.attr, | |
977 | &dev_attr_in7_min.attr, | |
978 | &dev_attr_in7_max.attr, | |
979 | &dev_attr_in8_input.attr, | |
980 | &dev_attr_in8_min.attr, | |
981 | &dev_attr_in8_max.attr, | |
982 | ||
983 | &dev_attr_fan1_input.attr, | |
984 | &dev_attr_fan1_min.attr, | |
985 | &dev_attr_fan1_div.attr, | |
986 | &dev_attr_fan2_input.attr, | |
987 | &dev_attr_fan2_min.attr, | |
988 | &dev_attr_fan2_div.attr, | |
989 | ||
990 | &dev_attr_temp1_input.attr, | |
991 | &dev_attr_temp1_max.attr, | |
992 | &dev_attr_temp1_max_hyst.attr, | |
993 | &dev_attr_temp1_type.attr, | |
994 | &dev_attr_temp2_input.attr, | |
995 | &dev_attr_temp2_max.attr, | |
996 | &dev_attr_temp2_max_hyst.attr, | |
997 | &dev_attr_temp2_type.attr, | |
998 | ||
999 | &dev_attr_alarms.attr, | |
1000 | &dev_attr_beep_enable.attr, | |
1001 | &dev_attr_beep_mask.attr, | |
1002 | ||
1003 | &dev_attr_pwm1.attr, | |
1004 | &dev_attr_pwm2.attr, | |
1005 | ||
1006 | NULL | |
1007 | }; | |
1008 | ||
1009 | static const struct attribute_group w83627hf_group = { | |
1010 | .attrs = w83627hf_attributes, | |
1011 | }; | |
1012 | ||
1013 | static struct attribute *w83627hf_attributes_opt[] = { | |
1014 | &dev_attr_in1_input.attr, | |
1015 | &dev_attr_in1_min.attr, | |
1016 | &dev_attr_in1_max.attr, | |
1017 | &dev_attr_in5_input.attr, | |
1018 | &dev_attr_in5_min.attr, | |
1019 | &dev_attr_in5_max.attr, | |
1020 | &dev_attr_in6_input.attr, | |
1021 | &dev_attr_in6_min.attr, | |
1022 | &dev_attr_in6_max.attr, | |
1023 | ||
1024 | &dev_attr_fan3_input.attr, | |
1025 | &dev_attr_fan3_min.attr, | |
1026 | &dev_attr_fan3_div.attr, | |
1027 | ||
1028 | &dev_attr_temp3_input.attr, | |
1029 | &dev_attr_temp3_max.attr, | |
1030 | &dev_attr_temp3_max_hyst.attr, | |
1031 | &dev_attr_temp3_type.attr, | |
1032 | ||
1033 | &dev_attr_pwm3.attr, | |
1034 | ||
1035 | NULL | |
1036 | }; | |
1037 | ||
1038 | static const struct attribute_group w83627hf_group_opt = { | |
1039 | .attrs = w83627hf_attributes_opt, | |
1040 | }; | |
1041 | ||
2d8672c5 | 1042 | static int w83627hf_detect(struct i2c_adapter *adapter) |
1da177e4 | 1043 | { |
2d8672c5 | 1044 | int val, kind; |
1da177e4 LT |
1045 | struct i2c_client *new_client; |
1046 | struct w83627hf_data *data; | |
1047 | int err = 0; | |
1048 | const char *client_name = ""; | |
1049 | ||
1da177e4 | 1050 | if(force_addr) |
ada0c2f8 | 1051 | address = force_addr & WINB_ALIGNMENT; |
1da177e4 | 1052 | |
ada0c2f8 | 1053 | if (!request_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE, |
cdaf7934 | 1054 | w83627hf_driver.driver.name)) { |
1da177e4 LT |
1055 | err = -EBUSY; |
1056 | goto ERROR0; | |
1057 | } | |
1058 | ||
1059 | if(force_addr) { | |
1060 | printk("w83627hf.o: forcing ISA address 0x%04X\n", address); | |
1061 | superio_enter(); | |
1062 | superio_select(W83627HF_LD_HWM); | |
1063 | superio_outb(WINB_BASE_REG, address >> 8); | |
1064 | superio_outb(WINB_BASE_REG+1, address & 0xff); | |
1065 | superio_exit(); | |
1066 | } | |
1067 | ||
1068 | superio_enter(); | |
1069 | val= superio_inb(DEVID); | |
1070 | if(val == W627_DEVID) | |
1071 | kind = w83627hf; | |
1072 | else if(val == W697_DEVID) | |
1073 | kind = w83697hf; | |
1074 | else if(val == W627THF_DEVID) | |
1075 | kind = w83627thf; | |
1076 | else if(val == W637_DEVID) | |
1077 | kind = w83637hf; | |
c2db6ce1 JD |
1078 | else if (val == W687THF_DEVID) |
1079 | kind = w83687thf; | |
1da177e4 LT |
1080 | else { |
1081 | dev_info(&adapter->dev, | |
1082 | "Unsupported chip (dev_id=0x%02X).\n", val); | |
1083 | goto ERROR1; | |
1084 | } | |
1085 | ||
1086 | superio_select(W83627HF_LD_HWM); | |
1087 | if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0) | |
1088 | superio_outb(WINB_ACT_REG, 1); | |
1089 | superio_exit(); | |
1090 | ||
1091 | /* OK. For now, we presume we have a valid client. We now create the | |
1092 | client structure, even though we cannot fill it completely yet. | |
1093 | But it allows us to access w83627hf_{read,write}_value. */ | |
1094 | ||
ba9c2e8d | 1095 | if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) { |
1da177e4 LT |
1096 | err = -ENOMEM; |
1097 | goto ERROR1; | |
1098 | } | |
1da177e4 LT |
1099 | |
1100 | new_client = &data->client; | |
1101 | i2c_set_clientdata(new_client, data); | |
1102 | new_client->addr = address; | |
9a61bf63 | 1103 | mutex_init(&data->lock); |
1da177e4 LT |
1104 | new_client->adapter = adapter; |
1105 | new_client->driver = &w83627hf_driver; | |
1106 | new_client->flags = 0; | |
1107 | ||
1108 | ||
1109 | if (kind == w83627hf) { | |
1110 | client_name = "w83627hf"; | |
1111 | } else if (kind == w83627thf) { | |
1112 | client_name = "w83627thf"; | |
1113 | } else if (kind == w83697hf) { | |
1114 | client_name = "w83697hf"; | |
1115 | } else if (kind == w83637hf) { | |
1116 | client_name = "w83637hf"; | |
c2db6ce1 JD |
1117 | } else if (kind == w83687thf) { |
1118 | client_name = "w83687thf"; | |
1da177e4 LT |
1119 | } |
1120 | ||
1121 | /* Fill in the remaining client fields and put into the global list */ | |
1122 | strlcpy(new_client->name, client_name, I2C_NAME_SIZE); | |
1123 | data->type = kind; | |
1124 | data->valid = 0; | |
9a61bf63 | 1125 | mutex_init(&data->update_lock); |
1da177e4 LT |
1126 | |
1127 | /* Tell the I2C layer a new client has arrived */ | |
1128 | if ((err = i2c_attach_client(new_client))) | |
1129 | goto ERROR2; | |
1130 | ||
1131 | data->lm75 = NULL; | |
1132 | ||
1133 | /* Initialize the chip */ | |
1134 | w83627hf_init_client(new_client); | |
1135 | ||
1136 | /* A few vars need to be filled upon startup */ | |
1137 | data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1)); | |
1138 | data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2)); | |
1139 | data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3)); | |
1140 | ||
c1685f61 MH |
1141 | /* Register common device attributes */ |
1142 | if ((err = sysfs_create_group(&new_client->dev.kobj, &w83627hf_group))) | |
943b0830 | 1143 | goto ERROR3; |
1da177e4 | 1144 | |
c1685f61 MH |
1145 | /* Register chip-specific device attributes */ |
1146 | if (kind == w83627hf || kind == w83697hf) | |
1147 | if ((err = device_create_file(&new_client->dev, | |
1148 | &dev_attr_in5_input)) | |
1149 | || (err = device_create_file(&new_client->dev, | |
1150 | &dev_attr_in5_min)) | |
1151 | || (err = device_create_file(&new_client->dev, | |
1152 | &dev_attr_in5_max)) | |
1153 | || (err = device_create_file(&new_client->dev, | |
1154 | &dev_attr_in6_input)) | |
1155 | || (err = device_create_file(&new_client->dev, | |
1156 | &dev_attr_in6_min)) | |
1157 | || (err = device_create_file(&new_client->dev, | |
1158 | &dev_attr_in6_max))) | |
1159 | goto ERROR4; | |
1da177e4 | 1160 | |
1da177e4 | 1161 | if (kind != w83697hf) |
c1685f61 MH |
1162 | if ((err = device_create_file(&new_client->dev, |
1163 | &dev_attr_in1_input)) | |
1164 | || (err = device_create_file(&new_client->dev, | |
1165 | &dev_attr_in1_min)) | |
1166 | || (err = device_create_file(&new_client->dev, | |
1167 | &dev_attr_in1_max)) | |
1168 | || (err = device_create_file(&new_client->dev, | |
1169 | &dev_attr_fan3_input)) | |
1170 | || (err = device_create_file(&new_client->dev, | |
1171 | &dev_attr_fan3_min)) | |
1172 | || (err = device_create_file(&new_client->dev, | |
1173 | &dev_attr_fan3_div)) | |
1174 | || (err = device_create_file(&new_client->dev, | |
1175 | &dev_attr_temp3_input)) | |
1176 | || (err = device_create_file(&new_client->dev, | |
1177 | &dev_attr_temp3_max)) | |
1178 | || (err = device_create_file(&new_client->dev, | |
1179 | &dev_attr_temp3_max_hyst)) | |
1180 | || (err = device_create_file(&new_client->dev, | |
1181 | &dev_attr_temp3_type))) | |
1182 | goto ERROR4; | |
1183 | ||
8a665a05 JD |
1184 | if (kind != w83697hf && data->vid != 0xff) { |
1185 | /* Convert VID to voltage based on VRM */ | |
1186 | data->vrm = vid_which_vrm(); | |
1187 | ||
c1685f61 MH |
1188 | if ((err = device_create_file(&new_client->dev, |
1189 | &dev_attr_cpu0_vid)) | |
1190 | || (err = device_create_file(&new_client->dev, | |
1191 | &dev_attr_vrm))) | |
1192 | goto ERROR4; | |
8a665a05 | 1193 | } |
1da177e4 | 1194 | |
c2db6ce1 | 1195 | if (kind == w83627thf || kind == w83637hf || kind == w83687thf) |
c1685f61 MH |
1196 | if ((err = device_create_file(&new_client->dev, |
1197 | &dev_attr_pwm3))) | |
1198 | goto ERROR4; | |
1da177e4 | 1199 | |
c1685f61 MH |
1200 | data->class_dev = hwmon_device_register(&new_client->dev); |
1201 | if (IS_ERR(data->class_dev)) { | |
1202 | err = PTR_ERR(data->class_dev); | |
1203 | goto ERROR4; | |
1204 | } | |
1da177e4 LT |
1205 | |
1206 | return 0; | |
1207 | ||
c1685f61 MH |
1208 | ERROR4: |
1209 | sysfs_remove_group(&new_client->dev.kobj, &w83627hf_group); | |
1210 | sysfs_remove_group(&new_client->dev.kobj, &w83627hf_group_opt); | |
943b0830 MH |
1211 | ERROR3: |
1212 | i2c_detach_client(new_client); | |
1da177e4 LT |
1213 | ERROR2: |
1214 | kfree(data); | |
1215 | ERROR1: | |
ada0c2f8 | 1216 | release_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE); |
1da177e4 LT |
1217 | ERROR0: |
1218 | return err; | |
1219 | } | |
1220 | ||
1221 | static int w83627hf_detach_client(struct i2c_client *client) | |
1222 | { | |
943b0830 | 1223 | struct w83627hf_data *data = i2c_get_clientdata(client); |
1da177e4 LT |
1224 | int err; |
1225 | ||
943b0830 MH |
1226 | hwmon_device_unregister(data->class_dev); |
1227 | ||
c1685f61 MH |
1228 | sysfs_remove_group(&client->dev.kobj, &w83627hf_group); |
1229 | sysfs_remove_group(&client->dev.kobj, &w83627hf_group_opt); | |
1230 | ||
7bef5594 | 1231 | if ((err = i2c_detach_client(client))) |
1da177e4 | 1232 | return err; |
1da177e4 | 1233 | |
ada0c2f8 | 1234 | release_region(client->addr + WINB_REGION_OFFSET, WINB_REGION_SIZE); |
943b0830 | 1235 | kfree(data); |
1da177e4 LT |
1236 | |
1237 | return 0; | |
1238 | } | |
1239 | ||
1240 | ||
1241 | /* | |
1242 | ISA access must always be locked explicitly! | |
1243 | We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, | |
1244 | would slow down the W83781D access and should not be necessary. | |
1245 | There are some ugly typecasts here, but the good news is - they should | |
1246 | nowhere else be necessary! */ | |
1247 | static int w83627hf_read_value(struct i2c_client *client, u16 reg) | |
1248 | { | |
1249 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
1250 | int res, word_sized; | |
1251 | ||
9a61bf63 | 1252 | mutex_lock(&data->lock); |
1da177e4 LT |
1253 | word_sized = (((reg & 0xff00) == 0x100) |
1254 | || ((reg & 0xff00) == 0x200)) | |
1255 | && (((reg & 0x00ff) == 0x50) | |
1256 | || ((reg & 0x00ff) == 0x53) | |
1257 | || ((reg & 0x00ff) == 0x55)); | |
1258 | if (reg & 0xff00) { | |
1259 | outb_p(W83781D_REG_BANK, | |
1260 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1261 | outb_p(reg >> 8, | |
1262 | client->addr + W83781D_DATA_REG_OFFSET); | |
1263 | } | |
1264 | outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); | |
1265 | res = inb_p(client->addr + W83781D_DATA_REG_OFFSET); | |
1266 | if (word_sized) { | |
1267 | outb_p((reg & 0xff) + 1, | |
1268 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1269 | res = | |
1270 | (res << 8) + inb_p(client->addr + | |
1271 | W83781D_DATA_REG_OFFSET); | |
1272 | } | |
1273 | if (reg & 0xff00) { | |
1274 | outb_p(W83781D_REG_BANK, | |
1275 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1276 | outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); | |
1277 | } | |
9a61bf63 | 1278 | mutex_unlock(&data->lock); |
1da177e4 LT |
1279 | return res; |
1280 | } | |
1281 | ||
1282 | static int w83627thf_read_gpio5(struct i2c_client *client) | |
1283 | { | |
1284 | int res = 0xff, sel; | |
1285 | ||
1286 | superio_enter(); | |
1287 | superio_select(W83627HF_LD_GPIO5); | |
1288 | ||
1289 | /* Make sure these GPIO pins are enabled */ | |
1290 | if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) { | |
1291 | dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n"); | |
1292 | goto exit; | |
1293 | } | |
1294 | ||
1295 | /* Make sure the pins are configured for input | |
1296 | There must be at least five (VRM 9), and possibly 6 (VRM 10) */ | |
dd149c52 | 1297 | sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f; |
1da177e4 LT |
1298 | if ((sel & 0x1f) != 0x1f) { |
1299 | dev_dbg(&client->dev, "GPIO5 not configured for VID " | |
1300 | "function\n"); | |
1301 | goto exit; | |
1302 | } | |
1303 | ||
1304 | dev_info(&client->dev, "Reading VID from GPIO5\n"); | |
1305 | res = superio_inb(W83627THF_GPIO5_DR) & sel; | |
1306 | ||
1307 | exit: | |
1308 | superio_exit(); | |
1309 | return res; | |
1310 | } | |
1311 | ||
c2db6ce1 JD |
1312 | static int w83687thf_read_vid(struct i2c_client *client) |
1313 | { | |
1314 | int res = 0xff; | |
1315 | ||
1316 | superio_enter(); | |
1317 | superio_select(W83627HF_LD_HWM); | |
1318 | ||
1319 | /* Make sure these GPIO pins are enabled */ | |
1320 | if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) { | |
1321 | dev_dbg(&client->dev, "VID disabled, no VID function\n"); | |
1322 | goto exit; | |
1323 | } | |
1324 | ||
1325 | /* Make sure the pins are configured for input */ | |
1326 | if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) { | |
1327 | dev_dbg(&client->dev, "VID configured as output, " | |
1328 | "no VID function\n"); | |
1329 | goto exit; | |
1330 | } | |
1331 | ||
1332 | res = superio_inb(W83687THF_VID_DATA) & 0x3f; | |
1333 | ||
1334 | exit: | |
1335 | superio_exit(); | |
1336 | return res; | |
1337 | } | |
1338 | ||
1da177e4 LT |
1339 | static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value) |
1340 | { | |
1341 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
1342 | int word_sized; | |
1343 | ||
9a61bf63 | 1344 | mutex_lock(&data->lock); |
1da177e4 LT |
1345 | word_sized = (((reg & 0xff00) == 0x100) |
1346 | || ((reg & 0xff00) == 0x200)) | |
1347 | && (((reg & 0x00ff) == 0x53) | |
1348 | || ((reg & 0x00ff) == 0x55)); | |
1349 | if (reg & 0xff00) { | |
1350 | outb_p(W83781D_REG_BANK, | |
1351 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1352 | outb_p(reg >> 8, | |
1353 | client->addr + W83781D_DATA_REG_OFFSET); | |
1354 | } | |
1355 | outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); | |
1356 | if (word_sized) { | |
1357 | outb_p(value >> 8, | |
1358 | client->addr + W83781D_DATA_REG_OFFSET); | |
1359 | outb_p((reg & 0xff) + 1, | |
1360 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1361 | } | |
1362 | outb_p(value & 0xff, | |
1363 | client->addr + W83781D_DATA_REG_OFFSET); | |
1364 | if (reg & 0xff00) { | |
1365 | outb_p(W83781D_REG_BANK, | |
1366 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1367 | outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); | |
1368 | } | |
9a61bf63 | 1369 | mutex_unlock(&data->lock); |
1da177e4 LT |
1370 | return 0; |
1371 | } | |
1372 | ||
1da177e4 LT |
1373 | static void w83627hf_init_client(struct i2c_client *client) |
1374 | { | |
1375 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
1376 | int i; | |
1377 | int type = data->type; | |
1378 | u8 tmp; | |
1379 | ||
2251cf1a JD |
1380 | if (reset) { |
1381 | /* Resetting the chip has been the default for a long time, | |
1382 | but repeatedly caused problems (fans going to full | |
1383 | speed...) so it is now optional. It might even go away if | |
1384 | nobody reports it as being useful, as I see very little | |
1385 | reason why this would be needed at all. */ | |
1386 | dev_info(&client->dev, "If reset=1 solved a problem you were " | |
1387 | "having, please report!\n"); | |
1388 | ||
1da177e4 LT |
1389 | /* save this register */ |
1390 | i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG); | |
1391 | /* Reset all except Watchdog values and last conversion values | |
1392 | This sets fan-divs to 2, among others */ | |
1393 | w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80); | |
1394 | /* Restore the register and disable power-on abnormal beep. | |
1395 | This saves FAN 1/2/3 input/output values set by BIOS. */ | |
1396 | w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); | |
1397 | /* Disable master beep-enable (reset turns it on). | |
1398 | Individual beeps should be reset to off but for some reason | |
1399 | disabling this bit helps some people not get beeped */ | |
1400 | w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0); | |
1401 | } | |
1402 | ||
1403 | /* Minimize conflicts with other winbond i2c-only clients... */ | |
1404 | /* disable i2c subclients... how to disable main i2c client?? */ | |
1405 | /* force i2c address to relatively uncommon address */ | |
1406 | w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89); | |
1407 | w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c); | |
1408 | ||
1409 | /* Read VID only once */ | |
1410 | if (w83627hf == data->type || w83637hf == data->type) { | |
1411 | int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV); | |
1412 | int hi = w83627hf_read_value(client, W83781D_REG_CHIPID); | |
1413 | data->vid = (lo & 0x0f) | ((hi & 0x01) << 4); | |
1414 | } else if (w83627thf == data->type) { | |
dd149c52 | 1415 | data->vid = w83627thf_read_gpio5(client); |
c2db6ce1 JD |
1416 | } else if (w83687thf == data->type) { |
1417 | data->vid = w83687thf_read_vid(client); | |
1da177e4 LT |
1418 | } |
1419 | ||
1420 | /* Read VRM & OVT Config only once */ | |
c2db6ce1 JD |
1421 | if (w83627thf == data->type || w83637hf == data->type |
1422 | || w83687thf == data->type) { | |
1da177e4 LT |
1423 | data->vrm_ovt = |
1424 | w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG); | |
1da177e4 LT |
1425 | } |
1426 | ||
1427 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); | |
1428 | for (i = 1; i <= 3; i++) { | |
1429 | if (!(tmp & BIT_SCFG1[i - 1])) { | |
1430 | data->sens[i - 1] = W83781D_DEFAULT_BETA; | |
1431 | } else { | |
1432 | if (w83627hf_read_value | |
1433 | (client, | |
1434 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) | |
1435 | data->sens[i - 1] = 1; | |
1436 | else | |
1437 | data->sens[i - 1] = 2; | |
1438 | } | |
1439 | if ((type == w83697hf) && (i == 2)) | |
1440 | break; | |
1441 | } | |
1442 | ||
1443 | if(init) { | |
1444 | /* Enable temp2 */ | |
1445 | tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG); | |
1446 | if (tmp & 0x01) { | |
1447 | dev_warn(&client->dev, "Enabling temp2, readings " | |
1448 | "might not make sense\n"); | |
1449 | w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG, | |
1450 | tmp & 0xfe); | |
1451 | } | |
1452 | ||
1453 | /* Enable temp3 */ | |
1454 | if (type != w83697hf) { | |
1455 | tmp = w83627hf_read_value(client, | |
1456 | W83781D_REG_TEMP3_CONFIG); | |
1457 | if (tmp & 0x01) { | |
1458 | dev_warn(&client->dev, "Enabling temp3, " | |
1459 | "readings might not make sense\n"); | |
1460 | w83627hf_write_value(client, | |
1461 | W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); | |
1462 | } | |
1463 | } | |
1da177e4 LT |
1464 | } |
1465 | ||
1466 | /* Start monitoring */ | |
1467 | w83627hf_write_value(client, W83781D_REG_CONFIG, | |
1468 | (w83627hf_read_value(client, | |
1469 | W83781D_REG_CONFIG) & 0xf7) | |
1470 | | 0x01); | |
1471 | } | |
1472 | ||
1473 | static struct w83627hf_data *w83627hf_update_device(struct device *dev) | |
1474 | { | |
1475 | struct i2c_client *client = to_i2c_client(dev); | |
1476 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
1477 | int i; | |
1478 | ||
9a61bf63 | 1479 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1480 | |
1481 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
1482 | || !data->valid) { | |
1483 | for (i = 0; i <= 8; i++) { | |
1484 | /* skip missing sensors */ | |
1485 | if (((data->type == w83697hf) && (i == 1)) || | |
c2db6ce1 | 1486 | ((data->type != w83627hf && data->type != w83697hf) |
4a1c4447 | 1487 | && (i == 5 || i == 6))) |
1da177e4 LT |
1488 | continue; |
1489 | data->in[i] = | |
1490 | w83627hf_read_value(client, W83781D_REG_IN(i)); | |
1491 | data->in_min[i] = | |
1492 | w83627hf_read_value(client, | |
1493 | W83781D_REG_IN_MIN(i)); | |
1494 | data->in_max[i] = | |
1495 | w83627hf_read_value(client, | |
1496 | W83781D_REG_IN_MAX(i)); | |
1497 | } | |
1498 | for (i = 1; i <= 3; i++) { | |
1499 | data->fan[i - 1] = | |
1500 | w83627hf_read_value(client, W83781D_REG_FAN(i)); | |
1501 | data->fan_min[i - 1] = | |
1502 | w83627hf_read_value(client, | |
1503 | W83781D_REG_FAN_MIN(i)); | |
1504 | } | |
1505 | for (i = 1; i <= 3; i++) { | |
1506 | u8 tmp = w83627hf_read_value(client, | |
1507 | W836X7HF_REG_PWM(data->type, i)); | |
1508 | /* bits 0-3 are reserved in 627THF */ | |
1509 | if (data->type == w83627thf) | |
1510 | tmp &= 0xf0; | |
1511 | data->pwm[i - 1] = tmp; | |
1512 | if(i == 2 && | |
1513 | (data->type == w83627hf || data->type == w83697hf)) | |
1514 | break; | |
1515 | } | |
1516 | ||
1517 | data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1)); | |
1518 | data->temp_max = | |
1519 | w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1)); | |
1520 | data->temp_max_hyst = | |
1521 | w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1)); | |
1522 | data->temp_add[0] = | |
1523 | w83627hf_read_value(client, W83781D_REG_TEMP(2)); | |
1524 | data->temp_max_add[0] = | |
1525 | w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2)); | |
1526 | data->temp_max_hyst_add[0] = | |
1527 | w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2)); | |
1528 | if (data->type != w83697hf) { | |
1529 | data->temp_add[1] = | |
1530 | w83627hf_read_value(client, W83781D_REG_TEMP(3)); | |
1531 | data->temp_max_add[1] = | |
1532 | w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3)); | |
1533 | data->temp_max_hyst_add[1] = | |
1534 | w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3)); | |
1535 | } | |
1536 | ||
1537 | i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV); | |
1538 | data->fan_div[0] = (i >> 4) & 0x03; | |
1539 | data->fan_div[1] = (i >> 6) & 0x03; | |
1540 | if (data->type != w83697hf) { | |
1541 | data->fan_div[2] = (w83627hf_read_value(client, | |
1542 | W83781D_REG_PIN) >> 6) & 0x03; | |
1543 | } | |
1544 | i = w83627hf_read_value(client, W83781D_REG_VBAT); | |
1545 | data->fan_div[0] |= (i >> 3) & 0x04; | |
1546 | data->fan_div[1] |= (i >> 4) & 0x04; | |
1547 | if (data->type != w83697hf) | |
1548 | data->fan_div[2] |= (i >> 5) & 0x04; | |
1549 | data->alarms = | |
1550 | w83627hf_read_value(client, W83781D_REG_ALARM1) | | |
1551 | (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) | | |
1552 | (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16); | |
1553 | i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2); | |
1554 | data->beep_enable = i >> 7; | |
1555 | data->beep_mask = ((i & 0x7f) << 8) | | |
1556 | w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) | | |
1557 | w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16; | |
1558 | data->last_updated = jiffies; | |
1559 | data->valid = 1; | |
1560 | } | |
1561 | ||
9a61bf63 | 1562 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1563 | |
1564 | return data; | |
1565 | } | |
1566 | ||
1567 | static int __init sensors_w83627hf_init(void) | |
1568 | { | |
2d8672c5 JD |
1569 | if (w83627hf_find(0x2e, &address) |
1570 | && w83627hf_find(0x4e, &address)) { | |
1da177e4 LT |
1571 | return -ENODEV; |
1572 | } | |
1da177e4 | 1573 | |
fde09509 | 1574 | return i2c_isa_add_driver(&w83627hf_driver); |
1da177e4 LT |
1575 | } |
1576 | ||
1577 | static void __exit sensors_w83627hf_exit(void) | |
1578 | { | |
fde09509 | 1579 | i2c_isa_del_driver(&w83627hf_driver); |
1da177e4 LT |
1580 | } |
1581 | ||
1582 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " | |
1583 | "Philip Edelbrock <phil@netroedge.com>, " | |
1584 | "and Mark Studebaker <mdsxyz123@yahoo.com>"); | |
1585 | MODULE_DESCRIPTION("W83627HF driver"); | |
1586 | MODULE_LICENSE("GPL"); | |
1587 | ||
1588 | module_init(sensors_w83627hf_init); | |
1589 | module_exit(sensors_w83627hf_exit); |