[SCSI] hptiop: fix sense_buffer access bug
[deliverable/linux.git] / drivers / hwmon / w83781d.c
CommitLineData
1da177e4
LT
1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
7666c13c
JD
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
1da177e4
LT
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 as99127f 7 3 0 3 0x31 0x12c3 yes no
29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
31 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
1da177e4
LT
32 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
33 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
1da177e4
LT
34
35*/
36
1da177e4
LT
37#include <linux/module.h>
38#include <linux/init.h>
39#include <linux/slab.h>
40#include <linux/jiffies.h>
41#include <linux/i2c.h>
7666c13c
JD
42#include <linux/platform_device.h>
43#include <linux/ioport.h>
943b0830 44#include <linux/hwmon.h>
303760b4 45#include <linux/hwmon-vid.h>
34875337 46#include <linux/hwmon-sysfs.h>
311ce2ef 47#include <linux/sysfs.h>
943b0830 48#include <linux/err.h>
9a61bf63 49#include <linux/mutex.h>
1da177e4
LT
50#include <asm/io.h>
51#include "lm75.h"
52
7666c13c
JD
53/* ISA device, if found */
54static struct platform_device *pdev;
55
1da177e4
LT
56/* Addresses to scan */
57static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
58 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
59 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
2d8672c5 60static unsigned short isa_address = 0x290;
1da177e4
LT
61
62/* Insmod parameters */
f4b50261 63I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
1da177e4
LT
64I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
65 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
66
fabddcd4
JD
67static int reset;
68module_param(reset, bool, 0);
69MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
70
1da177e4
LT
71static int init = 1;
72module_param(init, bool, 0);
73MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
74
75/* Constants specified below */
76
77/* Length of ISA address segment */
78#define W83781D_EXTENT 8
79
80/* Where are the ISA address/data registers relative to the base address */
81#define W83781D_ADDR_REG_OFFSET 5
82#define W83781D_DATA_REG_OFFSET 6
83
34875337
JD
84/* The device registers */
85/* in nr from 0 to 8 */
1da177e4
LT
86#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
87 (0x554 + (((nr) - 7) * 2)))
88#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
89 (0x555 + (((nr) - 7) * 2)))
90#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
91 (0x550 + (nr) - 7))
92
34875337
JD
93/* fan nr from 0 to 2 */
94#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
95#define W83781D_REG_FAN(nr) (0x28 + (nr))
1da177e4
LT
96
97#define W83781D_REG_BANK 0x4E
98#define W83781D_REG_TEMP2_CONFIG 0x152
99#define W83781D_REG_TEMP3_CONFIG 0x252
34875337 100/* temp nr from 1 to 3 */
1da177e4
LT
101#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
102 ((nr == 2) ? (0x0150) : \
103 (0x27)))
104#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
105 ((nr == 2) ? (0x153) : \
106 (0x3A)))
107#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
108 ((nr == 2) ? (0x155) : \
109 (0x39)))
110
111#define W83781D_REG_CONFIG 0x40
c7f5d7ed
JD
112
113/* Interrupt status (W83781D, AS99127F) */
1da177e4
LT
114#define W83781D_REG_ALARM1 0x41
115#define W83781D_REG_ALARM2 0x42
1da177e4 116
c7f5d7ed
JD
117/* Real-time status (W83782D, W83783S, W83627HF) */
118#define W83782D_REG_ALARM1 0x459
119#define W83782D_REG_ALARM2 0x45A
120#define W83782D_REG_ALARM3 0x45B
121
1da177e4
LT
122#define W83781D_REG_BEEP_CONFIG 0x4D
123#define W83781D_REG_BEEP_INTS1 0x56
124#define W83781D_REG_BEEP_INTS2 0x57
125#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
126
127#define W83781D_REG_VID_FANDIV 0x47
128
129#define W83781D_REG_CHIPID 0x49
130#define W83781D_REG_WCHIPID 0x58
131#define W83781D_REG_CHIPMAN 0x4F
132#define W83781D_REG_PIN 0x4B
133
134/* 782D/783S only */
135#define W83781D_REG_VBAT 0x5D
136
137/* PWM 782D (1-4) and 783S (1-2) only */
34875337 138static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
1da177e4
LT
139#define W83781D_REG_PWMCLK12 0x5C
140#define W83781D_REG_PWMCLK34 0x45C
1da177e4
LT
141
142#define W83781D_REG_I2C_ADDR 0x48
143#define W83781D_REG_I2C_SUBADDR 0x4A
144
145/* The following are undocumented in the data sheets however we
146 received the information in an email from Winbond tech support */
147/* Sensor selection - not on 781d */
148#define W83781D_REG_SCFG1 0x5D
149static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
150
151#define W83781D_REG_SCFG2 0x59
152static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
153
154#define W83781D_DEFAULT_BETA 3435
155
156/* RT Table registers */
157#define W83781D_REG_RT_IDX 0x50
158#define W83781D_REG_RT_VAL 0x51
159
474d00a8
JD
160/* Conversions */
161#define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
162#define IN_FROM_REG(val) ((val) * 16)
1da177e4
LT
163
164static inline u8
165FAN_TO_REG(long rpm, int div)
166{
167 if (rpm == 0)
168 return 255;
169 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
170 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
171}
172
474d00a8
JD
173static inline long
174FAN_FROM_REG(u8 val, int div)
175{
176 if (val == 0)
177 return -1;
178 if (val == 255)
179 return 0;
180 return 1350000 / (val * div);
181}
1da177e4 182
474d00a8
JD
183#define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
184#define TEMP_FROM_REG(val) ((val) * 1000)
1da177e4 185
1da177e4
LT
186#define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
187 (val) ^ 0x7fff : (val))
188#define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
189 (~(val)) & 0x7fff : (val) & 0xffffff)
190
1da177e4
LT
191#define DIV_FROM_REG(val) (1 << (val))
192
193static inline u8
194DIV_TO_REG(long val, enum chips type)
195{
196 int i;
197 val = SENSORS_LIMIT(val, 1,
198 ((type == w83781d
199 || type == as99127f) ? 8 : 128)) >> 1;
abc01922 200 for (i = 0; i < 7; i++) {
1da177e4
LT
201 if (val == 0)
202 break;
203 val >>= 1;
204 }
474d00a8 205 return i;
1da177e4
LT
206}
207
208/* There are some complications in a module like this. First off, W83781D chips
209 may be both present on the SMBus and the ISA bus, and we have to handle
210 those cases separately at some places. Second, there might be several
211 W83781D chips available (well, actually, that is probably never done; but
212 it is a clean illustration of how to handle a case like that). Finally,
213 a specific chip may be attached to *both* ISA and SMBus, and we would
214 not like to detect it double. Fortunately, in the case of the W83781D at
215 least, a register tells us what SMBus address we are on, so that helps
216 a bit - except if there could be more than one SMBus. Groan. No solution
217 for this yet. */
218
7666c13c
JD
219/* For ISA chips, we abuse the i2c_client addr and name fields. We also use
220 the driver field to differentiate between I2C and ISA chips. */
1da177e4
LT
221struct w83781d_data {
222 struct i2c_client client;
1beeffe4 223 struct device *hwmon_dev;
9a61bf63 224 struct mutex lock;
1da177e4
LT
225 enum chips type;
226
9a61bf63 227 struct mutex update_lock;
1da177e4
LT
228 char valid; /* !=0 if following fields are valid */
229 unsigned long last_updated; /* In jiffies */
230
231 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
232 /* array of 2 pointers to subclients */
233
234 u8 in[9]; /* Register value - 8 & 9 for 782D only */
235 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
236 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
237 u8 fan[3]; /* Register value */
238 u8 fan_min[3]; /* Register value */
474d00a8
JD
239 s8 temp; /* Register value */
240 s8 temp_max; /* Register value */
241 s8 temp_max_hyst; /* Register value */
1da177e4
LT
242 u16 temp_add[2]; /* Register value */
243 u16 temp_max_add[2]; /* Register value */
244 u16 temp_max_hyst_add[2]; /* Register value */
245 u8 fan_div[3]; /* Register encoding, shifted right */
246 u8 vid; /* Register encoding, combined */
247 u32 alarms; /* Register encoding, combined */
248 u32 beep_mask; /* Register encoding, combined */
249 u8 beep_enable; /* Boolean */
250 u8 pwm[4]; /* Register value */
34875337 251 u8 pwm2_enable; /* Boolean */
1da177e4
LT
252 u16 sens[3]; /* 782D/783S only.
253 1 = pentium diode; 2 = 3904 diode;
b26f9330 254 4 = thermistor */
1da177e4
LT
255 u8 vrm;
256};
257
258static int w83781d_attach_adapter(struct i2c_adapter *adapter);
259static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
260static int w83781d_detach_client(struct i2c_client *client);
261
7666c13c
JD
262static int __devinit w83781d_isa_probe(struct platform_device *pdev);
263static int __devexit w83781d_isa_remove(struct platform_device *pdev);
264
31b8dc4d
JD
265static int w83781d_read_value(struct w83781d_data *data, u16 reg);
266static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
1da177e4 267static struct w83781d_data *w83781d_update_device(struct device *dev);
7666c13c 268static void w83781d_init_device(struct device *dev);
1da177e4
LT
269
270static struct i2c_driver w83781d_driver = {
cdaf7934 271 .driver = {
cdaf7934
LR
272 .name = "w83781d",
273 },
1da177e4 274 .id = I2C_DRIVERID_W83781D,
1da177e4
LT
275 .attach_adapter = w83781d_attach_adapter,
276 .detach_client = w83781d_detach_client,
277};
278
7666c13c 279static struct platform_driver w83781d_isa_driver = {
cdaf7934 280 .driver = {
87218842 281 .owner = THIS_MODULE,
7666c13c 282 .name = "w83781d",
cdaf7934 283 },
7666c13c
JD
284 .probe = w83781d_isa_probe,
285 .remove = w83781d_isa_remove,
fde09509
JD
286};
287
288
1da177e4
LT
289/* following are the sysfs callback functions */
290#define show_in_reg(reg) \
34875337
JD
291static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
292 char *buf) \
1da177e4 293{ \
34875337 294 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 295 struct w83781d_data *data = w83781d_update_device(dev); \
34875337
JD
296 return sprintf(buf, "%ld\n", \
297 (long)IN_FROM_REG(data->reg[attr->index])); \
1da177e4
LT
298}
299show_in_reg(in);
300show_in_reg(in_min);
301show_in_reg(in_max);
302
303#define store_in_reg(REG, reg) \
34875337
JD
304static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
305 *da, const char *buf, size_t count) \
1da177e4 306{ \
34875337 307 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 308 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 309 int nr = attr->index; \
1da177e4
LT
310 u32 val; \
311 \
474d00a8 312 val = simple_strtoul(buf, NULL, 10); \
1da177e4 313 \
9a61bf63 314 mutex_lock(&data->update_lock); \
1da177e4 315 data->in_##reg[nr] = IN_TO_REG(val); \
31b8dc4d 316 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
1da177e4 317 \
9a61bf63 318 mutex_unlock(&data->update_lock); \
1da177e4
LT
319 return count; \
320}
321store_in_reg(MIN, min);
322store_in_reg(MAX, max);
323
1da177e4 324#define sysfs_in_offsets(offset) \
34875337
JD
325static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
326 show_in, NULL, offset); \
327static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
328 show_in_min, store_in_min, offset); \
329static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
330 show_in_max, store_in_max, offset)
1da177e4
LT
331
332sysfs_in_offsets(0);
333sysfs_in_offsets(1);
334sysfs_in_offsets(2);
335sysfs_in_offsets(3);
336sysfs_in_offsets(4);
337sysfs_in_offsets(5);
338sysfs_in_offsets(6);
339sysfs_in_offsets(7);
340sysfs_in_offsets(8);
341
1da177e4 342#define show_fan_reg(reg) \
34875337
JD
343static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
344 char *buf) \
1da177e4 345{ \
34875337 346 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4
LT
347 struct w83781d_data *data = w83781d_update_device(dev); \
348 return sprintf(buf,"%ld\n", \
34875337
JD
349 FAN_FROM_REG(data->reg[attr->index], \
350 DIV_FROM_REG(data->fan_div[attr->index]))); \
1da177e4
LT
351}
352show_fan_reg(fan);
353show_fan_reg(fan_min);
354
355static ssize_t
34875337
JD
356store_fan_min(struct device *dev, struct device_attribute *da,
357 const char *buf, size_t count)
1da177e4 358{
34875337 359 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 360 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 361 int nr = attr->index;
1da177e4
LT
362 u32 val;
363
364 val = simple_strtoul(buf, NULL, 10);
365
9a61bf63 366 mutex_lock(&data->update_lock);
34875337
JD
367 data->fan_min[nr] =
368 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
31b8dc4d 369 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
34875337 370 data->fan_min[nr]);
1da177e4 371
9a61bf63 372 mutex_unlock(&data->update_lock);
1da177e4
LT
373 return count;
374}
375
34875337
JD
376static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
377static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
378 show_fan_min, store_fan_min, 0);
379static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
380static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
381 show_fan_min, store_fan_min, 1);
382static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
383static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
384 show_fan_min, store_fan_min, 2);
1da177e4 385
1da177e4 386#define show_temp_reg(reg) \
34875337
JD
387static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
388 char *buf) \
1da177e4 389{ \
34875337 390 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 391 struct w83781d_data *data = w83781d_update_device(dev); \
34875337 392 int nr = attr->index; \
1da177e4
LT
393 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
394 return sprintf(buf,"%d\n", \
395 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
396 } else { /* TEMP1 */ \
397 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
398 } \
399}
400show_temp_reg(temp);
401show_temp_reg(temp_max);
402show_temp_reg(temp_max_hyst);
403
404#define store_temp_reg(REG, reg) \
34875337
JD
405static ssize_t store_temp_##reg (struct device *dev, \
406 struct device_attribute *da, const char *buf, size_t count) \
1da177e4 407{ \
34875337 408 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 409 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 410 int nr = attr->index; \
5bfedac0 411 long val; \
1da177e4
LT
412 \
413 val = simple_strtol(buf, NULL, 10); \
414 \
9a61bf63 415 mutex_lock(&data->update_lock); \
1da177e4
LT
416 \
417 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
418 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
31b8dc4d 419 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT
420 data->temp_##reg##_add[nr-2]); \
421 } else { /* TEMP1 */ \
422 data->temp_##reg = TEMP_TO_REG(val); \
31b8dc4d 423 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT
424 data->temp_##reg); \
425 } \
426 \
9a61bf63 427 mutex_unlock(&data->update_lock); \
1da177e4
LT
428 return count; \
429}
430store_temp_reg(OVER, max);
431store_temp_reg(HYST, max_hyst);
432
1da177e4 433#define sysfs_temp_offsets(offset) \
34875337
JD
434static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
435 show_temp, NULL, offset); \
436static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
437 show_temp_max, store_temp_max, offset); \
438static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
439 show_temp_max_hyst, store_temp_max_hyst, offset);
1da177e4
LT
440
441sysfs_temp_offsets(1);
442sysfs_temp_offsets(2);
443sysfs_temp_offsets(3);
444
1da177e4 445static ssize_t
e404e274 446show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
447{
448 struct w83781d_data *data = w83781d_update_device(dev);
449 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
450}
451
311ce2ef
JC
452static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
453
1da177e4 454static ssize_t
e404e274 455show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 456{
90d6619a 457 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT
458 return sprintf(buf, "%ld\n", (long) data->vrm);
459}
460
461static ssize_t
e404e274 462store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 463{
7666c13c 464 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT
465 u32 val;
466
467 val = simple_strtoul(buf, NULL, 10);
468 data->vrm = val;
469
470 return count;
471}
472
311ce2ef
JC
473static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
474
1da177e4 475static ssize_t
e404e274 476show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
477{
478 struct w83781d_data *data = w83781d_update_device(dev);
68188ba7 479 return sprintf(buf, "%u\n", data->alarms);
1da177e4
LT
480}
481
311ce2ef
JC
482static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
483
7d4a1374
JD
484static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
485 char *buf)
486{
487 struct w83781d_data *data = w83781d_update_device(dev);
488 int bitnr = to_sensor_dev_attr(attr)->index;
489 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
490}
491
492/* The W83781D has a single alarm bit for temp2 and temp3 */
493static ssize_t show_temp3_alarm(struct device *dev,
494 struct device_attribute *attr, char *buf)
495{
496 struct w83781d_data *data = w83781d_update_device(dev);
497 int bitnr = (data->type == w83781d) ? 5 : 13;
498 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
499}
500
501static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
502static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
503static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
504static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
505static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
506static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
507static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
508static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
509static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
510static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
511static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
512static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
513static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
514static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
515static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
516
e404e274 517static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
518{
519 struct w83781d_data *data = w83781d_update_device(dev);
520 return sprintf(buf, "%ld\n",
521 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
522}
e404e274 523static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
524{
525 struct w83781d_data *data = w83781d_update_device(dev);
474d00a8 526 return sprintf(buf, "%ld\n", (long)data->beep_enable);
1da177e4
LT
527}
528
1da177e4 529static ssize_t
34875337
JD
530store_beep_mask(struct device *dev, struct device_attribute *attr,
531 const char *buf, size_t count)
1da177e4 532{
7666c13c 533 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 534 u32 val;
1da177e4
LT
535
536 val = simple_strtoul(buf, NULL, 10);
537
9a61bf63 538 mutex_lock(&data->update_lock);
34875337
JD
539 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
540 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
541 data->beep_mask & 0xff);
542 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
543 ((data->beep_mask >> 8) & 0x7f)
544 | data->beep_enable << 7);
545 if (data->type != w83781d && data->type != as99127f) {
546 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
547 ((data->beep_mask) >> 16) & 0xff);
548 }
549 mutex_unlock(&data->update_lock);
1da177e4 550
34875337
JD
551 return count;
552}
1da177e4 553
34875337
JD
554static ssize_t
555store_beep_enable(struct device *dev, struct device_attribute *attr,
556 const char *buf, size_t count)
557{
558 struct w83781d_data *data = dev_get_drvdata(dev);
559 u32 val;
1da177e4 560
34875337
JD
561 val = simple_strtoul(buf, NULL, 10);
562 if (val != 0 && val != 1)
563 return -EINVAL;
1da177e4 564
34875337
JD
565 mutex_lock(&data->update_lock);
566 data->beep_enable = val;
567 val = w83781d_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f;
568 val |= data->beep_enable << 7;
569 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, val);
9a61bf63 570 mutex_unlock(&data->update_lock);
34875337 571
1da177e4
LT
572 return count;
573}
574
34875337
JD
575static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
576 show_beep_mask, store_beep_mask);
577static DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
578 show_beep_enable, store_beep_enable);
1da177e4 579
7d4a1374
JD
580static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
581 char *buf)
582{
583 struct w83781d_data *data = w83781d_update_device(dev);
584 int bitnr = to_sensor_dev_attr(attr)->index;
585 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
586}
587
588static ssize_t
589store_beep(struct device *dev, struct device_attribute *attr,
590 const char *buf, size_t count)
591{
592 struct w83781d_data *data = dev_get_drvdata(dev);
593 int bitnr = to_sensor_dev_attr(attr)->index;
594 unsigned long bit;
595 u8 reg;
596
597 bit = simple_strtoul(buf, NULL, 10);
598 if (bit & ~1)
599 return -EINVAL;
600
601 mutex_lock(&data->update_lock);
602 if (bit)
603 data->beep_mask |= (1 << bitnr);
604 else
605 data->beep_mask &= ~(1 << bitnr);
606
607 if (bitnr < 8) {
608 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
609 if (bit)
610 reg |= (1 << bitnr);
611 else
612 reg &= ~(1 << bitnr);
613 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
614 } else if (bitnr < 16) {
615 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
616 if (bit)
617 reg |= (1 << (bitnr - 8));
618 else
619 reg &= ~(1 << (bitnr - 8));
620 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
621 } else {
622 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
623 if (bit)
624 reg |= (1 << (bitnr - 16));
625 else
626 reg &= ~(1 << (bitnr - 16));
627 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
628 }
629 mutex_unlock(&data->update_lock);
630
631 return count;
632}
633
634/* The W83781D has a single beep bit for temp2 and temp3 */
635static ssize_t show_temp3_beep(struct device *dev,
636 struct device_attribute *attr, char *buf)
637{
638 struct w83781d_data *data = w83781d_update_device(dev);
639 int bitnr = (data->type == w83781d) ? 5 : 13;
640 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
641}
642
643static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
644 show_beep, store_beep, 0);
645static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
646 show_beep, store_beep, 1);
647static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
648 show_beep, store_beep, 2);
649static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
650 show_beep, store_beep, 3);
651static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
652 show_beep, store_beep, 8);
653static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
654 show_beep, store_beep, 9);
655static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
656 show_beep, store_beep, 10);
657static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
658 show_beep, store_beep, 16);
659static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
660 show_beep, store_beep, 17);
661static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
662 show_beep, store_beep, 6);
663static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
664 show_beep, store_beep, 7);
665static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
666 show_beep, store_beep, 11);
667static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
668 show_beep, store_beep, 4);
669static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
670 show_beep, store_beep, 5);
671static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
672 show_temp3_beep, store_beep, 13);
673
1da177e4 674static ssize_t
34875337 675show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 676{
34875337 677 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4
LT
678 struct w83781d_data *data = w83781d_update_device(dev);
679 return sprintf(buf, "%ld\n",
34875337 680 (long) DIV_FROM_REG(data->fan_div[attr->index]));
1da177e4
LT
681}
682
683/* Note: we save and restore the fan minimum here, because its value is
684 determined in part by the fan divisor. This follows the principle of
d6e05edc 685 least surprise; the user doesn't expect the fan minimum to change just
1da177e4
LT
686 because the divisor changed. */
687static ssize_t
34875337
JD
688store_fan_div(struct device *dev, struct device_attribute *da,
689 const char *buf, size_t count)
1da177e4 690{
34875337 691 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 692 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4 693 unsigned long min;
34875337 694 int nr = attr->index;
1da177e4
LT
695 u8 reg;
696 unsigned long val = simple_strtoul(buf, NULL, 10);
697
9a61bf63 698 mutex_lock(&data->update_lock);
1da177e4
LT
699
700 /* Save fan_min */
701 min = FAN_FROM_REG(data->fan_min[nr],
702 DIV_FROM_REG(data->fan_div[nr]));
703
704 data->fan_div[nr] = DIV_TO_REG(val, data->type);
705
31b8dc4d 706 reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1da177e4
LT
707 & (nr==0 ? 0xcf : 0x3f))
708 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
31b8dc4d 709 w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4
LT
710
711 /* w83781d and as99127f don't have extended divisor bits */
712 if (data->type != w83781d && data->type != as99127f) {
31b8dc4d 713 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
1da177e4
LT
714 & ~(1 << (5 + nr)))
715 | ((data->fan_div[nr] & 0x04) << (3 + nr));
31b8dc4d 716 w83781d_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT
717 }
718
719 /* Restore fan_min */
720 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
34875337 721 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 722
9a61bf63 723 mutex_unlock(&data->update_lock);
1da177e4
LT
724 return count;
725}
726
34875337
JD
727static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
728 show_fan_div, store_fan_div, 0);
729static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
730 show_fan_div, store_fan_div, 1);
731static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
732 show_fan_div, store_fan_div, 2);
1da177e4 733
1da177e4 734static ssize_t
34875337 735show_pwm(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 736{
34875337 737 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 738 struct w83781d_data *data = w83781d_update_device(dev);
34875337 739 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
1da177e4
LT
740}
741
742static ssize_t
34875337 743show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
1da177e4
LT
744{
745 struct w83781d_data *data = w83781d_update_device(dev);
34875337 746 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
1da177e4
LT
747}
748
749static ssize_t
34875337
JD
750store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
751 size_t count)
1da177e4 752{
34875337 753 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 754 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 755 int nr = attr->index;
1da177e4
LT
756 u32 val;
757
758 val = simple_strtoul(buf, NULL, 10);
759
9a61bf63 760 mutex_lock(&data->update_lock);
34875337
JD
761 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
762 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
9a61bf63 763 mutex_unlock(&data->update_lock);
1da177e4
LT
764 return count;
765}
766
767static ssize_t
34875337
JD
768store_pwm2_enable(struct device *dev, struct device_attribute *da,
769 const char *buf, size_t count)
1da177e4 770{
7666c13c 771 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT
772 u32 val, reg;
773
774 val = simple_strtoul(buf, NULL, 10);
775
9a61bf63 776 mutex_lock(&data->update_lock);
1da177e4
LT
777
778 switch (val) {
779 case 0:
780 case 1:
31b8dc4d
JD
781 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
782 w83781d_write_value(data, W83781D_REG_PWMCLK12,
1da177e4
LT
783 (reg & 0xf7) | (val << 3));
784
31b8dc4d
JD
785 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
786 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
1da177e4
LT
787 (reg & 0xef) | (!val << 4));
788
34875337 789 data->pwm2_enable = val;
1da177e4
LT
790 break;
791
792 default:
9a61bf63 793 mutex_unlock(&data->update_lock);
1da177e4
LT
794 return -EINVAL;
795 }
796
9a61bf63 797 mutex_unlock(&data->update_lock);
1da177e4
LT
798 return count;
799}
800
34875337
JD
801static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
802static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
803static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
804static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
805/* only PWM2 can be enabled/disabled */
806static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
807 show_pwm2_enable, store_pwm2_enable);
1da177e4 808
1da177e4 809static ssize_t
34875337 810show_sensor(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 811{
34875337 812 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 813 struct w83781d_data *data = w83781d_update_device(dev);
34875337 814 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
1da177e4
LT
815}
816
817static ssize_t
34875337
JD
818store_sensor(struct device *dev, struct device_attribute *da,
819 const char *buf, size_t count)
1da177e4 820{
34875337 821 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 822 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 823 int nr = attr->index;
1da177e4
LT
824 u32 val, tmp;
825
826 val = simple_strtoul(buf, NULL, 10);
827
9a61bf63 828 mutex_lock(&data->update_lock);
1da177e4
LT
829
830 switch (val) {
831 case 1: /* PII/Celeron diode */
31b8dc4d
JD
832 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
833 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 834 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD
835 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
836 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD
837 tmp | BIT_SCFG2[nr]);
838 data->sens[nr] = val;
1da177e4
LT
839 break;
840 case 2: /* 3904 */
31b8dc4d
JD
841 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
842 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 843 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD
844 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
845 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD
846 tmp & ~BIT_SCFG2[nr]);
847 data->sens[nr] = val;
1da177e4 848 break;
b26f9330
JD
849 case W83781D_DEFAULT_BETA:
850 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
851 "instead\n", W83781D_DEFAULT_BETA);
852 /* fall through */
853 case 4: /* thermistor */
31b8dc4d
JD
854 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
855 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337
JD
856 tmp & ~BIT_SCFG1[nr]);
857 data->sens[nr] = val;
1da177e4
LT
858 break;
859 default:
b26f9330
JD
860 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
861 (long) val);
1da177e4
LT
862 break;
863 }
864
9a61bf63 865 mutex_unlock(&data->update_lock);
1da177e4
LT
866 return count;
867}
868
34875337
JD
869static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
870 show_sensor, store_sensor, 0);
871static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
393cdad6 872 show_sensor, store_sensor, 1);
34875337 873static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
393cdad6 874 show_sensor, store_sensor, 2);
1da177e4 875
7666c13c
JD
876/* I2C devices get this name attribute automatically, but for ISA devices
877 we must create it by ourselves. */
878static ssize_t
879show_name(struct device *dev, struct device_attribute *devattr, char *buf)
880{
881 struct w83781d_data *data = dev_get_drvdata(dev);
882 return sprintf(buf, "%s\n", data->client.name);
883}
884static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
885
1da177e4
LT
886/* This function is called when:
887 * w83781d_driver is inserted (when this module is loaded), for each
888 available adapter
889 * when a new adapter is inserted (and w83781d_driver is still present) */
890static int
891w83781d_attach_adapter(struct i2c_adapter *adapter)
892{
893 if (!(adapter->class & I2C_CLASS_HWMON))
894 return 0;
2ed2dc3c 895 return i2c_probe(adapter, &addr_data, w83781d_detect);
1da177e4
LT
896}
897
898/* Assumes that adapter is of I2C, not ISA variety.
899 * OTHERWISE DON'T CALL THIS
900 */
901static int
902w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
903 struct i2c_client *new_client)
904{
905 int i, val1 = 0, id;
906 int err;
907 const char *client_name = "";
908 struct w83781d_data *data = i2c_get_clientdata(new_client);
909
ba9c2e8d 910 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT
911 if (!(data->lm75[0])) {
912 err = -ENOMEM;
913 goto ERROR_SC_0;
914 }
1da177e4
LT
915
916 id = i2c_adapter_id(adapter);
917
918 if (force_subclients[0] == id && force_subclients[1] == address) {
919 for (i = 2; i <= 3; i++) {
920 if (force_subclients[i] < 0x48 ||
921 force_subclients[i] > 0x4f) {
922 dev_err(&new_client->dev, "Invalid subclient "
923 "address %d; must be 0x48-0x4f\n",
924 force_subclients[i]);
925 err = -EINVAL;
926 goto ERROR_SC_1;
927 }
928 }
31b8dc4d 929 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
1da177e4
LT
930 (force_subclients[2] & 0x07) |
931 ((force_subclients[3] & 0x07) << 4));
932 data->lm75[0]->addr = force_subclients[2];
933 } else {
31b8dc4d 934 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
1da177e4
LT
935 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
936 }
937
938 if (kind != w83783s) {
ba9c2e8d 939 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT
940 if (!(data->lm75[1])) {
941 err = -ENOMEM;
942 goto ERROR_SC_1;
943 }
1da177e4
LT
944
945 if (force_subclients[0] == id &&
946 force_subclients[1] == address) {
947 data->lm75[1]->addr = force_subclients[3];
948 } else {
949 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
950 }
951 if (data->lm75[0]->addr == data->lm75[1]->addr) {
952 dev_err(&new_client->dev,
953 "Duplicate addresses 0x%x for subclients.\n",
954 data->lm75[0]->addr);
955 err = -EBUSY;
956 goto ERROR_SC_2;
957 }
958 }
959
960 if (kind == w83781d)
961 client_name = "w83781d subclient";
962 else if (kind == w83782d)
963 client_name = "w83782d subclient";
964 else if (kind == w83783s)
965 client_name = "w83783s subclient";
966 else if (kind == w83627hf)
967 client_name = "w83627hf subclient";
968 else if (kind == as99127f)
969 client_name = "as99127f subclient";
970
971 for (i = 0; i <= 1; i++) {
972 /* store all data in w83781d */
973 i2c_set_clientdata(data->lm75[i], NULL);
974 data->lm75[i]->adapter = adapter;
975 data->lm75[i]->driver = &w83781d_driver;
976 data->lm75[i]->flags = 0;
977 strlcpy(data->lm75[i]->name, client_name,
978 I2C_NAME_SIZE);
979 if ((err = i2c_attach_client(data->lm75[i]))) {
980 dev_err(&new_client->dev, "Subclient %d "
981 "registration at address 0x%x "
982 "failed.\n", i, data->lm75[i]->addr);
983 if (i == 1)
984 goto ERROR_SC_3;
985 goto ERROR_SC_2;
986 }
987 if (kind == w83783s)
988 break;
989 }
990
991 return 0;
992
993/* Undo inits in case of errors */
994ERROR_SC_3:
995 i2c_detach_client(data->lm75[0]);
996ERROR_SC_2:
6044ec88 997 kfree(data->lm75[1]);
1da177e4 998ERROR_SC_1:
6044ec88 999 kfree(data->lm75[0]);
1da177e4
LT
1000ERROR_SC_0:
1001 return err;
1002}
1003
34875337
JD
1004#define IN_UNIT_ATTRS(X) \
1005 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
1006 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
7d4a1374
JD
1007 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
1008 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
1009 &sensor_dev_attr_in##X##_beep.dev_attr.attr
311ce2ef 1010
34875337
JD
1011#define FAN_UNIT_ATTRS(X) \
1012 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
1013 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
7d4a1374
JD
1014 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
1015 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
1016 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
311ce2ef 1017
34875337
JD
1018#define TEMP_UNIT_ATTRS(X) \
1019 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
1020 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
7d4a1374
JD
1021 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
1022 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
1023 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
311ce2ef
JC
1024
1025static struct attribute* w83781d_attributes[] = {
1026 IN_UNIT_ATTRS(0),
1027 IN_UNIT_ATTRS(2),
1028 IN_UNIT_ATTRS(3),
1029 IN_UNIT_ATTRS(4),
1030 IN_UNIT_ATTRS(5),
1031 IN_UNIT_ATTRS(6),
1032 FAN_UNIT_ATTRS(1),
1033 FAN_UNIT_ATTRS(2),
1034 FAN_UNIT_ATTRS(3),
1035 TEMP_UNIT_ATTRS(1),
1036 TEMP_UNIT_ATTRS(2),
1037 &dev_attr_cpu0_vid.attr,
1038 &dev_attr_vrm.attr,
1039 &dev_attr_alarms.attr,
1040 &dev_attr_beep_mask.attr,
1041 &dev_attr_beep_enable.attr,
1042 NULL
1043};
1044static const struct attribute_group w83781d_group = {
1045 .attrs = w83781d_attributes,
1046};
1047
1048static struct attribute *w83781d_attributes_opt[] = {
1049 IN_UNIT_ATTRS(1),
1050 IN_UNIT_ATTRS(7),
1051 IN_UNIT_ATTRS(8),
1052 TEMP_UNIT_ATTRS(3),
34875337
JD
1053 &sensor_dev_attr_pwm1.dev_attr.attr,
1054 &sensor_dev_attr_pwm2.dev_attr.attr,
1055 &sensor_dev_attr_pwm3.dev_attr.attr,
1056 &sensor_dev_attr_pwm4.dev_attr.attr,
311ce2ef 1057 &dev_attr_pwm2_enable.attr,
34875337
JD
1058 &sensor_dev_attr_temp1_type.dev_attr.attr,
1059 &sensor_dev_attr_temp2_type.dev_attr.attr,
1060 &sensor_dev_attr_temp3_type.dev_attr.attr,
311ce2ef
JC
1061 NULL
1062};
1063static const struct attribute_group w83781d_group_opt = {
1064 .attrs = w83781d_attributes_opt,
1065};
1066
7666c13c 1067/* No clean up is done on error, it's up to the caller */
1da177e4 1068static int
7666c13c 1069w83781d_create_files(struct device *dev, int kind, int is_isa)
1da177e4 1070{
1da177e4 1071 int err;
1da177e4 1072
7666c13c
JD
1073 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
1074 return err;
1075
1076 if (kind != w83783s) {
34875337
JD
1077 if ((err = device_create_file(dev,
1078 &sensor_dev_attr_in1_input.dev_attr))
1079 || (err = device_create_file(dev,
1080 &sensor_dev_attr_in1_min.dev_attr))
1081 || (err = device_create_file(dev,
7d4a1374
JD
1082 &sensor_dev_attr_in1_max.dev_attr))
1083 || (err = device_create_file(dev,
1084 &sensor_dev_attr_in1_alarm.dev_attr))
1085 || (err = device_create_file(dev,
1086 &sensor_dev_attr_in1_beep.dev_attr)))
7666c13c
JD
1087 return err;
1088 }
1089 if (kind != as99127f && kind != w83781d && kind != w83783s) {
34875337
JD
1090 if ((err = device_create_file(dev,
1091 &sensor_dev_attr_in7_input.dev_attr))
1092 || (err = device_create_file(dev,
1093 &sensor_dev_attr_in7_min.dev_attr))
1094 || (err = device_create_file(dev,
1095 &sensor_dev_attr_in7_max.dev_attr))
7d4a1374
JD
1096 || (err = device_create_file(dev,
1097 &sensor_dev_attr_in7_alarm.dev_attr))
1098 || (err = device_create_file(dev,
1099 &sensor_dev_attr_in7_beep.dev_attr))
34875337
JD
1100 || (err = device_create_file(dev,
1101 &sensor_dev_attr_in8_input.dev_attr))
1102 || (err = device_create_file(dev,
1103 &sensor_dev_attr_in8_min.dev_attr))
1104 || (err = device_create_file(dev,
7d4a1374
JD
1105 &sensor_dev_attr_in8_max.dev_attr))
1106 || (err = device_create_file(dev,
1107 &sensor_dev_attr_in8_alarm.dev_attr))
1108 || (err = device_create_file(dev,
1109 &sensor_dev_attr_in8_beep.dev_attr)))
7666c13c
JD
1110 return err;
1111 }
1112 if (kind != w83783s) {
34875337
JD
1113 if ((err = device_create_file(dev,
1114 &sensor_dev_attr_temp3_input.dev_attr))
1115 || (err = device_create_file(dev,
1116 &sensor_dev_attr_temp3_max.dev_attr))
7666c13c 1117 || (err = device_create_file(dev,
7d4a1374
JD
1118 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1119 || (err = device_create_file(dev,
1120 &sensor_dev_attr_temp3_alarm.dev_attr))
1121 || (err = device_create_file(dev,
1122 &sensor_dev_attr_temp3_beep.dev_attr)))
7666c13c 1123 return err;
7d4a1374 1124
7768aa76 1125 if (kind != w83781d) {
7d4a1374
JD
1126 err = sysfs_chmod_file(&dev->kobj,
1127 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1128 S_IRUGO | S_IWUSR);
1129 if (err)
1130 return err;
7768aa76 1131 }
1da177e4
LT
1132 }
1133
7666c13c 1134 if (kind != w83781d && kind != as99127f) {
34875337
JD
1135 if ((err = device_create_file(dev,
1136 &sensor_dev_attr_pwm1.dev_attr))
1137 || (err = device_create_file(dev,
1138 &sensor_dev_attr_pwm2.dev_attr))
7666c13c
JD
1139 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1140 return err;
1da177e4 1141 }
7666c13c 1142 if (kind == w83782d && !is_isa) {
34875337
JD
1143 if ((err = device_create_file(dev,
1144 &sensor_dev_attr_pwm3.dev_attr))
1145 || (err = device_create_file(dev,
1146 &sensor_dev_attr_pwm4.dev_attr)))
7666c13c
JD
1147 return err;
1148 }
1149
1150 if (kind != as99127f && kind != w83781d) {
34875337
JD
1151 if ((err = device_create_file(dev,
1152 &sensor_dev_attr_temp1_type.dev_attr))
7666c13c 1153 || (err = device_create_file(dev,
34875337 1154 &sensor_dev_attr_temp2_type.dev_attr)))
7666c13c
JD
1155 return err;
1156 if (kind != w83783s) {
1157 if ((err = device_create_file(dev,
34875337 1158 &sensor_dev_attr_temp3_type.dev_attr)))
7666c13c 1159 return err;
1da177e4 1160 }
7666c13c 1161 }
1da177e4 1162
7666c13c
JD
1163 if (is_isa) {
1164 err = device_create_file(&pdev->dev, &dev_attr_name);
1165 if (err)
1166 return err;
1167 }
1da177e4 1168
7666c13c
JD
1169 return 0;
1170}
1da177e4 1171
7666c13c
JD
1172static int
1173w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1174{
1175 int val1 = 0, val2;
1176 struct i2c_client *client;
1177 struct device *dev;
1178 struct w83781d_data *data;
1179 int err;
1180 const char *client_name = "";
1181 enum vendor { winbond, asus } vendid;
1182
1183 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1184 err = -EINVAL;
1185 goto ERROR1;
1da177e4
LT
1186 }
1187
1188 /* OK. For now, we presume we have a valid client. We now create the
1189 client structure, even though we cannot fill it completely yet.
1190 But it allows us to access w83781d_{read,write}_value. */
1191
ba9c2e8d 1192 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1da177e4
LT
1193 err = -ENOMEM;
1194 goto ERROR1;
1195 }
1da177e4 1196
311ce2ef
JC
1197 client = &data->client;
1198 i2c_set_clientdata(client, data);
1199 client->addr = address;
9a61bf63 1200 mutex_init(&data->lock);
311ce2ef 1201 client->adapter = adapter;
7666c13c 1202 client->driver = &w83781d_driver;
311ce2ef 1203 dev = &client->dev;
1da177e4
LT
1204
1205 /* Now, we do the remaining detection. */
1206
1207 /* The w8378?d may be stuck in some other bank than bank 0. This may
1208 make reading other information impossible. Specify a force=... or
1209 force_*=... parameter, and the Winbond will be reset to the right
1210 bank. */
1211 if (kind < 0) {
31b8dc4d 1212 if (w83781d_read_value(data, W83781D_REG_CONFIG) & 0x80) {
bd452e6f
JD
1213 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1214 "failed at step 3\n");
1da177e4
LT
1215 err = -ENODEV;
1216 goto ERROR2;
1217 }
31b8dc4d
JD
1218 val1 = w83781d_read_value(data, W83781D_REG_BANK);
1219 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1da177e4
LT
1220 /* Check for Winbond or Asus ID if in bank 0 */
1221 if ((!(val1 & 0x07)) &&
1222 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1223 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
bd452e6f
JD
1224 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1225 "failed at step 4\n");
1da177e4
LT
1226 err = -ENODEV;
1227 goto ERROR2;
1228 }
1229 /* If Winbond SMBus, check address at 0x48.
1230 Asus doesn't support, except for as99127f rev.2 */
7666c13c
JD
1231 if ((!(val1 & 0x80) && (val2 == 0xa3)) ||
1232 ((val1 & 0x80) && (val2 == 0x5c))) {
1da177e4 1233 if (w83781d_read_value
31b8dc4d 1234 (data, W83781D_REG_I2C_ADDR) != address) {
bd452e6f
JD
1235 dev_dbg(&adapter->dev, "Detection of w83781d "
1236 "chip failed at step 5\n");
1da177e4
LT
1237 err = -ENODEV;
1238 goto ERROR2;
1239 }
1240 }
1241 }
1242
1243 /* We have either had a force parameter, or we have already detected the
1244 Winbond. Put it now into bank 0 and Vendor ID High Byte */
31b8dc4d
JD
1245 w83781d_write_value(data, W83781D_REG_BANK,
1246 (w83781d_read_value(data, W83781D_REG_BANK)
311ce2ef 1247 & 0x78) | 0x80);
1da177e4
LT
1248
1249 /* Determine the chip type. */
1250 if (kind <= 0) {
1251 /* get vendor ID */
31b8dc4d 1252 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1da177e4
LT
1253 if (val2 == 0x5c)
1254 vendid = winbond;
1255 else if (val2 == 0x12)
1256 vendid = asus;
1257 else {
bd452e6f
JD
1258 dev_dbg(&adapter->dev, "w83781d chip vendor is "
1259 "neither Winbond nor Asus\n");
1da177e4
LT
1260 err = -ENODEV;
1261 goto ERROR2;
1262 }
1263
31b8dc4d 1264 val1 = w83781d_read_value(data, W83781D_REG_WCHIPID);
1da177e4
LT
1265 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1266 kind = w83781d;
1267 else if (val1 == 0x30 && vendid == winbond)
1268 kind = w83782d;
7666c13c 1269 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1da177e4 1270 kind = w83783s;
7c7a5304 1271 else if (val1 == 0x21 && vendid == winbond)
1da177e4 1272 kind = w83627hf;
7666c13c 1273 else if (val1 == 0x31 && address >= 0x28)
1da177e4 1274 kind = as99127f;
1da177e4
LT
1275 else {
1276 if (kind == 0)
bd452e6f 1277 dev_warn(&adapter->dev, "Ignoring 'force' "
1da177e4 1278 "parameter for unknown chip at "
bd452e6f 1279 "address 0x%02x\n", address);
1da177e4
LT
1280 err = -EINVAL;
1281 goto ERROR2;
1282 }
1283 }
1284
1285 if (kind == w83781d) {
1286 client_name = "w83781d";
1287 } else if (kind == w83782d) {
1288 client_name = "w83782d";
1289 } else if (kind == w83783s) {
1290 client_name = "w83783s";
1291 } else if (kind == w83627hf) {
7c7a5304 1292 client_name = "w83627hf";
1da177e4
LT
1293 } else if (kind == as99127f) {
1294 client_name = "as99127f";
1da177e4
LT
1295 }
1296
1297 /* Fill in the remaining client fields and put into the global list */
311ce2ef 1298 strlcpy(client->name, client_name, I2C_NAME_SIZE);
1da177e4
LT
1299 data->type = kind;
1300
1da177e4 1301 /* Tell the I2C layer a new client has arrived */
311ce2ef 1302 if ((err = i2c_attach_client(client)))
1da177e4
LT
1303 goto ERROR2;
1304
1305 /* attach secondary i2c lm75-like clients */
7666c13c
JD
1306 if ((err = w83781d_detect_subclients(adapter, address,
1307 kind, client)))
1308 goto ERROR3;
1da177e4
LT
1309
1310 /* Initialize the chip */
7666c13c 1311 w83781d_init_device(dev);
1da177e4
LT
1312
1313 /* Register sysfs hooks */
7666c13c
JD
1314 err = w83781d_create_files(dev, kind, 0);
1315 if (err)
943b0830 1316 goto ERROR4;
943b0830 1317
1beeffe4
TJ
1318 data->hwmon_dev = hwmon_device_register(dev);
1319 if (IS_ERR(data->hwmon_dev)) {
1320 err = PTR_ERR(data->hwmon_dev);
311ce2ef 1321 goto ERROR4;
1da177e4
LT
1322 }
1323
1324 return 0;
1325
943b0830 1326ERROR4:
311ce2ef
JC
1327 sysfs_remove_group(&dev->kobj, &w83781d_group);
1328 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1329
943b0830
MH
1330 if (data->lm75[1]) {
1331 i2c_detach_client(data->lm75[1]);
1332 kfree(data->lm75[1]);
1333 }
1334 if (data->lm75[0]) {
1335 i2c_detach_client(data->lm75[0]);
1336 kfree(data->lm75[0]);
1337 }
1da177e4 1338ERROR3:
311ce2ef 1339 i2c_detach_client(client);
1da177e4
LT
1340ERROR2:
1341 kfree(data);
1342ERROR1:
1da177e4
LT
1343 return err;
1344}
1345
1346static int
1347w83781d_detach_client(struct i2c_client *client)
1348{
943b0830 1349 struct w83781d_data *data = i2c_get_clientdata(client);
1da177e4
LT
1350 int err;
1351
943b0830 1352 /* main client */
311ce2ef 1353 if (data) {
1beeffe4 1354 hwmon_device_unregister(data->hwmon_dev);
311ce2ef
JC
1355 sysfs_remove_group(&client->dev.kobj, &w83781d_group);
1356 sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
1357 }
1da177e4 1358
7bef5594 1359 if ((err = i2c_detach_client(client)))
1da177e4 1360 return err;
1da177e4 1361
943b0830
MH
1362 /* main client */
1363 if (data)
1364 kfree(data);
1365
1366 /* subclient */
1367 else
1da177e4 1368 kfree(client);
1da177e4
LT
1369
1370 return 0;
1371}
1372
7666c13c
JD
1373static int __devinit
1374w83781d_isa_probe(struct platform_device *pdev)
1375{
1376 int err, reg;
1377 struct w83781d_data *data;
1378 struct resource *res;
1379 const char *name;
1380
1381 /* Reserve the ISA region */
1382 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1383 if (!request_region(res->start, W83781D_EXTENT, "w83781d")) {
1384 err = -EBUSY;
1385 goto exit;
1386 }
1387
1388 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1389 err = -ENOMEM;
1390 goto exit_release_region;
1391 }
1392 mutex_init(&data->lock);
1393 data->client.addr = res->start;
1394 i2c_set_clientdata(&data->client, data);
1395 platform_set_drvdata(pdev, data);
1396
31b8dc4d 1397 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
7666c13c
JD
1398 switch (reg) {
1399 case 0x21:
1400 data->type = w83627hf;
1401 name = "w83627hf";
1402 break;
1403 case 0x30:
1404 data->type = w83782d;
1405 name = "w83782d";
1406 break;
1407 default:
1408 data->type = w83781d;
1409 name = "w83781d";
1410 }
1411 strlcpy(data->client.name, name, I2C_NAME_SIZE);
1412
1413 /* Initialize the W83781D chip */
1414 w83781d_init_device(&pdev->dev);
1415
1416 /* Register sysfs hooks */
1417 err = w83781d_create_files(&pdev->dev, data->type, 1);
1418 if (err)
1419 goto exit_remove_files;
1420
1beeffe4
TJ
1421 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1422 if (IS_ERR(data->hwmon_dev)) {
1423 err = PTR_ERR(data->hwmon_dev);
7666c13c
JD
1424 goto exit_remove_files;
1425 }
1426
1427 return 0;
1428
1429 exit_remove_files:
1430 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1431 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1432 device_remove_file(&pdev->dev, &dev_attr_name);
1433 kfree(data);
1434 exit_release_region:
1435 release_region(res->start, W83781D_EXTENT);
1436 exit:
1437 return err;
1438}
1439
1440static int __devexit
1441w83781d_isa_remove(struct platform_device *pdev)
1442{
1443 struct w83781d_data *data = platform_get_drvdata(pdev);
1444
1beeffe4 1445 hwmon_device_unregister(data->hwmon_dev);
7666c13c
JD
1446 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1447 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1448 device_remove_file(&pdev->dev, &dev_attr_name);
1449 release_region(data->client.addr, W83781D_EXTENT);
1450 kfree(data);
1451
1452 return 0;
1453}
1454
1da177e4
LT
1455/* The SMBus locks itself, usually, but nothing may access the Winbond between
1456 bank switches. ISA access must always be locked explicitly!
1457 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1458 would slow down the W83781D access and should not be necessary.
1459 There are some ugly typecasts here, but the good news is - they should
1460 nowhere else be necessary! */
1461static int
31b8dc4d 1462w83781d_read_value(struct w83781d_data *data, u16 reg)
1da177e4 1463{
31b8dc4d 1464 struct i2c_client *client = &data->client;
1da177e4
LT
1465 int res, word_sized, bank;
1466 struct i2c_client *cl;
1467
9a61bf63 1468 mutex_lock(&data->lock);
7666c13c 1469 if (!client->driver) { /* ISA device */
1da177e4
LT
1470 word_sized = (((reg & 0xff00) == 0x100)
1471 || ((reg & 0xff00) == 0x200))
1472 && (((reg & 0x00ff) == 0x50)
1473 || ((reg & 0x00ff) == 0x53)
1474 || ((reg & 0x00ff) == 0x55));
1475 if (reg & 0xff00) {
1476 outb_p(W83781D_REG_BANK,
1477 client->addr + W83781D_ADDR_REG_OFFSET);
1478 outb_p(reg >> 8,
1479 client->addr + W83781D_DATA_REG_OFFSET);
1480 }
1481 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1482 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1483 if (word_sized) {
1484 outb_p((reg & 0xff) + 1,
1485 client->addr + W83781D_ADDR_REG_OFFSET);
1486 res =
1487 (res << 8) + inb_p(client->addr +
1488 W83781D_DATA_REG_OFFSET);
1489 }
1490 if (reg & 0xff00) {
1491 outb_p(W83781D_REG_BANK,
1492 client->addr + W83781D_ADDR_REG_OFFSET);
1493 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1494 }
1495 } else {
1496 bank = (reg >> 8) & 0x0f;
1497 if (bank > 2)
1498 /* switch banks */
1499 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1500 bank);
1501 if (bank == 0 || bank > 2) {
1502 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1503 } else {
1504 /* switch to subclient */
1505 cl = data->lm75[bank - 1];
1506 /* convert from ISA to LM75 I2C addresses */
1507 switch (reg & 0xff) {
1508 case 0x50: /* TEMP */
1509 res = swab16(i2c_smbus_read_word_data(cl, 0));
1510 break;
1511 case 0x52: /* CONFIG */
1512 res = i2c_smbus_read_byte_data(cl, 1);
1513 break;
1514 case 0x53: /* HYST */
1515 res = swab16(i2c_smbus_read_word_data(cl, 2));
1516 break;
1517 case 0x55: /* OVER */
1518 default:
1519 res = swab16(i2c_smbus_read_word_data(cl, 3));
1520 break;
1521 }
1522 }
1523 if (bank > 2)
1524 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1525 }
9a61bf63 1526 mutex_unlock(&data->lock);
1da177e4
LT
1527 return res;
1528}
1529
1530static int
31b8dc4d 1531w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1da177e4 1532{
31b8dc4d 1533 struct i2c_client *client = &data->client;
1da177e4
LT
1534 int word_sized, bank;
1535 struct i2c_client *cl;
1536
9a61bf63 1537 mutex_lock(&data->lock);
7666c13c 1538 if (!client->driver) { /* ISA device */
1da177e4
LT
1539 word_sized = (((reg & 0xff00) == 0x100)
1540 || ((reg & 0xff00) == 0x200))
1541 && (((reg & 0x00ff) == 0x53)
1542 || ((reg & 0x00ff) == 0x55));
1543 if (reg & 0xff00) {
1544 outb_p(W83781D_REG_BANK,
1545 client->addr + W83781D_ADDR_REG_OFFSET);
1546 outb_p(reg >> 8,
1547 client->addr + W83781D_DATA_REG_OFFSET);
1548 }
1549 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1550 if (word_sized) {
1551 outb_p(value >> 8,
1552 client->addr + W83781D_DATA_REG_OFFSET);
1553 outb_p((reg & 0xff) + 1,
1554 client->addr + W83781D_ADDR_REG_OFFSET);
1555 }
1556 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1557 if (reg & 0xff00) {
1558 outb_p(W83781D_REG_BANK,
1559 client->addr + W83781D_ADDR_REG_OFFSET);
1560 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1561 }
1562 } else {
1563 bank = (reg >> 8) & 0x0f;
1564 if (bank > 2)
1565 /* switch banks */
1566 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1567 bank);
1568 if (bank == 0 || bank > 2) {
1569 i2c_smbus_write_byte_data(client, reg & 0xff,
1570 value & 0xff);
1571 } else {
1572 /* switch to subclient */
1573 cl = data->lm75[bank - 1];
1574 /* convert from ISA to LM75 I2C addresses */
1575 switch (reg & 0xff) {
1576 case 0x52: /* CONFIG */
1577 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1578 break;
1579 case 0x53: /* HYST */
1580 i2c_smbus_write_word_data(cl, 2, swab16(value));
1581 break;
1582 case 0x55: /* OVER */
1583 i2c_smbus_write_word_data(cl, 3, swab16(value));
1584 break;
1585 }
1586 }
1587 if (bank > 2)
1588 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1589 }
9a61bf63 1590 mutex_unlock(&data->lock);
1da177e4
LT
1591 return 0;
1592}
1593
1da177e4 1594static void
7666c13c 1595w83781d_init_device(struct device *dev)
1da177e4 1596{
7666c13c 1597 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT
1598 int i, p;
1599 int type = data->type;
1600 u8 tmp;
1601
f5f8d38b
JD
1602 if (type == w83627hf)
1603 dev_info(dev, "The W83627HF chip is better supported by the "
1604 "w83627hf driver, support will be dropped from the "
1605 "w83781d driver soon\n");
1606
fabddcd4 1607 if (reset && type != as99127f) { /* this resets registers we don't have
1da177e4 1608 documentation for on the as99127f */
fabddcd4
JD
1609 /* Resetting the chip has been the default for a long time,
1610 but it causes the BIOS initializations (fan clock dividers,
1611 thermal sensor types...) to be lost, so it is now optional.
1612 It might even go away if nobody reports it as being useful,
1613 as I see very little reason why this would be needed at
1614 all. */
7666c13c 1615 dev_info(dev, "If reset=1 solved a problem you were "
fabddcd4
JD
1616 "having, please report!\n");
1617
1da177e4 1618 /* save these registers */
31b8dc4d
JD
1619 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1620 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1da177e4
LT
1621 /* Reset all except Watchdog values and last conversion values
1622 This sets fan-divs to 2, among others */
31b8dc4d 1623 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1da177e4
LT
1624 /* Restore the registers and disable power-on abnormal beep.
1625 This saves FAN 1/2/3 input/output values set by BIOS. */
31b8dc4d
JD
1626 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1627 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1da177e4
LT
1628 /* Disable master beep-enable (reset turns it on).
1629 Individual beep_mask should be reset to off but for some reason
1630 disabling this bit helps some people not get beeped */
31b8dc4d 1631 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1da177e4
LT
1632 }
1633
fabddcd4
JD
1634 /* Disable power-on abnormal beep, as advised by the datasheet.
1635 Already done if reset=1. */
1636 if (init && !reset && type != as99127f) {
31b8dc4d
JD
1637 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1638 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
fabddcd4
JD
1639 }
1640
303760b4 1641 data->vrm = vid_which_vrm();
1da177e4
LT
1642
1643 if ((type != w83781d) && (type != as99127f)) {
31b8dc4d 1644 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT
1645 for (i = 1; i <= 3; i++) {
1646 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1647 data->sens[i - 1] = 4;
1da177e4
LT
1648 } else {
1649 if (w83781d_read_value
31b8dc4d 1650 (data,
1da177e4
LT
1651 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1652 data->sens[i - 1] = 1;
1653 else
1654 data->sens[i - 1] = 2;
1655 }
7c7a5304 1656 if (type == w83783s && i == 2)
1da177e4
LT
1657 break;
1658 }
1659 }
1660
1661 if (init && type != as99127f) {
1662 /* Enable temp2 */
31b8dc4d 1663 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1da177e4 1664 if (tmp & 0x01) {
7666c13c 1665 dev_warn(dev, "Enabling temp2, readings "
1da177e4 1666 "might not make sense\n");
31b8dc4d 1667 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1da177e4
LT
1668 tmp & 0xfe);
1669 }
1670
1671 /* Enable temp3 */
7c7a5304 1672 if (type != w83783s) {
31b8dc4d 1673 tmp = w83781d_read_value(data,
1da177e4
LT
1674 W83781D_REG_TEMP3_CONFIG);
1675 if (tmp & 0x01) {
7666c13c 1676 dev_warn(dev, "Enabling temp3, "
1da177e4 1677 "readings might not make sense\n");
31b8dc4d 1678 w83781d_write_value(data,
1da177e4
LT
1679 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1680 }
1681 }
1da177e4
LT
1682 }
1683
1684 /* Start monitoring */
31b8dc4d
JD
1685 w83781d_write_value(data, W83781D_REG_CONFIG,
1686 (w83781d_read_value(data,
1da177e4
LT
1687 W83781D_REG_CONFIG) & 0xf7)
1688 | 0x01);
7666c13c
JD
1689
1690 /* A few vars need to be filled upon startup */
34875337
JD
1691 for (i = 0; i < 3; i++) {
1692 data->fan_min[i] = w83781d_read_value(data,
7666c13c
JD
1693 W83781D_REG_FAN_MIN(i));
1694 }
7666c13c
JD
1695
1696 mutex_init(&data->update_lock);
1da177e4
LT
1697}
1698
1699static struct w83781d_data *w83781d_update_device(struct device *dev)
1700{
7666c13c
JD
1701 struct w83781d_data *data = dev_get_drvdata(dev);
1702 struct i2c_client *client = &data->client;
1da177e4
LT
1703 int i;
1704
9a61bf63 1705 mutex_lock(&data->update_lock);
1da177e4
LT
1706
1707 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1708 || !data->valid) {
1709 dev_dbg(dev, "Starting device update\n");
1710
1711 for (i = 0; i <= 8; i++) {
7c7a5304 1712 if (data->type == w83783s && i == 1)
1da177e4
LT
1713 continue; /* 783S has no in1 */
1714 data->in[i] =
31b8dc4d 1715 w83781d_read_value(data, W83781D_REG_IN(i));
1da177e4 1716 data->in_min[i] =
31b8dc4d 1717 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1da177e4 1718 data->in_max[i] =
31b8dc4d 1719 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
7c7a5304 1720 if ((data->type != w83782d)
1da177e4
LT
1721 && (data->type != w83627hf) && (i == 6))
1722 break;
1723 }
34875337
JD
1724 for (i = 0; i < 3; i++) {
1725 data->fan[i] =
31b8dc4d 1726 w83781d_read_value(data, W83781D_REG_FAN(i));
34875337 1727 data->fan_min[i] =
31b8dc4d 1728 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1da177e4
LT
1729 }
1730 if (data->type != w83781d && data->type != as99127f) {
34875337
JD
1731 for (i = 0; i < 4; i++) {
1732 data->pwm[i] =
31b8dc4d 1733 w83781d_read_value(data,
34875337 1734 W83781D_REG_PWM[i]);
7666c13c 1735 if ((data->type != w83782d || !client->driver)
34875337 1736 && i == 1)
1da177e4
LT
1737 break;
1738 }
1739 /* Only PWM2 can be disabled */
34875337 1740 data->pwm2_enable = (w83781d_read_value(data,
1da177e4
LT
1741 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1742 }
1743
31b8dc4d 1744 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1da177e4 1745 data->temp_max =
31b8dc4d 1746 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1da177e4 1747 data->temp_max_hyst =
31b8dc4d 1748 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1da177e4 1749 data->temp_add[0] =
31b8dc4d 1750 w83781d_read_value(data, W83781D_REG_TEMP(2));
1da177e4 1751 data->temp_max_add[0] =
31b8dc4d 1752 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1da177e4 1753 data->temp_max_hyst_add[0] =
31b8dc4d 1754 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
7c7a5304 1755 if (data->type != w83783s) {
1da177e4 1756 data->temp_add[1] =
31b8dc4d 1757 w83781d_read_value(data, W83781D_REG_TEMP(3));
1da177e4 1758 data->temp_max_add[1] =
31b8dc4d 1759 w83781d_read_value(data,
1da177e4
LT
1760 W83781D_REG_TEMP_OVER(3));
1761 data->temp_max_hyst_add[1] =
31b8dc4d 1762 w83781d_read_value(data,
1da177e4
LT
1763 W83781D_REG_TEMP_HYST(3));
1764 }
31b8dc4d 1765 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
7c7a5304 1766 data->vid = i & 0x0f;
31b8dc4d 1767 data->vid |= (w83781d_read_value(data,
7c7a5304 1768 W83781D_REG_CHIPID) & 0x01) << 4;
1da177e4
LT
1769 data->fan_div[0] = (i >> 4) & 0x03;
1770 data->fan_div[1] = (i >> 6) & 0x03;
31b8dc4d 1771 data->fan_div[2] = (w83781d_read_value(data,
7c7a5304 1772 W83781D_REG_PIN) >> 6) & 0x03;
1da177e4 1773 if ((data->type != w83781d) && (data->type != as99127f)) {
31b8dc4d 1774 i = w83781d_read_value(data, W83781D_REG_VBAT);
1da177e4
LT
1775 data->fan_div[0] |= (i >> 3) & 0x04;
1776 data->fan_div[1] |= (i >> 4) & 0x04;
7c7a5304 1777 data->fan_div[2] |= (i >> 5) & 0x04;
1da177e4 1778 }
1da177e4 1779 if ((data->type == w83782d) || (data->type == w83627hf)) {
31b8dc4d 1780 data->alarms = w83781d_read_value(data,
c7f5d7ed 1781 W83782D_REG_ALARM1)
31b8dc4d 1782 | (w83781d_read_value(data,
c7f5d7ed 1783 W83782D_REG_ALARM2) << 8)
31b8dc4d 1784 | (w83781d_read_value(data,
c7f5d7ed
JD
1785 W83782D_REG_ALARM3) << 16);
1786 } else if (data->type == w83783s) {
31b8dc4d 1787 data->alarms = w83781d_read_value(data,
c7f5d7ed 1788 W83782D_REG_ALARM1)
31b8dc4d 1789 | (w83781d_read_value(data,
c7f5d7ed
JD
1790 W83782D_REG_ALARM2) << 8);
1791 } else {
1792 /* No real-time status registers, fall back to
1793 interrupt status registers */
31b8dc4d 1794 data->alarms = w83781d_read_value(data,
c7f5d7ed 1795 W83781D_REG_ALARM1)
31b8dc4d 1796 | (w83781d_read_value(data,
c7f5d7ed 1797 W83781D_REG_ALARM2) << 8);
1da177e4 1798 }
31b8dc4d 1799 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1da177e4
LT
1800 data->beep_enable = i >> 7;
1801 data->beep_mask = ((i & 0x7f) << 8) +
31b8dc4d 1802 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1da177e4
LT
1803 if ((data->type != w83781d) && (data->type != as99127f)) {
1804 data->beep_mask |=
31b8dc4d 1805 w83781d_read_value(data,
1da177e4
LT
1806 W83781D_REG_BEEP_INTS3) << 16;
1807 }
1808 data->last_updated = jiffies;
1809 data->valid = 1;
1810 }
1811
9a61bf63 1812 mutex_unlock(&data->update_lock);
1da177e4
LT
1813
1814 return data;
1815}
1816
7666c13c
JD
1817/* return 1 if a supported chip is found, 0 otherwise */
1818static int __init
1819w83781d_isa_found(unsigned short address)
1820{
1821 int val, save, found = 0;
1822
1823 if (!request_region(address, W83781D_EXTENT, "w83781d"))
1824 return 0;
1825
1826#define REALLY_SLOW_IO
1827 /* We need the timeouts for at least some W83781D-like
1828 chips. But only if we read 'undefined' registers. */
1829 val = inb_p(address + 1);
1830 if (inb_p(address + 2) != val
1831 || inb_p(address + 3) != val
1832 || inb_p(address + 7) != val) {
1833 pr_debug("w83781d: Detection failed at step 1\n");
1834 goto release;
1835 }
1836#undef REALLY_SLOW_IO
1837
1838 /* We should be able to change the 7 LSB of the address port. The
1839 MSB (busy flag) should be clear initially, set after the write. */
1840 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1841 if (save & 0x80) {
1842 pr_debug("w83781d: Detection failed at step 2\n");
1843 goto release;
1844 }
1845 val = ~save & 0x7f;
1846 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1847 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1848 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1849 pr_debug("w83781d: Detection failed at step 3\n");
1850 goto release;
1851 }
1852
1853 /* We found a device, now see if it could be a W83781D */
1854 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1855 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1856 if (val & 0x80) {
1857 pr_debug("w83781d: Detection failed at step 4\n");
1858 goto release;
1859 }
1860 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1861 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1862 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1863 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1864 if ((!(save & 0x80) && (val != 0xa3))
1865 || ((save & 0x80) && (val != 0x5c))) {
1866 pr_debug("w83781d: Detection failed at step 5\n");
1867 goto release;
1868 }
1869 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1870 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1871 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1872 pr_debug("w83781d: Detection failed at step 6\n");
1873 goto release;
1874 }
1875
1876 /* The busy flag should be clear again */
1877 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1878 pr_debug("w83781d: Detection failed at step 7\n");
1879 goto release;
1880 }
1881
1882 /* Determine the chip type */
1883 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1884 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1885 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1886 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1887 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1888 if ((val & 0xfe) == 0x10 /* W83781D */
1889 || val == 0x30 /* W83782D */
1890 || val == 0x21) /* W83627HF */
1891 found = 1;
1892
1893 if (found)
1894 pr_info("w83781d: Found a %s chip at %#x\n",
1895 val == 0x21 ? "W83627HF" :
1896 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1897
1898 release:
1899 release_region(address, W83781D_EXTENT);
1900 return found;
1901}
1902
1903static int __init
1904w83781d_isa_device_add(unsigned short address)
1905{
1906 struct resource res = {
1907 .start = address,
15bde2f1 1908 .end = address + W83781D_EXTENT - 1,
7666c13c
JD
1909 .name = "w83781d",
1910 .flags = IORESOURCE_IO,
1911 };
1912 int err;
1913
1914 pdev = platform_device_alloc("w83781d", address);
1915 if (!pdev) {
1916 err = -ENOMEM;
1917 printk(KERN_ERR "w83781d: Device allocation failed\n");
1918 goto exit;
1919 }
1920
1921 err = platform_device_add_resources(pdev, &res, 1);
1922 if (err) {
1923 printk(KERN_ERR "w83781d: Device resource addition failed "
1924 "(%d)\n", err);
1925 goto exit_device_put;
1926 }
1927
1928 err = platform_device_add(pdev);
1929 if (err) {
1930 printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1931 err);
1932 goto exit_device_put;
1933 }
1934
1935 return 0;
1936
1937 exit_device_put:
1938 platform_device_put(pdev);
1939 exit:
1940 pdev = NULL;
1941 return err;
1942}
1943
1da177e4
LT
1944static int __init
1945sensors_w83781d_init(void)
1946{
fde09509
JD
1947 int res;
1948
1949 res = i2c_add_driver(&w83781d_driver);
1950 if (res)
7666c13c
JD
1951 goto exit;
1952
1953 if (w83781d_isa_found(isa_address)) {
1954 res = platform_driver_register(&w83781d_isa_driver);
1955 if (res)
1956 goto exit_unreg_i2c_driver;
fde09509 1957
7666c13c
JD
1958 /* Sets global pdev as a side effect */
1959 res = w83781d_isa_device_add(isa_address);
1960 if (res)
1961 goto exit_unreg_isa_driver;
1962 }
fde09509
JD
1963
1964 return 0;
7666c13c
JD
1965
1966 exit_unreg_isa_driver:
1967 platform_driver_unregister(&w83781d_isa_driver);
1968 exit_unreg_i2c_driver:
1969 i2c_del_driver(&w83781d_driver);
1970 exit:
1971 return res;
1da177e4
LT
1972}
1973
1974static void __exit
1975sensors_w83781d_exit(void)
1976{
7666c13c
JD
1977 if (pdev) {
1978 platform_device_unregister(pdev);
1979 platform_driver_unregister(&w83781d_isa_driver);
1980 }
1da177e4
LT
1981 i2c_del_driver(&w83781d_driver);
1982}
1983
1984MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1985 "Philip Edelbrock <phil@netroedge.com>, "
1986 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1987MODULE_DESCRIPTION("W83781D driver");
1988MODULE_LICENSE("GPL");
1989
1990module_init(sensors_w83781d_init);
1991module_exit(sensors_w83781d_exit);
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