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1da177e4 LT |
1 | /* |
2 | w83781d.c - Part of lm_sensors, Linux kernel modules for hardware | |
3 | monitoring | |
4 | Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, | |
5 | Philip Edelbrock <phil@netroedge.com>, | |
6 | and Mark Studebaker <mdsxyz123@yahoo.com> | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | /* | |
24 | Supports following chips: | |
25 | ||
26 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
27 | as99127f 7 3 0 3 0x31 0x12c3 yes no | |
28 | as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no | |
29 | w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes | |
30 | w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC) | |
1da177e4 LT |
31 | w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes |
32 | w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no | |
1da177e4 LT |
33 | |
34 | */ | |
35 | ||
1da177e4 LT |
36 | #include <linux/module.h> |
37 | #include <linux/init.h> | |
38 | #include <linux/slab.h> | |
39 | #include <linux/jiffies.h> | |
40 | #include <linux/i2c.h> | |
fde09509 | 41 | #include <linux/i2c-isa.h> |
943b0830 | 42 | #include <linux/hwmon.h> |
303760b4 | 43 | #include <linux/hwmon-vid.h> |
943b0830 | 44 | #include <linux/err.h> |
9a61bf63 | 45 | #include <linux/mutex.h> |
1da177e4 LT |
46 | #include <asm/io.h> |
47 | #include "lm75.h" | |
48 | ||
49 | /* Addresses to scan */ | |
50 | static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, | |
51 | 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, | |
52 | 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END }; | |
2d8672c5 | 53 | static unsigned short isa_address = 0x290; |
1da177e4 LT |
54 | |
55 | /* Insmod parameters */ | |
f4b50261 | 56 | I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f); |
1da177e4 LT |
57 | I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: " |
58 | "{bus, clientaddr, subclientaddr1, subclientaddr2}"); | |
59 | ||
fabddcd4 JD |
60 | static int reset; |
61 | module_param(reset, bool, 0); | |
62 | MODULE_PARM_DESC(reset, "Set to one to reset chip on load"); | |
63 | ||
1da177e4 LT |
64 | static int init = 1; |
65 | module_param(init, bool, 0); | |
66 | MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); | |
67 | ||
68 | /* Constants specified below */ | |
69 | ||
70 | /* Length of ISA address segment */ | |
71 | #define W83781D_EXTENT 8 | |
72 | ||
73 | /* Where are the ISA address/data registers relative to the base address */ | |
74 | #define W83781D_ADDR_REG_OFFSET 5 | |
75 | #define W83781D_DATA_REG_OFFSET 6 | |
76 | ||
77 | /* The W83781D registers */ | |
78 | /* The W83782D registers for nr=7,8 are in bank 5 */ | |
79 | #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ | |
80 | (0x554 + (((nr) - 7) * 2))) | |
81 | #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
82 | (0x555 + (((nr) - 7) * 2))) | |
83 | #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
84 | (0x550 + (nr) - 7)) | |
85 | ||
86 | #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr)) | |
87 | #define W83781D_REG_FAN(nr) (0x27 + (nr)) | |
88 | ||
89 | #define W83781D_REG_BANK 0x4E | |
90 | #define W83781D_REG_TEMP2_CONFIG 0x152 | |
91 | #define W83781D_REG_TEMP3_CONFIG 0x252 | |
92 | #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ | |
93 | ((nr == 2) ? (0x0150) : \ | |
94 | (0x27))) | |
95 | #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ | |
96 | ((nr == 2) ? (0x153) : \ | |
97 | (0x3A))) | |
98 | #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ | |
99 | ((nr == 2) ? (0x155) : \ | |
100 | (0x39))) | |
101 | ||
102 | #define W83781D_REG_CONFIG 0x40 | |
c7f5d7ed JD |
103 | |
104 | /* Interrupt status (W83781D, AS99127F) */ | |
1da177e4 LT |
105 | #define W83781D_REG_ALARM1 0x41 |
106 | #define W83781D_REG_ALARM2 0x42 | |
1da177e4 | 107 | |
c7f5d7ed JD |
108 | /* Real-time status (W83782D, W83783S, W83627HF) */ |
109 | #define W83782D_REG_ALARM1 0x459 | |
110 | #define W83782D_REG_ALARM2 0x45A | |
111 | #define W83782D_REG_ALARM3 0x45B | |
112 | ||
1da177e4 LT |
113 | #define W83781D_REG_BEEP_CONFIG 0x4D |
114 | #define W83781D_REG_BEEP_INTS1 0x56 | |
115 | #define W83781D_REG_BEEP_INTS2 0x57 | |
116 | #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ | |
117 | ||
118 | #define W83781D_REG_VID_FANDIV 0x47 | |
119 | ||
120 | #define W83781D_REG_CHIPID 0x49 | |
121 | #define W83781D_REG_WCHIPID 0x58 | |
122 | #define W83781D_REG_CHIPMAN 0x4F | |
123 | #define W83781D_REG_PIN 0x4B | |
124 | ||
125 | /* 782D/783S only */ | |
126 | #define W83781D_REG_VBAT 0x5D | |
127 | ||
128 | /* PWM 782D (1-4) and 783S (1-2) only */ | |
129 | #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */ | |
130 | /* on which is which; */ | |
131 | #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */ | |
132 | /* However 782d is probably wrong. */ | |
133 | #define W83781D_REG_PWM3 0x5E | |
134 | #define W83781D_REG_PWM4 0x5F | |
135 | #define W83781D_REG_PWMCLK12 0x5C | |
136 | #define W83781D_REG_PWMCLK34 0x45C | |
137 | static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2, | |
138 | W83781D_REG_PWM3, W83781D_REG_PWM4 | |
139 | }; | |
140 | ||
141 | #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1]) | |
142 | ||
143 | #define W83781D_REG_I2C_ADDR 0x48 | |
144 | #define W83781D_REG_I2C_SUBADDR 0x4A | |
145 | ||
146 | /* The following are undocumented in the data sheets however we | |
147 | received the information in an email from Winbond tech support */ | |
148 | /* Sensor selection - not on 781d */ | |
149 | #define W83781D_REG_SCFG1 0x5D | |
150 | static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; | |
151 | ||
152 | #define W83781D_REG_SCFG2 0x59 | |
153 | static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; | |
154 | ||
155 | #define W83781D_DEFAULT_BETA 3435 | |
156 | ||
157 | /* RT Table registers */ | |
158 | #define W83781D_REG_RT_IDX 0x50 | |
159 | #define W83781D_REG_RT_VAL 0x51 | |
160 | ||
161 | /* Conversions. Rounding and limit checking is only done on the TO_REG | |
162 | variants. Note that you should be a bit careful with which arguments | |
163 | these macros are called: arguments may be evaluated more than once. | |
164 | Fixing this is just not worth it. */ | |
165 | #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255)) | |
166 | #define IN_FROM_REG(val) (((val) * 16) / 10) | |
167 | ||
168 | static inline u8 | |
169 | FAN_TO_REG(long rpm, int div) | |
170 | { | |
171 | if (rpm == 0) | |
172 | return 255; | |
173 | rpm = SENSORS_LIMIT(rpm, 1, 1000000); | |
174 | return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
175 | } | |
176 | ||
177 | #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \ | |
178 | ((val) == 255 ? 0 : \ | |
179 | 1350000 / ((val) * (div)))) | |
180 | ||
181 | #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \ | |
182 | : (val)) / 1000, 0, 0xff)) | |
183 | #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000) | |
184 | ||
1da177e4 LT |
185 | #define PWM_FROM_REG(val) (val) |
186 | #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) | |
187 | #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \ | |
188 | (val) ^ 0x7fff : (val)) | |
189 | #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \ | |
190 | (~(val)) & 0x7fff : (val) & 0xffffff) | |
191 | ||
192 | #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0) | |
193 | #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0) | |
194 | ||
195 | #define DIV_FROM_REG(val) (1 << (val)) | |
196 | ||
197 | static inline u8 | |
198 | DIV_TO_REG(long val, enum chips type) | |
199 | { | |
200 | int i; | |
201 | val = SENSORS_LIMIT(val, 1, | |
202 | ((type == w83781d | |
203 | || type == as99127f) ? 8 : 128)) >> 1; | |
abc01922 | 204 | for (i = 0; i < 7; i++) { |
1da177e4 LT |
205 | if (val == 0) |
206 | break; | |
207 | val >>= 1; | |
208 | } | |
209 | return ((u8) i); | |
210 | } | |
211 | ||
212 | /* There are some complications in a module like this. First off, W83781D chips | |
213 | may be both present on the SMBus and the ISA bus, and we have to handle | |
214 | those cases separately at some places. Second, there might be several | |
215 | W83781D chips available (well, actually, that is probably never done; but | |
216 | it is a clean illustration of how to handle a case like that). Finally, | |
217 | a specific chip may be attached to *both* ISA and SMBus, and we would | |
218 | not like to detect it double. Fortunately, in the case of the W83781D at | |
219 | least, a register tells us what SMBus address we are on, so that helps | |
220 | a bit - except if there could be more than one SMBus. Groan. No solution | |
221 | for this yet. */ | |
222 | ||
223 | /* This module may seem overly long and complicated. In fact, it is not so | |
224 | bad. Quite a lot of bookkeeping is done. A real driver can often cut | |
225 | some corners. */ | |
226 | ||
227 | /* For each registered W83781D, we need to keep some data in memory. That | |
228 | data is pointed to by w83781d_list[NR]->data. The structure itself is | |
229 | dynamically allocated, at the same time when a new w83781d client is | |
230 | allocated. */ | |
231 | struct w83781d_data { | |
232 | struct i2c_client client; | |
943b0830 | 233 | struct class_device *class_dev; |
9a61bf63 | 234 | struct mutex lock; |
1da177e4 LT |
235 | enum chips type; |
236 | ||
9a61bf63 | 237 | struct mutex update_lock; |
1da177e4 LT |
238 | char valid; /* !=0 if following fields are valid */ |
239 | unsigned long last_updated; /* In jiffies */ | |
240 | ||
241 | struct i2c_client *lm75[2]; /* for secondary I2C addresses */ | |
242 | /* array of 2 pointers to subclients */ | |
243 | ||
244 | u8 in[9]; /* Register value - 8 & 9 for 782D only */ | |
245 | u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ | |
246 | u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ | |
247 | u8 fan[3]; /* Register value */ | |
248 | u8 fan_min[3]; /* Register value */ | |
249 | u8 temp; | |
250 | u8 temp_max; /* Register value */ | |
251 | u8 temp_max_hyst; /* Register value */ | |
252 | u16 temp_add[2]; /* Register value */ | |
253 | u16 temp_max_add[2]; /* Register value */ | |
254 | u16 temp_max_hyst_add[2]; /* Register value */ | |
255 | u8 fan_div[3]; /* Register encoding, shifted right */ | |
256 | u8 vid; /* Register encoding, combined */ | |
257 | u32 alarms; /* Register encoding, combined */ | |
258 | u32 beep_mask; /* Register encoding, combined */ | |
259 | u8 beep_enable; /* Boolean */ | |
260 | u8 pwm[4]; /* Register value */ | |
261 | u8 pwmenable[4]; /* Boolean */ | |
262 | u16 sens[3]; /* 782D/783S only. | |
263 | 1 = pentium diode; 2 = 3904 diode; | |
264 | 3000-5000 = thermistor beta. | |
265 | Default = 3435. | |
266 | Other Betas unimplemented */ | |
267 | u8 vrm; | |
268 | }; | |
269 | ||
270 | static int w83781d_attach_adapter(struct i2c_adapter *adapter); | |
2d8672c5 | 271 | static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter); |
1da177e4 LT |
272 | static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind); |
273 | static int w83781d_detach_client(struct i2c_client *client); | |
274 | ||
f6c27fc1 DJ |
275 | static int w83781d_read_value(struct i2c_client *client, u16 reg); |
276 | static int w83781d_write_value(struct i2c_client *client, u16 reg, u16 value); | |
1da177e4 LT |
277 | static struct w83781d_data *w83781d_update_device(struct device *dev); |
278 | static void w83781d_init_client(struct i2c_client *client); | |
279 | ||
280 | static struct i2c_driver w83781d_driver = { | |
cdaf7934 | 281 | .driver = { |
cdaf7934 LR |
282 | .name = "w83781d", |
283 | }, | |
1da177e4 | 284 | .id = I2C_DRIVERID_W83781D, |
1da177e4 LT |
285 | .attach_adapter = w83781d_attach_adapter, |
286 | .detach_client = w83781d_detach_client, | |
287 | }; | |
288 | ||
fde09509 | 289 | static struct i2c_driver w83781d_isa_driver = { |
cdaf7934 | 290 | .driver = { |
cdaf7934 LR |
291 | .name = "w83781d-isa", |
292 | }, | |
2d8672c5 | 293 | .attach_adapter = w83781d_isa_attach_adapter, |
fde09509 JD |
294 | .detach_client = w83781d_detach_client, |
295 | }; | |
296 | ||
297 | ||
1da177e4 LT |
298 | /* following are the sysfs callback functions */ |
299 | #define show_in_reg(reg) \ | |
300 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
301 | { \ | |
302 | struct w83781d_data *data = w83781d_update_device(dev); \ | |
303 | return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \ | |
304 | } | |
305 | show_in_reg(in); | |
306 | show_in_reg(in_min); | |
307 | show_in_reg(in_max); | |
308 | ||
309 | #define store_in_reg(REG, reg) \ | |
310 | static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | |
311 | { \ | |
312 | struct i2c_client *client = to_i2c_client(dev); \ | |
313 | struct w83781d_data *data = i2c_get_clientdata(client); \ | |
314 | u32 val; \ | |
315 | \ | |
316 | val = simple_strtoul(buf, NULL, 10) / 10; \ | |
317 | \ | |
9a61bf63 | 318 | mutex_lock(&data->update_lock); \ |
1da177e4 LT |
319 | data->in_##reg[nr] = IN_TO_REG(val); \ |
320 | w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ | |
321 | \ | |
9a61bf63 | 322 | mutex_unlock(&data->update_lock); \ |
1da177e4 LT |
323 | return count; \ |
324 | } | |
325 | store_in_reg(MIN, min); | |
326 | store_in_reg(MAX, max); | |
327 | ||
328 | #define sysfs_in_offset(offset) \ | |
329 | static ssize_t \ | |
e404e274 | 330 | show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
331 | { \ |
332 | return show_in(dev, buf, offset); \ | |
333 | } \ | |
334 | static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL); | |
335 | ||
336 | #define sysfs_in_reg_offset(reg, offset) \ | |
e404e274 | 337 | static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
338 | { \ |
339 | return show_in_##reg (dev, buf, offset); \ | |
340 | } \ | |
e404e274 | 341 | static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
342 | { \ |
343 | return store_in_##reg (dev, buf, count, offset); \ | |
344 | } \ | |
345 | static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset); | |
346 | ||
347 | #define sysfs_in_offsets(offset) \ | |
348 | sysfs_in_offset(offset); \ | |
349 | sysfs_in_reg_offset(min, offset); \ | |
350 | sysfs_in_reg_offset(max, offset); | |
351 | ||
352 | sysfs_in_offsets(0); | |
353 | sysfs_in_offsets(1); | |
354 | sysfs_in_offsets(2); | |
355 | sysfs_in_offsets(3); | |
356 | sysfs_in_offsets(4); | |
357 | sysfs_in_offsets(5); | |
358 | sysfs_in_offsets(6); | |
359 | sysfs_in_offsets(7); | |
360 | sysfs_in_offsets(8); | |
361 | ||
362 | #define device_create_file_in(client, offset) \ | |
363 | do { \ | |
364 | device_create_file(&client->dev, &dev_attr_in##offset##_input); \ | |
365 | device_create_file(&client->dev, &dev_attr_in##offset##_min); \ | |
366 | device_create_file(&client->dev, &dev_attr_in##offset##_max); \ | |
367 | } while (0) | |
368 | ||
369 | #define show_fan_reg(reg) \ | |
370 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
371 | { \ | |
372 | struct w83781d_data *data = w83781d_update_device(dev); \ | |
373 | return sprintf(buf,"%ld\n", \ | |
374 | FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \ | |
375 | } | |
376 | show_fan_reg(fan); | |
377 | show_fan_reg(fan_min); | |
378 | ||
379 | static ssize_t | |
380 | store_fan_min(struct device *dev, const char *buf, size_t count, int nr) | |
381 | { | |
382 | struct i2c_client *client = to_i2c_client(dev); | |
383 | struct w83781d_data *data = i2c_get_clientdata(client); | |
384 | u32 val; | |
385 | ||
386 | val = simple_strtoul(buf, NULL, 10); | |
387 | ||
9a61bf63 | 388 | mutex_lock(&data->update_lock); |
1da177e4 LT |
389 | data->fan_min[nr - 1] = |
390 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1])); | |
391 | w83781d_write_value(client, W83781D_REG_FAN_MIN(nr), | |
392 | data->fan_min[nr - 1]); | |
393 | ||
9a61bf63 | 394 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
395 | return count; |
396 | } | |
397 | ||
398 | #define sysfs_fan_offset(offset) \ | |
e404e274 | 399 | static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
400 | { \ |
401 | return show_fan(dev, buf, offset); \ | |
402 | } \ | |
403 | static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL); | |
404 | ||
405 | #define sysfs_fan_min_offset(offset) \ | |
e404e274 | 406 | static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
407 | { \ |
408 | return show_fan_min(dev, buf, offset); \ | |
409 | } \ | |
e404e274 | 410 | static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
411 | { \ |
412 | return store_fan_min(dev, buf, count, offset); \ | |
413 | } \ | |
414 | static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset); | |
415 | ||
416 | sysfs_fan_offset(1); | |
417 | sysfs_fan_min_offset(1); | |
418 | sysfs_fan_offset(2); | |
419 | sysfs_fan_min_offset(2); | |
420 | sysfs_fan_offset(3); | |
421 | sysfs_fan_min_offset(3); | |
422 | ||
423 | #define device_create_file_fan(client, offset) \ | |
424 | do { \ | |
425 | device_create_file(&client->dev, &dev_attr_fan##offset##_input); \ | |
426 | device_create_file(&client->dev, &dev_attr_fan##offset##_min); \ | |
427 | } while (0) | |
428 | ||
429 | #define show_temp_reg(reg) \ | |
430 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
431 | { \ | |
432 | struct w83781d_data *data = w83781d_update_device(dev); \ | |
433 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
434 | return sprintf(buf,"%d\n", \ | |
435 | LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ | |
436 | } else { /* TEMP1 */ \ | |
437 | return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ | |
438 | } \ | |
439 | } | |
440 | show_temp_reg(temp); | |
441 | show_temp_reg(temp_max); | |
442 | show_temp_reg(temp_max_hyst); | |
443 | ||
444 | #define store_temp_reg(REG, reg) \ | |
445 | static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | |
446 | { \ | |
447 | struct i2c_client *client = to_i2c_client(dev); \ | |
448 | struct w83781d_data *data = i2c_get_clientdata(client); \ | |
449 | s32 val; \ | |
450 | \ | |
451 | val = simple_strtol(buf, NULL, 10); \ | |
452 | \ | |
9a61bf63 | 453 | mutex_lock(&data->update_lock); \ |
1da177e4 LT |
454 | \ |
455 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
456 | data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ | |
457 | w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | |
458 | data->temp_##reg##_add[nr-2]); \ | |
459 | } else { /* TEMP1 */ \ | |
460 | data->temp_##reg = TEMP_TO_REG(val); \ | |
461 | w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | |
462 | data->temp_##reg); \ | |
463 | } \ | |
464 | \ | |
9a61bf63 | 465 | mutex_unlock(&data->update_lock); \ |
1da177e4 LT |
466 | return count; \ |
467 | } | |
468 | store_temp_reg(OVER, max); | |
469 | store_temp_reg(HYST, max_hyst); | |
470 | ||
471 | #define sysfs_temp_offset(offset) \ | |
472 | static ssize_t \ | |
e404e274 | 473 | show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
474 | { \ |
475 | return show_temp(dev, buf, offset); \ | |
476 | } \ | |
477 | static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL); | |
478 | ||
479 | #define sysfs_temp_reg_offset(reg, offset) \ | |
e404e274 | 480 | static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
481 | { \ |
482 | return show_temp_##reg (dev, buf, offset); \ | |
483 | } \ | |
e404e274 | 484 | static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
485 | { \ |
486 | return store_temp_##reg (dev, buf, count, offset); \ | |
487 | } \ | |
488 | static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset); | |
489 | ||
490 | #define sysfs_temp_offsets(offset) \ | |
491 | sysfs_temp_offset(offset); \ | |
492 | sysfs_temp_reg_offset(max, offset); \ | |
493 | sysfs_temp_reg_offset(max_hyst, offset); | |
494 | ||
495 | sysfs_temp_offsets(1); | |
496 | sysfs_temp_offsets(2); | |
497 | sysfs_temp_offsets(3); | |
498 | ||
499 | #define device_create_file_temp(client, offset) \ | |
500 | do { \ | |
501 | device_create_file(&client->dev, &dev_attr_temp##offset##_input); \ | |
502 | device_create_file(&client->dev, &dev_attr_temp##offset##_max); \ | |
503 | device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \ | |
504 | } while (0) | |
505 | ||
506 | static ssize_t | |
e404e274 | 507 | show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
508 | { |
509 | struct w83781d_data *data = w83781d_update_device(dev); | |
510 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
511 | } | |
512 | ||
513 | static | |
514 | DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
515 | #define device_create_file_vid(client) \ | |
516 | device_create_file(&client->dev, &dev_attr_cpu0_vid); | |
517 | static ssize_t | |
e404e274 | 518 | show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
519 | { |
520 | struct w83781d_data *data = w83781d_update_device(dev); | |
521 | return sprintf(buf, "%ld\n", (long) data->vrm); | |
522 | } | |
523 | ||
524 | static ssize_t | |
e404e274 | 525 | store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) |
1da177e4 LT |
526 | { |
527 | struct i2c_client *client = to_i2c_client(dev); | |
528 | struct w83781d_data *data = i2c_get_clientdata(client); | |
529 | u32 val; | |
530 | ||
531 | val = simple_strtoul(buf, NULL, 10); | |
532 | data->vrm = val; | |
533 | ||
534 | return count; | |
535 | } | |
536 | ||
537 | static | |
538 | DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
539 | #define device_create_file_vrm(client) \ | |
540 | device_create_file(&client->dev, &dev_attr_vrm); | |
541 | static ssize_t | |
e404e274 | 542 | show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
543 | { |
544 | struct w83781d_data *data = w83781d_update_device(dev); | |
68188ba7 | 545 | return sprintf(buf, "%u\n", data->alarms); |
1da177e4 LT |
546 | } |
547 | ||
548 | static | |
549 | DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); | |
550 | #define device_create_file_alarms(client) \ | |
551 | device_create_file(&client->dev, &dev_attr_alarms); | |
e404e274 | 552 | static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
553 | { |
554 | struct w83781d_data *data = w83781d_update_device(dev); | |
555 | return sprintf(buf, "%ld\n", | |
556 | (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); | |
557 | } | |
e404e274 | 558 | static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
559 | { |
560 | struct w83781d_data *data = w83781d_update_device(dev); | |
561 | return sprintf(buf, "%ld\n", | |
562 | (long)BEEP_ENABLE_FROM_REG(data->beep_enable)); | |
563 | } | |
564 | ||
565 | #define BEEP_ENABLE 0 /* Store beep_enable */ | |
566 | #define BEEP_MASK 1 /* Store beep_mask */ | |
567 | ||
568 | static ssize_t | |
569 | store_beep_reg(struct device *dev, const char *buf, size_t count, | |
570 | int update_mask) | |
571 | { | |
572 | struct i2c_client *client = to_i2c_client(dev); | |
573 | struct w83781d_data *data = i2c_get_clientdata(client); | |
574 | u32 val, val2; | |
575 | ||
576 | val = simple_strtoul(buf, NULL, 10); | |
577 | ||
9a61bf63 | 578 | mutex_lock(&data->update_lock); |
1da177e4 LT |
579 | |
580 | if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ | |
581 | data->beep_mask = BEEP_MASK_TO_REG(val, data->type); | |
582 | w83781d_write_value(client, W83781D_REG_BEEP_INTS1, | |
583 | data->beep_mask & 0xff); | |
584 | ||
585 | if ((data->type != w83781d) && (data->type != as99127f)) { | |
586 | w83781d_write_value(client, W83781D_REG_BEEP_INTS3, | |
587 | ((data->beep_mask) >> 16) & 0xff); | |
588 | } | |
589 | ||
590 | val2 = (data->beep_mask >> 8) & 0x7f; | |
591 | } else { /* We are storing beep_enable */ | |
592 | val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f; | |
593 | data->beep_enable = BEEP_ENABLE_TO_REG(val); | |
594 | } | |
595 | ||
596 | w83781d_write_value(client, W83781D_REG_BEEP_INTS2, | |
597 | val2 | data->beep_enable << 7); | |
598 | ||
9a61bf63 | 599 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
600 | return count; |
601 | } | |
602 | ||
603 | #define sysfs_beep(REG, reg) \ | |
e404e274 | 604 | static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 | 605 | { \ |
e404e274 | 606 | return show_beep_##reg(dev, attr, buf); \ |
1da177e4 | 607 | } \ |
e404e274 | 608 | static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
609 | { \ |
610 | return store_beep_reg(dev, buf, count, BEEP_##REG); \ | |
611 | } \ | |
612 | static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg); | |
613 | ||
614 | sysfs_beep(ENABLE, enable); | |
615 | sysfs_beep(MASK, mask); | |
616 | ||
617 | #define device_create_file_beep(client) \ | |
618 | do { \ | |
619 | device_create_file(&client->dev, &dev_attr_beep_enable); \ | |
620 | device_create_file(&client->dev, &dev_attr_beep_mask); \ | |
621 | } while (0) | |
622 | ||
623 | static ssize_t | |
624 | show_fan_div_reg(struct device *dev, char *buf, int nr) | |
625 | { | |
626 | struct w83781d_data *data = w83781d_update_device(dev); | |
627 | return sprintf(buf, "%ld\n", | |
628 | (long) DIV_FROM_REG(data->fan_div[nr - 1])); | |
629 | } | |
630 | ||
631 | /* Note: we save and restore the fan minimum here, because its value is | |
632 | determined in part by the fan divisor. This follows the principle of | |
633 | least suprise; the user doesn't expect the fan minimum to change just | |
634 | because the divisor changed. */ | |
635 | static ssize_t | |
636 | store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) | |
637 | { | |
638 | struct i2c_client *client = to_i2c_client(dev); | |
639 | struct w83781d_data *data = i2c_get_clientdata(client); | |
640 | unsigned long min; | |
641 | u8 reg; | |
642 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
643 | ||
9a61bf63 | 644 | mutex_lock(&data->update_lock); |
1da177e4 LT |
645 | |
646 | /* Save fan_min */ | |
647 | min = FAN_FROM_REG(data->fan_min[nr], | |
648 | DIV_FROM_REG(data->fan_div[nr])); | |
649 | ||
650 | data->fan_div[nr] = DIV_TO_REG(val, data->type); | |
651 | ||
652 | reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) | |
653 | & (nr==0 ? 0xcf : 0x3f)) | |
654 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); | |
655 | w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); | |
656 | ||
657 | /* w83781d and as99127f don't have extended divisor bits */ | |
658 | if (data->type != w83781d && data->type != as99127f) { | |
659 | reg = (w83781d_read_value(client, W83781D_REG_VBAT) | |
660 | & ~(1 << (5 + nr))) | |
661 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | |
662 | w83781d_write_value(client, W83781D_REG_VBAT, reg); | |
663 | } | |
664 | ||
665 | /* Restore fan_min */ | |
666 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | |
667 | w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); | |
668 | ||
9a61bf63 | 669 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
670 | return count; |
671 | } | |
672 | ||
673 | #define sysfs_fan_div(offset) \ | |
e404e274 | 674 | static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
675 | { \ |
676 | return show_fan_div_reg(dev, buf, offset); \ | |
677 | } \ | |
e404e274 | 678 | static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
679 | { \ |
680 | return store_fan_div_reg(dev, buf, count, offset - 1); \ | |
681 | } \ | |
682 | static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset); | |
683 | ||
684 | sysfs_fan_div(1); | |
685 | sysfs_fan_div(2); | |
686 | sysfs_fan_div(3); | |
687 | ||
688 | #define device_create_file_fan_div(client, offset) \ | |
689 | do { \ | |
690 | device_create_file(&client->dev, &dev_attr_fan##offset##_div); \ | |
691 | } while (0) | |
692 | ||
693 | static ssize_t | |
694 | show_pwm_reg(struct device *dev, char *buf, int nr) | |
695 | { | |
696 | struct w83781d_data *data = w83781d_update_device(dev); | |
697 | return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1])); | |
698 | } | |
699 | ||
700 | static ssize_t | |
701 | show_pwmenable_reg(struct device *dev, char *buf, int nr) | |
702 | { | |
703 | struct w83781d_data *data = w83781d_update_device(dev); | |
704 | return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]); | |
705 | } | |
706 | ||
707 | static ssize_t | |
708 | store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr) | |
709 | { | |
710 | struct i2c_client *client = to_i2c_client(dev); | |
711 | struct w83781d_data *data = i2c_get_clientdata(client); | |
712 | u32 val; | |
713 | ||
714 | val = simple_strtoul(buf, NULL, 10); | |
715 | ||
9a61bf63 | 716 | mutex_lock(&data->update_lock); |
1da177e4 LT |
717 | data->pwm[nr - 1] = PWM_TO_REG(val); |
718 | w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]); | |
9a61bf63 | 719 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
720 | return count; |
721 | } | |
722 | ||
723 | static ssize_t | |
724 | store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr) | |
725 | { | |
726 | struct i2c_client *client = to_i2c_client(dev); | |
727 | struct w83781d_data *data = i2c_get_clientdata(client); | |
728 | u32 val, reg; | |
729 | ||
730 | val = simple_strtoul(buf, NULL, 10); | |
731 | ||
9a61bf63 | 732 | mutex_lock(&data->update_lock); |
1da177e4 LT |
733 | |
734 | switch (val) { | |
735 | case 0: | |
736 | case 1: | |
737 | reg = w83781d_read_value(client, W83781D_REG_PWMCLK12); | |
738 | w83781d_write_value(client, W83781D_REG_PWMCLK12, | |
739 | (reg & 0xf7) | (val << 3)); | |
740 | ||
741 | reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); | |
742 | w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, | |
743 | (reg & 0xef) | (!val << 4)); | |
744 | ||
745 | data->pwmenable[nr - 1] = val; | |
746 | break; | |
747 | ||
748 | default: | |
9a61bf63 | 749 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
750 | return -EINVAL; |
751 | } | |
752 | ||
9a61bf63 | 753 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
754 | return count; |
755 | } | |
756 | ||
757 | #define sysfs_pwm(offset) \ | |
e404e274 | 758 | static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
759 | { \ |
760 | return show_pwm_reg(dev, buf, offset); \ | |
761 | } \ | |
e404e274 | 762 | static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
763 | const char *buf, size_t count) \ |
764 | { \ | |
765 | return store_pwm_reg(dev, buf, count, offset); \ | |
766 | } \ | |
767 | static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \ | |
768 | show_regs_pwm_##offset, store_regs_pwm_##offset); | |
769 | ||
770 | #define sysfs_pwmenable(offset) \ | |
e404e274 | 771 | static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
772 | { \ |
773 | return show_pwmenable_reg(dev, buf, offset); \ | |
774 | } \ | |
e404e274 | 775 | static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
776 | const char *buf, size_t count) \ |
777 | { \ | |
778 | return store_pwmenable_reg(dev, buf, count, offset); \ | |
779 | } \ | |
780 | static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \ | |
781 | show_regs_pwmenable_##offset, store_regs_pwmenable_##offset); | |
782 | ||
783 | sysfs_pwm(1); | |
784 | sysfs_pwm(2); | |
785 | sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */ | |
786 | sysfs_pwm(3); | |
787 | sysfs_pwm(4); | |
788 | ||
789 | #define device_create_file_pwm(client, offset) \ | |
790 | do { \ | |
791 | device_create_file(&client->dev, &dev_attr_pwm##offset); \ | |
792 | } while (0) | |
793 | ||
794 | #define device_create_file_pwmenable(client, offset) \ | |
795 | do { \ | |
796 | device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \ | |
797 | } while (0) | |
798 | ||
799 | static ssize_t | |
800 | show_sensor_reg(struct device *dev, char *buf, int nr) | |
801 | { | |
802 | struct w83781d_data *data = w83781d_update_device(dev); | |
803 | return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]); | |
804 | } | |
805 | ||
806 | static ssize_t | |
807 | store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) | |
808 | { | |
809 | struct i2c_client *client = to_i2c_client(dev); | |
810 | struct w83781d_data *data = i2c_get_clientdata(client); | |
811 | u32 val, tmp; | |
812 | ||
813 | val = simple_strtoul(buf, NULL, 10); | |
814 | ||
9a61bf63 | 815 | mutex_lock(&data->update_lock); |
1da177e4 LT |
816 | |
817 | switch (val) { | |
818 | case 1: /* PII/Celeron diode */ | |
819 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
820 | w83781d_write_value(client, W83781D_REG_SCFG1, | |
821 | tmp | BIT_SCFG1[nr - 1]); | |
822 | tmp = w83781d_read_value(client, W83781D_REG_SCFG2); | |
823 | w83781d_write_value(client, W83781D_REG_SCFG2, | |
824 | tmp | BIT_SCFG2[nr - 1]); | |
825 | data->sens[nr - 1] = val; | |
826 | break; | |
827 | case 2: /* 3904 */ | |
828 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
829 | w83781d_write_value(client, W83781D_REG_SCFG1, | |
830 | tmp | BIT_SCFG1[nr - 1]); | |
831 | tmp = w83781d_read_value(client, W83781D_REG_SCFG2); | |
832 | w83781d_write_value(client, W83781D_REG_SCFG2, | |
833 | tmp & ~BIT_SCFG2[nr - 1]); | |
834 | data->sens[nr - 1] = val; | |
835 | break; | |
836 | case W83781D_DEFAULT_BETA: /* thermistor */ | |
837 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
838 | w83781d_write_value(client, W83781D_REG_SCFG1, | |
839 | tmp & ~BIT_SCFG1[nr - 1]); | |
840 | data->sens[nr - 1] = val; | |
841 | break; | |
842 | default: | |
843 | dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n", | |
844 | (long) val, W83781D_DEFAULT_BETA); | |
845 | break; | |
846 | } | |
847 | ||
9a61bf63 | 848 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
849 | return count; |
850 | } | |
851 | ||
852 | #define sysfs_sensor(offset) \ | |
e404e274 | 853 | static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
854 | { \ |
855 | return show_sensor_reg(dev, buf, offset); \ | |
856 | } \ | |
e404e274 | 857 | static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
858 | { \ |
859 | return store_sensor_reg(dev, buf, count, offset); \ | |
860 | } \ | |
861 | static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset); | |
862 | ||
863 | sysfs_sensor(1); | |
864 | sysfs_sensor(2); | |
865 | sysfs_sensor(3); | |
866 | ||
867 | #define device_create_file_sensor(client, offset) \ | |
868 | do { \ | |
869 | device_create_file(&client->dev, &dev_attr_temp##offset##_type); \ | |
870 | } while (0) | |
871 | ||
872 | /* This function is called when: | |
873 | * w83781d_driver is inserted (when this module is loaded), for each | |
874 | available adapter | |
875 | * when a new adapter is inserted (and w83781d_driver is still present) */ | |
876 | static int | |
877 | w83781d_attach_adapter(struct i2c_adapter *adapter) | |
878 | { | |
879 | if (!(adapter->class & I2C_CLASS_HWMON)) | |
880 | return 0; | |
2ed2dc3c | 881 | return i2c_probe(adapter, &addr_data, w83781d_detect); |
1da177e4 LT |
882 | } |
883 | ||
2d8672c5 JD |
884 | static int |
885 | w83781d_isa_attach_adapter(struct i2c_adapter *adapter) | |
886 | { | |
887 | return w83781d_detect(adapter, isa_address, -1); | |
888 | } | |
889 | ||
1da177e4 LT |
890 | /* Assumes that adapter is of I2C, not ISA variety. |
891 | * OTHERWISE DON'T CALL THIS | |
892 | */ | |
893 | static int | |
894 | w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind, | |
895 | struct i2c_client *new_client) | |
896 | { | |
897 | int i, val1 = 0, id; | |
898 | int err; | |
899 | const char *client_name = ""; | |
900 | struct w83781d_data *data = i2c_get_clientdata(new_client); | |
901 | ||
ba9c2e8d | 902 | data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); |
1da177e4 LT |
903 | if (!(data->lm75[0])) { |
904 | err = -ENOMEM; | |
905 | goto ERROR_SC_0; | |
906 | } | |
1da177e4 LT |
907 | |
908 | id = i2c_adapter_id(adapter); | |
909 | ||
910 | if (force_subclients[0] == id && force_subclients[1] == address) { | |
911 | for (i = 2; i <= 3; i++) { | |
912 | if (force_subclients[i] < 0x48 || | |
913 | force_subclients[i] > 0x4f) { | |
914 | dev_err(&new_client->dev, "Invalid subclient " | |
915 | "address %d; must be 0x48-0x4f\n", | |
916 | force_subclients[i]); | |
917 | err = -EINVAL; | |
918 | goto ERROR_SC_1; | |
919 | } | |
920 | } | |
921 | w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR, | |
922 | (force_subclients[2] & 0x07) | | |
923 | ((force_subclients[3] & 0x07) << 4)); | |
924 | data->lm75[0]->addr = force_subclients[2]; | |
925 | } else { | |
926 | val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR); | |
927 | data->lm75[0]->addr = 0x48 + (val1 & 0x07); | |
928 | } | |
929 | ||
930 | if (kind != w83783s) { | |
ba9c2e8d | 931 | data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); |
1da177e4 LT |
932 | if (!(data->lm75[1])) { |
933 | err = -ENOMEM; | |
934 | goto ERROR_SC_1; | |
935 | } | |
1da177e4 LT |
936 | |
937 | if (force_subclients[0] == id && | |
938 | force_subclients[1] == address) { | |
939 | data->lm75[1]->addr = force_subclients[3]; | |
940 | } else { | |
941 | data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07); | |
942 | } | |
943 | if (data->lm75[0]->addr == data->lm75[1]->addr) { | |
944 | dev_err(&new_client->dev, | |
945 | "Duplicate addresses 0x%x for subclients.\n", | |
946 | data->lm75[0]->addr); | |
947 | err = -EBUSY; | |
948 | goto ERROR_SC_2; | |
949 | } | |
950 | } | |
951 | ||
952 | if (kind == w83781d) | |
953 | client_name = "w83781d subclient"; | |
954 | else if (kind == w83782d) | |
955 | client_name = "w83782d subclient"; | |
956 | else if (kind == w83783s) | |
957 | client_name = "w83783s subclient"; | |
958 | else if (kind == w83627hf) | |
959 | client_name = "w83627hf subclient"; | |
960 | else if (kind == as99127f) | |
961 | client_name = "as99127f subclient"; | |
962 | ||
963 | for (i = 0; i <= 1; i++) { | |
964 | /* store all data in w83781d */ | |
965 | i2c_set_clientdata(data->lm75[i], NULL); | |
966 | data->lm75[i]->adapter = adapter; | |
967 | data->lm75[i]->driver = &w83781d_driver; | |
968 | data->lm75[i]->flags = 0; | |
969 | strlcpy(data->lm75[i]->name, client_name, | |
970 | I2C_NAME_SIZE); | |
971 | if ((err = i2c_attach_client(data->lm75[i]))) { | |
972 | dev_err(&new_client->dev, "Subclient %d " | |
973 | "registration at address 0x%x " | |
974 | "failed.\n", i, data->lm75[i]->addr); | |
975 | if (i == 1) | |
976 | goto ERROR_SC_3; | |
977 | goto ERROR_SC_2; | |
978 | } | |
979 | if (kind == w83783s) | |
980 | break; | |
981 | } | |
982 | ||
983 | return 0; | |
984 | ||
985 | /* Undo inits in case of errors */ | |
986 | ERROR_SC_3: | |
987 | i2c_detach_client(data->lm75[0]); | |
988 | ERROR_SC_2: | |
6044ec88 | 989 | kfree(data->lm75[1]); |
1da177e4 | 990 | ERROR_SC_1: |
6044ec88 | 991 | kfree(data->lm75[0]); |
1da177e4 LT |
992 | ERROR_SC_0: |
993 | return err; | |
994 | } | |
995 | ||
996 | static int | |
997 | w83781d_detect(struct i2c_adapter *adapter, int address, int kind) | |
998 | { | |
999 | int i = 0, val1 = 0, val2; | |
1000 | struct i2c_client *new_client; | |
1001 | struct w83781d_data *data; | |
1002 | int err; | |
1003 | const char *client_name = ""; | |
1004 | int is_isa = i2c_is_isa_adapter(adapter); | |
1005 | enum vendor { winbond, asus } vendid; | |
1006 | ||
1007 | if (!is_isa | |
1008 | && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { | |
1009 | err = -EINVAL; | |
1010 | goto ERROR0; | |
1011 | } | |
1012 | ||
1013 | /* Prevent users from forcing a kind for a bus it isn't supposed | |
1014 | to possibly be on */ | |
1015 | if (is_isa && (kind == as99127f || kind == w83783s)) { | |
1016 | dev_err(&adapter->dev, | |
1017 | "Cannot force I2C-only chip for ISA address 0x%02x.\n", | |
1018 | address); | |
1019 | err = -EINVAL; | |
1020 | goto ERROR0; | |
1021 | } | |
1da177e4 LT |
1022 | |
1023 | if (is_isa) | |
1024 | if (!request_region(address, W83781D_EXTENT, | |
cdaf7934 | 1025 | w83781d_isa_driver.driver.name)) { |
1da177e4 LT |
1026 | dev_dbg(&adapter->dev, "Request of region " |
1027 | "0x%x-0x%x for w83781d failed\n", address, | |
1028 | address + W83781D_EXTENT - 1); | |
1029 | err = -EBUSY; | |
1030 | goto ERROR0; | |
1031 | } | |
1032 | ||
1033 | /* Probe whether there is anything available on this address. Already | |
1034 | done for SMBus clients */ | |
1035 | if (kind < 0) { | |
1036 | if (is_isa) { | |
1037 | ||
1038 | #define REALLY_SLOW_IO | |
1039 | /* We need the timeouts for at least some LM78-like | |
1040 | chips. But only if we read 'undefined' registers. */ | |
1041 | i = inb_p(address + 1); | |
1042 | if (inb_p(address + 2) != i | |
1043 | || inb_p(address + 3) != i | |
1044 | || inb_p(address + 7) != i) { | |
1045 | dev_dbg(&adapter->dev, "Detection of w83781d " | |
1046 | "chip failed at step 1\n"); | |
1047 | err = -ENODEV; | |
1048 | goto ERROR1; | |
1049 | } | |
1050 | #undef REALLY_SLOW_IO | |
1051 | ||
1052 | /* Let's just hope nothing breaks here */ | |
1053 | i = inb_p(address + 5) & 0x7f; | |
1054 | outb_p(~i & 0x7f, address + 5); | |
1055 | val2 = inb_p(address + 5) & 0x7f; | |
1056 | if (val2 != (~i & 0x7f)) { | |
1057 | outb_p(i, address + 5); | |
1058 | dev_dbg(&adapter->dev, "Detection of w83781d " | |
1059 | "chip failed at step 2 (0x%x != " | |
1060 | "0x%x at 0x%x)\n", val2, ~i & 0x7f, | |
1061 | address + 5); | |
1062 | err = -ENODEV; | |
1063 | goto ERROR1; | |
1064 | } | |
1065 | } | |
1066 | } | |
1067 | ||
1068 | /* OK. For now, we presume we have a valid client. We now create the | |
1069 | client structure, even though we cannot fill it completely yet. | |
1070 | But it allows us to access w83781d_{read,write}_value. */ | |
1071 | ||
ba9c2e8d | 1072 | if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) { |
1da177e4 LT |
1073 | err = -ENOMEM; |
1074 | goto ERROR1; | |
1075 | } | |
1da177e4 LT |
1076 | |
1077 | new_client = &data->client; | |
1078 | i2c_set_clientdata(new_client, data); | |
1079 | new_client->addr = address; | |
9a61bf63 | 1080 | mutex_init(&data->lock); |
1da177e4 | 1081 | new_client->adapter = adapter; |
fde09509 | 1082 | new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver; |
1da177e4 LT |
1083 | new_client->flags = 0; |
1084 | ||
1085 | /* Now, we do the remaining detection. */ | |
1086 | ||
1087 | /* The w8378?d may be stuck in some other bank than bank 0. This may | |
1088 | make reading other information impossible. Specify a force=... or | |
1089 | force_*=... parameter, and the Winbond will be reset to the right | |
1090 | bank. */ | |
1091 | if (kind < 0) { | |
1092 | if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) { | |
1093 | dev_dbg(&new_client->dev, "Detection failed at step " | |
1094 | "3\n"); | |
1095 | err = -ENODEV; | |
1096 | goto ERROR2; | |
1097 | } | |
1098 | val1 = w83781d_read_value(new_client, W83781D_REG_BANK); | |
1099 | val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); | |
1100 | /* Check for Winbond or Asus ID if in bank 0 */ | |
1101 | if ((!(val1 & 0x07)) && | |
1102 | (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)) | |
1103 | || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) { | |
1104 | dev_dbg(&new_client->dev, "Detection failed at step " | |
1105 | "4\n"); | |
1106 | err = -ENODEV; | |
1107 | goto ERROR2; | |
1108 | } | |
1109 | /* If Winbond SMBus, check address at 0x48. | |
1110 | Asus doesn't support, except for as99127f rev.2 */ | |
1111 | if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) || | |
1112 | ((val1 & 0x80) && (val2 == 0x5c)))) { | |
1113 | if (w83781d_read_value | |
1114 | (new_client, W83781D_REG_I2C_ADDR) != address) { | |
1115 | dev_dbg(&new_client->dev, "Detection failed " | |
1116 | "at step 5\n"); | |
1117 | err = -ENODEV; | |
1118 | goto ERROR2; | |
1119 | } | |
1120 | } | |
1121 | } | |
1122 | ||
1123 | /* We have either had a force parameter, or we have already detected the | |
1124 | Winbond. Put it now into bank 0 and Vendor ID High Byte */ | |
1125 | w83781d_write_value(new_client, W83781D_REG_BANK, | |
1126 | (w83781d_read_value(new_client, | |
1127 | W83781D_REG_BANK) & 0x78) | | |
1128 | 0x80); | |
1129 | ||
1130 | /* Determine the chip type. */ | |
1131 | if (kind <= 0) { | |
1132 | /* get vendor ID */ | |
1133 | val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); | |
1134 | if (val2 == 0x5c) | |
1135 | vendid = winbond; | |
1136 | else if (val2 == 0x12) | |
1137 | vendid = asus; | |
1138 | else { | |
1139 | dev_dbg(&new_client->dev, "Chip was made by neither " | |
1140 | "Winbond nor Asus?\n"); | |
1141 | err = -ENODEV; | |
1142 | goto ERROR2; | |
1143 | } | |
1144 | ||
1145 | val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID); | |
1146 | if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) | |
1147 | kind = w83781d; | |
1148 | else if (val1 == 0x30 && vendid == winbond) | |
1149 | kind = w83782d; | |
1150 | else if (val1 == 0x40 && vendid == winbond && !is_isa | |
1151 | && address == 0x2d) | |
1152 | kind = w83783s; | |
7c7a5304 | 1153 | else if (val1 == 0x21 && vendid == winbond) |
1da177e4 LT |
1154 | kind = w83627hf; |
1155 | else if (val1 == 0x31 && !is_isa && address >= 0x28) | |
1156 | kind = as99127f; | |
1da177e4 LT |
1157 | else { |
1158 | if (kind == 0) | |
1159 | dev_warn(&new_client->dev, "Ignoring 'force' " | |
1160 | "parameter for unknown chip at " | |
1161 | "adapter %d, address 0x%02x\n", | |
1162 | i2c_adapter_id(adapter), address); | |
1163 | err = -EINVAL; | |
1164 | goto ERROR2; | |
1165 | } | |
1166 | } | |
1167 | ||
1168 | if (kind == w83781d) { | |
1169 | client_name = "w83781d"; | |
1170 | } else if (kind == w83782d) { | |
1171 | client_name = "w83782d"; | |
1172 | } else if (kind == w83783s) { | |
1173 | client_name = "w83783s"; | |
1174 | } else if (kind == w83627hf) { | |
7c7a5304 | 1175 | client_name = "w83627hf"; |
1da177e4 LT |
1176 | } else if (kind == as99127f) { |
1177 | client_name = "as99127f"; | |
1da177e4 LT |
1178 | } |
1179 | ||
1180 | /* Fill in the remaining client fields and put into the global list */ | |
1181 | strlcpy(new_client->name, client_name, I2C_NAME_SIZE); | |
1182 | data->type = kind; | |
1183 | ||
1184 | data->valid = 0; | |
9a61bf63 | 1185 | mutex_init(&data->update_lock); |
1da177e4 LT |
1186 | |
1187 | /* Tell the I2C layer a new client has arrived */ | |
1188 | if ((err = i2c_attach_client(new_client))) | |
1189 | goto ERROR2; | |
1190 | ||
1191 | /* attach secondary i2c lm75-like clients */ | |
1192 | if (!is_isa) { | |
1193 | if ((err = w83781d_detect_subclients(adapter, address, | |
1194 | kind, new_client))) | |
1195 | goto ERROR3; | |
1196 | } else { | |
1197 | data->lm75[0] = NULL; | |
1198 | data->lm75[1] = NULL; | |
1199 | } | |
1200 | ||
1201 | /* Initialize the chip */ | |
1202 | w83781d_init_client(new_client); | |
1203 | ||
1204 | /* A few vars need to be filled upon startup */ | |
1205 | for (i = 1; i <= 3; i++) { | |
1206 | data->fan_min[i - 1] = w83781d_read_value(new_client, | |
1207 | W83781D_REG_FAN_MIN(i)); | |
1208 | } | |
1209 | if (kind != w83781d && kind != as99127f) | |
1210 | for (i = 0; i < 4; i++) | |
1211 | data->pwmenable[i] = 1; | |
1212 | ||
1213 | /* Register sysfs hooks */ | |
943b0830 MH |
1214 | data->class_dev = hwmon_device_register(&new_client->dev); |
1215 | if (IS_ERR(data->class_dev)) { | |
1216 | err = PTR_ERR(data->class_dev); | |
1217 | goto ERROR4; | |
1218 | } | |
1219 | ||
1da177e4 | 1220 | device_create_file_in(new_client, 0); |
7c7a5304 | 1221 | if (kind != w83783s) |
1da177e4 LT |
1222 | device_create_file_in(new_client, 1); |
1223 | device_create_file_in(new_client, 2); | |
1224 | device_create_file_in(new_client, 3); | |
1225 | device_create_file_in(new_client, 4); | |
1226 | device_create_file_in(new_client, 5); | |
1227 | device_create_file_in(new_client, 6); | |
1228 | if (kind != as99127f && kind != w83781d && kind != w83783s) { | |
1229 | device_create_file_in(new_client, 7); | |
1230 | device_create_file_in(new_client, 8); | |
1231 | } | |
1232 | ||
1233 | device_create_file_fan(new_client, 1); | |
1234 | device_create_file_fan(new_client, 2); | |
7c7a5304 | 1235 | device_create_file_fan(new_client, 3); |
1da177e4 LT |
1236 | |
1237 | device_create_file_temp(new_client, 1); | |
1238 | device_create_file_temp(new_client, 2); | |
7c7a5304 | 1239 | if (kind != w83783s) |
1da177e4 LT |
1240 | device_create_file_temp(new_client, 3); |
1241 | ||
7c7a5304 JD |
1242 | device_create_file_vid(new_client); |
1243 | device_create_file_vrm(new_client); | |
1da177e4 LT |
1244 | |
1245 | device_create_file_fan_div(new_client, 1); | |
1246 | device_create_file_fan_div(new_client, 2); | |
7c7a5304 | 1247 | device_create_file_fan_div(new_client, 3); |
1da177e4 LT |
1248 | |
1249 | device_create_file_alarms(new_client); | |
1250 | ||
1251 | device_create_file_beep(new_client); | |
1252 | ||
1253 | if (kind != w83781d && kind != as99127f) { | |
1254 | device_create_file_pwm(new_client, 1); | |
1255 | device_create_file_pwm(new_client, 2); | |
1256 | device_create_file_pwmenable(new_client, 2); | |
1257 | } | |
1258 | if (kind == w83782d && !is_isa) { | |
1259 | device_create_file_pwm(new_client, 3); | |
1260 | device_create_file_pwm(new_client, 4); | |
1261 | } | |
1262 | ||
1263 | if (kind != as99127f && kind != w83781d) { | |
1264 | device_create_file_sensor(new_client, 1); | |
1265 | device_create_file_sensor(new_client, 2); | |
7c7a5304 | 1266 | if (kind != w83783s) |
1da177e4 LT |
1267 | device_create_file_sensor(new_client, 3); |
1268 | } | |
1269 | ||
1270 | return 0; | |
1271 | ||
943b0830 MH |
1272 | ERROR4: |
1273 | if (data->lm75[1]) { | |
1274 | i2c_detach_client(data->lm75[1]); | |
1275 | kfree(data->lm75[1]); | |
1276 | } | |
1277 | if (data->lm75[0]) { | |
1278 | i2c_detach_client(data->lm75[0]); | |
1279 | kfree(data->lm75[0]); | |
1280 | } | |
1da177e4 LT |
1281 | ERROR3: |
1282 | i2c_detach_client(new_client); | |
1283 | ERROR2: | |
1284 | kfree(data); | |
1285 | ERROR1: | |
1286 | if (is_isa) | |
1287 | release_region(address, W83781D_EXTENT); | |
1288 | ERROR0: | |
1289 | return err; | |
1290 | } | |
1291 | ||
1292 | static int | |
1293 | w83781d_detach_client(struct i2c_client *client) | |
1294 | { | |
943b0830 | 1295 | struct w83781d_data *data = i2c_get_clientdata(client); |
1da177e4 LT |
1296 | int err; |
1297 | ||
943b0830 MH |
1298 | /* main client */ |
1299 | if (data) | |
1300 | hwmon_device_unregister(data->class_dev); | |
1301 | ||
1da177e4 LT |
1302 | if (i2c_is_isa_client(client)) |
1303 | release_region(client->addr, W83781D_EXTENT); | |
1304 | ||
7bef5594 | 1305 | if ((err = i2c_detach_client(client))) |
1da177e4 | 1306 | return err; |
1da177e4 | 1307 | |
943b0830 MH |
1308 | /* main client */ |
1309 | if (data) | |
1310 | kfree(data); | |
1311 | ||
1312 | /* subclient */ | |
1313 | else | |
1da177e4 | 1314 | kfree(client); |
1da177e4 LT |
1315 | |
1316 | return 0; | |
1317 | } | |
1318 | ||
1319 | /* The SMBus locks itself, usually, but nothing may access the Winbond between | |
1320 | bank switches. ISA access must always be locked explicitly! | |
1321 | We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, | |
1322 | would slow down the W83781D access and should not be necessary. | |
1323 | There are some ugly typecasts here, but the good news is - they should | |
1324 | nowhere else be necessary! */ | |
1325 | static int | |
1326 | w83781d_read_value(struct i2c_client *client, u16 reg) | |
1327 | { | |
1328 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1329 | int res, word_sized, bank; | |
1330 | struct i2c_client *cl; | |
1331 | ||
9a61bf63 | 1332 | mutex_lock(&data->lock); |
1da177e4 LT |
1333 | if (i2c_is_isa_client(client)) { |
1334 | word_sized = (((reg & 0xff00) == 0x100) | |
1335 | || ((reg & 0xff00) == 0x200)) | |
1336 | && (((reg & 0x00ff) == 0x50) | |
1337 | || ((reg & 0x00ff) == 0x53) | |
1338 | || ((reg & 0x00ff) == 0x55)); | |
1339 | if (reg & 0xff00) { | |
1340 | outb_p(W83781D_REG_BANK, | |
1341 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1342 | outb_p(reg >> 8, | |
1343 | client->addr + W83781D_DATA_REG_OFFSET); | |
1344 | } | |
1345 | outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); | |
1346 | res = inb_p(client->addr + W83781D_DATA_REG_OFFSET); | |
1347 | if (word_sized) { | |
1348 | outb_p((reg & 0xff) + 1, | |
1349 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1350 | res = | |
1351 | (res << 8) + inb_p(client->addr + | |
1352 | W83781D_DATA_REG_OFFSET); | |
1353 | } | |
1354 | if (reg & 0xff00) { | |
1355 | outb_p(W83781D_REG_BANK, | |
1356 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1357 | outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); | |
1358 | } | |
1359 | } else { | |
1360 | bank = (reg >> 8) & 0x0f; | |
1361 | if (bank > 2) | |
1362 | /* switch banks */ | |
1363 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1364 | bank); | |
1365 | if (bank == 0 || bank > 2) { | |
1366 | res = i2c_smbus_read_byte_data(client, reg & 0xff); | |
1367 | } else { | |
1368 | /* switch to subclient */ | |
1369 | cl = data->lm75[bank - 1]; | |
1370 | /* convert from ISA to LM75 I2C addresses */ | |
1371 | switch (reg & 0xff) { | |
1372 | case 0x50: /* TEMP */ | |
1373 | res = swab16(i2c_smbus_read_word_data(cl, 0)); | |
1374 | break; | |
1375 | case 0x52: /* CONFIG */ | |
1376 | res = i2c_smbus_read_byte_data(cl, 1); | |
1377 | break; | |
1378 | case 0x53: /* HYST */ | |
1379 | res = swab16(i2c_smbus_read_word_data(cl, 2)); | |
1380 | break; | |
1381 | case 0x55: /* OVER */ | |
1382 | default: | |
1383 | res = swab16(i2c_smbus_read_word_data(cl, 3)); | |
1384 | break; | |
1385 | } | |
1386 | } | |
1387 | if (bank > 2) | |
1388 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1389 | } | |
9a61bf63 | 1390 | mutex_unlock(&data->lock); |
1da177e4 LT |
1391 | return res; |
1392 | } | |
1393 | ||
1394 | static int | |
1395 | w83781d_write_value(struct i2c_client *client, u16 reg, u16 value) | |
1396 | { | |
1397 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1398 | int word_sized, bank; | |
1399 | struct i2c_client *cl; | |
1400 | ||
9a61bf63 | 1401 | mutex_lock(&data->lock); |
1da177e4 LT |
1402 | if (i2c_is_isa_client(client)) { |
1403 | word_sized = (((reg & 0xff00) == 0x100) | |
1404 | || ((reg & 0xff00) == 0x200)) | |
1405 | && (((reg & 0x00ff) == 0x53) | |
1406 | || ((reg & 0x00ff) == 0x55)); | |
1407 | if (reg & 0xff00) { | |
1408 | outb_p(W83781D_REG_BANK, | |
1409 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1410 | outb_p(reg >> 8, | |
1411 | client->addr + W83781D_DATA_REG_OFFSET); | |
1412 | } | |
1413 | outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); | |
1414 | if (word_sized) { | |
1415 | outb_p(value >> 8, | |
1416 | client->addr + W83781D_DATA_REG_OFFSET); | |
1417 | outb_p((reg & 0xff) + 1, | |
1418 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1419 | } | |
1420 | outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET); | |
1421 | if (reg & 0xff00) { | |
1422 | outb_p(W83781D_REG_BANK, | |
1423 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1424 | outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); | |
1425 | } | |
1426 | } else { | |
1427 | bank = (reg >> 8) & 0x0f; | |
1428 | if (bank > 2) | |
1429 | /* switch banks */ | |
1430 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1431 | bank); | |
1432 | if (bank == 0 || bank > 2) { | |
1433 | i2c_smbus_write_byte_data(client, reg & 0xff, | |
1434 | value & 0xff); | |
1435 | } else { | |
1436 | /* switch to subclient */ | |
1437 | cl = data->lm75[bank - 1]; | |
1438 | /* convert from ISA to LM75 I2C addresses */ | |
1439 | switch (reg & 0xff) { | |
1440 | case 0x52: /* CONFIG */ | |
1441 | i2c_smbus_write_byte_data(cl, 1, value & 0xff); | |
1442 | break; | |
1443 | case 0x53: /* HYST */ | |
1444 | i2c_smbus_write_word_data(cl, 2, swab16(value)); | |
1445 | break; | |
1446 | case 0x55: /* OVER */ | |
1447 | i2c_smbus_write_word_data(cl, 3, swab16(value)); | |
1448 | break; | |
1449 | } | |
1450 | } | |
1451 | if (bank > 2) | |
1452 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1453 | } | |
9a61bf63 | 1454 | mutex_unlock(&data->lock); |
1da177e4 LT |
1455 | return 0; |
1456 | } | |
1457 | ||
1da177e4 LT |
1458 | static void |
1459 | w83781d_init_client(struct i2c_client *client) | |
1460 | { | |
1461 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1462 | int i, p; | |
1463 | int type = data->type; | |
1464 | u8 tmp; | |
1465 | ||
fabddcd4 | 1466 | if (reset && type != as99127f) { /* this resets registers we don't have |
1da177e4 | 1467 | documentation for on the as99127f */ |
fabddcd4 JD |
1468 | /* Resetting the chip has been the default for a long time, |
1469 | but it causes the BIOS initializations (fan clock dividers, | |
1470 | thermal sensor types...) to be lost, so it is now optional. | |
1471 | It might even go away if nobody reports it as being useful, | |
1472 | as I see very little reason why this would be needed at | |
1473 | all. */ | |
1474 | dev_info(&client->dev, "If reset=1 solved a problem you were " | |
1475 | "having, please report!\n"); | |
1476 | ||
1da177e4 LT |
1477 | /* save these registers */ |
1478 | i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); | |
1479 | p = w83781d_read_value(client, W83781D_REG_PWMCLK12); | |
1480 | /* Reset all except Watchdog values and last conversion values | |
1481 | This sets fan-divs to 2, among others */ | |
1482 | w83781d_write_value(client, W83781D_REG_CONFIG, 0x80); | |
1483 | /* Restore the registers and disable power-on abnormal beep. | |
1484 | This saves FAN 1/2/3 input/output values set by BIOS. */ | |
1485 | w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); | |
1486 | w83781d_write_value(client, W83781D_REG_PWMCLK12, p); | |
1487 | /* Disable master beep-enable (reset turns it on). | |
1488 | Individual beep_mask should be reset to off but for some reason | |
1489 | disabling this bit helps some people not get beeped */ | |
1490 | w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0); | |
1491 | } | |
1492 | ||
fabddcd4 JD |
1493 | /* Disable power-on abnormal beep, as advised by the datasheet. |
1494 | Already done if reset=1. */ | |
1495 | if (init && !reset && type != as99127f) { | |
1496 | i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); | |
1497 | w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); | |
1498 | } | |
1499 | ||
303760b4 | 1500 | data->vrm = vid_which_vrm(); |
1da177e4 LT |
1501 | |
1502 | if ((type != w83781d) && (type != as99127f)) { | |
1503 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
1504 | for (i = 1; i <= 3; i++) { | |
1505 | if (!(tmp & BIT_SCFG1[i - 1])) { | |
1506 | data->sens[i - 1] = W83781D_DEFAULT_BETA; | |
1507 | } else { | |
1508 | if (w83781d_read_value | |
1509 | (client, | |
1510 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) | |
1511 | data->sens[i - 1] = 1; | |
1512 | else | |
1513 | data->sens[i - 1] = 2; | |
1514 | } | |
7c7a5304 | 1515 | if (type == w83783s && i == 2) |
1da177e4 LT |
1516 | break; |
1517 | } | |
1518 | } | |
1519 | ||
1520 | if (init && type != as99127f) { | |
1521 | /* Enable temp2 */ | |
1522 | tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG); | |
1523 | if (tmp & 0x01) { | |
1524 | dev_warn(&client->dev, "Enabling temp2, readings " | |
1525 | "might not make sense\n"); | |
1526 | w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, | |
1527 | tmp & 0xfe); | |
1528 | } | |
1529 | ||
1530 | /* Enable temp3 */ | |
7c7a5304 | 1531 | if (type != w83783s) { |
1da177e4 LT |
1532 | tmp = w83781d_read_value(client, |
1533 | W83781D_REG_TEMP3_CONFIG); | |
1534 | if (tmp & 0x01) { | |
1535 | dev_warn(&client->dev, "Enabling temp3, " | |
1536 | "readings might not make sense\n"); | |
1537 | w83781d_write_value(client, | |
1538 | W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); | |
1539 | } | |
1540 | } | |
1da177e4 LT |
1541 | } |
1542 | ||
1543 | /* Start monitoring */ | |
1544 | w83781d_write_value(client, W83781D_REG_CONFIG, | |
1545 | (w83781d_read_value(client, | |
1546 | W83781D_REG_CONFIG) & 0xf7) | |
1547 | | 0x01); | |
1548 | } | |
1549 | ||
1550 | static struct w83781d_data *w83781d_update_device(struct device *dev) | |
1551 | { | |
1552 | struct i2c_client *client = to_i2c_client(dev); | |
1553 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1554 | int i; | |
1555 | ||
9a61bf63 | 1556 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1557 | |
1558 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
1559 | || !data->valid) { | |
1560 | dev_dbg(dev, "Starting device update\n"); | |
1561 | ||
1562 | for (i = 0; i <= 8; i++) { | |
7c7a5304 | 1563 | if (data->type == w83783s && i == 1) |
1da177e4 LT |
1564 | continue; /* 783S has no in1 */ |
1565 | data->in[i] = | |
1566 | w83781d_read_value(client, W83781D_REG_IN(i)); | |
1567 | data->in_min[i] = | |
1568 | w83781d_read_value(client, W83781D_REG_IN_MIN(i)); | |
1569 | data->in_max[i] = | |
1570 | w83781d_read_value(client, W83781D_REG_IN_MAX(i)); | |
7c7a5304 | 1571 | if ((data->type != w83782d) |
1da177e4 LT |
1572 | && (data->type != w83627hf) && (i == 6)) |
1573 | break; | |
1574 | } | |
1575 | for (i = 1; i <= 3; i++) { | |
1576 | data->fan[i - 1] = | |
1577 | w83781d_read_value(client, W83781D_REG_FAN(i)); | |
1578 | data->fan_min[i - 1] = | |
1579 | w83781d_read_value(client, W83781D_REG_FAN_MIN(i)); | |
1580 | } | |
1581 | if (data->type != w83781d && data->type != as99127f) { | |
1582 | for (i = 1; i <= 4; i++) { | |
1583 | data->pwm[i - 1] = | |
1584 | w83781d_read_value(client, | |
1585 | W83781D_REG_PWM(i)); | |
1586 | if ((data->type != w83782d | |
1587 | || i2c_is_isa_client(client)) | |
1588 | && i == 2) | |
1589 | break; | |
1590 | } | |
1591 | /* Only PWM2 can be disabled */ | |
1592 | data->pwmenable[1] = (w83781d_read_value(client, | |
1593 | W83781D_REG_PWMCLK12) & 0x08) >> 3; | |
1594 | } | |
1595 | ||
1596 | data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1)); | |
1597 | data->temp_max = | |
1598 | w83781d_read_value(client, W83781D_REG_TEMP_OVER(1)); | |
1599 | data->temp_max_hyst = | |
1600 | w83781d_read_value(client, W83781D_REG_TEMP_HYST(1)); | |
1601 | data->temp_add[0] = | |
1602 | w83781d_read_value(client, W83781D_REG_TEMP(2)); | |
1603 | data->temp_max_add[0] = | |
1604 | w83781d_read_value(client, W83781D_REG_TEMP_OVER(2)); | |
1605 | data->temp_max_hyst_add[0] = | |
1606 | w83781d_read_value(client, W83781D_REG_TEMP_HYST(2)); | |
7c7a5304 | 1607 | if (data->type != w83783s) { |
1da177e4 LT |
1608 | data->temp_add[1] = |
1609 | w83781d_read_value(client, W83781D_REG_TEMP(3)); | |
1610 | data->temp_max_add[1] = | |
1611 | w83781d_read_value(client, | |
1612 | W83781D_REG_TEMP_OVER(3)); | |
1613 | data->temp_max_hyst_add[1] = | |
1614 | w83781d_read_value(client, | |
1615 | W83781D_REG_TEMP_HYST(3)); | |
1616 | } | |
1617 | i = w83781d_read_value(client, W83781D_REG_VID_FANDIV); | |
7c7a5304 JD |
1618 | data->vid = i & 0x0f; |
1619 | data->vid |= (w83781d_read_value(client, | |
1620 | W83781D_REG_CHIPID) & 0x01) << 4; | |
1da177e4 LT |
1621 | data->fan_div[0] = (i >> 4) & 0x03; |
1622 | data->fan_div[1] = (i >> 6) & 0x03; | |
7c7a5304 JD |
1623 | data->fan_div[2] = (w83781d_read_value(client, |
1624 | W83781D_REG_PIN) >> 6) & 0x03; | |
1da177e4 LT |
1625 | if ((data->type != w83781d) && (data->type != as99127f)) { |
1626 | i = w83781d_read_value(client, W83781D_REG_VBAT); | |
1627 | data->fan_div[0] |= (i >> 3) & 0x04; | |
1628 | data->fan_div[1] |= (i >> 4) & 0x04; | |
7c7a5304 | 1629 | data->fan_div[2] |= (i >> 5) & 0x04; |
1da177e4 | 1630 | } |
1da177e4 | 1631 | if ((data->type == w83782d) || (data->type == w83627hf)) { |
c7f5d7ed JD |
1632 | data->alarms = w83781d_read_value(client, |
1633 | W83782D_REG_ALARM1) | |
1634 | | (w83781d_read_value(client, | |
1635 | W83782D_REG_ALARM2) << 8) | |
1636 | | (w83781d_read_value(client, | |
1637 | W83782D_REG_ALARM3) << 16); | |
1638 | } else if (data->type == w83783s) { | |
1639 | data->alarms = w83781d_read_value(client, | |
1640 | W83782D_REG_ALARM1) | |
1641 | | (w83781d_read_value(client, | |
1642 | W83782D_REG_ALARM2) << 8); | |
1643 | } else { | |
1644 | /* No real-time status registers, fall back to | |
1645 | interrupt status registers */ | |
1646 | data->alarms = w83781d_read_value(client, | |
1647 | W83781D_REG_ALARM1) | |
1648 | | (w83781d_read_value(client, | |
1649 | W83781D_REG_ALARM2) << 8); | |
1da177e4 LT |
1650 | } |
1651 | i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2); | |
1652 | data->beep_enable = i >> 7; | |
1653 | data->beep_mask = ((i & 0x7f) << 8) + | |
1654 | w83781d_read_value(client, W83781D_REG_BEEP_INTS1); | |
1655 | if ((data->type != w83781d) && (data->type != as99127f)) { | |
1656 | data->beep_mask |= | |
1657 | w83781d_read_value(client, | |
1658 | W83781D_REG_BEEP_INTS3) << 16; | |
1659 | } | |
1660 | data->last_updated = jiffies; | |
1661 | data->valid = 1; | |
1662 | } | |
1663 | ||
9a61bf63 | 1664 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1665 | |
1666 | return data; | |
1667 | } | |
1668 | ||
1669 | static int __init | |
1670 | sensors_w83781d_init(void) | |
1671 | { | |
fde09509 JD |
1672 | int res; |
1673 | ||
1674 | res = i2c_add_driver(&w83781d_driver); | |
1675 | if (res) | |
1676 | return res; | |
1677 | ||
1678 | res = i2c_isa_add_driver(&w83781d_isa_driver); | |
1679 | if (res) { | |
1680 | i2c_del_driver(&w83781d_driver); | |
1681 | return res; | |
1682 | } | |
1683 | ||
1684 | return 0; | |
1da177e4 LT |
1685 | } |
1686 | ||
1687 | static void __exit | |
1688 | sensors_w83781d_exit(void) | |
1689 | { | |
fde09509 | 1690 | i2c_isa_del_driver(&w83781d_isa_driver); |
1da177e4 LT |
1691 | i2c_del_driver(&w83781d_driver); |
1692 | } | |
1693 | ||
1694 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " | |
1695 | "Philip Edelbrock <phil@netroedge.com>, " | |
1696 | "and Mark Studebaker <mdsxyz123@yahoo.com>"); | |
1697 | MODULE_DESCRIPTION("W83781D driver"); | |
1698 | MODULE_LICENSE("GPL"); | |
1699 | ||
1700 | module_init(sensors_w83781d_init); | |
1701 | module_exit(sensors_w83781d_exit); |