[PATCH] w83781d: Document the alarm and beep bits
[deliverable/linux.git] / drivers / hwmon / w83781d.c
CommitLineData
1da177e4
LT
1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/
22
23/*
24 Supports following chips:
25
26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27 as99127f 7 3 0 3 0x31 0x12c3 yes no
28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
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31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
1da177e4
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33
34*/
35
1da177e4
LT
36#include <linux/module.h>
37#include <linux/init.h>
38#include <linux/slab.h>
39#include <linux/jiffies.h>
40#include <linux/i2c.h>
fde09509 41#include <linux/i2c-isa.h>
943b0830 42#include <linux/hwmon.h>
303760b4 43#include <linux/hwmon-vid.h>
943b0830 44#include <linux/err.h>
9a61bf63 45#include <linux/mutex.h>
1da177e4
LT
46#include <asm/io.h>
47#include "lm75.h"
48
49/* Addresses to scan */
50static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
51 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
52 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
2d8672c5 53static unsigned short isa_address = 0x290;
1da177e4
LT
54
55/* Insmod parameters */
f4b50261 56I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
1da177e4
LT
57I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
58 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
59
60static int init = 1;
61module_param(init, bool, 0);
62MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
63
64/* Constants specified below */
65
66/* Length of ISA address segment */
67#define W83781D_EXTENT 8
68
69/* Where are the ISA address/data registers relative to the base address */
70#define W83781D_ADDR_REG_OFFSET 5
71#define W83781D_DATA_REG_OFFSET 6
72
73/* The W83781D registers */
74/* The W83782D registers for nr=7,8 are in bank 5 */
75#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
76 (0x554 + (((nr) - 7) * 2)))
77#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
78 (0x555 + (((nr) - 7) * 2)))
79#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
80 (0x550 + (nr) - 7))
81
82#define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
83#define W83781D_REG_FAN(nr) (0x27 + (nr))
84
85#define W83781D_REG_BANK 0x4E
86#define W83781D_REG_TEMP2_CONFIG 0x152
87#define W83781D_REG_TEMP3_CONFIG 0x252
88#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
89 ((nr == 2) ? (0x0150) : \
90 (0x27)))
91#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
92 ((nr == 2) ? (0x153) : \
93 (0x3A)))
94#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
95 ((nr == 2) ? (0x155) : \
96 (0x39)))
97
98#define W83781D_REG_CONFIG 0x40
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99
100/* Interrupt status (W83781D, AS99127F) */
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101#define W83781D_REG_ALARM1 0x41
102#define W83781D_REG_ALARM2 0x42
1da177e4 103
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104/* Real-time status (W83782D, W83783S, W83627HF) */
105#define W83782D_REG_ALARM1 0x459
106#define W83782D_REG_ALARM2 0x45A
107#define W83782D_REG_ALARM3 0x45B
108
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109#define W83781D_REG_BEEP_CONFIG 0x4D
110#define W83781D_REG_BEEP_INTS1 0x56
111#define W83781D_REG_BEEP_INTS2 0x57
112#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
113
114#define W83781D_REG_VID_FANDIV 0x47
115
116#define W83781D_REG_CHIPID 0x49
117#define W83781D_REG_WCHIPID 0x58
118#define W83781D_REG_CHIPMAN 0x4F
119#define W83781D_REG_PIN 0x4B
120
121/* 782D/783S only */
122#define W83781D_REG_VBAT 0x5D
123
124/* PWM 782D (1-4) and 783S (1-2) only */
125#define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
126 /* on which is which; */
127#define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
128 /* However 782d is probably wrong. */
129#define W83781D_REG_PWM3 0x5E
130#define W83781D_REG_PWM4 0x5F
131#define W83781D_REG_PWMCLK12 0x5C
132#define W83781D_REG_PWMCLK34 0x45C
133static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
134 W83781D_REG_PWM3, W83781D_REG_PWM4
135};
136
137#define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
138
139#define W83781D_REG_I2C_ADDR 0x48
140#define W83781D_REG_I2C_SUBADDR 0x4A
141
142/* The following are undocumented in the data sheets however we
143 received the information in an email from Winbond tech support */
144/* Sensor selection - not on 781d */
145#define W83781D_REG_SCFG1 0x5D
146static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
147
148#define W83781D_REG_SCFG2 0x59
149static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
150
151#define W83781D_DEFAULT_BETA 3435
152
153/* RT Table registers */
154#define W83781D_REG_RT_IDX 0x50
155#define W83781D_REG_RT_VAL 0x51
156
157/* Conversions. Rounding and limit checking is only done on the TO_REG
158 variants. Note that you should be a bit careful with which arguments
159 these macros are called: arguments may be evaluated more than once.
160 Fixing this is just not worth it. */
161#define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
162#define IN_FROM_REG(val) (((val) * 16) / 10)
163
164static inline u8
165FAN_TO_REG(long rpm, int div)
166{
167 if (rpm == 0)
168 return 255;
169 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
170 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
171}
172
173#define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
174 ((val) == 255 ? 0 : \
175 1350000 / ((val) * (div))))
176
177#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
178 : (val)) / 1000, 0, 0xff))
179#define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
180
1da177e4
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181#define PWM_FROM_REG(val) (val)
182#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
183#define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
184 (val) ^ 0x7fff : (val))
185#define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
186 (~(val)) & 0x7fff : (val) & 0xffffff)
187
188#define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0)
189#define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0)
190
191#define DIV_FROM_REG(val) (1 << (val))
192
193static inline u8
194DIV_TO_REG(long val, enum chips type)
195{
196 int i;
197 val = SENSORS_LIMIT(val, 1,
198 ((type == w83781d
199 || type == as99127f) ? 8 : 128)) >> 1;
abc01922 200 for (i = 0; i < 7; i++) {
1da177e4
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201 if (val == 0)
202 break;
203 val >>= 1;
204 }
205 return ((u8) i);
206}
207
208/* There are some complications in a module like this. First off, W83781D chips
209 may be both present on the SMBus and the ISA bus, and we have to handle
210 those cases separately at some places. Second, there might be several
211 W83781D chips available (well, actually, that is probably never done; but
212 it is a clean illustration of how to handle a case like that). Finally,
213 a specific chip may be attached to *both* ISA and SMBus, and we would
214 not like to detect it double. Fortunately, in the case of the W83781D at
215 least, a register tells us what SMBus address we are on, so that helps
216 a bit - except if there could be more than one SMBus. Groan. No solution
217 for this yet. */
218
219/* This module may seem overly long and complicated. In fact, it is not so
220 bad. Quite a lot of bookkeeping is done. A real driver can often cut
221 some corners. */
222
223/* For each registered W83781D, we need to keep some data in memory. That
224 data is pointed to by w83781d_list[NR]->data. The structure itself is
225 dynamically allocated, at the same time when a new w83781d client is
226 allocated. */
227struct w83781d_data {
228 struct i2c_client client;
943b0830 229 struct class_device *class_dev;
9a61bf63 230 struct mutex lock;
1da177e4
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231 enum chips type;
232
9a61bf63 233 struct mutex update_lock;
1da177e4
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234 char valid; /* !=0 if following fields are valid */
235 unsigned long last_updated; /* In jiffies */
236
237 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
238 /* array of 2 pointers to subclients */
239
240 u8 in[9]; /* Register value - 8 & 9 for 782D only */
241 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
242 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
243 u8 fan[3]; /* Register value */
244 u8 fan_min[3]; /* Register value */
245 u8 temp;
246 u8 temp_max; /* Register value */
247 u8 temp_max_hyst; /* Register value */
248 u16 temp_add[2]; /* Register value */
249 u16 temp_max_add[2]; /* Register value */
250 u16 temp_max_hyst_add[2]; /* Register value */
251 u8 fan_div[3]; /* Register encoding, shifted right */
252 u8 vid; /* Register encoding, combined */
253 u32 alarms; /* Register encoding, combined */
254 u32 beep_mask; /* Register encoding, combined */
255 u8 beep_enable; /* Boolean */
256 u8 pwm[4]; /* Register value */
257 u8 pwmenable[4]; /* Boolean */
258 u16 sens[3]; /* 782D/783S only.
259 1 = pentium diode; 2 = 3904 diode;
260 3000-5000 = thermistor beta.
261 Default = 3435.
262 Other Betas unimplemented */
263 u8 vrm;
264};
265
266static int w83781d_attach_adapter(struct i2c_adapter *adapter);
2d8672c5 267static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter);
1da177e4
LT
268static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
269static int w83781d_detach_client(struct i2c_client *client);
270
271static int w83781d_read_value(struct i2c_client *client, u16 register);
272static int w83781d_write_value(struct i2c_client *client, u16 register,
273 u16 value);
274static struct w83781d_data *w83781d_update_device(struct device *dev);
275static void w83781d_init_client(struct i2c_client *client);
276
277static struct i2c_driver w83781d_driver = {
cdaf7934 278 .driver = {
cdaf7934
LR
279 .name = "w83781d",
280 },
1da177e4 281 .id = I2C_DRIVERID_W83781D,
1da177e4
LT
282 .attach_adapter = w83781d_attach_adapter,
283 .detach_client = w83781d_detach_client,
284};
285
fde09509 286static struct i2c_driver w83781d_isa_driver = {
cdaf7934 287 .driver = {
cdaf7934
LR
288 .name = "w83781d-isa",
289 },
2d8672c5 290 .attach_adapter = w83781d_isa_attach_adapter,
fde09509
JD
291 .detach_client = w83781d_detach_client,
292};
293
294
1da177e4
LT
295/* following are the sysfs callback functions */
296#define show_in_reg(reg) \
297static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
298{ \
299 struct w83781d_data *data = w83781d_update_device(dev); \
300 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
301}
302show_in_reg(in);
303show_in_reg(in_min);
304show_in_reg(in_max);
305
306#define store_in_reg(REG, reg) \
307static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
308{ \
309 struct i2c_client *client = to_i2c_client(dev); \
310 struct w83781d_data *data = i2c_get_clientdata(client); \
311 u32 val; \
312 \
313 val = simple_strtoul(buf, NULL, 10) / 10; \
314 \
9a61bf63 315 mutex_lock(&data->update_lock); \
1da177e4
LT
316 data->in_##reg[nr] = IN_TO_REG(val); \
317 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
318 \
9a61bf63 319 mutex_unlock(&data->update_lock); \
1da177e4
LT
320 return count; \
321}
322store_in_reg(MIN, min);
323store_in_reg(MAX, max);
324
325#define sysfs_in_offset(offset) \
326static ssize_t \
e404e274 327show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
328{ \
329 return show_in(dev, buf, offset); \
330} \
331static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
332
333#define sysfs_in_reg_offset(reg, offset) \
e404e274 334static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
335{ \
336 return show_in_##reg (dev, buf, offset); \
337} \
e404e274 338static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
339{ \
340 return store_in_##reg (dev, buf, count, offset); \
341} \
342static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
343
344#define sysfs_in_offsets(offset) \
345sysfs_in_offset(offset); \
346sysfs_in_reg_offset(min, offset); \
347sysfs_in_reg_offset(max, offset);
348
349sysfs_in_offsets(0);
350sysfs_in_offsets(1);
351sysfs_in_offsets(2);
352sysfs_in_offsets(3);
353sysfs_in_offsets(4);
354sysfs_in_offsets(5);
355sysfs_in_offsets(6);
356sysfs_in_offsets(7);
357sysfs_in_offsets(8);
358
359#define device_create_file_in(client, offset) \
360do { \
361device_create_file(&client->dev, &dev_attr_in##offset##_input); \
362device_create_file(&client->dev, &dev_attr_in##offset##_min); \
363device_create_file(&client->dev, &dev_attr_in##offset##_max); \
364} while (0)
365
366#define show_fan_reg(reg) \
367static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
368{ \
369 struct w83781d_data *data = w83781d_update_device(dev); \
370 return sprintf(buf,"%ld\n", \
371 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
372}
373show_fan_reg(fan);
374show_fan_reg(fan_min);
375
376static ssize_t
377store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
378{
379 struct i2c_client *client = to_i2c_client(dev);
380 struct w83781d_data *data = i2c_get_clientdata(client);
381 u32 val;
382
383 val = simple_strtoul(buf, NULL, 10);
384
9a61bf63 385 mutex_lock(&data->update_lock);
1da177e4
LT
386 data->fan_min[nr - 1] =
387 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
388 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
389 data->fan_min[nr - 1]);
390
9a61bf63 391 mutex_unlock(&data->update_lock);
1da177e4
LT
392 return count;
393}
394
395#define sysfs_fan_offset(offset) \
e404e274 396static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
397{ \
398 return show_fan(dev, buf, offset); \
399} \
400static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
401
402#define sysfs_fan_min_offset(offset) \
e404e274 403static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
404{ \
405 return show_fan_min(dev, buf, offset); \
406} \
e404e274 407static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
408{ \
409 return store_fan_min(dev, buf, count, offset); \
410} \
411static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
412
413sysfs_fan_offset(1);
414sysfs_fan_min_offset(1);
415sysfs_fan_offset(2);
416sysfs_fan_min_offset(2);
417sysfs_fan_offset(3);
418sysfs_fan_min_offset(3);
419
420#define device_create_file_fan(client, offset) \
421do { \
422device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
423device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
424} while (0)
425
426#define show_temp_reg(reg) \
427static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
428{ \
429 struct w83781d_data *data = w83781d_update_device(dev); \
430 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
431 return sprintf(buf,"%d\n", \
432 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
433 } else { /* TEMP1 */ \
434 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
435 } \
436}
437show_temp_reg(temp);
438show_temp_reg(temp_max);
439show_temp_reg(temp_max_hyst);
440
441#define store_temp_reg(REG, reg) \
442static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
443{ \
444 struct i2c_client *client = to_i2c_client(dev); \
445 struct w83781d_data *data = i2c_get_clientdata(client); \
446 s32 val; \
447 \
448 val = simple_strtol(buf, NULL, 10); \
449 \
9a61bf63 450 mutex_lock(&data->update_lock); \
1da177e4
LT
451 \
452 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
453 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
454 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
455 data->temp_##reg##_add[nr-2]); \
456 } else { /* TEMP1 */ \
457 data->temp_##reg = TEMP_TO_REG(val); \
458 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
459 data->temp_##reg); \
460 } \
461 \
9a61bf63 462 mutex_unlock(&data->update_lock); \
1da177e4
LT
463 return count; \
464}
465store_temp_reg(OVER, max);
466store_temp_reg(HYST, max_hyst);
467
468#define sysfs_temp_offset(offset) \
469static ssize_t \
e404e274 470show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
471{ \
472 return show_temp(dev, buf, offset); \
473} \
474static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
475
476#define sysfs_temp_reg_offset(reg, offset) \
e404e274 477static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
478{ \
479 return show_temp_##reg (dev, buf, offset); \
480} \
e404e274 481static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
482{ \
483 return store_temp_##reg (dev, buf, count, offset); \
484} \
485static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
486
487#define sysfs_temp_offsets(offset) \
488sysfs_temp_offset(offset); \
489sysfs_temp_reg_offset(max, offset); \
490sysfs_temp_reg_offset(max_hyst, offset);
491
492sysfs_temp_offsets(1);
493sysfs_temp_offsets(2);
494sysfs_temp_offsets(3);
495
496#define device_create_file_temp(client, offset) \
497do { \
498device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
499device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
500device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
501} while (0)
502
503static ssize_t
e404e274 504show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
505{
506 struct w83781d_data *data = w83781d_update_device(dev);
507 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
508}
509
510static
511DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
512#define device_create_file_vid(client) \
513device_create_file(&client->dev, &dev_attr_cpu0_vid);
514static ssize_t
e404e274 515show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
516{
517 struct w83781d_data *data = w83781d_update_device(dev);
518 return sprintf(buf, "%ld\n", (long) data->vrm);
519}
520
521static ssize_t
e404e274 522store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4
LT
523{
524 struct i2c_client *client = to_i2c_client(dev);
525 struct w83781d_data *data = i2c_get_clientdata(client);
526 u32 val;
527
528 val = simple_strtoul(buf, NULL, 10);
529 data->vrm = val;
530
531 return count;
532}
533
534static
535DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
536#define device_create_file_vrm(client) \
537device_create_file(&client->dev, &dev_attr_vrm);
538static ssize_t
e404e274 539show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
540{
541 struct w83781d_data *data = w83781d_update_device(dev);
68188ba7 542 return sprintf(buf, "%u\n", data->alarms);
1da177e4
LT
543}
544
545static
546DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
547#define device_create_file_alarms(client) \
548device_create_file(&client->dev, &dev_attr_alarms);
e404e274 549static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
550{
551 struct w83781d_data *data = w83781d_update_device(dev);
552 return sprintf(buf, "%ld\n",
553 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
554}
e404e274 555static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
556{
557 struct w83781d_data *data = w83781d_update_device(dev);
558 return sprintf(buf, "%ld\n",
559 (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
560}
561
562#define BEEP_ENABLE 0 /* Store beep_enable */
563#define BEEP_MASK 1 /* Store beep_mask */
564
565static ssize_t
566store_beep_reg(struct device *dev, const char *buf, size_t count,
567 int update_mask)
568{
569 struct i2c_client *client = to_i2c_client(dev);
570 struct w83781d_data *data = i2c_get_clientdata(client);
571 u32 val, val2;
572
573 val = simple_strtoul(buf, NULL, 10);
574
9a61bf63 575 mutex_lock(&data->update_lock);
1da177e4
LT
576
577 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
578 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
579 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
580 data->beep_mask & 0xff);
581
582 if ((data->type != w83781d) && (data->type != as99127f)) {
583 w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
584 ((data->beep_mask) >> 16) & 0xff);
585 }
586
587 val2 = (data->beep_mask >> 8) & 0x7f;
588 } else { /* We are storing beep_enable */
589 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
590 data->beep_enable = BEEP_ENABLE_TO_REG(val);
591 }
592
593 w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
594 val2 | data->beep_enable << 7);
595
9a61bf63 596 mutex_unlock(&data->update_lock);
1da177e4
LT
597 return count;
598}
599
600#define sysfs_beep(REG, reg) \
e404e274 601static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4 602{ \
e404e274 603 return show_beep_##reg(dev, attr, buf); \
1da177e4 604} \
e404e274 605static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
606{ \
607 return store_beep_reg(dev, buf, count, BEEP_##REG); \
608} \
609static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
610
611sysfs_beep(ENABLE, enable);
612sysfs_beep(MASK, mask);
613
614#define device_create_file_beep(client) \
615do { \
616device_create_file(&client->dev, &dev_attr_beep_enable); \
617device_create_file(&client->dev, &dev_attr_beep_mask); \
618} while (0)
619
620static ssize_t
621show_fan_div_reg(struct device *dev, char *buf, int nr)
622{
623 struct w83781d_data *data = w83781d_update_device(dev);
624 return sprintf(buf, "%ld\n",
625 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
626}
627
628/* Note: we save and restore the fan minimum here, because its value is
629 determined in part by the fan divisor. This follows the principle of
630 least suprise; the user doesn't expect the fan minimum to change just
631 because the divisor changed. */
632static ssize_t
633store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
634{
635 struct i2c_client *client = to_i2c_client(dev);
636 struct w83781d_data *data = i2c_get_clientdata(client);
637 unsigned long min;
638 u8 reg;
639 unsigned long val = simple_strtoul(buf, NULL, 10);
640
9a61bf63 641 mutex_lock(&data->update_lock);
1da177e4
LT
642
643 /* Save fan_min */
644 min = FAN_FROM_REG(data->fan_min[nr],
645 DIV_FROM_REG(data->fan_div[nr]));
646
647 data->fan_div[nr] = DIV_TO_REG(val, data->type);
648
649 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
650 & (nr==0 ? 0xcf : 0x3f))
651 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
652 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
653
654 /* w83781d and as99127f don't have extended divisor bits */
655 if (data->type != w83781d && data->type != as99127f) {
656 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
657 & ~(1 << (5 + nr)))
658 | ((data->fan_div[nr] & 0x04) << (3 + nr));
659 w83781d_write_value(client, W83781D_REG_VBAT, reg);
660 }
661
662 /* Restore fan_min */
663 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
664 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
665
9a61bf63 666 mutex_unlock(&data->update_lock);
1da177e4
LT
667 return count;
668}
669
670#define sysfs_fan_div(offset) \
e404e274 671static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
672{ \
673 return show_fan_div_reg(dev, buf, offset); \
674} \
e404e274 675static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
676{ \
677 return store_fan_div_reg(dev, buf, count, offset - 1); \
678} \
679static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
680
681sysfs_fan_div(1);
682sysfs_fan_div(2);
683sysfs_fan_div(3);
684
685#define device_create_file_fan_div(client, offset) \
686do { \
687device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
688} while (0)
689
690static ssize_t
691show_pwm_reg(struct device *dev, char *buf, int nr)
692{
693 struct w83781d_data *data = w83781d_update_device(dev);
694 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
695}
696
697static ssize_t
698show_pwmenable_reg(struct device *dev, char *buf, int nr)
699{
700 struct w83781d_data *data = w83781d_update_device(dev);
701 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
702}
703
704static ssize_t
705store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
706{
707 struct i2c_client *client = to_i2c_client(dev);
708 struct w83781d_data *data = i2c_get_clientdata(client);
709 u32 val;
710
711 val = simple_strtoul(buf, NULL, 10);
712
9a61bf63 713 mutex_lock(&data->update_lock);
1da177e4
LT
714 data->pwm[nr - 1] = PWM_TO_REG(val);
715 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
9a61bf63 716 mutex_unlock(&data->update_lock);
1da177e4
LT
717 return count;
718}
719
720static ssize_t
721store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
722{
723 struct i2c_client *client = to_i2c_client(dev);
724 struct w83781d_data *data = i2c_get_clientdata(client);
725 u32 val, reg;
726
727 val = simple_strtoul(buf, NULL, 10);
728
9a61bf63 729 mutex_lock(&data->update_lock);
1da177e4
LT
730
731 switch (val) {
732 case 0:
733 case 1:
734 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
735 w83781d_write_value(client, W83781D_REG_PWMCLK12,
736 (reg & 0xf7) | (val << 3));
737
738 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
739 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
740 (reg & 0xef) | (!val << 4));
741
742 data->pwmenable[nr - 1] = val;
743 break;
744
745 default:
9a61bf63 746 mutex_unlock(&data->update_lock);
1da177e4
LT
747 return -EINVAL;
748 }
749
9a61bf63 750 mutex_unlock(&data->update_lock);
1da177e4
LT
751 return count;
752}
753
754#define sysfs_pwm(offset) \
e404e274 755static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
756{ \
757 return show_pwm_reg(dev, buf, offset); \
758} \
e404e274 759static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT
760 const char *buf, size_t count) \
761{ \
762 return store_pwm_reg(dev, buf, count, offset); \
763} \
764static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
765 show_regs_pwm_##offset, store_regs_pwm_##offset);
766
767#define sysfs_pwmenable(offset) \
e404e274 768static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
769{ \
770 return show_pwmenable_reg(dev, buf, offset); \
771} \
e404e274 772static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT
773 const char *buf, size_t count) \
774{ \
775 return store_pwmenable_reg(dev, buf, count, offset); \
776} \
777static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
778 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
779
780sysfs_pwm(1);
781sysfs_pwm(2);
782sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
783sysfs_pwm(3);
784sysfs_pwm(4);
785
786#define device_create_file_pwm(client, offset) \
787do { \
788device_create_file(&client->dev, &dev_attr_pwm##offset); \
789} while (0)
790
791#define device_create_file_pwmenable(client, offset) \
792do { \
793device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
794} while (0)
795
796static ssize_t
797show_sensor_reg(struct device *dev, char *buf, int nr)
798{
799 struct w83781d_data *data = w83781d_update_device(dev);
800 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
801}
802
803static ssize_t
804store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
805{
806 struct i2c_client *client = to_i2c_client(dev);
807 struct w83781d_data *data = i2c_get_clientdata(client);
808 u32 val, tmp;
809
810 val = simple_strtoul(buf, NULL, 10);
811
9a61bf63 812 mutex_lock(&data->update_lock);
1da177e4
LT
813
814 switch (val) {
815 case 1: /* PII/Celeron diode */
816 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
817 w83781d_write_value(client, W83781D_REG_SCFG1,
818 tmp | BIT_SCFG1[nr - 1]);
819 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
820 w83781d_write_value(client, W83781D_REG_SCFG2,
821 tmp | BIT_SCFG2[nr - 1]);
822 data->sens[nr - 1] = val;
823 break;
824 case 2: /* 3904 */
825 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
826 w83781d_write_value(client, W83781D_REG_SCFG1,
827 tmp | BIT_SCFG1[nr - 1]);
828 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
829 w83781d_write_value(client, W83781D_REG_SCFG2,
830 tmp & ~BIT_SCFG2[nr - 1]);
831 data->sens[nr - 1] = val;
832 break;
833 case W83781D_DEFAULT_BETA: /* thermistor */
834 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
835 w83781d_write_value(client, W83781D_REG_SCFG1,
836 tmp & ~BIT_SCFG1[nr - 1]);
837 data->sens[nr - 1] = val;
838 break;
839 default:
840 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
841 (long) val, W83781D_DEFAULT_BETA);
842 break;
843 }
844
9a61bf63 845 mutex_unlock(&data->update_lock);
1da177e4
LT
846 return count;
847}
848
849#define sysfs_sensor(offset) \
e404e274 850static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
851{ \
852 return show_sensor_reg(dev, buf, offset); \
853} \
e404e274 854static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT
855{ \
856 return store_sensor_reg(dev, buf, count, offset); \
857} \
858static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
859
860sysfs_sensor(1);
861sysfs_sensor(2);
862sysfs_sensor(3);
863
864#define device_create_file_sensor(client, offset) \
865do { \
866device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
867} while (0)
868
869/* This function is called when:
870 * w83781d_driver is inserted (when this module is loaded), for each
871 available adapter
872 * when a new adapter is inserted (and w83781d_driver is still present) */
873static int
874w83781d_attach_adapter(struct i2c_adapter *adapter)
875{
876 if (!(adapter->class & I2C_CLASS_HWMON))
877 return 0;
2ed2dc3c 878 return i2c_probe(adapter, &addr_data, w83781d_detect);
1da177e4
LT
879}
880
2d8672c5
JD
881static int
882w83781d_isa_attach_adapter(struct i2c_adapter *adapter)
883{
884 return w83781d_detect(adapter, isa_address, -1);
885}
886
1da177e4
LT
887/* Assumes that adapter is of I2C, not ISA variety.
888 * OTHERWISE DON'T CALL THIS
889 */
890static int
891w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
892 struct i2c_client *new_client)
893{
894 int i, val1 = 0, id;
895 int err;
896 const char *client_name = "";
897 struct w83781d_data *data = i2c_get_clientdata(new_client);
898
ba9c2e8d 899 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT
900 if (!(data->lm75[0])) {
901 err = -ENOMEM;
902 goto ERROR_SC_0;
903 }
1da177e4
LT
904
905 id = i2c_adapter_id(adapter);
906
907 if (force_subclients[0] == id && force_subclients[1] == address) {
908 for (i = 2; i <= 3; i++) {
909 if (force_subclients[i] < 0x48 ||
910 force_subclients[i] > 0x4f) {
911 dev_err(&new_client->dev, "Invalid subclient "
912 "address %d; must be 0x48-0x4f\n",
913 force_subclients[i]);
914 err = -EINVAL;
915 goto ERROR_SC_1;
916 }
917 }
918 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
919 (force_subclients[2] & 0x07) |
920 ((force_subclients[3] & 0x07) << 4));
921 data->lm75[0]->addr = force_subclients[2];
922 } else {
923 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
924 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
925 }
926
927 if (kind != w83783s) {
ba9c2e8d 928 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT
929 if (!(data->lm75[1])) {
930 err = -ENOMEM;
931 goto ERROR_SC_1;
932 }
1da177e4
LT
933
934 if (force_subclients[0] == id &&
935 force_subclients[1] == address) {
936 data->lm75[1]->addr = force_subclients[3];
937 } else {
938 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
939 }
940 if (data->lm75[0]->addr == data->lm75[1]->addr) {
941 dev_err(&new_client->dev,
942 "Duplicate addresses 0x%x for subclients.\n",
943 data->lm75[0]->addr);
944 err = -EBUSY;
945 goto ERROR_SC_2;
946 }
947 }
948
949 if (kind == w83781d)
950 client_name = "w83781d subclient";
951 else if (kind == w83782d)
952 client_name = "w83782d subclient";
953 else if (kind == w83783s)
954 client_name = "w83783s subclient";
955 else if (kind == w83627hf)
956 client_name = "w83627hf subclient";
957 else if (kind == as99127f)
958 client_name = "as99127f subclient";
959
960 for (i = 0; i <= 1; i++) {
961 /* store all data in w83781d */
962 i2c_set_clientdata(data->lm75[i], NULL);
963 data->lm75[i]->adapter = adapter;
964 data->lm75[i]->driver = &w83781d_driver;
965 data->lm75[i]->flags = 0;
966 strlcpy(data->lm75[i]->name, client_name,
967 I2C_NAME_SIZE);
968 if ((err = i2c_attach_client(data->lm75[i]))) {
969 dev_err(&new_client->dev, "Subclient %d "
970 "registration at address 0x%x "
971 "failed.\n", i, data->lm75[i]->addr);
972 if (i == 1)
973 goto ERROR_SC_3;
974 goto ERROR_SC_2;
975 }
976 if (kind == w83783s)
977 break;
978 }
979
980 return 0;
981
982/* Undo inits in case of errors */
983ERROR_SC_3:
984 i2c_detach_client(data->lm75[0]);
985ERROR_SC_2:
6044ec88 986 kfree(data->lm75[1]);
1da177e4 987ERROR_SC_1:
6044ec88 988 kfree(data->lm75[0]);
1da177e4
LT
989ERROR_SC_0:
990 return err;
991}
992
993static int
994w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
995{
996 int i = 0, val1 = 0, val2;
997 struct i2c_client *new_client;
998 struct w83781d_data *data;
999 int err;
1000 const char *client_name = "";
1001 int is_isa = i2c_is_isa_adapter(adapter);
1002 enum vendor { winbond, asus } vendid;
1003
1004 if (!is_isa
1005 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1006 err = -EINVAL;
1007 goto ERROR0;
1008 }
1009
1010 /* Prevent users from forcing a kind for a bus it isn't supposed
1011 to possibly be on */
1012 if (is_isa && (kind == as99127f || kind == w83783s)) {
1013 dev_err(&adapter->dev,
1014 "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1015 address);
1016 err = -EINVAL;
1017 goto ERROR0;
1018 }
1da177e4
LT
1019
1020 if (is_isa)
1021 if (!request_region(address, W83781D_EXTENT,
cdaf7934 1022 w83781d_isa_driver.driver.name)) {
1da177e4
LT
1023 dev_dbg(&adapter->dev, "Request of region "
1024 "0x%x-0x%x for w83781d failed\n", address,
1025 address + W83781D_EXTENT - 1);
1026 err = -EBUSY;
1027 goto ERROR0;
1028 }
1029
1030 /* Probe whether there is anything available on this address. Already
1031 done for SMBus clients */
1032 if (kind < 0) {
1033 if (is_isa) {
1034
1035#define REALLY_SLOW_IO
1036 /* We need the timeouts for at least some LM78-like
1037 chips. But only if we read 'undefined' registers. */
1038 i = inb_p(address + 1);
1039 if (inb_p(address + 2) != i
1040 || inb_p(address + 3) != i
1041 || inb_p(address + 7) != i) {
1042 dev_dbg(&adapter->dev, "Detection of w83781d "
1043 "chip failed at step 1\n");
1044 err = -ENODEV;
1045 goto ERROR1;
1046 }
1047#undef REALLY_SLOW_IO
1048
1049 /* Let's just hope nothing breaks here */
1050 i = inb_p(address + 5) & 0x7f;
1051 outb_p(~i & 0x7f, address + 5);
1052 val2 = inb_p(address + 5) & 0x7f;
1053 if (val2 != (~i & 0x7f)) {
1054 outb_p(i, address + 5);
1055 dev_dbg(&adapter->dev, "Detection of w83781d "
1056 "chip failed at step 2 (0x%x != "
1057 "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1058 address + 5);
1059 err = -ENODEV;
1060 goto ERROR1;
1061 }
1062 }
1063 }
1064
1065 /* OK. For now, we presume we have a valid client. We now create the
1066 client structure, even though we cannot fill it completely yet.
1067 But it allows us to access w83781d_{read,write}_value. */
1068
ba9c2e8d 1069 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1da177e4
LT
1070 err = -ENOMEM;
1071 goto ERROR1;
1072 }
1da177e4
LT
1073
1074 new_client = &data->client;
1075 i2c_set_clientdata(new_client, data);
1076 new_client->addr = address;
9a61bf63 1077 mutex_init(&data->lock);
1da177e4 1078 new_client->adapter = adapter;
fde09509 1079 new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver;
1da177e4
LT
1080 new_client->flags = 0;
1081
1082 /* Now, we do the remaining detection. */
1083
1084 /* The w8378?d may be stuck in some other bank than bank 0. This may
1085 make reading other information impossible. Specify a force=... or
1086 force_*=... parameter, and the Winbond will be reset to the right
1087 bank. */
1088 if (kind < 0) {
1089 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1090 dev_dbg(&new_client->dev, "Detection failed at step "
1091 "3\n");
1092 err = -ENODEV;
1093 goto ERROR2;
1094 }
1095 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1096 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1097 /* Check for Winbond or Asus ID if in bank 0 */
1098 if ((!(val1 & 0x07)) &&
1099 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1100 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1101 dev_dbg(&new_client->dev, "Detection failed at step "
1102 "4\n");
1103 err = -ENODEV;
1104 goto ERROR2;
1105 }
1106 /* If Winbond SMBus, check address at 0x48.
1107 Asus doesn't support, except for as99127f rev.2 */
1108 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1109 ((val1 & 0x80) && (val2 == 0x5c)))) {
1110 if (w83781d_read_value
1111 (new_client, W83781D_REG_I2C_ADDR) != address) {
1112 dev_dbg(&new_client->dev, "Detection failed "
1113 "at step 5\n");
1114 err = -ENODEV;
1115 goto ERROR2;
1116 }
1117 }
1118 }
1119
1120 /* We have either had a force parameter, or we have already detected the
1121 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1122 w83781d_write_value(new_client, W83781D_REG_BANK,
1123 (w83781d_read_value(new_client,
1124 W83781D_REG_BANK) & 0x78) |
1125 0x80);
1126
1127 /* Determine the chip type. */
1128 if (kind <= 0) {
1129 /* get vendor ID */
1130 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1131 if (val2 == 0x5c)
1132 vendid = winbond;
1133 else if (val2 == 0x12)
1134 vendid = asus;
1135 else {
1136 dev_dbg(&new_client->dev, "Chip was made by neither "
1137 "Winbond nor Asus?\n");
1138 err = -ENODEV;
1139 goto ERROR2;
1140 }
1141
1142 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1143 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1144 kind = w83781d;
1145 else if (val1 == 0x30 && vendid == winbond)
1146 kind = w83782d;
1147 else if (val1 == 0x40 && vendid == winbond && !is_isa
1148 && address == 0x2d)
1149 kind = w83783s;
7c7a5304 1150 else if (val1 == 0x21 && vendid == winbond)
1da177e4
LT
1151 kind = w83627hf;
1152 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1153 kind = as99127f;
1da177e4
LT
1154 else {
1155 if (kind == 0)
1156 dev_warn(&new_client->dev, "Ignoring 'force' "
1157 "parameter for unknown chip at "
1158 "adapter %d, address 0x%02x\n",
1159 i2c_adapter_id(adapter), address);
1160 err = -EINVAL;
1161 goto ERROR2;
1162 }
1163 }
1164
1165 if (kind == w83781d) {
1166 client_name = "w83781d";
1167 } else if (kind == w83782d) {
1168 client_name = "w83782d";
1169 } else if (kind == w83783s) {
1170 client_name = "w83783s";
1171 } else if (kind == w83627hf) {
7c7a5304 1172 client_name = "w83627hf";
1da177e4
LT
1173 } else if (kind == as99127f) {
1174 client_name = "as99127f";
1da177e4
LT
1175 }
1176
1177 /* Fill in the remaining client fields and put into the global list */
1178 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1179 data->type = kind;
1180
1181 data->valid = 0;
9a61bf63 1182 mutex_init(&data->update_lock);
1da177e4
LT
1183
1184 /* Tell the I2C layer a new client has arrived */
1185 if ((err = i2c_attach_client(new_client)))
1186 goto ERROR2;
1187
1188 /* attach secondary i2c lm75-like clients */
1189 if (!is_isa) {
1190 if ((err = w83781d_detect_subclients(adapter, address,
1191 kind, new_client)))
1192 goto ERROR3;
1193 } else {
1194 data->lm75[0] = NULL;
1195 data->lm75[1] = NULL;
1196 }
1197
1198 /* Initialize the chip */
1199 w83781d_init_client(new_client);
1200
1201 /* A few vars need to be filled upon startup */
1202 for (i = 1; i <= 3; i++) {
1203 data->fan_min[i - 1] = w83781d_read_value(new_client,
1204 W83781D_REG_FAN_MIN(i));
1205 }
1206 if (kind != w83781d && kind != as99127f)
1207 for (i = 0; i < 4; i++)
1208 data->pwmenable[i] = 1;
1209
1210 /* Register sysfs hooks */
943b0830
MH
1211 data->class_dev = hwmon_device_register(&new_client->dev);
1212 if (IS_ERR(data->class_dev)) {
1213 err = PTR_ERR(data->class_dev);
1214 goto ERROR4;
1215 }
1216
1da177e4 1217 device_create_file_in(new_client, 0);
7c7a5304 1218 if (kind != w83783s)
1da177e4
LT
1219 device_create_file_in(new_client, 1);
1220 device_create_file_in(new_client, 2);
1221 device_create_file_in(new_client, 3);
1222 device_create_file_in(new_client, 4);
1223 device_create_file_in(new_client, 5);
1224 device_create_file_in(new_client, 6);
1225 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1226 device_create_file_in(new_client, 7);
1227 device_create_file_in(new_client, 8);
1228 }
1229
1230 device_create_file_fan(new_client, 1);
1231 device_create_file_fan(new_client, 2);
7c7a5304 1232 device_create_file_fan(new_client, 3);
1da177e4
LT
1233
1234 device_create_file_temp(new_client, 1);
1235 device_create_file_temp(new_client, 2);
7c7a5304 1236 if (kind != w83783s)
1da177e4
LT
1237 device_create_file_temp(new_client, 3);
1238
7c7a5304
JD
1239 device_create_file_vid(new_client);
1240 device_create_file_vrm(new_client);
1da177e4
LT
1241
1242 device_create_file_fan_div(new_client, 1);
1243 device_create_file_fan_div(new_client, 2);
7c7a5304 1244 device_create_file_fan_div(new_client, 3);
1da177e4
LT
1245
1246 device_create_file_alarms(new_client);
1247
1248 device_create_file_beep(new_client);
1249
1250 if (kind != w83781d && kind != as99127f) {
1251 device_create_file_pwm(new_client, 1);
1252 device_create_file_pwm(new_client, 2);
1253 device_create_file_pwmenable(new_client, 2);
1254 }
1255 if (kind == w83782d && !is_isa) {
1256 device_create_file_pwm(new_client, 3);
1257 device_create_file_pwm(new_client, 4);
1258 }
1259
1260 if (kind != as99127f && kind != w83781d) {
1261 device_create_file_sensor(new_client, 1);
1262 device_create_file_sensor(new_client, 2);
7c7a5304 1263 if (kind != w83783s)
1da177e4
LT
1264 device_create_file_sensor(new_client, 3);
1265 }
1266
1267 return 0;
1268
943b0830
MH
1269ERROR4:
1270 if (data->lm75[1]) {
1271 i2c_detach_client(data->lm75[1]);
1272 kfree(data->lm75[1]);
1273 }
1274 if (data->lm75[0]) {
1275 i2c_detach_client(data->lm75[0]);
1276 kfree(data->lm75[0]);
1277 }
1da177e4
LT
1278ERROR3:
1279 i2c_detach_client(new_client);
1280ERROR2:
1281 kfree(data);
1282ERROR1:
1283 if (is_isa)
1284 release_region(address, W83781D_EXTENT);
1285ERROR0:
1286 return err;
1287}
1288
1289static int
1290w83781d_detach_client(struct i2c_client *client)
1291{
943b0830 1292 struct w83781d_data *data = i2c_get_clientdata(client);
1da177e4
LT
1293 int err;
1294
943b0830
MH
1295 /* main client */
1296 if (data)
1297 hwmon_device_unregister(data->class_dev);
1298
1da177e4
LT
1299 if (i2c_is_isa_client(client))
1300 release_region(client->addr, W83781D_EXTENT);
1301
7bef5594 1302 if ((err = i2c_detach_client(client)))
1da177e4 1303 return err;
1da177e4 1304
943b0830
MH
1305 /* main client */
1306 if (data)
1307 kfree(data);
1308
1309 /* subclient */
1310 else
1da177e4 1311 kfree(client);
1da177e4
LT
1312
1313 return 0;
1314}
1315
1316/* The SMBus locks itself, usually, but nothing may access the Winbond between
1317 bank switches. ISA access must always be locked explicitly!
1318 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1319 would slow down the W83781D access and should not be necessary.
1320 There are some ugly typecasts here, but the good news is - they should
1321 nowhere else be necessary! */
1322static int
1323w83781d_read_value(struct i2c_client *client, u16 reg)
1324{
1325 struct w83781d_data *data = i2c_get_clientdata(client);
1326 int res, word_sized, bank;
1327 struct i2c_client *cl;
1328
9a61bf63 1329 mutex_lock(&data->lock);
1da177e4
LT
1330 if (i2c_is_isa_client(client)) {
1331 word_sized = (((reg & 0xff00) == 0x100)
1332 || ((reg & 0xff00) == 0x200))
1333 && (((reg & 0x00ff) == 0x50)
1334 || ((reg & 0x00ff) == 0x53)
1335 || ((reg & 0x00ff) == 0x55));
1336 if (reg & 0xff00) {
1337 outb_p(W83781D_REG_BANK,
1338 client->addr + W83781D_ADDR_REG_OFFSET);
1339 outb_p(reg >> 8,
1340 client->addr + W83781D_DATA_REG_OFFSET);
1341 }
1342 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1343 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1344 if (word_sized) {
1345 outb_p((reg & 0xff) + 1,
1346 client->addr + W83781D_ADDR_REG_OFFSET);
1347 res =
1348 (res << 8) + inb_p(client->addr +
1349 W83781D_DATA_REG_OFFSET);
1350 }
1351 if (reg & 0xff00) {
1352 outb_p(W83781D_REG_BANK,
1353 client->addr + W83781D_ADDR_REG_OFFSET);
1354 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1355 }
1356 } else {
1357 bank = (reg >> 8) & 0x0f;
1358 if (bank > 2)
1359 /* switch banks */
1360 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1361 bank);
1362 if (bank == 0 || bank > 2) {
1363 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1364 } else {
1365 /* switch to subclient */
1366 cl = data->lm75[bank - 1];
1367 /* convert from ISA to LM75 I2C addresses */
1368 switch (reg & 0xff) {
1369 case 0x50: /* TEMP */
1370 res = swab16(i2c_smbus_read_word_data(cl, 0));
1371 break;
1372 case 0x52: /* CONFIG */
1373 res = i2c_smbus_read_byte_data(cl, 1);
1374 break;
1375 case 0x53: /* HYST */
1376 res = swab16(i2c_smbus_read_word_data(cl, 2));
1377 break;
1378 case 0x55: /* OVER */
1379 default:
1380 res = swab16(i2c_smbus_read_word_data(cl, 3));
1381 break;
1382 }
1383 }
1384 if (bank > 2)
1385 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1386 }
9a61bf63 1387 mutex_unlock(&data->lock);
1da177e4
LT
1388 return res;
1389}
1390
1391static int
1392w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1393{
1394 struct w83781d_data *data = i2c_get_clientdata(client);
1395 int word_sized, bank;
1396 struct i2c_client *cl;
1397
9a61bf63 1398 mutex_lock(&data->lock);
1da177e4
LT
1399 if (i2c_is_isa_client(client)) {
1400 word_sized = (((reg & 0xff00) == 0x100)
1401 || ((reg & 0xff00) == 0x200))
1402 && (((reg & 0x00ff) == 0x53)
1403 || ((reg & 0x00ff) == 0x55));
1404 if (reg & 0xff00) {
1405 outb_p(W83781D_REG_BANK,
1406 client->addr + W83781D_ADDR_REG_OFFSET);
1407 outb_p(reg >> 8,
1408 client->addr + W83781D_DATA_REG_OFFSET);
1409 }
1410 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1411 if (word_sized) {
1412 outb_p(value >> 8,
1413 client->addr + W83781D_DATA_REG_OFFSET);
1414 outb_p((reg & 0xff) + 1,
1415 client->addr + W83781D_ADDR_REG_OFFSET);
1416 }
1417 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1418 if (reg & 0xff00) {
1419 outb_p(W83781D_REG_BANK,
1420 client->addr + W83781D_ADDR_REG_OFFSET);
1421 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1422 }
1423 } else {
1424 bank = (reg >> 8) & 0x0f;
1425 if (bank > 2)
1426 /* switch banks */
1427 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1428 bank);
1429 if (bank == 0 || bank > 2) {
1430 i2c_smbus_write_byte_data(client, reg & 0xff,
1431 value & 0xff);
1432 } else {
1433 /* switch to subclient */
1434 cl = data->lm75[bank - 1];
1435 /* convert from ISA to LM75 I2C addresses */
1436 switch (reg & 0xff) {
1437 case 0x52: /* CONFIG */
1438 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1439 break;
1440 case 0x53: /* HYST */
1441 i2c_smbus_write_word_data(cl, 2, swab16(value));
1442 break;
1443 case 0x55: /* OVER */
1444 i2c_smbus_write_word_data(cl, 3, swab16(value));
1445 break;
1446 }
1447 }
1448 if (bank > 2)
1449 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1450 }
9a61bf63 1451 mutex_unlock(&data->lock);
1da177e4
LT
1452 return 0;
1453}
1454
1da177e4
LT
1455static void
1456w83781d_init_client(struct i2c_client *client)
1457{
1458 struct w83781d_data *data = i2c_get_clientdata(client);
1459 int i, p;
1460 int type = data->type;
1461 u8 tmp;
1462
1463 if (init && type != as99127f) { /* this resets registers we don't have
1464 documentation for on the as99127f */
1465 /* save these registers */
1466 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1467 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1468 /* Reset all except Watchdog values and last conversion values
1469 This sets fan-divs to 2, among others */
1470 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1471 /* Restore the registers and disable power-on abnormal beep.
1472 This saves FAN 1/2/3 input/output values set by BIOS. */
1473 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1474 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1475 /* Disable master beep-enable (reset turns it on).
1476 Individual beep_mask should be reset to off but for some reason
1477 disabling this bit helps some people not get beeped */
1478 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1479 }
1480
303760b4 1481 data->vrm = vid_which_vrm();
1da177e4
LT
1482
1483 if ((type != w83781d) && (type != as99127f)) {
1484 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1485 for (i = 1; i <= 3; i++) {
1486 if (!(tmp & BIT_SCFG1[i - 1])) {
1487 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1488 } else {
1489 if (w83781d_read_value
1490 (client,
1491 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1492 data->sens[i - 1] = 1;
1493 else
1494 data->sens[i - 1] = 2;
1495 }
7c7a5304 1496 if (type == w83783s && i == 2)
1da177e4
LT
1497 break;
1498 }
1499 }
1500
1501 if (init && type != as99127f) {
1502 /* Enable temp2 */
1503 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1504 if (tmp & 0x01) {
1505 dev_warn(&client->dev, "Enabling temp2, readings "
1506 "might not make sense\n");
1507 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1508 tmp & 0xfe);
1509 }
1510
1511 /* Enable temp3 */
7c7a5304 1512 if (type != w83783s) {
1da177e4
LT
1513 tmp = w83781d_read_value(client,
1514 W83781D_REG_TEMP3_CONFIG);
1515 if (tmp & 0x01) {
1516 dev_warn(&client->dev, "Enabling temp3, "
1517 "readings might not make sense\n");
1518 w83781d_write_value(client,
1519 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1520 }
1521 }
1da177e4
LT
1522 }
1523
1524 /* Start monitoring */
1525 w83781d_write_value(client, W83781D_REG_CONFIG,
1526 (w83781d_read_value(client,
1527 W83781D_REG_CONFIG) & 0xf7)
1528 | 0x01);
1529}
1530
1531static struct w83781d_data *w83781d_update_device(struct device *dev)
1532{
1533 struct i2c_client *client = to_i2c_client(dev);
1534 struct w83781d_data *data = i2c_get_clientdata(client);
1535 int i;
1536
9a61bf63 1537 mutex_lock(&data->update_lock);
1da177e4
LT
1538
1539 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1540 || !data->valid) {
1541 dev_dbg(dev, "Starting device update\n");
1542
1543 for (i = 0; i <= 8; i++) {
7c7a5304 1544 if (data->type == w83783s && i == 1)
1da177e4
LT
1545 continue; /* 783S has no in1 */
1546 data->in[i] =
1547 w83781d_read_value(client, W83781D_REG_IN(i));
1548 data->in_min[i] =
1549 w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1550 data->in_max[i] =
1551 w83781d_read_value(client, W83781D_REG_IN_MAX(i));
7c7a5304 1552 if ((data->type != w83782d)
1da177e4
LT
1553 && (data->type != w83627hf) && (i == 6))
1554 break;
1555 }
1556 for (i = 1; i <= 3; i++) {
1557 data->fan[i - 1] =
1558 w83781d_read_value(client, W83781D_REG_FAN(i));
1559 data->fan_min[i - 1] =
1560 w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1561 }
1562 if (data->type != w83781d && data->type != as99127f) {
1563 for (i = 1; i <= 4; i++) {
1564 data->pwm[i - 1] =
1565 w83781d_read_value(client,
1566 W83781D_REG_PWM(i));
1567 if ((data->type != w83782d
1568 || i2c_is_isa_client(client))
1569 && i == 2)
1570 break;
1571 }
1572 /* Only PWM2 can be disabled */
1573 data->pwmenable[1] = (w83781d_read_value(client,
1574 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1575 }
1576
1577 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1578 data->temp_max =
1579 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1580 data->temp_max_hyst =
1581 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1582 data->temp_add[0] =
1583 w83781d_read_value(client, W83781D_REG_TEMP(2));
1584 data->temp_max_add[0] =
1585 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1586 data->temp_max_hyst_add[0] =
1587 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
7c7a5304 1588 if (data->type != w83783s) {
1da177e4
LT
1589 data->temp_add[1] =
1590 w83781d_read_value(client, W83781D_REG_TEMP(3));
1591 data->temp_max_add[1] =
1592 w83781d_read_value(client,
1593 W83781D_REG_TEMP_OVER(3));
1594 data->temp_max_hyst_add[1] =
1595 w83781d_read_value(client,
1596 W83781D_REG_TEMP_HYST(3));
1597 }
1598 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
7c7a5304
JD
1599 data->vid = i & 0x0f;
1600 data->vid |= (w83781d_read_value(client,
1601 W83781D_REG_CHIPID) & 0x01) << 4;
1da177e4
LT
1602 data->fan_div[0] = (i >> 4) & 0x03;
1603 data->fan_div[1] = (i >> 6) & 0x03;
7c7a5304
JD
1604 data->fan_div[2] = (w83781d_read_value(client,
1605 W83781D_REG_PIN) >> 6) & 0x03;
1da177e4
LT
1606 if ((data->type != w83781d) && (data->type != as99127f)) {
1607 i = w83781d_read_value(client, W83781D_REG_VBAT);
1608 data->fan_div[0] |= (i >> 3) & 0x04;
1609 data->fan_div[1] |= (i >> 4) & 0x04;
7c7a5304 1610 data->fan_div[2] |= (i >> 5) & 0x04;
1da177e4 1611 }
1da177e4 1612 if ((data->type == w83782d) || (data->type == w83627hf)) {
c7f5d7ed
JD
1613 data->alarms = w83781d_read_value(client,
1614 W83782D_REG_ALARM1)
1615 | (w83781d_read_value(client,
1616 W83782D_REG_ALARM2) << 8)
1617 | (w83781d_read_value(client,
1618 W83782D_REG_ALARM3) << 16);
1619 } else if (data->type == w83783s) {
1620 data->alarms = w83781d_read_value(client,
1621 W83782D_REG_ALARM1)
1622 | (w83781d_read_value(client,
1623 W83782D_REG_ALARM2) << 8);
1624 } else {
1625 /* No real-time status registers, fall back to
1626 interrupt status registers */
1627 data->alarms = w83781d_read_value(client,
1628 W83781D_REG_ALARM1)
1629 | (w83781d_read_value(client,
1630 W83781D_REG_ALARM2) << 8);
1da177e4
LT
1631 }
1632 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1633 data->beep_enable = i >> 7;
1634 data->beep_mask = ((i & 0x7f) << 8) +
1635 w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1636 if ((data->type != w83781d) && (data->type != as99127f)) {
1637 data->beep_mask |=
1638 w83781d_read_value(client,
1639 W83781D_REG_BEEP_INTS3) << 16;
1640 }
1641 data->last_updated = jiffies;
1642 data->valid = 1;
1643 }
1644
9a61bf63 1645 mutex_unlock(&data->update_lock);
1da177e4
LT
1646
1647 return data;
1648}
1649
1650static int __init
1651sensors_w83781d_init(void)
1652{
fde09509
JD
1653 int res;
1654
1655 res = i2c_add_driver(&w83781d_driver);
1656 if (res)
1657 return res;
1658
1659 res = i2c_isa_add_driver(&w83781d_isa_driver);
1660 if (res) {
1661 i2c_del_driver(&w83781d_driver);
1662 return res;
1663 }
1664
1665 return 0;
1da177e4
LT
1666}
1667
1668static void __exit
1669sensors_w83781d_exit(void)
1670{
fde09509 1671 i2c_isa_del_driver(&w83781d_isa_driver);
1da177e4
LT
1672 i2c_del_driver(&w83781d_driver);
1673}
1674
1675MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1676 "Philip Edelbrock <phil@netroedge.com>, "
1677 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1678MODULE_DESCRIPTION("W83781D driver");
1679MODULE_LICENSE("GPL");
1680
1681module_init(sensors_w83781d_init);
1682module_exit(sensors_w83781d_exit);
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