projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
hwmon/w83781d: Clean up conversion macros
[deliverable/linux.git] / drivers / hwmon / w83781d.c
CommitLineData
1da177e4
LT		 1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
7666c13c
JD		 5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
1da177e4
LT		 8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 as99127f 7 3 0 3 0x31 0x12c3 yes no
29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
31 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
1da177e4
LT		 32 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
33 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
1da177e4
LT		 34
35*/
36
1da177e4
LT		 37#include <linux/module.h>
38#include <linux/init.h>
39#include <linux/slab.h>
40#include <linux/jiffies.h>
41#include <linux/i2c.h>
7666c13c
JD		 42#include <linux/platform_device.h>
43#include <linux/ioport.h>
943b0830 44#include <linux/hwmon.h>
303760b4 45#include <linux/hwmon-vid.h>
311ce2ef 46#include <linux/sysfs.h>
943b0830 47#include <linux/err.h>
9a61bf63 48#include <linux/mutex.h>
1da177e4
LT		 49#include <asm/io.h>
50#include "lm75.h"
51
7666c13c
JD		 52/* ISA device, if found */
53static struct platform_device *pdev;
54
1da177e4
LT		 55/* Addresses to scan */
56static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
57 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
58 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
2d8672c5 59static unsigned short isa_address = 0x290;
1da177e4
LT		 60
61/* Insmod parameters */
f4b50261 62I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
1da177e4
LT		 63I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
64 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
65
fabddcd4
JD		 66static int reset;
67module_param(reset, bool, 0);
68MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
69
1da177e4
LT		 70static int init = 1;
71module_param(init, bool, 0);
72MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
73
74/* Constants specified below */
75
76/* Length of ISA address segment */
77#define W83781D_EXTENT 8
78
79/* Where are the ISA address/data registers relative to the base address */
80#define W83781D_ADDR_REG_OFFSET 5
81#define W83781D_DATA_REG_OFFSET 6
82
83/* The W83781D registers */
84/* The W83782D registers for nr=7,8 are in bank 5 */
85#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
86 (0x554 + (((nr) - 7) * 2)))
87#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
88 (0x555 + (((nr) - 7) * 2)))
89#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
90 (0x550 + (nr) - 7))
91
92#define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
93#define W83781D_REG_FAN(nr) (0x27 + (nr))
94
95#define W83781D_REG_BANK 0x4E
96#define W83781D_REG_TEMP2_CONFIG 0x152
97#define W83781D_REG_TEMP3_CONFIG 0x252
98#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
99 ((nr == 2) ? (0x0150) : \
100 (0x27)))
101#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
102 ((nr == 2) ? (0x153) : \
103 (0x3A)))
104#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
105 ((nr == 2) ? (0x155) : \
106 (0x39)))
107
108#define W83781D_REG_CONFIG 0x40
c7f5d7ed
JD		 109
110/* Interrupt status (W83781D, AS99127F) */
1da177e4
LT		 111#define W83781D_REG_ALARM1 0x41
112#define W83781D_REG_ALARM2 0x42
1da177e4 113
c7f5d7ed
JD		 114/* Real-time status (W83782D, W83783S, W83627HF) */
115#define W83782D_REG_ALARM1 0x459
116#define W83782D_REG_ALARM2 0x45A
117#define W83782D_REG_ALARM3 0x45B
118
1da177e4
LT		 119#define W83781D_REG_BEEP_CONFIG 0x4D
120#define W83781D_REG_BEEP_INTS1 0x56
121#define W83781D_REG_BEEP_INTS2 0x57
122#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
123
124#define W83781D_REG_VID_FANDIV 0x47
125
126#define W83781D_REG_CHIPID 0x49
127#define W83781D_REG_WCHIPID 0x58
128#define W83781D_REG_CHIPMAN 0x4F
129#define W83781D_REG_PIN 0x4B
130
131/* 782D/783S only */
132#define W83781D_REG_VBAT 0x5D
133
134/* PWM 782D (1-4) and 783S (1-2) only */
135#define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
136 /* on which is which; */
137#define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
138 /* However 782d is probably wrong. */
139#define W83781D_REG_PWM3 0x5E
140#define W83781D_REG_PWM4 0x5F
141#define W83781D_REG_PWMCLK12 0x5C
142#define W83781D_REG_PWMCLK34 0x45C
143static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
144 W83781D_REG_PWM3, W83781D_REG_PWM4
145};
146
147#define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
148
149#define W83781D_REG_I2C_ADDR 0x48
150#define W83781D_REG_I2C_SUBADDR 0x4A
151
152/* The following are undocumented in the data sheets however we
153 received the information in an email from Winbond tech support */
154/* Sensor selection - not on 781d */
155#define W83781D_REG_SCFG1 0x5D
156static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
157
158#define W83781D_REG_SCFG2 0x59
159static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
160
161#define W83781D_DEFAULT_BETA 3435
162
163/* RT Table registers */
164#define W83781D_REG_RT_IDX 0x50
165#define W83781D_REG_RT_VAL 0x51
166
474d00a8
JD		 167/* Conversions */
168#define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
169#define IN_FROM_REG(val) ((val) * 16)
1da177e4
LT		 170
171static inline u8
172FAN_TO_REG(long rpm, int div)
173{
174 if (rpm == 0)
175 return 255;
176 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
177 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
178}
179
474d00a8
JD		 180static inline long
181FAN_FROM_REG(u8 val, int div)
182{
183 if (val == 0)
184 return -1;
185 if (val == 255)
186 return 0;
187 return 1350000 / (val * div);
188}
1da177e4 189
474d00a8
JD		 190#define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
191#define TEMP_FROM_REG(val) ((val) * 1000)
1da177e4 192
1da177e4
LT		 193#define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
194 (val) ^ 0x7fff : (val))
195#define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
196 (~(val)) & 0x7fff : (val) & 0xffffff)
197
1da177e4
LT		 198#define DIV_FROM_REG(val) (1 << (val))
199
200static inline u8
201DIV_TO_REG(long val, enum chips type)
202{
203 int i;
204 val = SENSORS_LIMIT(val, 1,
205 ((type == w83781d
206 || type == as99127f) ? 8 : 128)) >> 1;
abc01922 207 for (i = 0; i < 7; i++) {
1da177e4
LT		 208 if (val == 0)
209 break;
210 val >>= 1;
211 }
474d00a8 212 return i;
1da177e4
LT		 213}
214
215/* There are some complications in a module like this. First off, W83781D chips
216 may be both present on the SMBus and the ISA bus, and we have to handle
217 those cases separately at some places. Second, there might be several
218 W83781D chips available (well, actually, that is probably never done; but
219 it is a clean illustration of how to handle a case like that). Finally,
220 a specific chip may be attached to *both* ISA and SMBus, and we would
221 not like to detect it double. Fortunately, in the case of the W83781D at
222 least, a register tells us what SMBus address we are on, so that helps
223 a bit - except if there could be more than one SMBus. Groan. No solution
224 for this yet. */
225
7666c13c
JD		 226/* For ISA chips, we abuse the i2c_client addr and name fields. We also use
227 the driver field to differentiate between I2C and ISA chips. */
1da177e4
LT		 228struct w83781d_data {
229 struct i2c_client client;
943b0830 230 struct class_device *class_dev;
9a61bf63 231 struct mutex lock;
1da177e4
LT		 232 enum chips type;
233
9a61bf63 234 struct mutex update_lock;
1da177e4
LT		 235 char valid; /* !=0 if following fields are valid */
236 unsigned long last_updated; /* In jiffies */
237
238 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
239 /* array of 2 pointers to subclients */
240
241 u8 in[9]; /* Register value - 8 & 9 for 782D only */
242 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
243 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
244 u8 fan[3]; /* Register value */
245 u8 fan_min[3]; /* Register value */
474d00a8
JD		 246 s8 temp; /* Register value */
247 s8 temp_max; /* Register value */
248 s8 temp_max_hyst; /* Register value */
1da177e4
LT		 249 u16 temp_add[2]; /* Register value */
250 u16 temp_max_add[2]; /* Register value */
251 u16 temp_max_hyst_add[2]; /* Register value */
252 u8 fan_div[3]; /* Register encoding, shifted right */
253 u8 vid; /* Register encoding, combined */
254 u32 alarms; /* Register encoding, combined */
255 u32 beep_mask; /* Register encoding, combined */
256 u8 beep_enable; /* Boolean */
257 u8 pwm[4]; /* Register value */
258 u8 pwmenable[4]; /* Boolean */
259 u16 sens[3]; /* 782D/783S only.
260 1 = pentium diode; 2 = 3904 diode;
261 3000-5000 = thermistor beta.
262 Default = 3435.
263 Other Betas unimplemented */
264 u8 vrm;
265};
266
267static int w83781d_attach_adapter(struct i2c_adapter *adapter);
268static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
269static int w83781d_detach_client(struct i2c_client *client);
270
7666c13c
JD		 271static int __devinit w83781d_isa_probe(struct platform_device *pdev);
272static int __devexit w83781d_isa_remove(struct platform_device *pdev);
273
f6c27fc1
DJ		 274static int w83781d_read_value(struct i2c_client *client, u16 reg);
275static int w83781d_write_value(struct i2c_client *client, u16 reg, u16 value);
1da177e4 276static struct w83781d_data *w83781d_update_device(struct device *dev);
7666c13c 277static void w83781d_init_device(struct device *dev);
1da177e4
LT		 278
279static struct i2c_driver w83781d_driver = {
cdaf7934 280 .driver = {
cdaf7934
LR		 281 .name = "w83781d",
282 },
1da177e4 283 .id = I2C_DRIVERID_W83781D,
1da177e4
LT		 284 .attach_adapter = w83781d_attach_adapter,
285 .detach_client = w83781d_detach_client,
286};
287
7666c13c 288static struct platform_driver w83781d_isa_driver = {
cdaf7934 289 .driver = {
87218842 290 .owner = THIS_MODULE,
7666c13c 291 .name = "w83781d",
cdaf7934 292 },
7666c13c
JD		 293 .probe = w83781d_isa_probe,
294 .remove = w83781d_isa_remove,
fde09509
JD		 295};
296
297
1da177e4
LT		 298/* following are the sysfs callback functions */
299#define show_in_reg(reg) \
300static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
301{ \
302 struct w83781d_data *data = w83781d_update_device(dev); \
474d00a8 303 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
1da177e4
LT		 304}
305show_in_reg(in);
306show_in_reg(in_min);
307show_in_reg(in_max);
308
309#define store_in_reg(REG, reg) \
310static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
311{ \
7666c13c
JD		 312 struct w83781d_data *data = dev_get_drvdata(dev); \
313 struct i2c_client *client = &data->client; \
1da177e4
LT		 314 u32 val; \
315 \
474d00a8 316 val = simple_strtoul(buf, NULL, 10); \
1da177e4 317 \
9a61bf63 318 mutex_lock(&data->update_lock); \
1da177e4
LT		 319 data->in_##reg[nr] = IN_TO_REG(val); \
320 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
321 \
9a61bf63 322 mutex_unlock(&data->update_lock); \
1da177e4
LT		 323 return count; \
324}
325store_in_reg(MIN, min);
326store_in_reg(MAX, max);
327
328#define sysfs_in_offset(offset) \
329static ssize_t \
e404e274 330show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 331{ \
332 return show_in(dev, buf, offset); \
333} \
334static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
335
336#define sysfs_in_reg_offset(reg, offset) \
e404e274 337static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 338{ \
339 return show_in_##reg (dev, buf, offset); \
340} \
e404e274 341static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT		 342{ \
343 return store_in_##reg (dev, buf, count, offset); \
344} \
345static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
346
347#define sysfs_in_offsets(offset) \
348sysfs_in_offset(offset); \
349sysfs_in_reg_offset(min, offset); \
350sysfs_in_reg_offset(max, offset);
351
352sysfs_in_offsets(0);
353sysfs_in_offsets(1);
354sysfs_in_offsets(2);
355sysfs_in_offsets(3);
356sysfs_in_offsets(4);
357sysfs_in_offsets(5);
358sysfs_in_offsets(6);
359sysfs_in_offsets(7);
360sysfs_in_offsets(8);
361
1da177e4
LT		 362#define show_fan_reg(reg) \
363static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
364{ \
365 struct w83781d_data *data = w83781d_update_device(dev); \
366 return sprintf(buf,"%ld\n", \
367 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
368}
369show_fan_reg(fan);
370show_fan_reg(fan_min);
371
372static ssize_t
373store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
374{
7666c13c
JD		 375 struct w83781d_data *data = dev_get_drvdata(dev);
376 struct i2c_client *client = &data->client;
1da177e4
LT		 377 u32 val;
378
379 val = simple_strtoul(buf, NULL, 10);
380
9a61bf63 381 mutex_lock(&data->update_lock);
1da177e4
LT		 382 data->fan_min[nr - 1] =
383 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
384 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
385 data->fan_min[nr - 1]);
386
9a61bf63 387 mutex_unlock(&data->update_lock);
1da177e4
LT		 388 return count;
389}
390
391#define sysfs_fan_offset(offset) \
e404e274 392static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 393{ \
394 return show_fan(dev, buf, offset); \
395} \
396static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
397
398#define sysfs_fan_min_offset(offset) \
e404e274 399static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 400{ \
401 return show_fan_min(dev, buf, offset); \
402} \
e404e274 403static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT		 404{ \
405 return store_fan_min(dev, buf, count, offset); \
406} \
407static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
408
409sysfs_fan_offset(1);
410sysfs_fan_min_offset(1);
411sysfs_fan_offset(2);
412sysfs_fan_min_offset(2);
413sysfs_fan_offset(3);
414sysfs_fan_min_offset(3);
415
1da177e4
LT		 416#define show_temp_reg(reg) \
417static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
418{ \
419 struct w83781d_data *data = w83781d_update_device(dev); \
420 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
421 return sprintf(buf,"%d\n", \
422 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
423 } else { /* TEMP1 */ \
424 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
425 } \
426}
427show_temp_reg(temp);
428show_temp_reg(temp_max);
429show_temp_reg(temp_max_hyst);
430
431#define store_temp_reg(REG, reg) \
432static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
433{ \
7666c13c
JD		 434 struct w83781d_data *data = dev_get_drvdata(dev); \
435 struct i2c_client *client = &data->client; \
1da177e4
LT		 436 s32 val; \
437 \
438 val = simple_strtol(buf, NULL, 10); \
439 \
9a61bf63 440 mutex_lock(&data->update_lock); \
1da177e4
LT		 441 \
442 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
443 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
444 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
445 data->temp_##reg##_add[nr-2]); \
446 } else { /* TEMP1 */ \
447 data->temp_##reg = TEMP_TO_REG(val); \
448 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
449 data->temp_##reg); \
450 } \
451 \
9a61bf63 452 mutex_unlock(&data->update_lock); \
1da177e4
LT		 453 return count; \
454}
455store_temp_reg(OVER, max);
456store_temp_reg(HYST, max_hyst);
457
458#define sysfs_temp_offset(offset) \
459static ssize_t \
e404e274 460show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 461{ \
462 return show_temp(dev, buf, offset); \
463} \
464static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
465
466#define sysfs_temp_reg_offset(reg, offset) \
e404e274 467static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 468{ \
469 return show_temp_##reg (dev, buf, offset); \
470} \
e404e274 471static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT		 472{ \
473 return store_temp_##reg (dev, buf, count, offset); \
474} \
475static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
476
477#define sysfs_temp_offsets(offset) \
478sysfs_temp_offset(offset); \
479sysfs_temp_reg_offset(max, offset); \
480sysfs_temp_reg_offset(max_hyst, offset);
481
482sysfs_temp_offsets(1);
483sysfs_temp_offsets(2);
484sysfs_temp_offsets(3);
485
1da177e4 486static ssize_t
e404e274 487show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 488{
489 struct w83781d_data *data = w83781d_update_device(dev);
490 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
491}
492
311ce2ef
JC		 493static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
494
1da177e4 495static ssize_t
e404e274 496show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 497{
498 struct w83781d_data *data = w83781d_update_device(dev);
499 return sprintf(buf, "%ld\n", (long) data->vrm);
500}
501
502static ssize_t
e404e274 503store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 504{
7666c13c 505 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT		 506 u32 val;
507
508 val = simple_strtoul(buf, NULL, 10);
509 data->vrm = val;
510
511 return count;
512}
513
311ce2ef
JC		 514static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
515
1da177e4 516static ssize_t
e404e274 517show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 518{
519 struct w83781d_data *data = w83781d_update_device(dev);
68188ba7 520 return sprintf(buf, "%u\n", data->alarms);
1da177e4
LT		 521}
522
311ce2ef
JC		 523static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
524
e404e274 525static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 526{
527 struct w83781d_data *data = w83781d_update_device(dev);
528 return sprintf(buf, "%ld\n",
529 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
530}
e404e274 531static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 532{
533 struct w83781d_data *data = w83781d_update_device(dev);
474d00a8 534 return sprintf(buf, "%ld\n", (long)data->beep_enable);
1da177e4
LT		 535}
536
537#define BEEP_ENABLE 0 /* Store beep_enable */
538#define BEEP_MASK 1 /* Store beep_mask */
539
540static ssize_t
541store_beep_reg(struct device *dev, const char *buf, size_t count,
542 int update_mask)
543{
7666c13c
JD		 544 struct w83781d_data *data = dev_get_drvdata(dev);
545 struct i2c_client *client = &data->client;
1da177e4
LT		 546 u32 val, val2;
547
548 val = simple_strtoul(buf, NULL, 10);
549
9a61bf63 550 mutex_lock(&data->update_lock);
1da177e4
LT		 551
552 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
553 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
554 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
555 data->beep_mask & 0xff);
556
557 if ((data->type != w83781d) && (data->type != as99127f)) {
558 w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
559 ((data->beep_mask) >> 16) & 0xff);
560 }
561
562 val2 = (data->beep_mask >> 8) & 0x7f;
563 } else { /* We are storing beep_enable */
564 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
474d00a8 565 data->beep_enable = !!val;
1da177e4
LT		 566 }
567
568 w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
569 val2 | data->beep_enable << 7);
570
9a61bf63 571 mutex_unlock(&data->update_lock);
1da177e4
LT		 572 return count;
573}
574
575#define sysfs_beep(REG, reg) \
e404e274 576static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4 577{ \
e404e274 578 return show_beep_##reg(dev, attr, buf); \
1da177e4 579} \
e404e274 580static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT		 581{ \
582 return store_beep_reg(dev, buf, count, BEEP_##REG); \
583} \
584static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
585
586sysfs_beep(ENABLE, enable);
587sysfs_beep(MASK, mask);
588
1da177e4
LT		 589static ssize_t
590show_fan_div_reg(struct device *dev, char *buf, int nr)
591{
592 struct w83781d_data *data = w83781d_update_device(dev);
593 return sprintf(buf, "%ld\n",
594 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
595}
596
597/* Note: we save and restore the fan minimum here, because its value is
598 determined in part by the fan divisor. This follows the principle of
d6e05edc 599 least surprise; the user doesn't expect the fan minimum to change just
1da177e4
LT		 600 because the divisor changed. */
601static ssize_t
602store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
603{
7666c13c
JD		 604 struct w83781d_data *data = dev_get_drvdata(dev);
605 struct i2c_client *client = &data->client;
1da177e4
LT		 606 unsigned long min;
607 u8 reg;
608 unsigned long val = simple_strtoul(buf, NULL, 10);
609
9a61bf63 610 mutex_lock(&data->update_lock);
1da177e4
LT		 611
612 /* Save fan_min */
613 min = FAN_FROM_REG(data->fan_min[nr],
614 DIV_FROM_REG(data->fan_div[nr]));
615
616 data->fan_div[nr] = DIV_TO_REG(val, data->type);
617
618 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
619 & (nr==0 ? 0xcf : 0x3f))
620 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
621 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
622
623 /* w83781d and as99127f don't have extended divisor bits */
624 if (data->type != w83781d && data->type != as99127f) {
625 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
626 & ~(1 << (5 + nr)))
627 | ((data->fan_div[nr] & 0x04) << (3 + nr));
628 w83781d_write_value(client, W83781D_REG_VBAT, reg);
629 }
630
631 /* Restore fan_min */
632 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
633 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
634
9a61bf63 635 mutex_unlock(&data->update_lock);
1da177e4
LT		 636 return count;
637}
638
639#define sysfs_fan_div(offset) \
e404e274 640static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 641{ \
642 return show_fan_div_reg(dev, buf, offset); \
643} \
e404e274 644static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT		 645{ \
646 return store_fan_div_reg(dev, buf, count, offset - 1); \
647} \
648static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
649
650sysfs_fan_div(1);
651sysfs_fan_div(2);
652sysfs_fan_div(3);
653
1da177e4
LT		 654static ssize_t
655show_pwm_reg(struct device *dev, char *buf, int nr)
656{
657 struct w83781d_data *data = w83781d_update_device(dev);
474d00a8 658 return sprintf(buf, "%ld\n", (long)data->pwm[nr - 1]);
1da177e4
LT		 659}
660
661static ssize_t
662show_pwmenable_reg(struct device *dev, char *buf, int nr)
663{
664 struct w83781d_data *data = w83781d_update_device(dev);
665 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
666}
667
668static ssize_t
669store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
670{
7666c13c
JD		 671 struct w83781d_data *data = dev_get_drvdata(dev);
672 struct i2c_client *client = &data->client;
1da177e4
LT		 673 u32 val;
674
675 val = simple_strtoul(buf, NULL, 10);
676
9a61bf63 677 mutex_lock(&data->update_lock);
474d00a8 678 data->pwm[nr - 1] = SENSORS_LIMIT(val, 0, 255);
1da177e4 679 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
9a61bf63 680 mutex_unlock(&data->update_lock);
1da177e4
LT		 681 return count;
682}
683
684static ssize_t
685store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
686{
7666c13c
JD		 687 struct w83781d_data *data = dev_get_drvdata(dev);
688 struct i2c_client *client = &data->client;
1da177e4
LT		 689 u32 val, reg;
690
691 val = simple_strtoul(buf, NULL, 10);
692
9a61bf63 693 mutex_lock(&data->update_lock);
1da177e4
LT		 694
695 switch (val) {
696 case 0:
697 case 1:
698 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
699 w83781d_write_value(client, W83781D_REG_PWMCLK12,
700 (reg & 0xf7) | (val << 3));
701
702 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
703 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
704 (reg & 0xef) | (!val << 4));
705
706 data->pwmenable[nr - 1] = val;
707 break;
708
709 default:
9a61bf63 710 mutex_unlock(&data->update_lock);
1da177e4
LT		 711 return -EINVAL;
712 }
713
9a61bf63 714 mutex_unlock(&data->update_lock);
1da177e4
LT		 715 return count;
716}
717
718#define sysfs_pwm(offset) \
e404e274 719static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 720{ \
721 return show_pwm_reg(dev, buf, offset); \
722} \
e404e274 723static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT		 724 const char *buf, size_t count) \
725{ \
726 return store_pwm_reg(dev, buf, count, offset); \
727} \
728static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
729 show_regs_pwm_##offset, store_regs_pwm_##offset);
730
731#define sysfs_pwmenable(offset) \
e404e274 732static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 733{ \
734 return show_pwmenable_reg(dev, buf, offset); \
735} \
e404e274 736static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT		 737 const char *buf, size_t count) \
738{ \
739 return store_pwmenable_reg(dev, buf, count, offset); \
740} \
741static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
742 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
743
744sysfs_pwm(1);
745sysfs_pwm(2);
746sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
747sysfs_pwm(3);
748sysfs_pwm(4);
749
1da177e4
LT		 750static ssize_t
751show_sensor_reg(struct device *dev, char *buf, int nr)
752{
753 struct w83781d_data *data = w83781d_update_device(dev);
754 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
755}
756
757static ssize_t
758store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
759{
7666c13c
JD		 760 struct w83781d_data *data = dev_get_drvdata(dev);
761 struct i2c_client *client = &data->client;
1da177e4
LT		 762 u32 val, tmp;
763
764 val = simple_strtoul(buf, NULL, 10);
765
9a61bf63 766 mutex_lock(&data->update_lock);
1da177e4
LT		 767
768 switch (val) {
769 case 1: /* PII/Celeron diode */
770 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
771 w83781d_write_value(client, W83781D_REG_SCFG1,
772 tmp | BIT_SCFG1[nr - 1]);
773 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
774 w83781d_write_value(client, W83781D_REG_SCFG2,
775 tmp | BIT_SCFG2[nr - 1]);
776 data->sens[nr - 1] = val;
777 break;
778 case 2: /* 3904 */
779 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
780 w83781d_write_value(client, W83781D_REG_SCFG1,
781 tmp | BIT_SCFG1[nr - 1]);
782 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
783 w83781d_write_value(client, W83781D_REG_SCFG2,
784 tmp & ~BIT_SCFG2[nr - 1]);
785 data->sens[nr - 1] = val;
786 break;
787 case W83781D_DEFAULT_BETA: /* thermistor */
788 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
789 w83781d_write_value(client, W83781D_REG_SCFG1,
790 tmp & ~BIT_SCFG1[nr - 1]);
791 data->sens[nr - 1] = val;
792 break;
793 default:
794 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
795 (long) val, W83781D_DEFAULT_BETA);
796 break;
797 }
798
9a61bf63 799 mutex_unlock(&data->update_lock);
1da177e4
LT		 800 return count;
801}
802
803#define sysfs_sensor(offset) \
e404e274 804static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 805{ \
806 return show_sensor_reg(dev, buf, offset); \
807} \
e404e274 808static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT		 809{ \
810 return store_sensor_reg(dev, buf, count, offset); \
811} \
812static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
813
814sysfs_sensor(1);
815sysfs_sensor(2);
816sysfs_sensor(3);
817
7666c13c
JD		 818/* I2C devices get this name attribute automatically, but for ISA devices
819 we must create it by ourselves. */
820static ssize_t
821show_name(struct device *dev, struct device_attribute *devattr, char *buf)
822{
823 struct w83781d_data *data = dev_get_drvdata(dev);
824 return sprintf(buf, "%s\n", data->client.name);
825}
826static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
827
1da177e4
LT		 828/* This function is called when:
829 * w83781d_driver is inserted (when this module is loaded), for each
830 available adapter
831 * when a new adapter is inserted (and w83781d_driver is still present) */
832static int
833w83781d_attach_adapter(struct i2c_adapter *adapter)
834{
835 if (!(adapter->class & I2C_CLASS_HWMON))
836 return 0;
2ed2dc3c 837 return i2c_probe(adapter, &addr_data, w83781d_detect);
1da177e4
LT		 838}
839
840/* Assumes that adapter is of I2C, not ISA variety.
841 * OTHERWISE DON'T CALL THIS
842 */
843static int
844w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
845 struct i2c_client *new_client)
846{
847 int i, val1 = 0, id;
848 int err;
849 const char *client_name = "";
850 struct w83781d_data *data = i2c_get_clientdata(new_client);
851
ba9c2e8d 852 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT		 853 if (!(data->lm75[0])) {
854 err = -ENOMEM;
855 goto ERROR_SC_0;
856 }
1da177e4
LT		 857
858 id = i2c_adapter_id(adapter);
859
860 if (force_subclients[0] == id && force_subclients[1] == address) {
861 for (i = 2; i <= 3; i++) {
862 if (force_subclients[i] < 0x48 ||
863 force_subclients[i] > 0x4f) {
864 dev_err(&new_client->dev, "Invalid subclient "
865 "address %d; must be 0x48-0x4f\n",
866 force_subclients[i]);
867 err = -EINVAL;
868 goto ERROR_SC_1;
869 }
870 }
871 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
872 (force_subclients[2] & 0x07) |
873 ((force_subclients[3] & 0x07) << 4));
874 data->lm75[0]->addr = force_subclients[2];
875 } else {
876 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
877 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
878 }
879
880 if (kind != w83783s) {
ba9c2e8d 881 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT		 882 if (!(data->lm75[1])) {
883 err = -ENOMEM;
884 goto ERROR_SC_1;
885 }
1da177e4
LT		 886
887 if (force_subclients[0] == id &&
888 force_subclients[1] == address) {
889 data->lm75[1]->addr = force_subclients[3];
890 } else {
891 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
892 }
893 if (data->lm75[0]->addr == data->lm75[1]->addr) {
894 dev_err(&new_client->dev,
895 "Duplicate addresses 0x%x for subclients.\n",
896 data->lm75[0]->addr);
897 err = -EBUSY;
898 goto ERROR_SC_2;
899 }
900 }
901
902 if (kind == w83781d)
903 client_name = "w83781d subclient";
904 else if (kind == w83782d)
905 client_name = "w83782d subclient";
906 else if (kind == w83783s)
907 client_name = "w83783s subclient";
908 else if (kind == w83627hf)
909 client_name = "w83627hf subclient";
910 else if (kind == as99127f)
911 client_name = "as99127f subclient";
912
913 for (i = 0; i <= 1; i++) {
914 /* store all data in w83781d */
915 i2c_set_clientdata(data->lm75[i], NULL);
916 data->lm75[i]->adapter = adapter;
917 data->lm75[i]->driver = &w83781d_driver;
918 data->lm75[i]->flags = 0;
919 strlcpy(data->lm75[i]->name, client_name,
920 I2C_NAME_SIZE);
921 if ((err = i2c_attach_client(data->lm75[i]))) {
922 dev_err(&new_client->dev, "Subclient %d "
923 "registration at address 0x%x "
924 "failed.\n", i, data->lm75[i]->addr);
925 if (i == 1)
926 goto ERROR_SC_3;
927 goto ERROR_SC_2;
928 }
929 if (kind == w83783s)
930 break;
931 }
932
933 return 0;
934
935/* Undo inits in case of errors */
936ERROR_SC_3:
937 i2c_detach_client(data->lm75[0]);
938ERROR_SC_2:
6044ec88 939 kfree(data->lm75[1]);
1da177e4 940ERROR_SC_1:
6044ec88 941 kfree(data->lm75[0]);
1da177e4
LT		 942ERROR_SC_0:
943 return err;
944}
945
311ce2ef
JC		 946#define IN_UNIT_ATTRS(X) \
947 &dev_attr_in##X##_input.attr, \
948 &dev_attr_in##X##_min.attr, \
949 &dev_attr_in##X##_max.attr
950
951#define FAN_UNIT_ATTRS(X) \
952 &dev_attr_fan##X##_input.attr, \
953 &dev_attr_fan##X##_min.attr, \
954 &dev_attr_fan##X##_div.attr
955
956#define TEMP_UNIT_ATTRS(X) \
957 &dev_attr_temp##X##_input.attr, \
958 &dev_attr_temp##X##_max.attr, \
959 &dev_attr_temp##X##_max_hyst.attr
960
961static struct attribute* w83781d_attributes[] = {
962 IN_UNIT_ATTRS(0),
963 IN_UNIT_ATTRS(2),
964 IN_UNIT_ATTRS(3),
965 IN_UNIT_ATTRS(4),
966 IN_UNIT_ATTRS(5),
967 IN_UNIT_ATTRS(6),
968 FAN_UNIT_ATTRS(1),
969 FAN_UNIT_ATTRS(2),
970 FAN_UNIT_ATTRS(3),
971 TEMP_UNIT_ATTRS(1),
972 TEMP_UNIT_ATTRS(2),
973 &dev_attr_cpu0_vid.attr,
974 &dev_attr_vrm.attr,
975 &dev_attr_alarms.attr,
976 &dev_attr_beep_mask.attr,
977 &dev_attr_beep_enable.attr,
978 NULL
979};
980static const struct attribute_group w83781d_group = {
981 .attrs = w83781d_attributes,
982};
983
984static struct attribute *w83781d_attributes_opt[] = {
985 IN_UNIT_ATTRS(1),
986 IN_UNIT_ATTRS(7),
987 IN_UNIT_ATTRS(8),
988 TEMP_UNIT_ATTRS(3),
989 &dev_attr_pwm1.attr,
990 &dev_attr_pwm2.attr,
991 &dev_attr_pwm2_enable.attr,
992 &dev_attr_pwm3.attr,
993 &dev_attr_pwm4.attr,
994 &dev_attr_temp1_type.attr,
995 &dev_attr_temp2_type.attr,
996 &dev_attr_temp3_type.attr,
997 NULL
998};
999static const struct attribute_group w83781d_group_opt = {
1000 .attrs = w83781d_attributes_opt,
1001};
1002
7666c13c 1003/* No clean up is done on error, it's up to the caller */
1da177e4 1004static int
7666c13c 1005w83781d_create_files(struct device *dev, int kind, int is_isa)
1da177e4 1006{
1da177e4 1007 int err;
1da177e4 1008
7666c13c
JD		 1009 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
1010 return err;
1011
1012 if (kind != w83783s) {
1013 if ((err = device_create_file(dev, &dev_attr_in1_input))
1014 || (err = device_create_file(dev, &dev_attr_in1_min))
1015 || (err = device_create_file(dev, &dev_attr_in1_max)))
1016 return err;
1017 }
1018 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1019 if ((err = device_create_file(dev, &dev_attr_in7_input))
1020 || (err = device_create_file(dev, &dev_attr_in7_min))
1021 || (err = device_create_file(dev, &dev_attr_in7_max))
1022 || (err = device_create_file(dev, &dev_attr_in8_input))
1023 || (err = device_create_file(dev, &dev_attr_in8_min))
1024 || (err = device_create_file(dev, &dev_attr_in8_max)))
1025 return err;
1026 }
1027 if (kind != w83783s) {
1028 if ((err = device_create_file(dev, &dev_attr_temp3_input))
1029 || (err = device_create_file(dev, &dev_attr_temp3_max))
1030 || (err = device_create_file(dev,
1031 &dev_attr_temp3_max_hyst)))
1032 return err;
1da177e4
LT		 1033 }
1034
7666c13c
JD		 1035 if (kind != w83781d && kind != as99127f) {
1036 if ((err = device_create_file(dev, &dev_attr_pwm1))
1037 || (err = device_create_file(dev, &dev_attr_pwm2))
1038 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1039 return err;
1da177e4 1040 }
7666c13c
JD		 1041 if (kind == w83782d && !is_isa) {
1042 if ((err = device_create_file(dev, &dev_attr_pwm3))
1043 || (err = device_create_file(dev, &dev_attr_pwm4)))
1044 return err;
1045 }
1046
1047 if (kind != as99127f && kind != w83781d) {
1048 if ((err = device_create_file(dev, &dev_attr_temp1_type))
1049 || (err = device_create_file(dev,
1050 &dev_attr_temp2_type)))
1051 return err;
1052 if (kind != w83783s) {
1053 if ((err = device_create_file(dev,
1054 &dev_attr_temp3_type)))
1055 return err;
1da177e4 1056 }
7666c13c 1057 }
1da177e4 1058
7666c13c
JD		 1059 if (is_isa) {
1060 err = device_create_file(&pdev->dev, &dev_attr_name);
1061 if (err)
1062 return err;
1063 }
1da177e4 1064
7666c13c
JD		 1065 return 0;
1066}
1da177e4 1067
7666c13c
JD		 1068static int
1069w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1070{
1071 int val1 = 0, val2;
1072 struct i2c_client *client;
1073 struct device *dev;
1074 struct w83781d_data *data;
1075 int err;
1076 const char *client_name = "";
1077 enum vendor { winbond, asus } vendid;
1078
1079 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1080 err = -EINVAL;
1081 goto ERROR1;
1da177e4
LT		 1082 }
1083
1084 /* OK. For now, we presume we have a valid client. We now create the
1085 client structure, even though we cannot fill it completely yet.
1086 But it allows us to access w83781d_{read,write}_value. */
1087
ba9c2e8d 1088 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1da177e4
LT		 1089 err = -ENOMEM;
1090 goto ERROR1;
1091 }
1da177e4 1092
311ce2ef
JC		 1093 client = &data->client;
1094 i2c_set_clientdata(client, data);
1095 client->addr = address;
9a61bf63 1096 mutex_init(&data->lock);
311ce2ef 1097 client->adapter = adapter;
7666c13c 1098 client->driver = &w83781d_driver;
311ce2ef 1099 dev = &client->dev;
1da177e4
LT		 1100
1101 /* Now, we do the remaining detection. */
1102
1103 /* The w8378?d may be stuck in some other bank than bank 0. This may
1104 make reading other information impossible. Specify a force=... or
1105 force_*=... parameter, and the Winbond will be reset to the right
1106 bank. */
1107 if (kind < 0) {
311ce2ef 1108 if (w83781d_read_value(client, W83781D_REG_CONFIG) & 0x80) {
bd452e6f
JD		 1109 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1110 "failed at step 3\n");
1da177e4
LT		 1111 err = -ENODEV;
1112 goto ERROR2;
1113 }
311ce2ef
JC		 1114 val1 = w83781d_read_value(client, W83781D_REG_BANK);
1115 val2 = w83781d_read_value(client, W83781D_REG_CHIPMAN);
1da177e4
LT		 1116 /* Check for Winbond or Asus ID if in bank 0 */
1117 if ((!(val1 & 0x07)) &&
1118 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1119 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
bd452e6f
JD		 1120 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1121 "failed at step 4\n");
1da177e4
LT		 1122 err = -ENODEV;
1123 goto ERROR2;
1124 }
1125 /* If Winbond SMBus, check address at 0x48.
1126 Asus doesn't support, except for as99127f rev.2 */
7666c13c
JD		 1127 if ((!(val1 & 0x80) && (val2 == 0xa3)) ||
1128 ((val1 & 0x80) && (val2 == 0x5c))) {
1da177e4 1129 if (w83781d_read_value
311ce2ef 1130 (client, W83781D_REG_I2C_ADDR) != address) {
bd452e6f
JD		 1131 dev_dbg(&adapter->dev, "Detection of w83781d "
1132 "chip failed at step 5\n");
1da177e4
LT		 1133 err = -ENODEV;
1134 goto ERROR2;
1135 }
1136 }
1137 }
1138
1139 /* We have either had a force parameter, or we have already detected the
1140 Winbond. Put it now into bank 0 and Vendor ID High Byte */
311ce2ef
JC		 1141 w83781d_write_value(client, W83781D_REG_BANK,
1142 (w83781d_read_value(client, W83781D_REG_BANK)
1143 & 0x78) | 0x80);
1da177e4
LT		 1144
1145 /* Determine the chip type. */
1146 if (kind <= 0) {
1147 /* get vendor ID */
311ce2ef 1148 val2 = w83781d_read_value(client, W83781D_REG_CHIPMAN);
1da177e4
LT		 1149 if (val2 == 0x5c)
1150 vendid = winbond;
1151 else if (val2 == 0x12)
1152 vendid = asus;
1153 else {
bd452e6f
JD		 1154 dev_dbg(&adapter->dev, "w83781d chip vendor is "
1155 "neither Winbond nor Asus\n");
1da177e4
LT		 1156 err = -ENODEV;
1157 goto ERROR2;
1158 }
1159
311ce2ef 1160 val1 = w83781d_read_value(client, W83781D_REG_WCHIPID);
1da177e4
LT		 1161 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1162 kind = w83781d;
1163 else if (val1 == 0x30 && vendid == winbond)
1164 kind = w83782d;
7666c13c 1165 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1da177e4 1166 kind = w83783s;
7c7a5304 1167 else if (val1 == 0x21 && vendid == winbond)
1da177e4 1168 kind = w83627hf;
7666c13c 1169 else if (val1 == 0x31 && address >= 0x28)
1da177e4 1170 kind = as99127f;
1da177e4
LT		 1171 else {
1172 if (kind == 0)
bd452e6f 1173 dev_warn(&adapter->dev, "Ignoring 'force' "
1da177e4 1174 "parameter for unknown chip at "
bd452e6f 1175 "address 0x%02x\n", address);
1da177e4
LT		 1176 err = -EINVAL;
1177 goto ERROR2;
1178 }
1179 }
1180
1181 if (kind == w83781d) {
1182 client_name = "w83781d";
1183 } else if (kind == w83782d) {
1184 client_name = "w83782d";
1185 } else if (kind == w83783s) {
1186 client_name = "w83783s";
1187 } else if (kind == w83627hf) {
7c7a5304 1188 client_name = "w83627hf";
1da177e4
LT		 1189 } else if (kind == as99127f) {
1190 client_name = "as99127f";
1da177e4
LT		 1191 }
1192
1193 /* Fill in the remaining client fields and put into the global list */
311ce2ef 1194 strlcpy(client->name, client_name, I2C_NAME_SIZE);
1da177e4
LT		 1195 data->type = kind;
1196
1da177e4 1197 /* Tell the I2C layer a new client has arrived */
311ce2ef 1198 if ((err = i2c_attach_client(client)))
1da177e4
LT		 1199 goto ERROR2;
1200
1201 /* attach secondary i2c lm75-like clients */
7666c13c
JD		 1202 if ((err = w83781d_detect_subclients(adapter, address,
1203 kind, client)))
1204 goto ERROR3;
1da177e4
LT		 1205
1206 /* Initialize the chip */
7666c13c 1207 w83781d_init_device(dev);
1da177e4
LT		 1208
1209 /* Register sysfs hooks */
7666c13c
JD		 1210 err = w83781d_create_files(dev, kind, 0);
1211 if (err)
943b0830 1212 goto ERROR4;
943b0830 1213
311ce2ef
JC		 1214 data->class_dev = hwmon_device_register(dev);
1215 if (IS_ERR(data->class_dev)) {
1216 err = PTR_ERR(data->class_dev);
1217 goto ERROR4;
1da177e4
LT		 1218 }
1219
1220 return 0;
1221
943b0830 1222ERROR4:
311ce2ef
JC		 1223 sysfs_remove_group(&dev->kobj, &w83781d_group);
1224 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1225
943b0830
MH		 1226 if (data->lm75[1]) {
1227 i2c_detach_client(data->lm75[1]);
1228 kfree(data->lm75[1]);
1229 }
1230 if (data->lm75[0]) {
1231 i2c_detach_client(data->lm75[0]);
1232 kfree(data->lm75[0]);
1233 }
1da177e4 1234ERROR3:
311ce2ef 1235 i2c_detach_client(client);
1da177e4
LT		 1236ERROR2:
1237 kfree(data);
1238ERROR1:
1da177e4
LT		 1239 return err;
1240}
1241
1242static int
1243w83781d_detach_client(struct i2c_client *client)
1244{
943b0830 1245 struct w83781d_data *data = i2c_get_clientdata(client);
1da177e4
LT		 1246 int err;
1247
943b0830 1248 /* main client */
311ce2ef 1249 if (data) {
943b0830 1250 hwmon_device_unregister(data->class_dev);
311ce2ef
JC		 1251 sysfs_remove_group(&client->dev.kobj, &w83781d_group);
1252 sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
1253 }
1da177e4 1254
7bef5594 1255 if ((err = i2c_detach_client(client)))
1da177e4 1256 return err;
1da177e4 1257
943b0830
MH		 1258 /* main client */
1259 if (data)
1260 kfree(data);
1261
1262 /* subclient */
1263 else
1da177e4 1264 kfree(client);
1da177e4
LT		 1265
1266 return 0;
1267}
1268
7666c13c
JD		 1269static int __devinit
1270w83781d_isa_probe(struct platform_device *pdev)
1271{
1272 int err, reg;
1273 struct w83781d_data *data;
1274 struct resource *res;
1275 const char *name;
1276
1277 /* Reserve the ISA region */
1278 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1279 if (!request_region(res->start, W83781D_EXTENT, "w83781d")) {
1280 err = -EBUSY;
1281 goto exit;
1282 }
1283
1284 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1285 err = -ENOMEM;
1286 goto exit_release_region;
1287 }
1288 mutex_init(&data->lock);
1289 data->client.addr = res->start;
1290 i2c_set_clientdata(&data->client, data);
1291 platform_set_drvdata(pdev, data);
1292
1293 reg = w83781d_read_value(&data->client, W83781D_REG_WCHIPID);
1294 switch (reg) {
1295 case 0x21:
1296 data->type = w83627hf;
1297 name = "w83627hf";
1298 break;
1299 case 0x30:
1300 data->type = w83782d;
1301 name = "w83782d";
1302 break;
1303 default:
1304 data->type = w83781d;
1305 name = "w83781d";
1306 }
1307 strlcpy(data->client.name, name, I2C_NAME_SIZE);
1308
1309 /* Initialize the W83781D chip */
1310 w83781d_init_device(&pdev->dev);
1311
1312 /* Register sysfs hooks */
1313 err = w83781d_create_files(&pdev->dev, data->type, 1);
1314 if (err)
1315 goto exit_remove_files;
1316
1317 data->class_dev = hwmon_device_register(&pdev->dev);
1318 if (IS_ERR(data->class_dev)) {
1319 err = PTR_ERR(data->class_dev);
1320 goto exit_remove_files;
1321 }
1322
1323 return 0;
1324
1325 exit_remove_files:
1326 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1327 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1328 device_remove_file(&pdev->dev, &dev_attr_name);
1329 kfree(data);
1330 exit_release_region:
1331 release_region(res->start, W83781D_EXTENT);
1332 exit:
1333 return err;
1334}
1335
1336static int __devexit
1337w83781d_isa_remove(struct platform_device *pdev)
1338{
1339 struct w83781d_data *data = platform_get_drvdata(pdev);
1340
1341 hwmon_device_unregister(data->class_dev);
1342 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1343 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1344 device_remove_file(&pdev->dev, &dev_attr_name);
1345 release_region(data->client.addr, W83781D_EXTENT);
1346 kfree(data);
1347
1348 return 0;
1349}
1350
1da177e4
LT		 1351/* The SMBus locks itself, usually, but nothing may access the Winbond between
1352 bank switches. ISA access must always be locked explicitly!
1353 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1354 would slow down the W83781D access and should not be necessary.
1355 There are some ugly typecasts here, but the good news is - they should
1356 nowhere else be necessary! */
1357static int
1358w83781d_read_value(struct i2c_client *client, u16 reg)
1359{
1360 struct w83781d_data *data = i2c_get_clientdata(client);
1361 int res, word_sized, bank;
1362 struct i2c_client *cl;
1363
9a61bf63 1364 mutex_lock(&data->lock);
7666c13c 1365 if (!client->driver) { /* ISA device */
1da177e4
LT		 1366 word_sized = (((reg & 0xff00) == 0x100)
1367 || ((reg & 0xff00) == 0x200))
1368 && (((reg & 0x00ff) == 0x50)
1369 || ((reg & 0x00ff) == 0x53)
1370 || ((reg & 0x00ff) == 0x55));
1371 if (reg & 0xff00) {
1372 outb_p(W83781D_REG_BANK,
1373 client->addr + W83781D_ADDR_REG_OFFSET);
1374 outb_p(reg >> 8,
1375 client->addr + W83781D_DATA_REG_OFFSET);
1376 }
1377 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1378 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1379 if (word_sized) {
1380 outb_p((reg & 0xff) + 1,
1381 client->addr + W83781D_ADDR_REG_OFFSET);
1382 res =
1383 (res << 8) + inb_p(client->addr +
1384 W83781D_DATA_REG_OFFSET);
1385 }
1386 if (reg & 0xff00) {
1387 outb_p(W83781D_REG_BANK,
1388 client->addr + W83781D_ADDR_REG_OFFSET);
1389 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1390 }
1391 } else {
1392 bank = (reg >> 8) & 0x0f;
1393 if (bank > 2)
1394 /* switch banks */
1395 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1396 bank);
1397 if (bank == 0 || bank > 2) {
1398 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1399 } else {
1400 /* switch to subclient */
1401 cl = data->lm75[bank - 1];
1402 /* convert from ISA to LM75 I2C addresses */
1403 switch (reg & 0xff) {
1404 case 0x50: /* TEMP */
1405 res = swab16(i2c_smbus_read_word_data(cl, 0));
1406 break;
1407 case 0x52: /* CONFIG */
1408 res = i2c_smbus_read_byte_data(cl, 1);
1409 break;
1410 case 0x53: /* HYST */
1411 res = swab16(i2c_smbus_read_word_data(cl, 2));
1412 break;
1413 case 0x55: /* OVER */
1414 default:
1415 res = swab16(i2c_smbus_read_word_data(cl, 3));
1416 break;
1417 }
1418 }
1419 if (bank > 2)
1420 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1421 }
9a61bf63 1422 mutex_unlock(&data->lock);
1da177e4
LT		 1423 return res;
1424}
1425
1426static int
1427w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1428{
1429 struct w83781d_data *data = i2c_get_clientdata(client);
1430 int word_sized, bank;
1431 struct i2c_client *cl;
1432
9a61bf63 1433 mutex_lock(&data->lock);
7666c13c 1434 if (!client->driver) { /* ISA device */
1da177e4
LT		 1435 word_sized = (((reg & 0xff00) == 0x100)
1436 || ((reg & 0xff00) == 0x200))
1437 && (((reg & 0x00ff) == 0x53)
1438 || ((reg & 0x00ff) == 0x55));
1439 if (reg & 0xff00) {
1440 outb_p(W83781D_REG_BANK,
1441 client->addr + W83781D_ADDR_REG_OFFSET);
1442 outb_p(reg >> 8,
1443 client->addr + W83781D_DATA_REG_OFFSET);
1444 }
1445 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1446 if (word_sized) {
1447 outb_p(value >> 8,
1448 client->addr + W83781D_DATA_REG_OFFSET);
1449 outb_p((reg & 0xff) + 1,
1450 client->addr + W83781D_ADDR_REG_OFFSET);
1451 }
1452 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1453 if (reg & 0xff00) {
1454 outb_p(W83781D_REG_BANK,
1455 client->addr + W83781D_ADDR_REG_OFFSET);
1456 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1457 }
1458 } else {
1459 bank = (reg >> 8) & 0x0f;
1460 if (bank > 2)
1461 /* switch banks */
1462 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1463 bank);
1464 if (bank == 0 || bank > 2) {
1465 i2c_smbus_write_byte_data(client, reg & 0xff,
1466 value & 0xff);
1467 } else {
1468 /* switch to subclient */
1469 cl = data->lm75[bank - 1];
1470 /* convert from ISA to LM75 I2C addresses */
1471 switch (reg & 0xff) {
1472 case 0x52: /* CONFIG */
1473 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1474 break;
1475 case 0x53: /* HYST */
1476 i2c_smbus_write_word_data(cl, 2, swab16(value));
1477 break;
1478 case 0x55: /* OVER */
1479 i2c_smbus_write_word_data(cl, 3, swab16(value));
1480 break;
1481 }
1482 }
1483 if (bank > 2)
1484 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1485 }
9a61bf63 1486 mutex_unlock(&data->lock);
1da177e4
LT		 1487 return 0;
1488}
1489
1da177e4 1490static void
7666c13c 1491w83781d_init_device(struct device *dev)
1da177e4 1492{
7666c13c
JD		 1493 struct w83781d_data *data = dev_get_drvdata(dev);
1494 struct i2c_client *client = &data->client;
1da177e4
LT		 1495 int i, p;
1496 int type = data->type;
1497 u8 tmp;
1498
fabddcd4 1499 if (reset && type != as99127f) { /* this resets registers we don't have
1da177e4 1500 documentation for on the as99127f */
fabddcd4
JD		 1501 /* Resetting the chip has been the default for a long time,
1502 but it causes the BIOS initializations (fan clock dividers,
1503 thermal sensor types...) to be lost, so it is now optional.
1504 It might even go away if nobody reports it as being useful,
1505 as I see very little reason why this would be needed at
1506 all. */
7666c13c 1507 dev_info(dev, "If reset=1 solved a problem you were "
fabddcd4
JD		 1508 "having, please report!\n");
1509
1da177e4
LT		 1510 /* save these registers */
1511 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1512 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1513 /* Reset all except Watchdog values and last conversion values
1514 This sets fan-divs to 2, among others */
1515 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1516 /* Restore the registers and disable power-on abnormal beep.
1517 This saves FAN 1/2/3 input/output values set by BIOS. */
1518 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1519 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1520 /* Disable master beep-enable (reset turns it on).
1521 Individual beep_mask should be reset to off but for some reason
1522 disabling this bit helps some people not get beeped */
1523 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1524 }
1525
fabddcd4
JD		 1526 /* Disable power-on abnormal beep, as advised by the datasheet.
1527 Already done if reset=1. */
1528 if (init && !reset && type != as99127f) {
1529 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1530 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1531 }
1532
303760b4 1533 data->vrm = vid_which_vrm();
1da177e4
LT		 1534
1535 if ((type != w83781d) && (type != as99127f)) {
1536 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1537 for (i = 1; i <= 3; i++) {
1538 if (!(tmp & BIT_SCFG1[i - 1])) {
1539 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1540 } else {
1541 if (w83781d_read_value
1542 (client,
1543 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1544 data->sens[i - 1] = 1;
1545 else
1546 data->sens[i - 1] = 2;
1547 }
7c7a5304 1548 if (type == w83783s && i == 2)
1da177e4
LT		 1549 break;
1550 }
1551 }
1552
1553 if (init && type != as99127f) {
1554 /* Enable temp2 */
1555 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1556 if (tmp & 0x01) {
7666c13c 1557 dev_warn(dev, "Enabling temp2, readings "
1da177e4
LT		 1558 "might not make sense\n");
1559 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1560 tmp & 0xfe);
1561 }
1562
1563 /* Enable temp3 */
7c7a5304 1564 if (type != w83783s) {
1da177e4
LT		 1565 tmp = w83781d_read_value(client,
1566 W83781D_REG_TEMP3_CONFIG);
1567 if (tmp & 0x01) {
7666c13c 1568 dev_warn(dev, "Enabling temp3, "
1da177e4
LT		 1569 "readings might not make sense\n");
1570 w83781d_write_value(client,
1571 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1572 }
1573 }
1da177e4
LT		 1574 }
1575
1576 /* Start monitoring */
1577 w83781d_write_value(client, W83781D_REG_CONFIG,
1578 (w83781d_read_value(client,
1579 W83781D_REG_CONFIG) & 0xf7)
1580 | 0x01);
7666c13c
JD		 1581
1582 /* A few vars need to be filled upon startup */
1583 for (i = 1; i <= 3; i++) {
1584 data->fan_min[i - 1] = w83781d_read_value(client,
1585 W83781D_REG_FAN_MIN(i));
1586 }
1587 if (type != w83781d && type != as99127f)
1588 for (i = 0; i < 4; i++)
1589 data->pwmenable[i] = 1;
1590
1591 mutex_init(&data->update_lock);
1da177e4
LT		 1592}
1593
1594static struct w83781d_data *w83781d_update_device(struct device *dev)
1595{
7666c13c
JD		 1596 struct w83781d_data *data = dev_get_drvdata(dev);
1597 struct i2c_client *client = &data->client;
1da177e4
LT		 1598 int i;
1599
9a61bf63 1600 mutex_lock(&data->update_lock);
1da177e4
LT		 1601
1602 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1603 || !data->valid) {
1604 dev_dbg(dev, "Starting device update\n");
1605
1606 for (i = 0; i <= 8; i++) {
7c7a5304 1607 if (data->type == w83783s && i == 1)
1da177e4
LT		 1608 continue; /* 783S has no in1 */
1609 data->in[i] =
1610 w83781d_read_value(client, W83781D_REG_IN(i));
1611 data->in_min[i] =
1612 w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1613 data->in_max[i] =
1614 w83781d_read_value(client, W83781D_REG_IN_MAX(i));
7c7a5304 1615 if ((data->type != w83782d)
1da177e4
LT		 1616 && (data->type != w83627hf) && (i == 6))
1617 break;
1618 }
1619 for (i = 1; i <= 3; i++) {
1620 data->fan[i - 1] =
1621 w83781d_read_value(client, W83781D_REG_FAN(i));
1622 data->fan_min[i - 1] =
1623 w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1624 }
1625 if (data->type != w83781d && data->type != as99127f) {
1626 for (i = 1; i <= 4; i++) {
1627 data->pwm[i - 1] =
1628 w83781d_read_value(client,
1629 W83781D_REG_PWM(i));
7666c13c 1630 if ((data->type != w83782d || !client->driver)
1da177e4
LT		 1631 && i == 2)
1632 break;
1633 }
1634 /* Only PWM2 can be disabled */
1635 data->pwmenable[1] = (w83781d_read_value(client,
1636 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1637 }
1638
1639 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1640 data->temp_max =
1641 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1642 data->temp_max_hyst =
1643 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1644 data->temp_add[0] =
1645 w83781d_read_value(client, W83781D_REG_TEMP(2));
1646 data->temp_max_add[0] =
1647 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1648 data->temp_max_hyst_add[0] =
1649 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
7c7a5304 1650 if (data->type != w83783s) {
1da177e4
LT		 1651 data->temp_add[1] =
1652 w83781d_read_value(client, W83781D_REG_TEMP(3));
1653 data->temp_max_add[1] =
1654 w83781d_read_value(client,
1655 W83781D_REG_TEMP_OVER(3));
1656 data->temp_max_hyst_add[1] =
1657 w83781d_read_value(client,
1658 W83781D_REG_TEMP_HYST(3));
1659 }
1660 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
7c7a5304
JD		 1661 data->vid = i & 0x0f;
1662 data->vid |= (w83781d_read_value(client,
1663 W83781D_REG_CHIPID) & 0x01) << 4;
1da177e4
LT		 1664 data->fan_div[0] = (i >> 4) & 0x03;
1665 data->fan_div[1] = (i >> 6) & 0x03;
7c7a5304
JD		 1666 data->fan_div[2] = (w83781d_read_value(client,
1667 W83781D_REG_PIN) >> 6) & 0x03;
1da177e4
LT		 1668 if ((data->type != w83781d) && (data->type != as99127f)) {
1669 i = w83781d_read_value(client, W83781D_REG_VBAT);
1670 data->fan_div[0] |= (i >> 3) & 0x04;
1671 data->fan_div[1] |= (i >> 4) & 0x04;
7c7a5304 1672 data->fan_div[2] |= (i >> 5) & 0x04;
1da177e4 1673 }
1da177e4 1674 if ((data->type == w83782d) || (data->type == w83627hf)) {
c7f5d7ed
JD		 1675 data->alarms = w83781d_read_value(client,
1676 W83782D_REG_ALARM1)
1677 | (w83781d_read_value(client,
1678 W83782D_REG_ALARM2) << 8)
1679 | (w83781d_read_value(client,
1680 W83782D_REG_ALARM3) << 16);
1681 } else if (data->type == w83783s) {
1682 data->alarms = w83781d_read_value(client,
1683 W83782D_REG_ALARM1)
1684 | (w83781d_read_value(client,
1685 W83782D_REG_ALARM2) << 8);
1686 } else {
1687 /* No real-time status registers, fall back to
1688 interrupt status registers */
1689 data->alarms = w83781d_read_value(client,
1690 W83781D_REG_ALARM1)
1691 | (w83781d_read_value(client,
1692 W83781D_REG_ALARM2) << 8);
1da177e4
LT		 1693 }
1694 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1695 data->beep_enable = i >> 7;
1696 data->beep_mask = ((i & 0x7f) << 8) +
1697 w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1698 if ((data->type != w83781d) && (data->type != as99127f)) {
1699 data->beep_mask |=
1700 w83781d_read_value(client,
1701 W83781D_REG_BEEP_INTS3) << 16;
1702 }
1703 data->last_updated = jiffies;
1704 data->valid = 1;
1705 }
1706
9a61bf63 1707 mutex_unlock(&data->update_lock);
1da177e4
LT		 1708
1709 return data;
1710}
1711
7666c13c
JD		 1712/* return 1 if a supported chip is found, 0 otherwise */
1713static int __init
1714w83781d_isa_found(unsigned short address)
1715{
1716 int val, save, found = 0;
1717
1718 if (!request_region(address, W83781D_EXTENT, "w83781d"))
1719 return 0;
1720
1721#define REALLY_SLOW_IO
1722 /* We need the timeouts for at least some W83781D-like
1723 chips. But only if we read 'undefined' registers. */
1724 val = inb_p(address + 1);
1725 if (inb_p(address + 2) != val
1726 || inb_p(address + 3) != val
1727 || inb_p(address + 7) != val) {
1728 pr_debug("w83781d: Detection failed at step 1\n");
1729 goto release;
1730 }
1731#undef REALLY_SLOW_IO
1732
1733 /* We should be able to change the 7 LSB of the address port. The
1734 MSB (busy flag) should be clear initially, set after the write. */
1735 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1736 if (save & 0x80) {
1737 pr_debug("w83781d: Detection failed at step 2\n");
1738 goto release;
1739 }
1740 val = ~save & 0x7f;
1741 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1742 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1743 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1744 pr_debug("w83781d: Detection failed at step 3\n");
1745 goto release;
1746 }
1747
1748 /* We found a device, now see if it could be a W83781D */
1749 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1750 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1751 if (val & 0x80) {
1752 pr_debug("w83781d: Detection failed at step 4\n");
1753 goto release;
1754 }
1755 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1756 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1757 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1758 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1759 if ((!(save & 0x80) && (val != 0xa3))
1760 || ((save & 0x80) && (val != 0x5c))) {
1761 pr_debug("w83781d: Detection failed at step 5\n");
1762 goto release;
1763 }
1764 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1765 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1766 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1767 pr_debug("w83781d: Detection failed at step 6\n");
1768 goto release;
1769 }
1770
1771 /* The busy flag should be clear again */
1772 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1773 pr_debug("w83781d: Detection failed at step 7\n");
1774 goto release;
1775 }
1776
1777 /* Determine the chip type */
1778 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1779 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1780 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1781 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1782 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1783 if ((val & 0xfe) == 0x10 /* W83781D */
1784 || val == 0x30 /* W83782D */
1785 || val == 0x21) /* W83627HF */
1786 found = 1;
1787
1788 if (found)
1789 pr_info("w83781d: Found a %s chip at %#x\n",
1790 val == 0x21 ? "W83627HF" :
1791 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1792
1793 release:
1794 release_region(address, W83781D_EXTENT);
1795 return found;
1796}
1797
1798static int __init
1799w83781d_isa_device_add(unsigned short address)
1800{
1801 struct resource res = {
1802 .start = address,
1803 .end = address + W83781D_EXTENT,
1804 .name = "w83781d",
1805 .flags = IORESOURCE_IO,
1806 };
1807 int err;
1808
1809 pdev = platform_device_alloc("w83781d", address);
1810 if (!pdev) {
1811 err = -ENOMEM;
1812 printk(KERN_ERR "w83781d: Device allocation failed\n");
1813 goto exit;
1814 }
1815
1816 err = platform_device_add_resources(pdev, &res, 1);
1817 if (err) {
1818 printk(KERN_ERR "w83781d: Device resource addition failed "
1819 "(%d)\n", err);
1820 goto exit_device_put;
1821 }
1822
1823 err = platform_device_add(pdev);
1824 if (err) {
1825 printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1826 err);
1827 goto exit_device_put;
1828 }
1829
1830 return 0;
1831
1832 exit_device_put:
1833 platform_device_put(pdev);
1834 exit:
1835 pdev = NULL;
1836 return err;
1837}
1838
1da177e4
LT		 1839static int __init
1840sensors_w83781d_init(void)
1841{
fde09509
JD		 1842 int res;
1843
1844 res = i2c_add_driver(&w83781d_driver);
1845 if (res)
7666c13c
JD		 1846 goto exit;
1847
1848 if (w83781d_isa_found(isa_address)) {
1849 res = platform_driver_register(&w83781d_isa_driver);
1850 if (res)
1851 goto exit_unreg_i2c_driver;
fde09509 1852
7666c13c
JD		 1853 /* Sets global pdev as a side effect */
1854 res = w83781d_isa_device_add(isa_address);
1855 if (res)
1856 goto exit_unreg_isa_driver;
1857 }
fde09509
JD		 1858
1859 return 0;
7666c13c
JD		 1860
1861 exit_unreg_isa_driver:
1862 platform_driver_unregister(&w83781d_isa_driver);
1863 exit_unreg_i2c_driver:
1864 i2c_del_driver(&w83781d_driver);
1865 exit:
1866 return res;
1da177e4
LT		 1867}
1868
1869static void __exit
1870sensors_w83781d_exit(void)
1871{
7666c13c
JD		 1872 if (pdev) {
1873 platform_device_unregister(pdev);
1874 platform_driver_unregister(&w83781d_isa_driver);
1875 }
1da177e4
LT		 1876 i2c_del_driver(&w83781d_driver);
1877}
1878
1879MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1880 "Philip Edelbrock <phil@netroedge.com>, "
1881 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1882MODULE_DESCRIPTION("W83781D driver");
1883MODULE_LICENSE("GPL");
1884
1885module_init(sensors_w83781d_init);
1886module_exit(sensors_w83781d_exit);
Linux kernel - Deliverables
This page took 0.309428 seconds and 5 git commands to generate.