Commit | Line | Data |
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6800c3d0 | 1 | /* |
47efe877 GR |
2 | * w83793.c - Linux kernel driver for hardware monitoring |
3 | * Copyright (C) 2006 Winbond Electronics Corp. | |
4 | * Yuan Mu | |
5 | * Rudolf Marek <r.marek@assembler.cz> | |
6 | * Copyright (C) 2009-2010 Sven Anders <anders@anduras.de>, ANDURAS AG. | |
7 | * Watchdog driver part | |
8 | * (Based partially on fschmd driver, | |
9 | * Copyright 2007-2008 by Hans de Goede) | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation - version 2. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
23 | * 02110-1301 USA. | |
24 | */ | |
6800c3d0 RM |
25 | |
26 | /* | |
47efe877 GR |
27 | * Supports following chips: |
28 | * | |
29 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
30 | * w83793 10 12 8 6 0x7b 0x5ca3 yes no | |
31 | */ | |
6800c3d0 RM |
32 | |
33 | #include <linux/module.h> | |
34 | #include <linux/init.h> | |
35 | #include <linux/slab.h> | |
36 | #include <linux/i2c.h> | |
37 | #include <linux/hwmon.h> | |
38 | #include <linux/hwmon-vid.h> | |
39 | #include <linux/hwmon-sysfs.h> | |
40 | #include <linux/err.h> | |
41 | #include <linux/mutex.h> | |
5852f960 SA |
42 | #include <linux/fs.h> |
43 | #include <linux/watchdog.h> | |
44 | #include <linux/miscdevice.h> | |
45 | #include <linux/uaccess.h> | |
46 | #include <linux/kref.h> | |
47 | #include <linux/notifier.h> | |
48 | #include <linux/reboot.h> | |
dcd8f392 | 49 | #include <linux/jiffies.h> |
5852f960 SA |
50 | |
51 | /* Default values */ | |
52 | #define WATCHDOG_TIMEOUT 2 /* 2 minute default timeout */ | |
6800c3d0 RM |
53 | |
54 | /* Addresses to scan */ | |
25e9c86d MH |
55 | static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, |
56 | I2C_CLIENT_END }; | |
6800c3d0 RM |
57 | |
58 | /* Insmod parameters */ | |
3aed198c JD |
59 | |
60 | static unsigned short force_subclients[4]; | |
61 | module_param_array(force_subclients, short, NULL, 0); | |
b55f3757 GR |
62 | MODULE_PARM_DESC(force_subclients, |
63 | "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}"); | |
6800c3d0 | 64 | |
90ab5ee9 | 65 | static bool reset; |
6800c3d0 RM |
66 | module_param(reset, bool, 0); |
67 | MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); | |
68 | ||
5852f960 SA |
69 | static int timeout = WATCHDOG_TIMEOUT; /* default timeout in minutes */ |
70 | module_param(timeout, int, 0); | |
71 | MODULE_PARM_DESC(timeout, | |
72 | "Watchdog timeout in minutes. 2<= timeout <=255 (default=" | |
73 | __MODULE_STRING(WATCHDOG_TIMEOUT) ")"); | |
74 | ||
86a1e189 WVS |
75 | static bool nowayout = WATCHDOG_NOWAYOUT; |
76 | module_param(nowayout, bool, 0); | |
5852f960 SA |
77 | MODULE_PARM_DESC(nowayout, |
78 | "Watchdog cannot be stopped once started (default=" | |
79 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
80 | ||
6800c3d0 | 81 | /* |
47efe877 GR |
82 | * Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved |
83 | * as ID, Bank Select registers | |
84 | */ | |
6800c3d0 RM |
85 | #define W83793_REG_BANKSEL 0x00 |
86 | #define W83793_REG_VENDORID 0x0d | |
87 | #define W83793_REG_CHIPID 0x0e | |
88 | #define W83793_REG_DEVICEID 0x0f | |
89 | ||
90 | #define W83793_REG_CONFIG 0x40 | |
91 | #define W83793_REG_MFC 0x58 | |
92 | #define W83793_REG_FANIN_CTRL 0x5c | |
93 | #define W83793_REG_FANIN_SEL 0x5d | |
94 | #define W83793_REG_I2C_ADDR 0x0b | |
95 | #define W83793_REG_I2C_SUBADDR 0x0c | |
96 | #define W83793_REG_VID_INA 0x05 | |
97 | #define W83793_REG_VID_INB 0x06 | |
98 | #define W83793_REG_VID_LATCHA 0x07 | |
99 | #define W83793_REG_VID_LATCHB 0x08 | |
100 | #define W83793_REG_VID_CTRL 0x59 | |
101 | ||
5852f960 SA |
102 | #define W83793_REG_WDT_LOCK 0x01 |
103 | #define W83793_REG_WDT_ENABLE 0x02 | |
104 | #define W83793_REG_WDT_STATUS 0x03 | |
105 | #define W83793_REG_WDT_TIMEOUT 0x04 | |
106 | ||
6800c3d0 RM |
107 | static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f }; |
108 | ||
109 | #define TEMP_READ 0 | |
110 | #define TEMP_CRIT 1 | |
111 | #define TEMP_CRIT_HYST 2 | |
112 | #define TEMP_WARN 3 | |
113 | #define TEMP_WARN_HYST 4 | |
47efe877 GR |
114 | /* |
115 | * only crit and crit_hyst affect real-time alarm status | |
116 | * current crit crit_hyst warn warn_hyst | |
117 | */ | |
6800c3d0 RM |
118 | static u16 W83793_REG_TEMP[][5] = { |
119 | {0x1c, 0x78, 0x79, 0x7a, 0x7b}, | |
120 | {0x1d, 0x7c, 0x7d, 0x7e, 0x7f}, | |
121 | {0x1e, 0x80, 0x81, 0x82, 0x83}, | |
122 | {0x1f, 0x84, 0x85, 0x86, 0x87}, | |
123 | {0x20, 0x88, 0x89, 0x8a, 0x8b}, | |
124 | {0x21, 0x8c, 0x8d, 0x8e, 0x8f}, | |
125 | }; | |
126 | ||
127 | #define W83793_REG_TEMP_LOW_BITS 0x22 | |
128 | ||
129 | #define W83793_REG_BEEP(index) (0x53 + (index)) | |
130 | #define W83793_REG_ALARM(index) (0x4b + (index)) | |
131 | ||
132 | #define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */ | |
133 | #define W83793_REG_IRQ_CTRL 0x50 | |
134 | #define W83793_REG_OVT_CTRL 0x51 | |
135 | #define W83793_REG_OVT_BEEP 0x52 | |
136 | ||
137 | #define IN_READ 0 | |
138 | #define IN_MAX 1 | |
139 | #define IN_LOW 2 | |
140 | static const u16 W83793_REG_IN[][3] = { | |
141 | /* Current, High, Low */ | |
142 | {0x10, 0x60, 0x61}, /* Vcore A */ | |
143 | {0x11, 0x62, 0x63}, /* Vcore B */ | |
144 | {0x12, 0x64, 0x65}, /* Vtt */ | |
145 | {0x14, 0x6a, 0x6b}, /* VSEN1 */ | |
146 | {0x15, 0x6c, 0x6d}, /* VSEN2 */ | |
147 | {0x16, 0x6e, 0x6f}, /* +3VSEN */ | |
148 | {0x17, 0x70, 0x71}, /* +12VSEN */ | |
149 | {0x18, 0x72, 0x73}, /* 5VDD */ | |
150 | {0x19, 0x74, 0x75}, /* 5VSB */ | |
151 | {0x1a, 0x76, 0x77}, /* VBAT */ | |
152 | }; | |
153 | ||
154 | /* Low Bits of Vcore A/B Vtt Read/High/Low */ | |
155 | static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 }; | |
156 | static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 }; | |
ddca933b | 157 | static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 }; |
6800c3d0 RM |
158 | |
159 | #define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */ | |
160 | #define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */ | |
161 | ||
162 | #define W83793_REG_PWM_DEFAULT 0xb2 | |
163 | #define W83793_REG_PWM_ENABLE 0x207 | |
164 | #define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */ | |
165 | #define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */ | |
166 | #define W83793_REG_TEMP_CRITICAL 0xc5 | |
167 | ||
168 | #define PWM_DUTY 0 | |
169 | #define PWM_START 1 | |
170 | #define PWM_NONSTOP 2 | |
5aebefb0 | 171 | #define PWM_STOP_TIME 3 |
6800c3d0 RM |
172 | #define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \ |
173 | (nr) == 1 ? 0x220 : 0x218) + (index)) | |
174 | ||
175 | /* bit field, fan1 is bit0, fan2 is bit1 ... */ | |
176 | #define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index)) | |
177 | #define W83793_REG_TEMP_TOL(index) (0x208 + (index)) | |
178 | #define W83793_REG_TEMP_CRUISE(index) (0x210 + (index)) | |
179 | #define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index)) | |
180 | #define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr)) | |
181 | #define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr)) | |
182 | ||
183 | static inline unsigned long FAN_FROM_REG(u16 val) | |
184 | { | |
185 | if ((val >= 0xfff) || (val == 0)) | |
186 | return 0; | |
7fe83ad8 | 187 | return 1350000UL / val; |
6800c3d0 RM |
188 | } |
189 | ||
190 | static inline u16 FAN_TO_REG(long rpm) | |
191 | { | |
192 | if (rpm <= 0) | |
193 | return 0x0fff; | |
2a844c14 | 194 | return clamp_val((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); |
6800c3d0 RM |
195 | } |
196 | ||
197 | static inline unsigned long TIME_FROM_REG(u8 reg) | |
198 | { | |
7fe83ad8 | 199 | return reg * 100; |
6800c3d0 RM |
200 | } |
201 | ||
202 | static inline u8 TIME_TO_REG(unsigned long val) | |
203 | { | |
2a844c14 | 204 | return clamp_val((val + 50) / 100, 0, 0xff); |
6800c3d0 RM |
205 | } |
206 | ||
207 | static inline long TEMP_FROM_REG(s8 reg) | |
208 | { | |
7fe83ad8 | 209 | return reg * 1000; |
6800c3d0 RM |
210 | } |
211 | ||
212 | static inline s8 TEMP_TO_REG(long val, s8 min, s8 max) | |
213 | { | |
2a844c14 | 214 | return clamp_val((val + (val < 0 ? -500 : 500)) / 1000, min, max); |
6800c3d0 RM |
215 | } |
216 | ||
217 | struct w83793_data { | |
6800c3d0 | 218 | struct i2c_client *lm75[2]; |
1beeffe4 | 219 | struct device *hwmon_dev; |
6800c3d0 RM |
220 | struct mutex update_lock; |
221 | char valid; /* !=0 if following fields are valid */ | |
222 | unsigned long last_updated; /* In jiffies */ | |
223 | unsigned long last_nonvolatile; /* In jiffies, last time we update the | |
47efe877 GR |
224 | * nonvolatile registers |
225 | */ | |
6800c3d0 RM |
226 | |
227 | u8 bank; | |
228 | u8 vrm; | |
229 | u8 vid[2]; | |
230 | u8 in[10][3]; /* Register value, read/high/low */ | |
231 | u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */ | |
232 | ||
233 | u16 has_fan; /* Only fan1- fan5 has own pins */ | |
234 | u16 fan[12]; /* Register value combine */ | |
235 | u16 fan_min[12]; /* Register value combine */ | |
236 | ||
237 | s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */ | |
238 | u8 temp_low_bits; /* Additional resolution TD1-TD4 */ | |
239 | u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits | |
47efe877 GR |
240 | * byte 1: Temp R1,R2 mode, each has 1 bit |
241 | */ | |
6800c3d0 RM |
242 | u8 temp_critical; /* If reached all fan will be at full speed */ |
243 | u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */ | |
244 | ||
245 | u8 has_pwm; | |
46bed4df | 246 | u8 has_temp; |
c70a8c34 | 247 | u8 has_vid; |
6800c3d0 RM |
248 | u8 pwm_enable; /* Register value, each Temp has 1 bit */ |
249 | u8 pwm_uptime; /* Register value */ | |
250 | u8 pwm_downtime; /* Register value */ | |
251 | u8 pwm_default; /* All fan default pwm, next poweron valid */ | |
252 | u8 pwm[8][3]; /* Register value */ | |
253 | u8 pwm_stop_time[8]; | |
254 | u8 temp_cruise[6]; | |
255 | ||
256 | u8 alarms[5]; /* realtime status registers */ | |
257 | u8 beeps[5]; | |
258 | u8 beep_enable; | |
259 | u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */ | |
260 | u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */ | |
261 | u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */ | |
5852f960 SA |
262 | |
263 | /* watchdog */ | |
264 | struct i2c_client *client; | |
265 | struct mutex watchdog_lock; | |
266 | struct list_head list; /* member of the watchdog_data_list */ | |
267 | struct kref kref; | |
268 | struct miscdevice watchdog_miscdev; | |
269 | unsigned long watchdog_is_open; | |
270 | char watchdog_expect_close; | |
271 | char watchdog_name[10]; /* must be unique to avoid sysfs conflict */ | |
272 | unsigned int watchdog_caused_reboot; | |
273 | int watchdog_timeout; /* watchdog timeout in minutes */ | |
6800c3d0 RM |
274 | }; |
275 | ||
47efe877 GR |
276 | /* |
277 | * Somewhat ugly :( global data pointer list with all devices, so that | |
278 | * we can find our device data as when using misc_register. There is no | |
279 | * other method to get to one's device data from the open file-op and | |
280 | * for usage in the reboot notifier callback. | |
281 | */ | |
5852f960 SA |
282 | static LIST_HEAD(watchdog_data_list); |
283 | ||
284 | /* Note this lock not only protect list access, but also data.kref access */ | |
285 | static DEFINE_MUTEX(watchdog_data_mutex); | |
286 | ||
47efe877 GR |
287 | /* |
288 | * Release our data struct when we're detached from the i2c client *and* all | |
289 | * references to our watchdog device are released | |
290 | */ | |
5852f960 SA |
291 | static void w83793_release_resources(struct kref *ref) |
292 | { | |
293 | struct w83793_data *data = container_of(ref, struct w83793_data, kref); | |
294 | kfree(data); | |
295 | } | |
296 | ||
6800c3d0 RM |
297 | static u8 w83793_read_value(struct i2c_client *client, u16 reg); |
298 | static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value); | |
a7f13a6e JD |
299 | static int w83793_probe(struct i2c_client *client, |
300 | const struct i2c_device_id *id); | |
310ec792 | 301 | static int w83793_detect(struct i2c_client *client, |
a7f13a6e JD |
302 | struct i2c_board_info *info); |
303 | static int w83793_remove(struct i2c_client *client); | |
6800c3d0 RM |
304 | static void w83793_init_client(struct i2c_client *client); |
305 | static void w83793_update_nonvolatile(struct device *dev); | |
306 | static struct w83793_data *w83793_update_device(struct device *dev); | |
307 | ||
a7f13a6e | 308 | static const struct i2c_device_id w83793_id[] = { |
1f86df49 | 309 | { "w83793", 0 }, |
a7f13a6e JD |
310 | { } |
311 | }; | |
312 | MODULE_DEVICE_TABLE(i2c, w83793_id); | |
313 | ||
6800c3d0 | 314 | static struct i2c_driver w83793_driver = { |
a7f13a6e | 315 | .class = I2C_CLASS_HWMON, |
6800c3d0 RM |
316 | .driver = { |
317 | .name = "w83793", | |
318 | }, | |
a7f13a6e JD |
319 | .probe = w83793_probe, |
320 | .remove = w83793_remove, | |
321 | .id_table = w83793_id, | |
322 | .detect = w83793_detect, | |
c3813d6a | 323 | .address_list = normal_i2c, |
6800c3d0 RM |
324 | }; |
325 | ||
326 | static ssize_t | |
327 | show_vrm(struct device *dev, struct device_attribute *attr, char *buf) | |
328 | { | |
8f74efe8 | 329 | struct w83793_data *data = dev_get_drvdata(dev); |
6800c3d0 RM |
330 | return sprintf(buf, "%d\n", data->vrm); |
331 | } | |
332 | ||
333 | static ssize_t | |
334 | show_vid(struct device *dev, struct device_attribute *attr, char *buf) | |
335 | { | |
336 | struct w83793_data *data = w83793_update_device(dev); | |
337 | struct sensor_device_attribute_2 *sensor_attr = | |
338 | to_sensor_dev_attr_2(attr); | |
339 | int index = sensor_attr->index; | |
340 | ||
341 | return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm)); | |
342 | } | |
343 | ||
344 | static ssize_t | |
345 | store_vrm(struct device *dev, struct device_attribute *attr, | |
346 | const char *buf, size_t count) | |
347 | { | |
8f74efe8 | 348 | struct w83793_data *data = dev_get_drvdata(dev); |
47efe877 GR |
349 | unsigned long val; |
350 | int err; | |
351 | ||
352 | err = kstrtoul(buf, 10, &val); | |
353 | if (err) | |
354 | return err; | |
355 | ||
356 | data->vrm = val; | |
6800c3d0 RM |
357 | return count; |
358 | } | |
359 | ||
360 | #define ALARM_STATUS 0 | |
361 | #define BEEP_ENABLE 1 | |
362 | static ssize_t | |
363 | show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) | |
364 | { | |
365 | struct w83793_data *data = w83793_update_device(dev); | |
366 | struct sensor_device_attribute_2 *sensor_attr = | |
367 | to_sensor_dev_attr_2(attr); | |
368 | int nr = sensor_attr->nr; | |
369 | int index = sensor_attr->index >> 3; | |
370 | int bit = sensor_attr->index & 0x07; | |
371 | u8 val; | |
372 | ||
47efe877 | 373 | if (nr == ALARM_STATUS) { |
6800c3d0 RM |
374 | val = (data->alarms[index] >> (bit)) & 1; |
375 | } else { /* BEEP_ENABLE */ | |
376 | val = (data->beeps[index] >> (bit)) & 1; | |
377 | } | |
378 | ||
379 | return sprintf(buf, "%u\n", val); | |
380 | } | |
381 | ||
382 | static ssize_t | |
383 | store_beep(struct device *dev, struct device_attribute *attr, | |
384 | const char *buf, size_t count) | |
385 | { | |
386 | struct i2c_client *client = to_i2c_client(dev); | |
387 | struct w83793_data *data = i2c_get_clientdata(client); | |
388 | struct sensor_device_attribute_2 *sensor_attr = | |
389 | to_sensor_dev_attr_2(attr); | |
390 | int index = sensor_attr->index >> 3; | |
391 | int shift = sensor_attr->index & 0x07; | |
392 | u8 beep_bit = 1 << shift; | |
47efe877 GR |
393 | unsigned long val; |
394 | int err; | |
6800c3d0 | 395 | |
47efe877 GR |
396 | err = kstrtoul(buf, 10, &val); |
397 | if (err) | |
398 | return err; | |
399 | ||
400 | if (val > 1) | |
6800c3d0 RM |
401 | return -EINVAL; |
402 | ||
403 | mutex_lock(&data->update_lock); | |
404 | data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index)); | |
405 | data->beeps[index] &= ~beep_bit; | |
406 | data->beeps[index] |= val << shift; | |
407 | w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]); | |
408 | mutex_unlock(&data->update_lock); | |
409 | ||
410 | return count; | |
411 | } | |
412 | ||
413 | static ssize_t | |
414 | show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf) | |
415 | { | |
416 | struct w83793_data *data = w83793_update_device(dev); | |
417 | return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01); | |
418 | } | |
419 | ||
420 | static ssize_t | |
421 | store_beep_enable(struct device *dev, struct device_attribute *attr, | |
422 | const char *buf, size_t count) | |
423 | { | |
424 | struct i2c_client *client = to_i2c_client(dev); | |
425 | struct w83793_data *data = i2c_get_clientdata(client); | |
47efe877 GR |
426 | unsigned long val; |
427 | int err; | |
428 | ||
429 | err = kstrtoul(buf, 10, &val); | |
430 | if (err) | |
431 | return err; | |
6800c3d0 | 432 | |
47efe877 | 433 | if (val > 1) |
6800c3d0 RM |
434 | return -EINVAL; |
435 | ||
436 | mutex_lock(&data->update_lock); | |
437 | data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP) | |
438 | & 0xfd; | |
439 | data->beep_enable |= val << 1; | |
440 | w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable); | |
441 | mutex_unlock(&data->update_lock); | |
442 | ||
443 | return count; | |
444 | } | |
445 | ||
a516dc3e JD |
446 | /* Write 0 to clear chassis alarm */ |
447 | static ssize_t | |
448 | store_chassis_clear(struct device *dev, | |
449 | struct device_attribute *attr, const char *buf, | |
450 | size_t count) | |
451 | { | |
452 | struct i2c_client *client = to_i2c_client(dev); | |
453 | struct w83793_data *data = i2c_get_clientdata(client); | |
454 | unsigned long val; | |
455 | u8 reg; | |
47efe877 | 456 | int err; |
a516dc3e | 457 | |
47efe877 GR |
458 | err = kstrtoul(buf, 10, &val); |
459 | if (err) | |
460 | return err; | |
461 | if (val) | |
a516dc3e JD |
462 | return -EINVAL; |
463 | ||
464 | mutex_lock(&data->update_lock); | |
465 | reg = w83793_read_value(client, W83793_REG_CLR_CHASSIS); | |
466 | w83793_write_value(client, W83793_REG_CLR_CHASSIS, reg | 0x80); | |
467 | data->valid = 0; /* Force cache refresh */ | |
468 | mutex_unlock(&data->update_lock); | |
469 | return count; | |
470 | } | |
471 | ||
6800c3d0 RM |
472 | #define FAN_INPUT 0 |
473 | #define FAN_MIN 1 | |
474 | static ssize_t | |
475 | show_fan(struct device *dev, struct device_attribute *attr, char *buf) | |
476 | { | |
477 | struct sensor_device_attribute_2 *sensor_attr = | |
478 | to_sensor_dev_attr_2(attr); | |
479 | int nr = sensor_attr->nr; | |
480 | int index = sensor_attr->index; | |
481 | struct w83793_data *data = w83793_update_device(dev); | |
482 | u16 val; | |
483 | ||
47efe877 | 484 | if (nr == FAN_INPUT) |
6800c3d0 | 485 | val = data->fan[index] & 0x0fff; |
47efe877 | 486 | else |
6800c3d0 | 487 | val = data->fan_min[index] & 0x0fff; |
6800c3d0 RM |
488 | |
489 | return sprintf(buf, "%lu\n", FAN_FROM_REG(val)); | |
490 | } | |
491 | ||
492 | static ssize_t | |
493 | store_fan_min(struct device *dev, struct device_attribute *attr, | |
494 | const char *buf, size_t count) | |
495 | { | |
496 | struct sensor_device_attribute_2 *sensor_attr = | |
497 | to_sensor_dev_attr_2(attr); | |
498 | int index = sensor_attr->index; | |
499 | struct i2c_client *client = to_i2c_client(dev); | |
500 | struct w83793_data *data = i2c_get_clientdata(client); | |
47efe877 GR |
501 | unsigned long val; |
502 | int err; | |
503 | ||
504 | err = kstrtoul(buf, 10, &val); | |
505 | if (err) | |
506 | return err; | |
507 | val = FAN_TO_REG(val); | |
6800c3d0 RM |
508 | |
509 | mutex_lock(&data->update_lock); | |
510 | data->fan_min[index] = val; | |
511 | w83793_write_value(client, W83793_REG_FAN_MIN(index), | |
512 | (val >> 8) & 0xff); | |
513 | w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff); | |
514 | mutex_unlock(&data->update_lock); | |
515 | ||
516 | return count; | |
517 | } | |
518 | ||
6800c3d0 RM |
519 | static ssize_t |
520 | show_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
521 | { | |
522 | struct sensor_device_attribute_2 *sensor_attr = | |
523 | to_sensor_dev_attr_2(attr); | |
524 | struct w83793_data *data = w83793_update_device(dev); | |
525 | u16 val; | |
526 | int nr = sensor_attr->nr; | |
527 | int index = sensor_attr->index; | |
528 | ||
47efe877 | 529 | if (nr == PWM_STOP_TIME) |
6800c3d0 RM |
530 | val = TIME_FROM_REG(data->pwm_stop_time[index]); |
531 | else | |
532 | val = (data->pwm[index][nr] & 0x3f) << 2; | |
533 | ||
534 | return sprintf(buf, "%d\n", val); | |
535 | } | |
536 | ||
537 | static ssize_t | |
538 | store_pwm(struct device *dev, struct device_attribute *attr, | |
539 | const char *buf, size_t count) | |
540 | { | |
541 | struct i2c_client *client = to_i2c_client(dev); | |
542 | struct w83793_data *data = i2c_get_clientdata(client); | |
543 | struct sensor_device_attribute_2 *sensor_attr = | |
544 | to_sensor_dev_attr_2(attr); | |
545 | int nr = sensor_attr->nr; | |
546 | int index = sensor_attr->index; | |
47efe877 GR |
547 | unsigned long val; |
548 | int err; | |
549 | ||
550 | err = kstrtoul(buf, 10, &val); | |
551 | if (err) | |
552 | return err; | |
6800c3d0 RM |
553 | |
554 | mutex_lock(&data->update_lock); | |
47efe877 GR |
555 | if (nr == PWM_STOP_TIME) { |
556 | val = TIME_TO_REG(val); | |
6800c3d0 RM |
557 | data->pwm_stop_time[index] = val; |
558 | w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index), | |
559 | val); | |
560 | } else { | |
2a844c14 | 561 | val = clamp_val(val, 0, 0xff) >> 2; |
6800c3d0 RM |
562 | data->pwm[index][nr] = |
563 | w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0; | |
564 | data->pwm[index][nr] |= val; | |
565 | w83793_write_value(client, W83793_REG_PWM(index, nr), | |
566 | data->pwm[index][nr]); | |
567 | } | |
568 | ||
569 | mutex_unlock(&data->update_lock); | |
570 | return count; | |
571 | } | |
572 | ||
573 | static ssize_t | |
574 | show_temp(struct device *dev, struct device_attribute *attr, char *buf) | |
575 | { | |
576 | struct sensor_device_attribute_2 *sensor_attr = | |
577 | to_sensor_dev_attr_2(attr); | |
578 | int nr = sensor_attr->nr; | |
579 | int index = sensor_attr->index; | |
580 | struct w83793_data *data = w83793_update_device(dev); | |
581 | long temp = TEMP_FROM_REG(data->temp[index][nr]); | |
582 | ||
47efe877 | 583 | if (nr == TEMP_READ && index < 4) { /* Only TD1-TD4 have low bits */ |
6800c3d0 RM |
584 | int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250; |
585 | temp += temp > 0 ? low : -low; | |
586 | } | |
587 | return sprintf(buf, "%ld\n", temp); | |
588 | } | |
589 | ||
590 | static ssize_t | |
591 | store_temp(struct device *dev, struct device_attribute *attr, | |
592 | const char *buf, size_t count) | |
593 | { | |
594 | struct sensor_device_attribute_2 *sensor_attr = | |
595 | to_sensor_dev_attr_2(attr); | |
596 | int nr = sensor_attr->nr; | |
597 | int index = sensor_attr->index; | |
598 | struct i2c_client *client = to_i2c_client(dev); | |
599 | struct w83793_data *data = i2c_get_clientdata(client); | |
47efe877 GR |
600 | long tmp; |
601 | int err; | |
602 | ||
603 | err = kstrtol(buf, 10, &tmp); | |
604 | if (err) | |
605 | return err; | |
6800c3d0 RM |
606 | |
607 | mutex_lock(&data->update_lock); | |
608 | data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127); | |
609 | w83793_write_value(client, W83793_REG_TEMP[index][nr], | |
610 | data->temp[index][nr]); | |
611 | mutex_unlock(&data->update_lock); | |
612 | return count; | |
613 | } | |
614 | ||
615 | /* | |
47efe877 GR |
616 | * TD1-TD4 |
617 | * each has 4 mode:(2 bits) | |
618 | * 0: Stop monitor | |
619 | * 1: Use internal temp sensor(default) | |
620 | * 2: Reserved | |
621 | * 3: Use sensor in Intel CPU and get result by PECI | |
622 | * | |
623 | * TR1-TR2 | |
624 | * each has 2 mode:(1 bit) | |
625 | * 0: Disable temp sensor monitor | |
626 | * 1: To enable temp sensors monitor | |
627 | */ | |
6800c3d0 | 628 | |
ddca933b GJ |
629 | /* 0 disable, 6 PECI */ |
630 | static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 }; | |
6800c3d0 RM |
631 | |
632 | static ssize_t | |
633 | show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) | |
634 | { | |
635 | struct w83793_data *data = w83793_update_device(dev); | |
636 | struct sensor_device_attribute_2 *sensor_attr = | |
637 | to_sensor_dev_attr_2(attr); | |
638 | int index = sensor_attr->index; | |
639 | u8 mask = (index < 4) ? 0x03 : 0x01; | |
640 | u8 shift = (index < 4) ? (2 * index) : (index - 4); | |
641 | u8 tmp; | |
642 | index = (index < 4) ? 0 : 1; | |
643 | ||
644 | tmp = (data->temp_mode[index] >> shift) & mask; | |
645 | ||
646 | /* for the internal sensor, found out if diode or thermistor */ | |
47efe877 | 647 | if (tmp == 1) |
6800c3d0 | 648 | tmp = index == 0 ? 3 : 4; |
47efe877 | 649 | else |
6800c3d0 | 650 | tmp = TO_TEMP_MODE[tmp]; |
6800c3d0 RM |
651 | |
652 | return sprintf(buf, "%d\n", tmp); | |
653 | } | |
654 | ||
655 | static ssize_t | |
656 | store_temp_mode(struct device *dev, struct device_attribute *attr, | |
657 | const char *buf, size_t count) | |
658 | { | |
659 | struct i2c_client *client = to_i2c_client(dev); | |
660 | struct w83793_data *data = i2c_get_clientdata(client); | |
661 | struct sensor_device_attribute_2 *sensor_attr = | |
662 | to_sensor_dev_attr_2(attr); | |
663 | int index = sensor_attr->index; | |
664 | u8 mask = (index < 4) ? 0x03 : 0x01; | |
665 | u8 shift = (index < 4) ? (2 * index) : (index - 4); | |
47efe877 GR |
666 | unsigned long val; |
667 | int err; | |
668 | ||
669 | err = kstrtoul(buf, 10, &val); | |
670 | if (err) | |
671 | return err; | |
6800c3d0 RM |
672 | |
673 | /* transform the sysfs interface values into table above */ | |
ddca933b | 674 | if ((val == 6) && (index < 4)) { |
6800c3d0 RM |
675 | val -= 3; |
676 | } else if ((val == 3 && index < 4) | |
46bed4df | 677 | || (val == 4 && index >= 4)) { |
6800c3d0 RM |
678 | /* transform diode or thermistor into internal enable */ |
679 | val = !!val; | |
680 | } else { | |
681 | return -EINVAL; | |
682 | } | |
683 | ||
684 | index = (index < 4) ? 0 : 1; | |
685 | mutex_lock(&data->update_lock); | |
686 | data->temp_mode[index] = | |
687 | w83793_read_value(client, W83793_REG_TEMP_MODE[index]); | |
688 | data->temp_mode[index] &= ~(mask << shift); | |
689 | data->temp_mode[index] |= val << shift; | |
690 | w83793_write_value(client, W83793_REG_TEMP_MODE[index], | |
691 | data->temp_mode[index]); | |
692 | mutex_unlock(&data->update_lock); | |
693 | ||
694 | return count; | |
695 | } | |
696 | ||
697 | #define SETUP_PWM_DEFAULT 0 | |
698 | #define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */ | |
699 | #define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */ | |
700 | #define SETUP_TEMP_CRITICAL 3 | |
701 | static ssize_t | |
702 | show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) | |
703 | { | |
704 | struct sensor_device_attribute_2 *sensor_attr = | |
705 | to_sensor_dev_attr_2(attr); | |
706 | int nr = sensor_attr->nr; | |
707 | struct w83793_data *data = w83793_update_device(dev); | |
708 | u32 val = 0; | |
709 | ||
47efe877 | 710 | if (nr == SETUP_PWM_DEFAULT) |
6800c3d0 | 711 | val = (data->pwm_default & 0x3f) << 2; |
47efe877 | 712 | else if (nr == SETUP_PWM_UPTIME) |
6800c3d0 | 713 | val = TIME_FROM_REG(data->pwm_uptime); |
47efe877 | 714 | else if (nr == SETUP_PWM_DOWNTIME) |
6800c3d0 | 715 | val = TIME_FROM_REG(data->pwm_downtime); |
47efe877 | 716 | else if (nr == SETUP_TEMP_CRITICAL) |
6800c3d0 | 717 | val = TEMP_FROM_REG(data->temp_critical & 0x7f); |
6800c3d0 RM |
718 | |
719 | return sprintf(buf, "%d\n", val); | |
720 | } | |
721 | ||
722 | static ssize_t | |
723 | store_sf_setup(struct device *dev, struct device_attribute *attr, | |
724 | const char *buf, size_t count) | |
725 | { | |
726 | struct sensor_device_attribute_2 *sensor_attr = | |
727 | to_sensor_dev_attr_2(attr); | |
728 | int nr = sensor_attr->nr; | |
729 | struct i2c_client *client = to_i2c_client(dev); | |
730 | struct w83793_data *data = i2c_get_clientdata(client); | |
47efe877 GR |
731 | long val; |
732 | int err; | |
733 | ||
734 | err = kstrtol(buf, 10, &val); | |
735 | if (err) | |
736 | return err; | |
6800c3d0 RM |
737 | |
738 | mutex_lock(&data->update_lock); | |
47efe877 | 739 | if (nr == SETUP_PWM_DEFAULT) { |
6800c3d0 RM |
740 | data->pwm_default = |
741 | w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0; | |
2a844c14 | 742 | data->pwm_default |= clamp_val(val, 0, 0xff) >> 2; |
6800c3d0 RM |
743 | w83793_write_value(client, W83793_REG_PWM_DEFAULT, |
744 | data->pwm_default); | |
47efe877 GR |
745 | } else if (nr == SETUP_PWM_UPTIME) { |
746 | data->pwm_uptime = TIME_TO_REG(val); | |
6800c3d0 RM |
747 | data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0; |
748 | w83793_write_value(client, W83793_REG_PWM_UPTIME, | |
749 | data->pwm_uptime); | |
47efe877 GR |
750 | } else if (nr == SETUP_PWM_DOWNTIME) { |
751 | data->pwm_downtime = TIME_TO_REG(val); | |
6800c3d0 RM |
752 | data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0; |
753 | w83793_write_value(client, W83793_REG_PWM_DOWNTIME, | |
754 | data->pwm_downtime); | |
755 | } else { /* SETUP_TEMP_CRITICAL */ | |
756 | data->temp_critical = | |
757 | w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80; | |
47efe877 | 758 | data->temp_critical |= TEMP_TO_REG(val, 0, 0x7f); |
6800c3d0 RM |
759 | w83793_write_value(client, W83793_REG_TEMP_CRITICAL, |
760 | data->temp_critical); | |
761 | } | |
762 | ||
763 | mutex_unlock(&data->update_lock); | |
764 | return count; | |
765 | } | |
766 | ||
767 | /* | |
47efe877 GR |
768 | * Temp SmartFan control |
769 | * TEMP_FAN_MAP | |
770 | * Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1... | |
771 | * It's possible two or more temp channels control the same fan, w83793 | |
772 | * always prefers to pick the most critical request and applies it to | |
773 | * the related Fan. | |
774 | * It's possible one fan is not in any mapping of 6 temp channels, this | |
775 | * means the fan is manual mode | |
776 | * | |
777 | * TEMP_PWM_ENABLE | |
778 | * Each temp channel has its own SmartFan mode, and temp channel | |
779 | * control fans that are set by TEMP_FAN_MAP | |
780 | * 0: SmartFanII mode | |
781 | * 1: Thermal Cruise Mode | |
782 | * | |
783 | * TEMP_CRUISE | |
784 | * Target temperature in thermal cruise mode, w83793 will try to turn | |
785 | * fan speed to keep the temperature of target device around this | |
786 | * temperature. | |
787 | * | |
788 | * TEMP_TOLERANCE | |
789 | * If Temp higher or lower than target with this tolerance, w83793 | |
790 | * will take actions to speed up or slow down the fan to keep the | |
791 | * temperature within the tolerance range. | |
792 | */ | |
6800c3d0 RM |
793 | |
794 | #define TEMP_FAN_MAP 0 | |
795 | #define TEMP_PWM_ENABLE 1 | |
796 | #define TEMP_CRUISE 2 | |
797 | #define TEMP_TOLERANCE 3 | |
798 | static ssize_t | |
799 | show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf) | |
800 | { | |
801 | struct sensor_device_attribute_2 *sensor_attr = | |
802 | to_sensor_dev_attr_2(attr); | |
803 | int nr = sensor_attr->nr; | |
804 | int index = sensor_attr->index; | |
805 | struct w83793_data *data = w83793_update_device(dev); | |
806 | u32 val; | |
807 | ||
47efe877 | 808 | if (nr == TEMP_FAN_MAP) { |
6800c3d0 | 809 | val = data->temp_fan_map[index]; |
47efe877 | 810 | } else if (nr == TEMP_PWM_ENABLE) { |
6800c3d0 RM |
811 | /* +2 to transfrom into 2 and 3 to conform with sysfs intf */ |
812 | val = ((data->pwm_enable >> index) & 0x01) + 2; | |
47efe877 | 813 | } else if (nr == TEMP_CRUISE) { |
6800c3d0 RM |
814 | val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f); |
815 | } else { /* TEMP_TOLERANCE */ | |
816 | val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0); | |
817 | val = TEMP_FROM_REG(val & 0x0f); | |
818 | } | |
819 | return sprintf(buf, "%d\n", val); | |
820 | } | |
821 | ||
822 | static ssize_t | |
823 | store_sf_ctrl(struct device *dev, struct device_attribute *attr, | |
824 | const char *buf, size_t count) | |
825 | { | |
826 | struct sensor_device_attribute_2 *sensor_attr = | |
827 | to_sensor_dev_attr_2(attr); | |
828 | int nr = sensor_attr->nr; | |
829 | int index = sensor_attr->index; | |
830 | struct i2c_client *client = to_i2c_client(dev); | |
831 | struct w83793_data *data = i2c_get_clientdata(client); | |
47efe877 GR |
832 | long val; |
833 | int err; | |
834 | ||
835 | err = kstrtol(buf, 10, &val); | |
836 | if (err) | |
837 | return err; | |
6800c3d0 RM |
838 | |
839 | mutex_lock(&data->update_lock); | |
47efe877 | 840 | if (nr == TEMP_FAN_MAP) { |
2a844c14 | 841 | val = clamp_val(val, 0, 255); |
6800c3d0 RM |
842 | w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val); |
843 | data->temp_fan_map[index] = val; | |
47efe877 GR |
844 | } else if (nr == TEMP_PWM_ENABLE) { |
845 | if (val == 2 || val == 3) { | |
6800c3d0 RM |
846 | data->pwm_enable = |
847 | w83793_read_value(client, W83793_REG_PWM_ENABLE); | |
848 | if (val - 2) | |
849 | data->pwm_enable |= 1 << index; | |
850 | else | |
851 | data->pwm_enable &= ~(1 << index); | |
852 | w83793_write_value(client, W83793_REG_PWM_ENABLE, | |
853 | data->pwm_enable); | |
854 | } else { | |
855 | mutex_unlock(&data->update_lock); | |
856 | return -EINVAL; | |
857 | } | |
47efe877 | 858 | } else if (nr == TEMP_CRUISE) { |
6800c3d0 RM |
859 | data->temp_cruise[index] = |
860 | w83793_read_value(client, W83793_REG_TEMP_CRUISE(index)); | |
6800c3d0 | 861 | data->temp_cruise[index] &= 0x80; |
47efe877 | 862 | data->temp_cruise[index] |= TEMP_TO_REG(val, 0, 0x7f); |
6800c3d0 RM |
863 | |
864 | w83793_write_value(client, W83793_REG_TEMP_CRUISE(index), | |
865 | data->temp_cruise[index]); | |
866 | } else { /* TEMP_TOLERANCE */ | |
867 | int i = index >> 1; | |
868 | u8 shift = (index & 0x01) ? 4 : 0; | |
869 | data->tolerance[i] = | |
870 | w83793_read_value(client, W83793_REG_TEMP_TOL(i)); | |
871 | ||
6800c3d0 | 872 | data->tolerance[i] &= ~(0x0f << shift); |
47efe877 | 873 | data->tolerance[i] |= TEMP_TO_REG(val, 0, 0x0f) << shift; |
6800c3d0 RM |
874 | w83793_write_value(client, W83793_REG_TEMP_TOL(i), |
875 | data->tolerance[i]); | |
876 | } | |
877 | ||
878 | mutex_unlock(&data->update_lock); | |
879 | return count; | |
880 | } | |
881 | ||
882 | static ssize_t | |
883 | show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
884 | { | |
885 | struct sensor_device_attribute_2 *sensor_attr = | |
886 | to_sensor_dev_attr_2(attr); | |
887 | int nr = sensor_attr->nr; | |
888 | int index = sensor_attr->index; | |
889 | struct w83793_data *data = w83793_update_device(dev); | |
890 | ||
891 | return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2); | |
892 | } | |
893 | ||
894 | static ssize_t | |
895 | store_sf2_pwm(struct device *dev, struct device_attribute *attr, | |
896 | const char *buf, size_t count) | |
897 | { | |
898 | struct i2c_client *client = to_i2c_client(dev); | |
899 | struct w83793_data *data = i2c_get_clientdata(client); | |
900 | struct sensor_device_attribute_2 *sensor_attr = | |
901 | to_sensor_dev_attr_2(attr); | |
902 | int nr = sensor_attr->nr; | |
903 | int index = sensor_attr->index; | |
47efe877 GR |
904 | unsigned long val; |
905 | int err; | |
906 | ||
907 | err = kstrtoul(buf, 10, &val); | |
908 | if (err) | |
909 | return err; | |
2a844c14 | 910 | val = clamp_val(val, 0, 0xff) >> 2; |
6800c3d0 RM |
911 | |
912 | mutex_lock(&data->update_lock); | |
913 | data->sf2_pwm[index][nr] = | |
914 | w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0; | |
915 | data->sf2_pwm[index][nr] |= val; | |
916 | w83793_write_value(client, W83793_REG_SF2_PWM(index, nr), | |
917 | data->sf2_pwm[index][nr]); | |
918 | mutex_unlock(&data->update_lock); | |
919 | return count; | |
920 | } | |
921 | ||
922 | static ssize_t | |
923 | show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf) | |
924 | { | |
925 | struct sensor_device_attribute_2 *sensor_attr = | |
926 | to_sensor_dev_attr_2(attr); | |
927 | int nr = sensor_attr->nr; | |
928 | int index = sensor_attr->index; | |
929 | struct w83793_data *data = w83793_update_device(dev); | |
930 | ||
931 | return sprintf(buf, "%ld\n", | |
932 | TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f)); | |
933 | } | |
934 | ||
935 | static ssize_t | |
936 | store_sf2_temp(struct device *dev, struct device_attribute *attr, | |
937 | const char *buf, size_t count) | |
938 | { | |
939 | struct i2c_client *client = to_i2c_client(dev); | |
940 | struct w83793_data *data = i2c_get_clientdata(client); | |
941 | struct sensor_device_attribute_2 *sensor_attr = | |
942 | to_sensor_dev_attr_2(attr); | |
943 | int nr = sensor_attr->nr; | |
944 | int index = sensor_attr->index; | |
47efe877 GR |
945 | long val; |
946 | int err; | |
947 | ||
948 | err = kstrtol(buf, 10, &val); | |
949 | if (err) | |
950 | return err; | |
951 | val = TEMP_TO_REG(val, 0, 0x7f); | |
6800c3d0 RM |
952 | |
953 | mutex_lock(&data->update_lock); | |
954 | data->sf2_temp[index][nr] = | |
955 | w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80; | |
956 | data->sf2_temp[index][nr] |= val; | |
957 | w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr), | |
958 | data->sf2_temp[index][nr]); | |
959 | mutex_unlock(&data->update_lock); | |
960 | return count; | |
961 | } | |
962 | ||
963 | /* only Vcore A/B and Vtt have additional 2 bits precision */ | |
964 | static ssize_t | |
965 | show_in(struct device *dev, struct device_attribute *attr, char *buf) | |
966 | { | |
967 | struct sensor_device_attribute_2 *sensor_attr = | |
968 | to_sensor_dev_attr_2(attr); | |
969 | int nr = sensor_attr->nr; | |
970 | int index = sensor_attr->index; | |
971 | struct w83793_data *data = w83793_update_device(dev); | |
972 | u16 val = data->in[index][nr]; | |
973 | ||
974 | if (index < 3) { | |
975 | val <<= 2; | |
976 | val += (data->in_low_bits[nr] >> (index * 2)) & 0x3; | |
977 | } | |
ddca933b GJ |
978 | /* voltage inputs 5VDD and 5VSB needs 150mV offset */ |
979 | val = val * scale_in[index] + scale_in_add[index]; | |
980 | return sprintf(buf, "%d\n", val); | |
6800c3d0 RM |
981 | } |
982 | ||
983 | static ssize_t | |
984 | store_in(struct device *dev, struct device_attribute *attr, | |
985 | const char *buf, size_t count) | |
986 | { | |
987 | struct sensor_device_attribute_2 *sensor_attr = | |
988 | to_sensor_dev_attr_2(attr); | |
989 | int nr = sensor_attr->nr; | |
990 | int index = sensor_attr->index; | |
991 | struct i2c_client *client = to_i2c_client(dev); | |
992 | struct w83793_data *data = i2c_get_clientdata(client); | |
47efe877 GR |
993 | unsigned long val; |
994 | int err; | |
995 | ||
996 | err = kstrtoul(buf, 10, &val); | |
997 | if (err) | |
998 | return err; | |
999 | val = (val + scale_in[index] / 2) / scale_in[index]; | |
6800c3d0 | 1000 | |
6800c3d0 RM |
1001 | mutex_lock(&data->update_lock); |
1002 | if (index > 2) { | |
ddca933b | 1003 | /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */ |
47efe877 | 1004 | if (nr == 1 || nr == 2) |
ddca933b | 1005 | val -= scale_in_add[index] / scale_in[index]; |
2a844c14 | 1006 | val = clamp_val(val, 0, 255); |
6800c3d0 | 1007 | } else { |
2a844c14 | 1008 | val = clamp_val(val, 0, 0x3FF); |
6800c3d0 RM |
1009 | data->in_low_bits[nr] = |
1010 | w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]); | |
1011 | data->in_low_bits[nr] &= ~(0x03 << (2 * index)); | |
1012 | data->in_low_bits[nr] |= (val & 0x03) << (2 * index); | |
1013 | w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr], | |
1014 | data->in_low_bits[nr]); | |
1015 | val >>= 2; | |
1016 | } | |
1017 | data->in[index][nr] = val; | |
1018 | w83793_write_value(client, W83793_REG_IN[index][nr], | |
1019 | data->in[index][nr]); | |
1020 | mutex_unlock(&data->update_lock); | |
1021 | return count; | |
1022 | } | |
1023 | ||
1024 | #define NOT_USED -1 | |
1025 | ||
1026 | #define SENSOR_ATTR_IN(index) \ | |
1027 | SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ | |
1028 | IN_READ, index), \ | |
1029 | SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ | |
1030 | store_in, IN_MAX, index), \ | |
1031 | SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ | |
1032 | store_in, IN_LOW, index), \ | |
1033 | SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ | |
1034 | NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \ | |
1035 | SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ | |
1036 | show_alarm_beep, store_beep, BEEP_ENABLE, \ | |
1037 | index + ((index > 2) ? 1 : 0)) | |
1038 | ||
1039 | #define SENSOR_ATTR_FAN(index) \ | |
1040 | SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ | |
1041 | NULL, ALARM_STATUS, index + 17), \ | |
1042 | SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ | |
1043 | show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \ | |
1044 | SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ | |
1045 | NULL, FAN_INPUT, index - 1), \ | |
1046 | SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ | |
1047 | show_fan, store_fan_min, FAN_MIN, index - 1) | |
1048 | ||
1049 | #define SENSOR_ATTR_PWM(index) \ | |
1050 | SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ | |
1051 | store_pwm, PWM_DUTY, index - 1), \ | |
1052 | SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ | |
1053 | show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ | |
1054 | SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ | |
1055 | show_pwm, store_pwm, PWM_START, index - 1), \ | |
1056 | SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ | |
1057 | show_pwm, store_pwm, PWM_STOP_TIME, index - 1) | |
1058 | ||
1059 | #define SENSOR_ATTR_TEMP(index) \ | |
1060 | SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \ | |
1061 | show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ | |
1062 | SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ | |
1063 | NULL, TEMP_READ, index - 1), \ | |
1064 | SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ | |
1065 | store_temp, TEMP_CRIT, index - 1), \ | |
1066 | SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ | |
1067 | show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ | |
1068 | SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \ | |
1069 | store_temp, TEMP_WARN, index - 1), \ | |
1070 | SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \ | |
1071 | show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ | |
1072 | SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ | |
1073 | show_alarm_beep, NULL, ALARM_STATUS, index + 11), \ | |
1074 | SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ | |
1075 | show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \ | |
1076 | SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \ | |
1077 | S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \ | |
1078 | TEMP_FAN_MAP, index - 1), \ | |
1079 | SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ | |
1080 | show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \ | |
1081 | index - 1), \ | |
1082 | SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \ | |
1083 | show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \ | |
1084 | SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\ | |
1085 | store_sf_ctrl, TEMP_TOLERANCE, index - 1), \ | |
1086 | SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ | |
1087 | show_sf2_pwm, store_sf2_pwm, 0, index - 1), \ | |
1088 | SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ | |
1089 | show_sf2_pwm, store_sf2_pwm, 1, index - 1), \ | |
1090 | SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ | |
1091 | show_sf2_pwm, store_sf2_pwm, 2, index - 1), \ | |
1092 | SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ | |
1093 | show_sf2_pwm, store_sf2_pwm, 3, index - 1), \ | |
1094 | SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ | |
1095 | show_sf2_pwm, store_sf2_pwm, 4, index - 1), \ | |
1096 | SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ | |
1097 | show_sf2_pwm, store_sf2_pwm, 5, index - 1), \ | |
1098 | SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ | |
1099 | show_sf2_pwm, store_sf2_pwm, 6, index - 1), \ | |
1100 | SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ | |
1101 | show_sf2_temp, store_sf2_temp, 0, index - 1), \ | |
1102 | SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ | |
1103 | show_sf2_temp, store_sf2_temp, 1, index - 1), \ | |
1104 | SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ | |
1105 | show_sf2_temp, store_sf2_temp, 2, index - 1), \ | |
1106 | SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ | |
1107 | show_sf2_temp, store_sf2_temp, 3, index - 1), \ | |
1108 | SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ | |
1109 | show_sf2_temp, store_sf2_temp, 4, index - 1), \ | |
1110 | SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ | |
1111 | show_sf2_temp, store_sf2_temp, 5, index - 1), \ | |
1112 | SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ | |
1113 | show_sf2_temp, store_sf2_temp, 6, index - 1) | |
1114 | ||
1115 | static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = { | |
1116 | SENSOR_ATTR_IN(0), | |
1117 | SENSOR_ATTR_IN(1), | |
1118 | SENSOR_ATTR_IN(2), | |
1119 | SENSOR_ATTR_IN(3), | |
1120 | SENSOR_ATTR_IN(4), | |
1121 | SENSOR_ATTR_IN(5), | |
1122 | SENSOR_ATTR_IN(6), | |
1123 | SENSOR_ATTR_IN(7), | |
1124 | SENSOR_ATTR_IN(8), | |
1125 | SENSOR_ATTR_IN(9), | |
6800c3d0 RM |
1126 | SENSOR_ATTR_FAN(1), |
1127 | SENSOR_ATTR_FAN(2), | |
1128 | SENSOR_ATTR_FAN(3), | |
1129 | SENSOR_ATTR_FAN(4), | |
1130 | SENSOR_ATTR_FAN(5), | |
1131 | SENSOR_ATTR_PWM(1), | |
1132 | SENSOR_ATTR_PWM(2), | |
1133 | SENSOR_ATTR_PWM(3), | |
1134 | }; | |
1135 | ||
46bed4df GJ |
1136 | static struct sensor_device_attribute_2 w83793_temp[] = { |
1137 | SENSOR_ATTR_TEMP(1), | |
1138 | SENSOR_ATTR_TEMP(2), | |
1139 | SENSOR_ATTR_TEMP(3), | |
1140 | SENSOR_ATTR_TEMP(4), | |
1141 | SENSOR_ATTR_TEMP(5), | |
1142 | SENSOR_ATTR_TEMP(6), | |
1143 | }; | |
1144 | ||
6800c3d0 RM |
1145 | /* Fan6-Fan12 */ |
1146 | static struct sensor_device_attribute_2 w83793_left_fan[] = { | |
1147 | SENSOR_ATTR_FAN(6), | |
1148 | SENSOR_ATTR_FAN(7), | |
1149 | SENSOR_ATTR_FAN(8), | |
1150 | SENSOR_ATTR_FAN(9), | |
1151 | SENSOR_ATTR_FAN(10), | |
1152 | SENSOR_ATTR_FAN(11), | |
1153 | SENSOR_ATTR_FAN(12), | |
1154 | }; | |
1155 | ||
1156 | /* Pwm4-Pwm8 */ | |
1157 | static struct sensor_device_attribute_2 w83793_left_pwm[] = { | |
1158 | SENSOR_ATTR_PWM(4), | |
1159 | SENSOR_ATTR_PWM(5), | |
1160 | SENSOR_ATTR_PWM(6), | |
1161 | SENSOR_ATTR_PWM(7), | |
1162 | SENSOR_ATTR_PWM(8), | |
1163 | }; | |
1164 | ||
c70a8c34 | 1165 | static struct sensor_device_attribute_2 w83793_vid[] = { |
6800c3d0 RM |
1166 | SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0), |
1167 | SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1), | |
c70a8c34 | 1168 | }; |
93c75a4a | 1169 | static DEVICE_ATTR(vrm, S_IWUSR | S_IRUGO, show_vrm, store_vrm); |
c70a8c34 GJ |
1170 | |
1171 | static struct sensor_device_attribute_2 sda_single_files[] = { | |
a516dc3e | 1172 | SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep, |
6800c3d0 RM |
1173 | store_chassis_clear, ALARM_STATUS, 30), |
1174 | SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable, | |
1175 | store_beep_enable, NOT_USED, NOT_USED), | |
1176 | SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, | |
1177 | store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), | |
1178 | SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, | |
1179 | store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), | |
1180 | SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, | |
1181 | store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), | |
1182 | SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup, | |
1183 | store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED), | |
1184 | }; | |
1185 | ||
1186 | static void w83793_init_client(struct i2c_client *client) | |
1187 | { | |
47efe877 | 1188 | if (reset) |
6800c3d0 | 1189 | w83793_write_value(client, W83793_REG_CONFIG, 0x80); |
6800c3d0 RM |
1190 | |
1191 | /* Start monitoring */ | |
1192 | w83793_write_value(client, W83793_REG_CONFIG, | |
1193 | w83793_read_value(client, W83793_REG_CONFIG) | 0x01); | |
5852f960 SA |
1194 | } |
1195 | ||
1196 | /* | |
1197 | * Watchdog routines | |
1198 | */ | |
1199 | ||
1200 | static int watchdog_set_timeout(struct w83793_data *data, int timeout) | |
1201 | { | |
1202 | int ret, mtimeout; | |
1203 | ||
1204 | mtimeout = DIV_ROUND_UP(timeout, 60); | |
1205 | ||
1206 | if (mtimeout > 255) | |
1207 | return -EINVAL; | |
1208 | ||
1209 | mutex_lock(&data->watchdog_lock); | |
1210 | if (!data->client) { | |
1211 | ret = -ENODEV; | |
1212 | goto leave; | |
1213 | } | |
1214 | ||
1215 | data->watchdog_timeout = mtimeout; | |
1216 | ||
1217 | /* Set Timeout value (in Minutes) */ | |
1218 | w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT, | |
1219 | data->watchdog_timeout); | |
1220 | ||
1221 | ret = mtimeout * 60; | |
1222 | ||
1223 | leave: | |
1224 | mutex_unlock(&data->watchdog_lock); | |
1225 | return ret; | |
1226 | } | |
1227 | ||
1228 | static int watchdog_get_timeout(struct w83793_data *data) | |
1229 | { | |
1230 | int timeout; | |
1231 | ||
1232 | mutex_lock(&data->watchdog_lock); | |
1233 | timeout = data->watchdog_timeout * 60; | |
1234 | mutex_unlock(&data->watchdog_lock); | |
1235 | ||
1236 | return timeout; | |
1237 | } | |
1238 | ||
1239 | static int watchdog_trigger(struct w83793_data *data) | |
1240 | { | |
1241 | int ret = 0; | |
1242 | ||
1243 | mutex_lock(&data->watchdog_lock); | |
1244 | if (!data->client) { | |
1245 | ret = -ENODEV; | |
1246 | goto leave; | |
1247 | } | |
1248 | ||
1249 | /* Set Timeout value (in Minutes) */ | |
1250 | w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT, | |
1251 | data->watchdog_timeout); | |
1252 | ||
1253 | leave: | |
1254 | mutex_unlock(&data->watchdog_lock); | |
1255 | return ret; | |
1256 | } | |
1257 | ||
1258 | static int watchdog_enable(struct w83793_data *data) | |
1259 | { | |
1260 | int ret = 0; | |
1261 | ||
1262 | mutex_lock(&data->watchdog_lock); | |
1263 | if (!data->client) { | |
1264 | ret = -ENODEV; | |
1265 | goto leave; | |
1266 | } | |
1267 | ||
1268 | /* Set initial timeout */ | |
1269 | w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT, | |
1270 | data->watchdog_timeout); | |
1271 | ||
1272 | /* Enable Soft Watchdog */ | |
1273 | w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0x55); | |
1274 | ||
1275 | leave: | |
1276 | mutex_unlock(&data->watchdog_lock); | |
1277 | return ret; | |
1278 | } | |
1279 | ||
1280 | static int watchdog_disable(struct w83793_data *data) | |
1281 | { | |
1282 | int ret = 0; | |
1283 | ||
1284 | mutex_lock(&data->watchdog_lock); | |
1285 | if (!data->client) { | |
1286 | ret = -ENODEV; | |
1287 | goto leave; | |
1288 | } | |
1289 | ||
1290 | /* Disable Soft Watchdog */ | |
1291 | w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0xAA); | |
1292 | ||
1293 | leave: | |
1294 | mutex_unlock(&data->watchdog_lock); | |
1295 | return ret; | |
1296 | } | |
1297 | ||
1298 | static int watchdog_open(struct inode *inode, struct file *filp) | |
1299 | { | |
1300 | struct w83793_data *pos, *data = NULL; | |
1301 | int watchdog_is_open; | |
1302 | ||
47efe877 GR |
1303 | /* |
1304 | * We get called from drivers/char/misc.c with misc_mtx hold, and we | |
1305 | * call misc_register() from w83793_probe() with watchdog_data_mutex | |
1306 | * hold, as misc_register() takes the misc_mtx lock, this is a possible | |
1307 | * deadlock, so we use mutex_trylock here. | |
1308 | */ | |
5852f960 SA |
1309 | if (!mutex_trylock(&watchdog_data_mutex)) |
1310 | return -ERESTARTSYS; | |
1311 | list_for_each_entry(pos, &watchdog_data_list, list) { | |
1312 | if (pos->watchdog_miscdev.minor == iminor(inode)) { | |
1313 | data = pos; | |
1314 | break; | |
1315 | } | |
1316 | } | |
1317 | ||
1318 | /* Check, if device is already open */ | |
1319 | watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open); | |
1320 | ||
47efe877 GR |
1321 | /* |
1322 | * Increase data reference counter (if not already done). | |
1323 | * Note we can never not have found data, so we don't check for this | |
1324 | */ | |
5852f960 SA |
1325 | if (!watchdog_is_open) |
1326 | kref_get(&data->kref); | |
1327 | ||
1328 | mutex_unlock(&watchdog_data_mutex); | |
1329 | ||
1330 | /* Check, if device is already open and possibly issue error */ | |
1331 | if (watchdog_is_open) | |
1332 | return -EBUSY; | |
1333 | ||
1334 | /* Enable Soft Watchdog */ | |
1335 | watchdog_enable(data); | |
1336 | ||
1337 | /* Store pointer to data into filp's private data */ | |
1338 | filp->private_data = data; | |
1339 | ||
1340 | return nonseekable_open(inode, filp); | |
1341 | } | |
1342 | ||
1343 | static int watchdog_close(struct inode *inode, struct file *filp) | |
1344 | { | |
1345 | struct w83793_data *data = filp->private_data; | |
6800c3d0 | 1346 | |
5852f960 SA |
1347 | if (data->watchdog_expect_close) { |
1348 | watchdog_disable(data); | |
1349 | data->watchdog_expect_close = 0; | |
1350 | } else { | |
1351 | watchdog_trigger(data); | |
1352 | dev_crit(&data->client->dev, | |
1353 | "unexpected close, not stopping watchdog!\n"); | |
1354 | } | |
1355 | ||
1356 | clear_bit(0, &data->watchdog_is_open); | |
1357 | ||
1358 | /* Decrease data reference counter */ | |
1359 | mutex_lock(&watchdog_data_mutex); | |
1360 | kref_put(&data->kref, w83793_release_resources); | |
1361 | mutex_unlock(&watchdog_data_mutex); | |
1362 | ||
1363 | return 0; | |
1364 | } | |
1365 | ||
1366 | static ssize_t watchdog_write(struct file *filp, const char __user *buf, | |
1367 | size_t count, loff_t *offset) | |
1368 | { | |
3f7cd7ea | 1369 | ssize_t ret; |
5852f960 SA |
1370 | struct w83793_data *data = filp->private_data; |
1371 | ||
1372 | if (count) { | |
1373 | if (!nowayout) { | |
1374 | size_t i; | |
1375 | ||
1376 | /* Clear it in case it was set with a previous write */ | |
1377 | data->watchdog_expect_close = 0; | |
1378 | ||
1379 | for (i = 0; i != count; i++) { | |
1380 | char c; | |
1381 | if (get_user(c, buf + i)) | |
1382 | return -EFAULT; | |
1383 | if (c == 'V') | |
1384 | data->watchdog_expect_close = 1; | |
1385 | } | |
1386 | } | |
1387 | ret = watchdog_trigger(data); | |
1388 | if (ret < 0) | |
1389 | return ret; | |
1390 | } | |
1391 | return count; | |
1392 | } | |
1393 | ||
55929332 AB |
1394 | static long watchdog_ioctl(struct file *filp, unsigned int cmd, |
1395 | unsigned long arg) | |
5852f960 | 1396 | { |
36c7fe13 | 1397 | struct watchdog_info ident = { |
5852f960 SA |
1398 | .options = WDIOF_KEEPALIVEPING | |
1399 | WDIOF_SETTIMEOUT | | |
1400 | WDIOF_CARDRESET, | |
1401 | .identity = "w83793 watchdog" | |
1402 | }; | |
1403 | ||
1404 | int val, ret = 0; | |
1405 | struct w83793_data *data = filp->private_data; | |
1406 | ||
1407 | switch (cmd) { | |
1408 | case WDIOC_GETSUPPORT: | |
1409 | if (!nowayout) | |
1410 | ident.options |= WDIOF_MAGICCLOSE; | |
1411 | if (copy_to_user((void __user *)arg, &ident, sizeof(ident))) | |
1412 | ret = -EFAULT; | |
1413 | break; | |
1414 | ||
1415 | case WDIOC_GETSTATUS: | |
1416 | val = data->watchdog_caused_reboot ? WDIOF_CARDRESET : 0; | |
1417 | ret = put_user(val, (int __user *)arg); | |
1418 | break; | |
1419 | ||
1420 | case WDIOC_GETBOOTSTATUS: | |
1421 | ret = put_user(0, (int __user *)arg); | |
1422 | break; | |
1423 | ||
1424 | case WDIOC_KEEPALIVE: | |
1425 | ret = watchdog_trigger(data); | |
1426 | break; | |
1427 | ||
1428 | case WDIOC_GETTIMEOUT: | |
1429 | val = watchdog_get_timeout(data); | |
1430 | ret = put_user(val, (int __user *)arg); | |
1431 | break; | |
1432 | ||
1433 | case WDIOC_SETTIMEOUT: | |
1434 | if (get_user(val, (int __user *)arg)) { | |
1435 | ret = -EFAULT; | |
1436 | break; | |
1437 | } | |
1438 | ret = watchdog_set_timeout(data, val); | |
1439 | if (ret > 0) | |
1440 | ret = put_user(ret, (int __user *)arg); | |
1441 | break; | |
1442 | ||
1443 | case WDIOC_SETOPTIONS: | |
1444 | if (get_user(val, (int __user *)arg)) { | |
1445 | ret = -EFAULT; | |
1446 | break; | |
1447 | } | |
1448 | ||
1449 | if (val & WDIOS_DISABLECARD) | |
1450 | ret = watchdog_disable(data); | |
1451 | else if (val & WDIOS_ENABLECARD) | |
1452 | ret = watchdog_enable(data); | |
1453 | else | |
1454 | ret = -EINVAL; | |
1455 | ||
1456 | break; | |
1457 | default: | |
1458 | ret = -ENOTTY; | |
1459 | } | |
5852f960 SA |
1460 | return ret; |
1461 | } | |
1462 | ||
1463 | static const struct file_operations watchdog_fops = { | |
1464 | .owner = THIS_MODULE, | |
1465 | .llseek = no_llseek, | |
1466 | .open = watchdog_open, | |
1467 | .release = watchdog_close, | |
1468 | .write = watchdog_write, | |
55929332 | 1469 | .unlocked_ioctl = watchdog_ioctl, |
5852f960 SA |
1470 | }; |
1471 | ||
1472 | /* | |
1473 | * Notifier for system down | |
1474 | */ | |
1475 | ||
1476 | static int watchdog_notify_sys(struct notifier_block *this, unsigned long code, | |
1477 | void *unused) | |
1478 | { | |
1479 | struct w83793_data *data = NULL; | |
1480 | ||
1481 | if (code == SYS_DOWN || code == SYS_HALT) { | |
1482 | ||
1483 | /* Disable each registered watchdog */ | |
1484 | mutex_lock(&watchdog_data_mutex); | |
1485 | list_for_each_entry(data, &watchdog_data_list, list) { | |
1486 | if (data->watchdog_miscdev.minor) | |
1487 | watchdog_disable(data); | |
1488 | } | |
1489 | mutex_unlock(&watchdog_data_mutex); | |
1490 | } | |
1491 | ||
1492 | return NOTIFY_DONE; | |
6800c3d0 RM |
1493 | } |
1494 | ||
5852f960 SA |
1495 | /* |
1496 | * The WDT needs to learn about soft shutdowns in order to | |
1497 | * turn the timebomb registers off. | |
1498 | */ | |
1499 | ||
1500 | static struct notifier_block watchdog_notifier = { | |
1501 | .notifier_call = watchdog_notify_sys, | |
1502 | }; | |
1503 | ||
1504 | /* | |
1505 | * Init / remove routines | |
1506 | */ | |
1507 | ||
a7f13a6e | 1508 | static int w83793_remove(struct i2c_client *client) |
6800c3d0 RM |
1509 | { |
1510 | struct w83793_data *data = i2c_get_clientdata(client); | |
1511 | struct device *dev = &client->dev; | |
5852f960 SA |
1512 | int i, tmp; |
1513 | ||
1514 | /* Unregister the watchdog (if registered) */ | |
1515 | if (data->watchdog_miscdev.minor) { | |
1516 | misc_deregister(&data->watchdog_miscdev); | |
1517 | ||
1518 | if (data->watchdog_is_open) { | |
1519 | dev_warn(&client->dev, | |
1520 | "i2c client detached with watchdog open! " | |
1521 | "Stopping watchdog.\n"); | |
1522 | watchdog_disable(data); | |
1523 | } | |
1524 | ||
1525 | mutex_lock(&watchdog_data_mutex); | |
1526 | list_del(&data->list); | |
1527 | mutex_unlock(&watchdog_data_mutex); | |
1528 | ||
1529 | /* Tell the watchdog code the client is gone */ | |
1530 | mutex_lock(&data->watchdog_lock); | |
1531 | data->client = NULL; | |
1532 | mutex_unlock(&data->watchdog_lock); | |
1533 | } | |
1534 | ||
1535 | /* Reset Configuration Register to Disable Watch Dog Registers */ | |
1536 | tmp = w83793_read_value(client, W83793_REG_CONFIG); | |
1537 | w83793_write_value(client, W83793_REG_CONFIG, tmp & ~0x04); | |
1538 | ||
1539 | unregister_reboot_notifier(&watchdog_notifier); | |
6800c3d0 | 1540 | |
a7f13a6e | 1541 | hwmon_device_unregister(data->hwmon_dev); |
6800c3d0 | 1542 | |
a7f13a6e JD |
1543 | for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) |
1544 | device_remove_file(dev, | |
1545 | &w83793_sensor_attr_2[i].dev_attr); | |
6800c3d0 | 1546 | |
a7f13a6e JD |
1547 | for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) |
1548 | device_remove_file(dev, &sda_single_files[i].dev_attr); | |
6800c3d0 | 1549 | |
a7f13a6e JD |
1550 | for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) |
1551 | device_remove_file(dev, &w83793_vid[i].dev_attr); | |
1552 | device_remove_file(dev, &dev_attr_vrm); | |
c70a8c34 | 1553 | |
a7f13a6e JD |
1554 | for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++) |
1555 | device_remove_file(dev, &w83793_left_fan[i].dev_attr); | |
6800c3d0 | 1556 | |
a7f13a6e JD |
1557 | for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++) |
1558 | device_remove_file(dev, &w83793_left_pwm[i].dev_attr); | |
46bed4df | 1559 | |
a7f13a6e JD |
1560 | for (i = 0; i < ARRAY_SIZE(w83793_temp); i++) |
1561 | device_remove_file(dev, &w83793_temp[i].dev_attr); | |
6800c3d0 | 1562 | |
a7f13a6e JD |
1563 | if (data->lm75[0] != NULL) |
1564 | i2c_unregister_device(data->lm75[0]); | |
1565 | if (data->lm75[1] != NULL) | |
1566 | i2c_unregister_device(data->lm75[1]); | |
6800c3d0 | 1567 | |
5852f960 SA |
1568 | /* Decrease data reference counter */ |
1569 | mutex_lock(&watchdog_data_mutex); | |
1570 | kref_put(&data->kref, w83793_release_resources); | |
1571 | mutex_unlock(&watchdog_data_mutex); | |
6800c3d0 RM |
1572 | |
1573 | return 0; | |
1574 | } | |
1575 | ||
1576 | static int | |
a7f13a6e | 1577 | w83793_detect_subclients(struct i2c_client *client) |
6800c3d0 RM |
1578 | { |
1579 | int i, id, err; | |
a7f13a6e | 1580 | int address = client->addr; |
6800c3d0 | 1581 | u8 tmp; |
a7f13a6e | 1582 | struct i2c_adapter *adapter = client->adapter; |
6800c3d0 RM |
1583 | struct w83793_data *data = i2c_get_clientdata(client); |
1584 | ||
1585 | id = i2c_adapter_id(adapter); | |
1586 | if (force_subclients[0] == id && force_subclients[1] == address) { | |
1587 | for (i = 2; i <= 3; i++) { | |
1588 | if (force_subclients[i] < 0x48 | |
1589 | || force_subclients[i] > 0x4f) { | |
1590 | dev_err(&client->dev, | |
1591 | "invalid subclient " | |
1592 | "address %d; must be 0x48-0x4f\n", | |
1593 | force_subclients[i]); | |
1594 | err = -EINVAL; | |
1595 | goto ERROR_SC_0; | |
1596 | } | |
1597 | } | |
1598 | w83793_write_value(client, W83793_REG_I2C_SUBADDR, | |
1599 | (force_subclients[2] & 0x07) | | |
1600 | ((force_subclients[3] & 0x07) << 4)); | |
1601 | } | |
1602 | ||
1603 | tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR); | |
47efe877 | 1604 | if (!(tmp & 0x08)) |
a7f13a6e | 1605 | data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7)); |
6800c3d0 RM |
1606 | if (!(tmp & 0x80)) { |
1607 | if ((data->lm75[0] != NULL) | |
1608 | && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) { | |
1609 | dev_err(&client->dev, | |
1610 | "duplicate addresses 0x%x, " | |
1611 | "use force_subclients\n", data->lm75[0]->addr); | |
1612 | err = -ENODEV; | |
1613 | goto ERROR_SC_1; | |
1614 | } | |
a7f13a6e JD |
1615 | data->lm75[1] = i2c_new_dummy(adapter, |
1616 | 0x48 + ((tmp >> 4) & 0x7)); | |
6800c3d0 RM |
1617 | } |
1618 | ||
1619 | return 0; | |
1620 | ||
1621 | /* Undo inits in case of errors */ | |
1622 | ||
1623 | ERROR_SC_1: | |
a7f13a6e JD |
1624 | if (data->lm75[0] != NULL) |
1625 | i2c_unregister_device(data->lm75[0]); | |
6800c3d0 RM |
1626 | ERROR_SC_0: |
1627 | return err; | |
1628 | } | |
1629 | ||
a7f13a6e | 1630 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
310ec792 | 1631 | static int w83793_detect(struct i2c_client *client, |
a7f13a6e | 1632 | struct i2c_board_info *info) |
6800c3d0 | 1633 | { |
52df6440 | 1634 | u8 tmp, bank, chip_id; |
a7f13a6e JD |
1635 | struct i2c_adapter *adapter = client->adapter; |
1636 | unsigned short address = client->addr; | |
6800c3d0 | 1637 | |
47efe877 | 1638 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) |
a7f13a6e | 1639 | return -ENODEV; |
6800c3d0 | 1640 | |
a7f13a6e | 1641 | bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL); |
6800c3d0 | 1642 | |
52df6440 JD |
1643 | tmp = bank & 0x80 ? 0x5c : 0xa3; |
1644 | /* Check Winbond vendor ID */ | |
1645 | if (tmp != i2c_smbus_read_byte_data(client, W83793_REG_VENDORID)) { | |
1646 | pr_debug("w83793: Detection failed at check vendor id\n"); | |
1647 | return -ENODEV; | |
6800c3d0 RM |
1648 | } |
1649 | ||
47efe877 GR |
1650 | /* |
1651 | * If Winbond chip, address of chip and W83793_REG_I2C_ADDR | |
1652 | * should match | |
1653 | */ | |
52df6440 JD |
1654 | if ((bank & 0x07) == 0 |
1655 | && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) != | |
1656 | (address << 1)) { | |
1657 | pr_debug("w83793: Detection failed at check i2c addr\n"); | |
1658 | return -ENODEV; | |
6800c3d0 RM |
1659 | } |
1660 | ||
52df6440 JD |
1661 | /* Determine the chip type now */ |
1662 | chip_id = i2c_smbus_read_byte_data(client, W83793_REG_CHIPID); | |
1663 | if (chip_id != 0x7b) | |
1664 | return -ENODEV; | |
1665 | ||
a7f13a6e JD |
1666 | strlcpy(info->type, "w83793", I2C_NAME_SIZE); |
1667 | ||
1668 | return 0; | |
1669 | } | |
6800c3d0 | 1670 | |
a7f13a6e JD |
1671 | static int w83793_probe(struct i2c_client *client, |
1672 | const struct i2c_device_id *id) | |
1673 | { | |
1674 | struct device *dev = &client->dev; | |
5852f960 | 1675 | const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 }; |
a7f13a6e JD |
1676 | struct w83793_data *data; |
1677 | int i, tmp, val, err; | |
1678 | int files_fan = ARRAY_SIZE(w83793_left_fan) / 7; | |
1679 | int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5; | |
1680 | int files_temp = ARRAY_SIZE(w83793_temp) / 6; | |
1681 | ||
1682 | data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL); | |
1683 | if (!data) { | |
1684 | err = -ENOMEM; | |
1685 | goto exit; | |
1686 | } | |
1687 | ||
1688 | i2c_set_clientdata(client, data); | |
1689 | data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL); | |
6800c3d0 | 1690 | mutex_init(&data->update_lock); |
5852f960 SA |
1691 | mutex_init(&data->watchdog_lock); |
1692 | INIT_LIST_HEAD(&data->list); | |
1693 | kref_init(&data->kref); | |
1694 | ||
47efe877 GR |
1695 | /* |
1696 | * Store client pointer in our data struct for watchdog usage | |
1697 | * (where the client is found through a data ptr instead of the | |
1698 | * otherway around) | |
1699 | */ | |
5852f960 | 1700 | data->client = client; |
6800c3d0 | 1701 | |
a7f13a6e JD |
1702 | err = w83793_detect_subclients(client); |
1703 | if (err) | |
6800c3d0 RM |
1704 | goto free_mem; |
1705 | ||
6800c3d0 RM |
1706 | /* Initialize the chip */ |
1707 | w83793_init_client(client); | |
1708 | ||
6800c3d0 | 1709 | /* |
47efe877 GR |
1710 | * Only fan 1-5 has their own input pins, |
1711 | * Pwm 1-3 has their own pins | |
6800c3d0 RM |
1712 | */ |
1713 | data->has_fan = 0x1f; | |
1714 | data->has_pwm = 0x07; | |
1715 | tmp = w83793_read_value(client, W83793_REG_MFC); | |
1716 | val = w83793_read_value(client, W83793_REG_FANIN_CTRL); | |
1717 | ||
1718 | /* check the function of pins 49-56 */ | |
93c75a4a JD |
1719 | if (tmp & 0x80) { |
1720 | data->has_vid |= 0x2; /* has VIDB */ | |
1721 | } else { | |
6800c3d0 RM |
1722 | data->has_pwm |= 0x18; /* pwm 4,5 */ |
1723 | if (val & 0x01) { /* fan 6 */ | |
1724 | data->has_fan |= 0x20; | |
1725 | data->has_pwm |= 0x20; | |
1726 | } | |
1727 | if (val & 0x02) { /* fan 7 */ | |
1728 | data->has_fan |= 0x40; | |
1729 | data->has_pwm |= 0x40; | |
1730 | } | |
1731 | if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */ | |
1732 | data->has_fan |= 0x80; | |
1733 | data->has_pwm |= 0x80; | |
1734 | } | |
1735 | } | |
1736 | ||
93c75a4a JD |
1737 | /* check the function of pins 37-40 */ |
1738 | if (!(tmp & 0x29)) | |
1739 | data->has_vid |= 0x1; /* has VIDA */ | |
6800c3d0 RM |
1740 | if (0x08 == (tmp & 0x0c)) { |
1741 | if (val & 0x08) /* fan 9 */ | |
1742 | data->has_fan |= 0x100; | |
1743 | if (val & 0x10) /* fan 10 */ | |
1744 | data->has_fan |= 0x200; | |
1745 | } | |
6800c3d0 RM |
1746 | if (0x20 == (tmp & 0x30)) { |
1747 | if (val & 0x20) /* fan 11 */ | |
1748 | data->has_fan |= 0x400; | |
1749 | if (val & 0x40) /* fan 12 */ | |
1750 | data->has_fan |= 0x800; | |
1751 | } | |
1752 | ||
1753 | if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */ | |
1754 | data->has_fan |= 0x80; | |
1755 | data->has_pwm |= 0x80; | |
1756 | } | |
1757 | ||
c9294315 RM |
1758 | tmp = w83793_read_value(client, W83793_REG_FANIN_SEL); |
1759 | if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */ | |
1760 | data->has_fan |= 0x100; | |
1761 | } | |
1762 | if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */ | |
1763 | data->has_fan |= 0x200; | |
1764 | } | |
1765 | if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */ | |
1766 | data->has_fan |= 0x400; | |
1767 | } | |
1768 | if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */ | |
1769 | data->has_fan |= 0x800; | |
1770 | } | |
1771 | ||
46bed4df | 1772 | /* check the temp1-6 mode, ignore former AMDSI selected inputs */ |
47efe877 | 1773 | tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[0]); |
46bed4df GJ |
1774 | if (tmp & 0x01) |
1775 | data->has_temp |= 0x01; | |
1776 | if (tmp & 0x04) | |
1777 | data->has_temp |= 0x02; | |
1778 | if (tmp & 0x10) | |
1779 | data->has_temp |= 0x04; | |
1780 | if (tmp & 0x40) | |
1781 | data->has_temp |= 0x08; | |
1782 | ||
47efe877 | 1783 | tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[1]); |
46bed4df GJ |
1784 | if (tmp & 0x01) |
1785 | data->has_temp |= 0x10; | |
1786 | if (tmp & 0x02) | |
1787 | data->has_temp |= 0x20; | |
1788 | ||
6800c3d0 RM |
1789 | /* Register sysfs hooks */ |
1790 | for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) { | |
1791 | err = device_create_file(dev, | |
1792 | &w83793_sensor_attr_2[i].dev_attr); | |
1793 | if (err) | |
1794 | goto exit_remove; | |
1795 | } | |
1796 | ||
c70a8c34 GJ |
1797 | for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) { |
1798 | if (!(data->has_vid & (1 << i))) | |
1799 | continue; | |
1800 | err = device_create_file(dev, &w83793_vid[i].dev_attr); | |
1801 | if (err) | |
1802 | goto exit_remove; | |
1803 | } | |
93c75a4a JD |
1804 | if (data->has_vid) { |
1805 | data->vrm = vid_which_vrm(); | |
1806 | err = device_create_file(dev, &dev_attr_vrm); | |
1807 | if (err) | |
1808 | goto exit_remove; | |
1809 | } | |
c70a8c34 | 1810 | |
6800c3d0 RM |
1811 | for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { |
1812 | err = device_create_file(dev, &sda_single_files[i].dev_attr); | |
1813 | if (err) | |
1814 | goto exit_remove; | |
1815 | ||
1816 | } | |
1817 | ||
46bed4df GJ |
1818 | for (i = 0; i < 6; i++) { |
1819 | int j; | |
1820 | if (!(data->has_temp & (1 << i))) | |
1821 | continue; | |
1822 | for (j = 0; j < files_temp; j++) { | |
1823 | err = device_create_file(dev, | |
1824 | &w83793_temp[(i) * files_temp | |
1825 | + j].dev_attr); | |
1826 | if (err) | |
1827 | goto exit_remove; | |
1828 | } | |
1829 | } | |
1830 | ||
6800c3d0 RM |
1831 | for (i = 5; i < 12; i++) { |
1832 | int j; | |
1833 | if (!(data->has_fan & (1 << i))) | |
1834 | continue; | |
1835 | for (j = 0; j < files_fan; j++) { | |
1836 | err = device_create_file(dev, | |
1837 | &w83793_left_fan[(i - 5) * files_fan | |
1838 | + j].dev_attr); | |
1839 | if (err) | |
1840 | goto exit_remove; | |
1841 | } | |
1842 | } | |
1843 | ||
1844 | for (i = 3; i < 8; i++) { | |
1845 | int j; | |
1846 | if (!(data->has_pwm & (1 << i))) | |
1847 | continue; | |
1848 | for (j = 0; j < files_pwm; j++) { | |
1849 | err = device_create_file(dev, | |
1850 | &w83793_left_pwm[(i - 3) * files_pwm | |
1851 | + j].dev_attr); | |
1852 | if (err) | |
1853 | goto exit_remove; | |
1854 | } | |
1855 | } | |
1856 | ||
1beeffe4 TJ |
1857 | data->hwmon_dev = hwmon_device_register(dev); |
1858 | if (IS_ERR(data->hwmon_dev)) { | |
1859 | err = PTR_ERR(data->hwmon_dev); | |
6800c3d0 RM |
1860 | goto exit_remove; |
1861 | } | |
1862 | ||
5852f960 SA |
1863 | /* Watchdog initialization */ |
1864 | ||
1865 | /* Register boot notifier */ | |
1866 | err = register_reboot_notifier(&watchdog_notifier); | |
1867 | if (err != 0) { | |
1868 | dev_err(&client->dev, | |
1869 | "cannot register reboot notifier (err=%d)\n", err); | |
1870 | goto exit_devunreg; | |
1871 | } | |
1872 | ||
47efe877 GR |
1873 | /* |
1874 | * Enable Watchdog registers. | |
1875 | * Set Configuration Register to Enable Watch Dog Registers | |
1876 | * (Bit 2) = XXXX, X1XX. | |
1877 | */ | |
5852f960 SA |
1878 | tmp = w83793_read_value(client, W83793_REG_CONFIG); |
1879 | w83793_write_value(client, W83793_REG_CONFIG, tmp | 0x04); | |
1880 | ||
1881 | /* Set the default watchdog timeout */ | |
1882 | data->watchdog_timeout = timeout; | |
1883 | ||
1884 | /* Check, if last reboot was caused by watchdog */ | |
1885 | data->watchdog_caused_reboot = | |
1886 | w83793_read_value(data->client, W83793_REG_WDT_STATUS) & 0x01; | |
1887 | ||
1888 | /* Disable Soft Watchdog during initialiation */ | |
1889 | watchdog_disable(data); | |
1890 | ||
47efe877 GR |
1891 | /* |
1892 | * We take the data_mutex lock early so that watchdog_open() cannot | |
1893 | * run when misc_register() has completed, but we've not yet added | |
1894 | * our data to the watchdog_data_list (and set the default timeout) | |
1895 | */ | |
5852f960 SA |
1896 | mutex_lock(&watchdog_data_mutex); |
1897 | for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) { | |
1898 | /* Register our watchdog part */ | |
1899 | snprintf(data->watchdog_name, sizeof(data->watchdog_name), | |
1900 | "watchdog%c", (i == 0) ? '\0' : ('0' + i)); | |
1901 | data->watchdog_miscdev.name = data->watchdog_name; | |
1902 | data->watchdog_miscdev.fops = &watchdog_fops; | |
1903 | data->watchdog_miscdev.minor = watchdog_minors[i]; | |
1904 | ||
1905 | err = misc_register(&data->watchdog_miscdev); | |
1906 | if (err == -EBUSY) | |
1907 | continue; | |
1908 | if (err) { | |
1909 | data->watchdog_miscdev.minor = 0; | |
1910 | dev_err(&client->dev, | |
1911 | "Registering watchdog chardev: %d\n", err); | |
1912 | break; | |
1913 | } | |
1914 | ||
1915 | list_add(&data->list, &watchdog_data_list); | |
1916 | ||
1917 | dev_info(&client->dev, | |
1918 | "Registered watchdog chardev major 10, minor: %d\n", | |
1919 | watchdog_minors[i]); | |
1920 | break; | |
1921 | } | |
1922 | if (i == ARRAY_SIZE(watchdog_minors)) { | |
1923 | data->watchdog_miscdev.minor = 0; | |
b55f3757 GR |
1924 | dev_warn(&client->dev, |
1925 | "Couldn't register watchdog chardev (due to no free minor)\n"); | |
5852f960 SA |
1926 | } |
1927 | ||
1928 | mutex_unlock(&watchdog_data_mutex); | |
1929 | ||
6800c3d0 RM |
1930 | return 0; |
1931 | ||
5852f960 SA |
1932 | /* Unregister hwmon device */ |
1933 | ||
1934 | exit_devunreg: | |
1935 | ||
1936 | hwmon_device_unregister(data->hwmon_dev); | |
1937 | ||
6800c3d0 RM |
1938 | /* Unregister sysfs hooks */ |
1939 | ||
1940 | exit_remove: | |
1941 | for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) | |
1942 | device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr); | |
1943 | ||
1944 | for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) | |
1945 | device_remove_file(dev, &sda_single_files[i].dev_attr); | |
1946 | ||
c70a8c34 GJ |
1947 | for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) |
1948 | device_remove_file(dev, &w83793_vid[i].dev_attr); | |
1949 | ||
6800c3d0 RM |
1950 | for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++) |
1951 | device_remove_file(dev, &w83793_left_fan[i].dev_attr); | |
1952 | ||
1953 | for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++) | |
1954 | device_remove_file(dev, &w83793_left_pwm[i].dev_attr); | |
1955 | ||
46bed4df GJ |
1956 | for (i = 0; i < ARRAY_SIZE(w83793_temp); i++) |
1957 | device_remove_file(dev, &w83793_temp[i].dev_attr); | |
1958 | ||
a7f13a6e JD |
1959 | if (data->lm75[0] != NULL) |
1960 | i2c_unregister_device(data->lm75[0]); | |
1961 | if (data->lm75[1] != NULL) | |
1962 | i2c_unregister_device(data->lm75[1]); | |
6800c3d0 RM |
1963 | free_mem: |
1964 | kfree(data); | |
1965 | exit: | |
1966 | return err; | |
1967 | } | |
1968 | ||
1969 | static void w83793_update_nonvolatile(struct device *dev) | |
1970 | { | |
1971 | struct i2c_client *client = to_i2c_client(dev); | |
1972 | struct w83793_data *data = i2c_get_clientdata(client); | |
1973 | int i, j; | |
1974 | /* | |
47efe877 GR |
1975 | * They are somewhat "stable" registers, and to update them every time |
1976 | * takes so much time, it's just not worthy. Update them in a long | |
1977 | * interval to avoid exception. | |
6800c3d0 RM |
1978 | */ |
1979 | if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300) | |
1980 | || !data->valid)) | |
1981 | return; | |
1982 | /* update voltage limits */ | |
1983 | for (i = 1; i < 3; i++) { | |
1984 | for (j = 0; j < ARRAY_SIZE(data->in); j++) { | |
1985 | data->in[j][i] = | |
1986 | w83793_read_value(client, W83793_REG_IN[j][i]); | |
1987 | } | |
1988 | data->in_low_bits[i] = | |
1989 | w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]); | |
1990 | } | |
1991 | ||
1992 | for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) { | |
1993 | /* Update the Fan measured value and limits */ | |
47efe877 | 1994 | if (!(data->has_fan & (1 << i))) |
6800c3d0 | 1995 | continue; |
6800c3d0 RM |
1996 | data->fan_min[i] = |
1997 | w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8; | |
1998 | data->fan_min[i] |= | |
1999 | w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1); | |
2000 | } | |
2001 | ||
2002 | for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) { | |
46bed4df GJ |
2003 | if (!(data->has_temp & (1 << i))) |
2004 | continue; | |
6800c3d0 RM |
2005 | data->temp_fan_map[i] = |
2006 | w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i)); | |
2007 | for (j = 1; j < 5; j++) { | |
2008 | data->temp[i][j] = | |
2009 | w83793_read_value(client, W83793_REG_TEMP[i][j]); | |
2010 | } | |
2011 | data->temp_cruise[i] = | |
2012 | w83793_read_value(client, W83793_REG_TEMP_CRUISE(i)); | |
2013 | for (j = 0; j < 7; j++) { | |
2014 | data->sf2_pwm[i][j] = | |
2015 | w83793_read_value(client, W83793_REG_SF2_PWM(i, j)); | |
2016 | data->sf2_temp[i][j] = | |
2017 | w83793_read_value(client, | |
2018 | W83793_REG_SF2_TEMP(i, j)); | |
2019 | } | |
2020 | } | |
2021 | ||
2022 | for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++) | |
2023 | data->temp_mode[i] = | |
2024 | w83793_read_value(client, W83793_REG_TEMP_MODE[i]); | |
2025 | ||
2026 | for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) { | |
2027 | data->tolerance[i] = | |
2028 | w83793_read_value(client, W83793_REG_TEMP_TOL(i)); | |
2029 | } | |
2030 | ||
2031 | for (i = 0; i < ARRAY_SIZE(data->pwm); i++) { | |
2032 | if (!(data->has_pwm & (1 << i))) | |
2033 | continue; | |
2034 | data->pwm[i][PWM_NONSTOP] = | |
2035 | w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP)); | |
2036 | data->pwm[i][PWM_START] = | |
2037 | w83793_read_value(client, W83793_REG_PWM(i, PWM_START)); | |
2038 | data->pwm_stop_time[i] = | |
2039 | w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i)); | |
2040 | } | |
2041 | ||
2042 | data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT); | |
2043 | data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE); | |
2044 | data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME); | |
2045 | data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME); | |
2046 | data->temp_critical = | |
2047 | w83793_read_value(client, W83793_REG_TEMP_CRITICAL); | |
2048 | data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP); | |
2049 | ||
47efe877 | 2050 | for (i = 0; i < ARRAY_SIZE(data->beeps); i++) |
6800c3d0 | 2051 | data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i)); |
6800c3d0 RM |
2052 | |
2053 | data->last_nonvolatile = jiffies; | |
2054 | } | |
2055 | ||
2056 | static struct w83793_data *w83793_update_device(struct device *dev) | |
2057 | { | |
2058 | struct i2c_client *client = to_i2c_client(dev); | |
2059 | struct w83793_data *data = i2c_get_clientdata(client); | |
2060 | int i; | |
2061 | ||
2062 | mutex_lock(&data->update_lock); | |
2063 | ||
2064 | if (!(time_after(jiffies, data->last_updated + HZ * 2) | |
2065 | || !data->valid)) | |
2066 | goto END; | |
2067 | ||
2068 | /* Update the voltages measured value and limits */ | |
2069 | for (i = 0; i < ARRAY_SIZE(data->in); i++) | |
2070 | data->in[i][IN_READ] = | |
2071 | w83793_read_value(client, W83793_REG_IN[i][IN_READ]); | |
2072 | ||
2073 | data->in_low_bits[IN_READ] = | |
2074 | w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]); | |
2075 | ||
2076 | for (i = 0; i < ARRAY_SIZE(data->fan); i++) { | |
47efe877 | 2077 | if (!(data->has_fan & (1 << i))) |
6800c3d0 | 2078 | continue; |
6800c3d0 RM |
2079 | data->fan[i] = |
2080 | w83793_read_value(client, W83793_REG_FAN(i)) << 8; | |
2081 | data->fan[i] |= | |
2082 | w83793_read_value(client, W83793_REG_FAN(i) + 1); | |
2083 | } | |
2084 | ||
46bed4df GJ |
2085 | for (i = 0; i < ARRAY_SIZE(data->temp); i++) { |
2086 | if (!(data->has_temp & (1 << i))) | |
2087 | continue; | |
6800c3d0 RM |
2088 | data->temp[i][TEMP_READ] = |
2089 | w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]); | |
46bed4df | 2090 | } |
6800c3d0 RM |
2091 | |
2092 | data->temp_low_bits = | |
2093 | w83793_read_value(client, W83793_REG_TEMP_LOW_BITS); | |
2094 | ||
2095 | for (i = 0; i < ARRAY_SIZE(data->pwm); i++) { | |
2096 | if (data->has_pwm & (1 << i)) | |
2097 | data->pwm[i][PWM_DUTY] = | |
2098 | w83793_read_value(client, | |
2099 | W83793_REG_PWM(i, PWM_DUTY)); | |
2100 | } | |
2101 | ||
2102 | for (i = 0; i < ARRAY_SIZE(data->alarms); i++) | |
2103 | data->alarms[i] = | |
2104 | w83793_read_value(client, W83793_REG_ALARM(i)); | |
c70a8c34 GJ |
2105 | if (data->has_vid & 0x01) |
2106 | data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA); | |
2107 | if (data->has_vid & 0x02) | |
2108 | data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB); | |
6800c3d0 RM |
2109 | w83793_update_nonvolatile(dev); |
2110 | data->last_updated = jiffies; | |
2111 | data->valid = 1; | |
2112 | ||
2113 | END: | |
2114 | mutex_unlock(&data->update_lock); | |
2115 | return data; | |
2116 | } | |
2117 | ||
47efe877 GR |
2118 | /* |
2119 | * Ignore the possibility that somebody change bank outside the driver | |
2120 | * Must be called with data->update_lock held, except during initialization | |
2121 | */ | |
6800c3d0 RM |
2122 | static u8 w83793_read_value(struct i2c_client *client, u16 reg) |
2123 | { | |
2124 | struct w83793_data *data = i2c_get_clientdata(client); | |
2125 | u8 res = 0xff; | |
2126 | u8 new_bank = reg >> 8; | |
2127 | ||
2128 | new_bank |= data->bank & 0xfc; | |
2129 | if (data->bank != new_bank) { | |
2130 | if (i2c_smbus_write_byte_data | |
2131 | (client, W83793_REG_BANKSEL, new_bank) >= 0) | |
2132 | data->bank = new_bank; | |
2133 | else { | |
2134 | dev_err(&client->dev, | |
2135 | "set bank to %d failed, fall back " | |
2136 | "to bank %d, read reg 0x%x error\n", | |
2137 | new_bank, data->bank, reg); | |
2138 | res = 0x0; /* read 0x0 from the chip */ | |
2139 | goto END; | |
2140 | } | |
2141 | } | |
2142 | res = i2c_smbus_read_byte_data(client, reg & 0xff); | |
2143 | END: | |
2144 | return res; | |
2145 | } | |
2146 | ||
2147 | /* Must be called with data->update_lock held, except during initialization */ | |
2148 | static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value) | |
2149 | { | |
2150 | struct w83793_data *data = i2c_get_clientdata(client); | |
2151 | int res; | |
2152 | u8 new_bank = reg >> 8; | |
2153 | ||
2154 | new_bank |= data->bank & 0xfc; | |
2155 | if (data->bank != new_bank) { | |
47efe877 GR |
2156 | res = i2c_smbus_write_byte_data(client, W83793_REG_BANKSEL, |
2157 | new_bank); | |
2158 | if (res < 0) { | |
6800c3d0 RM |
2159 | dev_err(&client->dev, |
2160 | "set bank to %d failed, fall back " | |
2161 | "to bank %d, write reg 0x%x error\n", | |
2162 | new_bank, data->bank, reg); | |
2163 | goto END; | |
2164 | } | |
47efe877 | 2165 | data->bank = new_bank; |
6800c3d0 RM |
2166 | } |
2167 | ||
2168 | res = i2c_smbus_write_byte_data(client, reg & 0xff, value); | |
2169 | END: | |
2170 | return res; | |
2171 | } | |
2172 | ||
f0967eea | 2173 | module_i2c_driver(w83793_driver); |
6800c3d0 | 2174 | |
5852f960 | 2175 | MODULE_AUTHOR("Yuan Mu, Sven Anders"); |
6800c3d0 RM |
2176 | MODULE_DESCRIPTION("w83793 driver"); |
2177 | MODULE_LICENSE("GPL"); |