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hwmon: (w83795) Delay reading limit registers
[deliverable/linux.git] / drivers / hwmon / w83795.c
CommitLineData
792d376b
WS		 1/*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation - version 2.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA.
19 *
20 * Supports following chips:
21 *
22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
25 */
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/slab.h>
31#include <linux/i2c.h>
32#include <linux/hwmon.h>
33#include <linux/hwmon-sysfs.h>
34#include <linux/err.h>
35#include <linux/mutex.h>
36#include <linux/delay.h>
37
38/* Addresses to scan */
86ef4d2f
JD		 39static const unsigned short normal_i2c[] = {
40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
41};
792d376b 42
792d376b
WS		 43
44static int reset;
45module_param(reset, bool, 0);
46MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
47
48
49#define W83795_REG_BANKSEL 0x00
50#define W83795_REG_VENDORID 0xfd
51#define W83795_REG_CHIPID 0xfe
52#define W83795_REG_DEVICEID 0xfb
2be381de 53#define W83795_REG_DEVICEID_A 0xff
792d376b
WS		 54
55#define W83795_REG_I2C_ADDR 0xfc
56#define W83795_REG_CONFIG 0x01
57#define W83795_REG_CONFIG_CONFIG48 0x04
80646b95 58#define W83795_REG_CONFIG_START 0x01
792d376b
WS		 59
60/* Multi-Function Pin Ctrl Registers */
61#define W83795_REG_VOLT_CTRL1 0x02
62#define W83795_REG_VOLT_CTRL2 0x03
63#define W83795_REG_TEMP_CTRL1 0x04
64#define W83795_REG_TEMP_CTRL2 0x05
65#define W83795_REG_FANIN_CTRL1 0x06
66#define W83795_REG_FANIN_CTRL2 0x07
67#define W83795_REG_VMIGB_CTRL 0x08
68
792d376b
WS		 69#define TEMP_READ 0
70#define TEMP_CRIT 1
71#define TEMP_CRIT_HYST 2
72#define TEMP_WARN 3
73#define TEMP_WARN_HYST 4
74/* only crit and crit_hyst affect real-time alarm status
75 * current crit crit_hyst warn warn_hyst */
86ef4d2f 76static const u16 W83795_REG_TEMP[][5] = {
792d376b
WS		 77 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
78 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
79 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
80 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
81 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
82 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
83};
84
85#define IN_READ 0
86#define IN_MAX 1
87#define IN_LOW 2
88static const u16 W83795_REG_IN[][3] = {
89 /* Current, HL, LL */
90 {0x10, 0x70, 0x71}, /* VSEN1 */
91 {0x11, 0x72, 0x73}, /* VSEN2 */
92 {0x12, 0x74, 0x75}, /* VSEN3 */
93 {0x13, 0x76, 0x77}, /* VSEN4 */
94 {0x14, 0x78, 0x79}, /* VSEN5 */
95 {0x15, 0x7a, 0x7b}, /* VSEN6 */
96 {0x16, 0x7c, 0x7d}, /* VSEN7 */
97 {0x17, 0x7e, 0x7f}, /* VSEN8 */
98 {0x18, 0x80, 0x81}, /* VSEN9 */
99 {0x19, 0x82, 0x83}, /* VSEN10 */
100 {0x1A, 0x84, 0x85}, /* VSEN11 */
101 {0x1B, 0x86, 0x87}, /* VTT */
102 {0x1C, 0x88, 0x89}, /* 3VDD */
103 {0x1D, 0x8a, 0x8b}, /* 3VSB */
104 {0x1E, 0x8c, 0x8d}, /* VBAT */
105 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
106 {0x20, 0xaa, 0xab}, /* VSEN13 */
107 {0x21, 0x96, 0x97}, /* VSEN14 */
108 {0x22, 0x9a, 0x9b}, /* VSEN15 */
109 {0x23, 0x9e, 0x9f}, /* VSEN16 */
110 {0x24, 0xa2, 0xa3}, /* VSEN17 */
111};
112#define W83795_REG_VRLSB 0x3C
792d376b
WS		 113
114static const u8 W83795_REG_IN_HL_LSB[] = {
115 0x8e, /* VSEN1-4 */
116 0x90, /* VSEN5-8 */
117 0x92, /* VSEN9-11 */
118 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
119 0xa8, /* VSEN12 */
120 0xac, /* VSEN13 */
121 0x98, /* VSEN14 */
122 0x9c, /* VSEN15 */
123 0xa0, /* VSEN16 */
124 0xa4, /* VSEN17 */
125};
126
127#define IN_LSB_REG(index, type) \
128 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
129 : (W83795_REG_IN_HL_LSB[(index)] + 1))
130
792d376b
WS		 131#define IN_LSB_SHIFT 0
132#define IN_LSB_IDX 1
133static const u8 IN_LSB_SHIFT_IDX[][2] = {
134 /* High/Low LSB shift, LSB No. */
135 {0x00, 0x00}, /* VSEN1 */
136 {0x02, 0x00}, /* VSEN2 */
137 {0x04, 0x00}, /* VSEN3 */
138 {0x06, 0x00}, /* VSEN4 */
139 {0x00, 0x01}, /* VSEN5 */
140 {0x02, 0x01}, /* VSEN6 */
141 {0x04, 0x01}, /* VSEN7 */
142 {0x06, 0x01}, /* VSEN8 */
143 {0x00, 0x02}, /* VSEN9 */
144 {0x02, 0x02}, /* VSEN10 */
145 {0x04, 0x02}, /* VSEN11 */
146 {0x00, 0x03}, /* VTT */
147 {0x02, 0x03}, /* 3VDD */
148 {0x04, 0x03}, /* 3VSB */
149 {0x06, 0x03}, /* VBAT */
150 {0x06, 0x04}, /* VSEN12 */
151 {0x06, 0x05}, /* VSEN13 */
152 {0x06, 0x06}, /* VSEN14 */
153 {0x06, 0x07}, /* VSEN15 */
154 {0x06, 0x08}, /* VSEN16 */
155 {0x06, 0x09}, /* VSEN17 */
156};
157
158
792d376b
WS		 159#define W83795_REG_FAN(index) (0x2E + (index))
160#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
161#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
162#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
7eb8d508 163 (((index) & 1) ? 4 : 0)
792d376b
WS		 164
165#define W83795_REG_VID_CTRL 0x6A
166
792d376b
WS		 167#define W83795_REG_ALARM(index) (0x41 + (index))
168#define W83795_REG_BEEP(index) (0x50 + (index))
169
170#define W83795_REG_CLR_CHASSIS 0x4D
171
172
792d376b
WS		 173#define W83795_REG_FCMS1 0x201
174#define W83795_REG_FCMS2 0x208
175#define W83795_REG_TFMR(index) (0x202 + (index))
176#define W83795_REG_FOMC 0x20F
792d376b
WS		 177
178#define W83795_REG_TSS(index) (0x209 + (index))
179
180#define PWM_OUTPUT 0
fd7f82b8
JD		 181#define PWM_FREQ 1
182#define PWM_START 2
183#define PWM_NONSTOP 3
184#define PWM_STOP_TIME 4
185#define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
792d376b 186
792d376b
WS		 187#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
188#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
189#define W83795_REG_TFTS 0x250
190
191#define TEMP_PWM_TTTI 0
192#define TEMP_PWM_CTFS 1
193#define TEMP_PWM_HCT 2
194#define TEMP_PWM_HOT 3
195#define W83795_REG_TTTI(index) (0x260 + (index))
196#define W83795_REG_CTFS(index) (0x268 + (index))
197#define W83795_REG_HT(index) (0x270 + (index))
198
199#define SF4_TEMP 0
200#define SF4_PWM 1
201#define W83795_REG_SF4_TEMP(temp_num, index) \
202 (0x280 + 0x10 * (temp_num) + (index))
203#define W83795_REG_SF4_PWM(temp_num, index) \
204 (0x288 + 0x10 * (temp_num) + (index))
205
206#define W83795_REG_DTSC 0x301
207#define W83795_REG_DTSE 0x302
208#define W83795_REG_DTS(index) (0x26 + (index))
54891a3c 209#define W83795_REG_PECI_TBASE(index) (0x320 + (index))
792d376b
WS		 210
211#define DTS_CRIT 0
212#define DTS_CRIT_HYST 1
213#define DTS_WARN 2
214#define DTS_WARN_HYST 3
215#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
216
217#define SETUP_PWM_DEFAULT 0
218#define SETUP_PWM_UPTIME 1
219#define SETUP_PWM_DOWNTIME 2
220#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
221
222static inline u16 in_from_reg(u8 index, u16 val)
223{
49c7347a
JD		 224 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
225 if (index >= 12 && index <= 14)
792d376b
WS		 226 return val * 6;
227 else
228 return val * 2;
229}
230
231static inline u16 in_to_reg(u8 index, u16 val)
232{
49c7347a 233 if (index >= 12 && index <= 14)
792d376b
WS		 234 return val / 6;
235 else
236 return val / 2;
237}
238
239static inline unsigned long fan_from_reg(u16 val)
240{
6c82b2f3 241 if ((val == 0xfff) || (val == 0))
792d376b
WS		 242 return 0;
243 return 1350000UL / val;
244}
245
246static inline u16 fan_to_reg(long rpm)
247{
248 if (rpm <= 0)
249 return 0x0fff;
250 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
251}
252
253static inline unsigned long time_from_reg(u8 reg)
254{
255 return reg * 100;
256}
257
258static inline u8 time_to_reg(unsigned long val)
259{
260 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
261}
262
263static inline long temp_from_reg(s8 reg)
264{
265 return reg * 1000;
266}
267
268static inline s8 temp_to_reg(long val, s8 min, s8 max)
269{
dd127f5c 270 return SENSORS_LIMIT(val / 1000, min, max);
792d376b
WS		 271}
272
01879a85
JD		 273static const u16 pwm_freq_cksel0[16] = {
274 1024, 512, 341, 256, 205, 171, 146, 128,
275 85, 64, 32, 16, 8, 4, 2, 1
276};
277
278static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
279{
280 unsigned long base_clock;
281
282 if (reg & 0x80) {
283 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
284 return base_clock / ((reg & 0x7f) + 1);
285 } else
286 return pwm_freq_cksel0[reg & 0x0f];
287}
288
289static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
290{
291 unsigned long base_clock;
292 u8 reg0, reg1;
293 unsigned long best0, best1;
294
295 /* Best fit for cksel = 0 */
296 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
297 if (val > (pwm_freq_cksel0[reg0] +
298 pwm_freq_cksel0[reg0 + 1]) / 2)
299 break;
300 }
301 if (val < 375) /* cksel = 1 can't beat this */
302 return reg0;
303 best0 = pwm_freq_cksel0[reg0];
304
305 /* Best fit for cksel = 1 */
306 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
307 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
308 best1 = base_clock / reg1;
309 reg1 = 0x80 | (reg1 - 1);
310
311 /* Choose the closest one */
312 if (abs(val - best0) > abs(val - best1))
313 return reg1;
314 else
315 return reg0;
316}
792d376b
WS		 317
318enum chip_types {w83795g, w83795adg};
319
320struct w83795_data {
321 struct device *hwmon_dev;
322 struct mutex update_lock;
323 unsigned long last_updated; /* In jiffies */
324 enum chip_types chip_type;
325
326 u8 bank;
327
328 u32 has_in; /* Enable monitor VIN or not */
0e256018 329 u8 has_dyn_in; /* Only in2-0 can have this */
792d376b
WS		 330 u16 in[21][3]; /* Register value, read/high/low */
331 u8 in_lsb[10][3]; /* LSB Register value, high/low */
332 u8 has_gain; /* has gain: in17-20 * 8 */
333
334 u16 has_fan; /* Enable fan14-1 or not */
335 u16 fan[14]; /* Register value combine */
336 u16 fan_min[14]; /* Register value combine */
337
338 u8 has_temp; /* Enable monitor temp6-1 or not */
dd127f5c 339 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
792d376b 340 u8 temp_read_vrlsb[6];
39deb699 341 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
792d376b
WS		 342 u8 temp_src[3]; /* Register value */
343
344 u8 enable_dts; /* Enable PECI and SB-TSI,
345 * bit 0: =1 enable, =0 disable,
346 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
347 u8 has_dts; /* Enable monitor DTS temp */
dd127f5c 348 s8 dts[8]; /* Register value */
792d376b 349 u8 dts_read_vrlsb[8]; /* Register value */
dd127f5c 350 s8 dts_ext[4]; /* Register value */
792d376b
WS		 351
352 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
353 * no config register, only affected by chip
354 * type */
fd7f82b8
JD		 355 u8 pwm[8][5]; /* Register value, output, freq, start,
356 * non stop, stop time */
01879a85 357 u16 clkin; /* CLKIN frequency in kHz */
792d376b
WS		 358 u8 pwm_fcms[2]; /* Register value */
359 u8 pwm_tfmr[6]; /* Register value */
360 u8 pwm_fomc; /* Register value */
361
362 u16 target_speed[8]; /* Register value, target speed for speed
363 * cruise */
364 u8 tol_speed; /* tolerance of target speed */
365 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
366 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
367
368 u8 setup_pwm[3]; /* Register value */
369
370 u8 alarms[6]; /* Register value */
371 u8 beeps[6]; /* Register value */
792d376b
WS		 372
373 char valid;
2ae61de9 374 char valid_limits;
792d376b
WS		 375};
376
377/*
378 * Hardware access
b2469f42 379 * We assume that nobdody can change the bank outside the driver.
792d376b
WS		 380 */
381
b2469f42
JD		 382/* Must be called with data->update_lock held, except during initialization */
383static int w83795_set_bank(struct i2c_client *client, u8 bank)
792d376b
WS		 384{
385 struct w83795_data *data = i2c_get_clientdata(client);
b2469f42
JD		 386 int err;
387
388 /* If the same bank is already set, nothing to do */
389 if ((data->bank & 0x07) == bank)
390 return 0;
391
392 /* Change to new bank, preserve all other bits */
393 bank |= data->bank & ~0x07;
394 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
395 if (err < 0) {
396 dev_err(&client->dev,
397 "Failed to set bank to %d, err %d\n",
398 (int)bank, err);
399 return err;
792d376b 400 }
b2469f42
JD		 401 data->bank = bank;
402
403 return 0;
792d376b
WS		 404}
405
406/* Must be called with data->update_lock held, except during initialization */
b2469f42 407static u8 w83795_read(struct i2c_client *client, u16 reg)
792d376b 408{
b2469f42
JD		 409 int err;
410
411 err = w83795_set_bank(client, reg >> 8);
412 if (err < 0)
413 return 0x00; /* Arbitrary */
414
415 err = i2c_smbus_read_byte_data(client, reg & 0xff);
416 if (err < 0) {
417 dev_err(&client->dev,
418 "Failed to read from register 0x%03x, err %d\n",
419 (int)reg, err);
420 return 0x00; /* Arbitrary */
792d376b 421 }
b2469f42
JD		 422 return err;
423}
792d376b 424
b2469f42
JD		 425/* Must be called with data->update_lock held, except during initialization */
426static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
427{
428 int err;
429
430 err = w83795_set_bank(client, reg >> 8);
431 if (err < 0)
432 return err;
433
434 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
435 if (err < 0)
436 dev_err(&client->dev,
437 "Failed to write to register 0x%03x, err %d\n",
438 (int)reg, err);
439 return err;
792d376b
WS		 440}
441
0d7237bf
JD		 442static void w83795_update_limits(struct i2c_client *client)
443{
444 struct w83795_data *data = i2c_get_clientdata(client);
445 int i, limit;
446
447 /* Read the voltage limits */
448 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
449 if (!(data->has_in & (1 << i)))
450 continue;
451 data->in[i][IN_MAX] =
452 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
453 data->in[i][IN_LOW] =
454 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
455 }
456 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
457 if ((i == 2 && data->chip_type == w83795adg) ||
458 (i >= 4 && !(data->has_in & (1 << (i + 11)))))
459 continue;
460 data->in_lsb[i][IN_MAX] =
461 w83795_read(client, IN_LSB_REG(i, IN_MAX));
462 data->in_lsb[i][IN_LOW] =
463 w83795_read(client, IN_LSB_REG(i, IN_LOW));
464 }
465
466 /* Read the fan limits */
467 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
468 u8 lsb;
469
470 /* Each register contains LSB for 2 fans, but we want to
471 * read it only once to save time */
472 if ((i & 1) == 0 && (data->has_fan & (3 << i)))
473 lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
474
475 if (!(data->has_fan & (1 << i)))
476 continue;
477 data->fan_min[i] =
478 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
479 data->fan_min[i] |=
480 (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
481 }
482
483 /* Read the temperature limits */
484 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
485 if (!(data->has_temp & (1 << i)))
486 continue;
487 for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
488 data->temp[i][limit] =
489 w83795_read(client, W83795_REG_TEMP[i][limit]);
490 }
491
492 /* Read the DTS limits */
493 if (data->enable_dts != 0) {
494 for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
495 data->dts_ext[limit] =
496 w83795_read(client, W83795_REG_DTS_EXT(limit));
497 }
498
499 /* Read beep settings */
500 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
501 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
2ae61de9
JD		 502
503 data->valid_limits = 1;
0d7237bf
JD		 504}
505
506static void w83795_update_pwm_config(struct i2c_client *client)
507{
508 struct w83795_data *data = i2c_get_clientdata(client);
509 int i, tmp;
510
511 /* Read temperature source selection */
512 for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
513 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
514
515 /* Read automatic fan speed control settings */
516 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
517 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
518 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
519 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
520 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
521 for (i = 0; i < data->has_pwm; i++) {
522 for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
523 data->pwm[i][tmp] =
524 w83795_read(client, W83795_REG_PWM(i, tmp));
525 }
526 for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
527 data->target_speed[i] =
528 w83795_read(client, W83795_REG_FTSH(i)) << 4;
529 data->target_speed[i] |=
530 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
531 }
532 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
533
534 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
535 data->pwm_temp[i][TEMP_PWM_TTTI] =
536 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
537 data->pwm_temp[i][TEMP_PWM_CTFS] =
538 w83795_read(client, W83795_REG_CTFS(i));
539 tmp = w83795_read(client, W83795_REG_HT(i));
540 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
541 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
542 }
543
544 /* Read SmartFanIV trip points */
545 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
546 for (tmp = 0; tmp < 7; tmp++) {
547 data->sf4_reg[i][SF4_TEMP][tmp] =
548 w83795_read(client,
549 W83795_REG_SF4_TEMP(i, tmp));
550 data->sf4_reg[i][SF4_PWM][tmp] =
551 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
552 }
553 }
554
555 /* Read setup PWM */
556 for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
557 data->setup_pwm[i] =
558 w83795_read(client, W83795_REG_SETUP_PWM(i));
559}
560
792d376b
WS		 561static struct w83795_data *w83795_update_device(struct device *dev)
562{
563 struct i2c_client *client = to_i2c_client(dev);
564 struct w83795_data *data = i2c_get_clientdata(client);
565 u16 tmp;
566 int i;
567
568 mutex_lock(&data->update_lock);
569
2ae61de9
JD		 570 if (!data->valid_limits)
571 w83795_update_limits(client);
572
792d376b
WS		 573 if (!(time_after(jiffies, data->last_updated + HZ * 2)
574 || !data->valid))
575 goto END;
576
577 /* Update the voltages value */
578 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
579 if (!(data->has_in & (1 << i)))
580 continue;
581 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
a654b9d4 582 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
792d376b
WS		 583 data->in[i][IN_READ] = tmp;
584 }
585
0e256018
JD		 586 /* in0-2 can have dynamic limits (W83795G only) */
587 if (data->has_dyn_in) {
588 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
589 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
590
591 for (i = 0; i < 3; i++) {
592 if (!(data->has_dyn_in & (1 << i)))
593 continue;
594 data->in[i][IN_MAX] =
595 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
596 data->in[i][IN_LOW] =
597 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
598 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
599 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
600 }
601 }
602
792d376b
WS		 603 /* Update fan */
604 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
605 if (!(data->has_fan & (1 << i)))
606 continue;
607 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
608 data->fan[i] |=
6c82b2f3 609 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F;
792d376b
WS		 610 }
611
612 /* Update temperature */
613 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
792d376b
WS		 614 data->temp[i][TEMP_READ] =
615 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
616 data->temp_read_vrlsb[i] =
617 w83795_read(client, W83795_REG_VRLSB);
618 }
619
620 /* Update dts temperature */
621 if (data->enable_dts != 0) {
622 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
623 if (!(data->has_dts & (1 << i)))
624 continue;
625 data->dts[i] =
626 w83795_read(client, W83795_REG_DTS(i));
627 data->dts_read_vrlsb[i] =
628 w83795_read(client, W83795_REG_VRLSB);
629 }
630 }
631
632 /* Update pwm output */
633 for (i = 0; i < data->has_pwm; i++) {
634 data->pwm[i][PWM_OUTPUT] =
635 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
636 }
637
638 /* update alarm */
cd316df5 639 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
792d376b
WS		 640 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
641
642 data->last_updated = jiffies;
643 data->valid = 1;
644
645END:
646 mutex_unlock(&data->update_lock);
647 return data;
648}
649
650/*
651 * Sysfs attributes
652 */
653
654#define ALARM_STATUS 0
655#define BEEP_ENABLE 1
656static ssize_t
657show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
658{
659 struct w83795_data *data = w83795_update_device(dev);
660 struct sensor_device_attribute_2 *sensor_attr =
661 to_sensor_dev_attr_2(attr);
662 int nr = sensor_attr->nr;
663 int index = sensor_attr->index >> 3;
664 int bit = sensor_attr->index & 0x07;
665 u8 val;
666
667 if (ALARM_STATUS == nr) {
668 val = (data->alarms[index] >> (bit)) & 1;
669 } else { /* BEEP_ENABLE */
670 val = (data->beeps[index] >> (bit)) & 1;
671 }
672
673 return sprintf(buf, "%u\n", val);
674}
675
676static ssize_t
677store_beep(struct device *dev, struct device_attribute *attr,
678 const char *buf, size_t count)
679{
680 struct i2c_client *client = to_i2c_client(dev);
681 struct w83795_data *data = i2c_get_clientdata(client);
682 struct sensor_device_attribute_2 *sensor_attr =
683 to_sensor_dev_attr_2(attr);
684 int index = sensor_attr->index >> 3;
685 int shift = sensor_attr->index & 0x07;
686 u8 beep_bit = 1 << shift;
687 unsigned long val;
688
689 if (strict_strtoul(buf, 10, &val) < 0)
690 return -EINVAL;
691 if (val != 0 && val != 1)
692 return -EINVAL;
693
694 mutex_lock(&data->update_lock);
695 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
696 data->beeps[index] &= ~beep_bit;
697 data->beeps[index] |= val << shift;
698 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
699 mutex_unlock(&data->update_lock);
700
701 return count;
702}
703
792d376b
WS		 704/* Write any value to clear chassis alarm */
705static ssize_t
706store_chassis_clear(struct device *dev,
707 struct device_attribute *attr, const char *buf,
708 size_t count)
709{
710 struct i2c_client *client = to_i2c_client(dev);
711 struct w83795_data *data = i2c_get_clientdata(client);
712 u8 val;
713
714 mutex_lock(&data->update_lock);
715 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
716 val |= 0x80;
717 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
718 mutex_unlock(&data->update_lock);
719 return count;
720}
721
722#define FAN_INPUT 0
723#define FAN_MIN 1
724static ssize_t
725show_fan(struct device *dev, struct device_attribute *attr, char *buf)
726{
727 struct sensor_device_attribute_2 *sensor_attr =
728 to_sensor_dev_attr_2(attr);
729 int nr = sensor_attr->nr;
730 int index = sensor_attr->index;
731 struct w83795_data *data = w83795_update_device(dev);
732 u16 val;
733
734 if (FAN_INPUT == nr)
735 val = data->fan[index] & 0x0fff;
736 else
737 val = data->fan_min[index] & 0x0fff;
738
739 return sprintf(buf, "%lu\n", fan_from_reg(val));
740}
741
742static ssize_t
743store_fan_min(struct device *dev, struct device_attribute *attr,
744 const char *buf, size_t count)
745{
746 struct sensor_device_attribute_2 *sensor_attr =
747 to_sensor_dev_attr_2(attr);
748 int index = sensor_attr->index;
749 struct i2c_client *client = to_i2c_client(dev);
750 struct w83795_data *data = i2c_get_clientdata(client);
751 unsigned long val;
752
753 if (strict_strtoul(buf, 10, &val))
754 return -EINVAL;
755 val = fan_to_reg(val);
756
757 mutex_lock(&data->update_lock);
758 data->fan_min[index] = val;
759 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
760 val &= 0x0f;
7eb8d508 761 if (index & 1) {
792d376b
WS		 762 val <<= 4;
763 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
764 & 0x0f;
765 } else {
766 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
767 & 0xf0;
768 }
769 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
770 mutex_unlock(&data->update_lock);
771
772 return count;
773}
774
775static ssize_t
776show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
777{
778 struct w83795_data *data = w83795_update_device(dev);
779 struct sensor_device_attribute_2 *sensor_attr =
780 to_sensor_dev_attr_2(attr);
781 int nr = sensor_attr->nr;
782 int index = sensor_attr->index;
01879a85 783 unsigned int val;
792d376b
WS		 784
785 switch (nr) {
786 case PWM_STOP_TIME:
787 val = time_from_reg(data->pwm[index][nr]);
788 break;
01879a85
JD		 789 case PWM_FREQ:
790 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
792d376b
WS		 791 break;
792 default:
793 val = data->pwm[index][nr];
794 break;
795 }
796
797 return sprintf(buf, "%u\n", val);
798}
799
800static ssize_t
801store_pwm(struct device *dev, struct device_attribute *attr,
802 const char *buf, size_t count)
803{
804 struct i2c_client *client = to_i2c_client(dev);
805 struct w83795_data *data = i2c_get_clientdata(client);
806 struct sensor_device_attribute_2 *sensor_attr =
807 to_sensor_dev_attr_2(attr);
808 int nr = sensor_attr->nr;
809 int index = sensor_attr->index;
810 unsigned long val;
792d376b
WS		 811
812 if (strict_strtoul(buf, 10, &val) < 0)
813 return -EINVAL;
814
815 mutex_lock(&data->update_lock);
816 switch (nr) {
817 case PWM_STOP_TIME:
818 val = time_to_reg(val);
819 break;
01879a85
JD		 820 case PWM_FREQ:
821 val = pwm_freq_to_reg(val, data->clkin);
792d376b
WS		 822 break;
823 default:
824 val = SENSORS_LIMIT(val, 0, 0xff);
825 break;
826 }
827 w83795_write(client, W83795_REG_PWM(index, nr), val);
01879a85 828 data->pwm[index][nr] = val;
792d376b
WS		 829 mutex_unlock(&data->update_lock);
830 return count;
792d376b
WS		 831}
832
833static ssize_t
834show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
835{
836 struct sensor_device_attribute_2 *sensor_attr =
837 to_sensor_dev_attr_2(attr);
838 struct i2c_client *client = to_i2c_client(dev);
839 struct w83795_data *data = i2c_get_clientdata(client);
840 int index = sensor_attr->index;
841 u8 tmp;
842
843 if (1 == (data->pwm_fcms[0] & (1 << index))) {
844 tmp = 2;
845 goto out;
846 }
847 for (tmp = 0; tmp < 6; tmp++) {
848 if (data->pwm_tfmr[tmp] & (1 << index)) {
849 tmp = 3;
850 goto out;
851 }
852 }
853 if (data->pwm_fomc & (1 << index))
854 tmp = 0;
855 else
856 tmp = 1;
857
858out:
859 return sprintf(buf, "%u\n", tmp);
860}
861
862static ssize_t
863store_pwm_enable(struct device *dev, struct device_attribute *attr,
864 const char *buf, size_t count)
865{
866 struct i2c_client *client = to_i2c_client(dev);
867 struct w83795_data *data = i2c_get_clientdata(client);
868 struct sensor_device_attribute_2 *sensor_attr =
869 to_sensor_dev_attr_2(attr);
870 int index = sensor_attr->index;
871 unsigned long val;
872 int i;
873
874 if (strict_strtoul(buf, 10, &val) < 0)
875 return -EINVAL;
876 if (val > 2)
877 return -EINVAL;
878
879 mutex_lock(&data->update_lock);
880 switch (val) {
881 case 0:
882 case 1:
883 data->pwm_fcms[0] &= ~(1 << index);
884 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
885 for (i = 0; i < 6; i++) {
886 data->pwm_tfmr[i] &= ~(1 << index);
887 w83795_write(client, W83795_REG_TFMR(i),
888 data->pwm_tfmr[i]);
889 }
890 data->pwm_fomc |= 1 << index;
891 data->pwm_fomc ^= val << index;
892 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
893 break;
894 case 2:
895 data->pwm_fcms[0] |= (1 << index);
896 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
897 break;
898 }
899 mutex_unlock(&data->update_lock);
900 return count;
792d376b
WS		 901}
902
903static ssize_t
904show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
905{
906 struct sensor_device_attribute_2 *sensor_attr =
907 to_sensor_dev_attr_2(attr);
908 struct i2c_client *client = to_i2c_client(dev);
909 struct w83795_data *data = i2c_get_clientdata(client);
910 int index = sensor_attr->index;
911 u8 val = index / 2;
912 u8 tmp = data->temp_src[val];
913
7eb8d508 914 if (index & 1)
792d376b
WS		 915 val = 4;
916 else
917 val = 0;
918 tmp >>= val;
919 tmp &= 0x0f;
920
921 return sprintf(buf, "%u\n", tmp);
922}
923
924static ssize_t
925store_temp_src(struct device *dev, struct device_attribute *attr,
926 const char *buf, size_t count)
927{
928 struct i2c_client *client = to_i2c_client(dev);
929 struct w83795_data *data = i2c_get_clientdata(client);
930 struct sensor_device_attribute_2 *sensor_attr =
931 to_sensor_dev_attr_2(attr);
932 int index = sensor_attr->index;
933 unsigned long tmp;
934 u8 val = index / 2;
935
936 if (strict_strtoul(buf, 10, &tmp) < 0)
937 return -EINVAL;
938 tmp = SENSORS_LIMIT(tmp, 0, 15);
939
940 mutex_lock(&data->update_lock);
7eb8d508 941 if (index & 1) {
792d376b
WS		 942 tmp <<= 4;
943 data->temp_src[val] &= 0x0f;
944 } else {
945 data->temp_src[val] &= 0xf0;
946 }
947 data->temp_src[val] |= tmp;
948 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
949 mutex_unlock(&data->update_lock);
950
951 return count;
952}
953
954#define TEMP_PWM_ENABLE 0
955#define TEMP_PWM_FAN_MAP 1
956static ssize_t
957show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
958 char *buf)
959{
960 struct i2c_client *client = to_i2c_client(dev);
961 struct w83795_data *data = i2c_get_clientdata(client);
962 struct sensor_device_attribute_2 *sensor_attr =
963 to_sensor_dev_attr_2(attr);
964 int nr = sensor_attr->nr;
965 int index = sensor_attr->index;
966 u8 tmp = 0xff;
967
968 switch (nr) {
969 case TEMP_PWM_ENABLE:
970 tmp = (data->pwm_fcms[1] >> index) & 1;
971 if (tmp)
972 tmp = 4;
973 else
974 tmp = 3;
975 break;
976 case TEMP_PWM_FAN_MAP:
977 tmp = data->pwm_tfmr[index];
978 break;
979 }
980
981 return sprintf(buf, "%u\n", tmp);
982}
983
984static ssize_t
985store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
986 const char *buf, size_t count)
987{
988 struct i2c_client *client = to_i2c_client(dev);
989 struct w83795_data *data = i2c_get_clientdata(client);
990 struct sensor_device_attribute_2 *sensor_attr =
991 to_sensor_dev_attr_2(attr);
992 int nr = sensor_attr->nr;
993 int index = sensor_attr->index;
994 unsigned long tmp;
995
996 if (strict_strtoul(buf, 10, &tmp) < 0)
997 return -EINVAL;
998
999 switch (nr) {
1000 case TEMP_PWM_ENABLE:
1001 if ((tmp != 3) && (tmp != 4))
1002 return -EINVAL;
1003 tmp -= 3;
1004 mutex_lock(&data->update_lock);
1005 data->pwm_fcms[1] &= ~(1 << index);
1006 data->pwm_fcms[1] |= tmp << index;
1007 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
1008 mutex_unlock(&data->update_lock);
1009 break;
1010 case TEMP_PWM_FAN_MAP:
1011 mutex_lock(&data->update_lock);
1012 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
1013 w83795_write(client, W83795_REG_TFMR(index), tmp);
1014 data->pwm_tfmr[index] = tmp;
1015 mutex_unlock(&data->update_lock);
1016 break;
1017 }
1018 return count;
1019}
1020
1021#define FANIN_TARGET 0
1022#define FANIN_TOL 1
1023static ssize_t
1024show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
1025{
1026 struct i2c_client *client = to_i2c_client(dev);
1027 struct w83795_data *data = i2c_get_clientdata(client);
1028 struct sensor_device_attribute_2 *sensor_attr =
1029 to_sensor_dev_attr_2(attr);
1030 int nr = sensor_attr->nr;
1031 int index = sensor_attr->index;
1032 u16 tmp = 0;
1033
1034 switch (nr) {
1035 case FANIN_TARGET:
1036 tmp = fan_from_reg(data->target_speed[index]);
1037 break;
1038 case FANIN_TOL:
1039 tmp = data->tol_speed;
1040 break;
1041 }
1042
1043 return sprintf(buf, "%u\n", tmp);
1044}
1045
1046static ssize_t
1047store_fanin(struct device *dev, struct device_attribute *attr,
1048 const char *buf, size_t count)
1049{
1050 struct i2c_client *client = to_i2c_client(dev);
1051 struct w83795_data *data = i2c_get_clientdata(client);
1052 struct sensor_device_attribute_2 *sensor_attr =
1053 to_sensor_dev_attr_2(attr);
1054 int nr = sensor_attr->nr;
1055 int index = sensor_attr->index;
1056 unsigned long val;
1057
1058 if (strict_strtoul(buf, 10, &val) < 0)
1059 return -EINVAL;
1060
1061 mutex_lock(&data->update_lock);
1062 switch (nr) {
1063 case FANIN_TARGET:
1064 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
1065 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
1066 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
1067 data->target_speed[index] = val;
1068 break;
1069 case FANIN_TOL:
1070 val = SENSORS_LIMIT(val, 0, 0x3f);
1071 w83795_write(client, W83795_REG_TFTS, val);
1072 data->tol_speed = val;
1073 break;
1074 }
1075 mutex_unlock(&data->update_lock);
1076
1077 return count;
1078}
1079
1080
1081static ssize_t
1082show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1083{
1084 struct i2c_client *client = to_i2c_client(dev);
1085 struct w83795_data *data = i2c_get_clientdata(client);
1086 struct sensor_device_attribute_2 *sensor_attr =
1087 to_sensor_dev_attr_2(attr);
1088 int nr = sensor_attr->nr;
1089 int index = sensor_attr->index;
1090 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1091
1092 return sprintf(buf, "%ld\n", tmp);
1093}
1094
1095static ssize_t
1096store_temp_pwm(struct device *dev, struct device_attribute *attr,
1097 const char *buf, size_t count)
1098{
1099 struct i2c_client *client = to_i2c_client(dev);
1100 struct w83795_data *data = i2c_get_clientdata(client);
1101 struct sensor_device_attribute_2 *sensor_attr =
1102 to_sensor_dev_attr_2(attr);
1103 int nr = sensor_attr->nr;
1104 int index = sensor_attr->index;
1105 unsigned long val;
1106 u8 tmp;
1107
1108 if (strict_strtoul(buf, 10, &val) < 0)
1109 return -EINVAL;
1110 val /= 1000;
1111
1112 mutex_lock(&data->update_lock);
1113 switch (nr) {
1114 case TEMP_PWM_TTTI:
1115 val = SENSORS_LIMIT(val, 0, 0x7f);
1116 w83795_write(client, W83795_REG_TTTI(index), val);
1117 break;
1118 case TEMP_PWM_CTFS:
1119 val = SENSORS_LIMIT(val, 0, 0x7f);
1120 w83795_write(client, W83795_REG_CTFS(index), val);
1121 break;
1122 case TEMP_PWM_HCT:
1123 val = SENSORS_LIMIT(val, 0, 0x0f);
1124 tmp = w83795_read(client, W83795_REG_HT(index));
1125 tmp &= 0x0f;
1126 tmp |= (val << 4) & 0xf0;
1127 w83795_write(client, W83795_REG_HT(index), tmp);
1128 break;
1129 case TEMP_PWM_HOT:
1130 val = SENSORS_LIMIT(val, 0, 0x0f);
1131 tmp = w83795_read(client, W83795_REG_HT(index));
1132 tmp &= 0xf0;
1133 tmp |= val & 0x0f;
1134 w83795_write(client, W83795_REG_HT(index), tmp);
1135 break;
1136 }
1137 data->pwm_temp[index][nr] = val;
1138 mutex_unlock(&data->update_lock);
1139
1140 return count;
1141}
1142
1143static ssize_t
1144show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1145{
1146 struct i2c_client *client = to_i2c_client(dev);
1147 struct w83795_data *data = i2c_get_clientdata(client);
1148 struct sensor_device_attribute_2 *sensor_attr =
1149 to_sensor_dev_attr_2(attr);
1150 int nr = sensor_attr->nr;
1151 int index = sensor_attr->index;
1152
1153 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1154}
1155
1156static ssize_t
1157store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1158 const char *buf, size_t count)
1159{
1160 struct i2c_client *client = to_i2c_client(dev);
1161 struct w83795_data *data = i2c_get_clientdata(client);
1162 struct sensor_device_attribute_2 *sensor_attr =
1163 to_sensor_dev_attr_2(attr);
1164 int nr = sensor_attr->nr;
1165 int index = sensor_attr->index;
1166 unsigned long val;
1167
1168 if (strict_strtoul(buf, 10, &val) < 0)
1169 return -EINVAL;
1170
1171 mutex_lock(&data->update_lock);
1172 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1173 data->sf4_reg[index][SF4_PWM][nr] = val;
1174 mutex_unlock(&data->update_lock);
1175
1176 return count;
1177}
1178
1179static ssize_t
1180show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1181{
1182 struct i2c_client *client = to_i2c_client(dev);
1183 struct w83795_data *data = i2c_get_clientdata(client);
1184 struct sensor_device_attribute_2 *sensor_attr =
1185 to_sensor_dev_attr_2(attr);
1186 int nr = sensor_attr->nr;
1187 int index = sensor_attr->index;
1188
1189 return sprintf(buf, "%u\n",
1190 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1191}
1192
1193static ssize_t
1194store_sf4_temp(struct device *dev, struct device_attribute *attr,
1195 const char *buf, size_t count)
1196{
1197 struct i2c_client *client = to_i2c_client(dev);
1198 struct w83795_data *data = i2c_get_clientdata(client);
1199 struct sensor_device_attribute_2 *sensor_attr =
1200 to_sensor_dev_attr_2(attr);
1201 int nr = sensor_attr->nr;
1202 int index = sensor_attr->index;
1203 unsigned long val;
1204
1205 if (strict_strtoul(buf, 10, &val) < 0)
1206 return -EINVAL;
1207 val /= 1000;
1208
1209 mutex_lock(&data->update_lock);
1210 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1211 data->sf4_reg[index][SF4_TEMP][nr] = val;
1212 mutex_unlock(&data->update_lock);
1213
1214 return count;
1215}
1216
1217
1218static ssize_t
1219show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1220{
1221 struct sensor_device_attribute_2 *sensor_attr =
1222 to_sensor_dev_attr_2(attr);
1223 int nr = sensor_attr->nr;
1224 int index = sensor_attr->index;
1225 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1226 long temp = temp_from_reg(data->temp[index][nr]);
792d376b
WS		 1227
1228 if (TEMP_READ == nr)
a654b9d4 1229 temp += (data->temp_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1230 return sprintf(buf, "%ld\n", temp);
1231}
1232
1233static ssize_t
1234store_temp(struct device *dev, struct device_attribute *attr,
1235 const char *buf, size_t count)
1236{
1237 struct sensor_device_attribute_2 *sensor_attr =
1238 to_sensor_dev_attr_2(attr);
1239 int nr = sensor_attr->nr;
1240 int index = sensor_attr->index;
1241 struct i2c_client *client = to_i2c_client(dev);
1242 struct w83795_data *data = i2c_get_clientdata(client);
1243 long tmp;
1244
1245 if (strict_strtol(buf, 10, &tmp) < 0)
1246 return -EINVAL;
1247
1248 mutex_lock(&data->update_lock);
1249 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1250 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1251 mutex_unlock(&data->update_lock);
1252 return count;
1253}
1254
1255
1256static ssize_t
1257show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1258{
1259 struct i2c_client *client = to_i2c_client(dev);
1260 struct w83795_data *data = i2c_get_clientdata(client);
39deb699 1261 int tmp;
792d376b 1262
39deb699
JD		 1263 if (data->enable_dts & 2)
1264 tmp = 5;
1265 else
1266 tmp = 6;
792d376b
WS		 1267
1268 return sprintf(buf, "%d\n", tmp);
1269}
1270
1271static ssize_t
1272show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1273{
1274 struct sensor_device_attribute_2 *sensor_attr =
1275 to_sensor_dev_attr_2(attr);
1276 int index = sensor_attr->index;
1277 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1278 long temp = temp_from_reg(data->dts[index]);
792d376b 1279
a654b9d4 1280 temp += (data->dts_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1281 return sprintf(buf, "%ld\n", temp);
1282}
1283
1284static ssize_t
1285show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1286{
1287 struct sensor_device_attribute_2 *sensor_attr =
1288 to_sensor_dev_attr_2(attr);
1289 int nr = sensor_attr->nr;
1290 struct i2c_client *client = to_i2c_client(dev);
1291 struct w83795_data *data = i2c_get_clientdata(client);
dd127f5c 1292 long temp = temp_from_reg(data->dts_ext[nr]);
792d376b 1293
792d376b
WS		 1294 return sprintf(buf, "%ld\n", temp);
1295}
1296
1297static ssize_t
1298store_dts_ext(struct device *dev, struct device_attribute *attr,
1299 const char *buf, size_t count)
1300{
1301 struct sensor_device_attribute_2 *sensor_attr =
1302 to_sensor_dev_attr_2(attr);
1303 int nr = sensor_attr->nr;
1304 struct i2c_client *client = to_i2c_client(dev);
1305 struct w83795_data *data = i2c_get_clientdata(client);
1306 long tmp;
1307
1308 if (strict_strtol(buf, 10, &tmp) < 0)
1309 return -EINVAL;
1310
1311 mutex_lock(&data->update_lock);
1312 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1313 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1314 mutex_unlock(&data->update_lock);
1315 return count;
1316}
1317
1318
792d376b
WS		 1319static ssize_t
1320show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1321{
1322 struct i2c_client *client = to_i2c_client(dev);
1323 struct w83795_data *data = i2c_get_clientdata(client);
1324 struct sensor_device_attribute_2 *sensor_attr =
1325 to_sensor_dev_attr_2(attr);
1326 int index = sensor_attr->index;
39deb699 1327 int tmp;
792d376b 1328
39deb699
JD		 1329 if (data->temp_mode & (1 << index))
1330 tmp = 3; /* Thermal diode */
1331 else
1332 tmp = 4; /* Thermistor */
792d376b
WS		 1333
1334 return sprintf(buf, "%d\n", tmp);
1335}
1336
39deb699 1337/* Only for temp1-4 (temp5-6 can only be thermistor) */
792d376b
WS		 1338static ssize_t
1339store_temp_mode(struct device *dev, struct device_attribute *attr,
1340 const char *buf, size_t count)
1341{
1342 struct i2c_client *client = to_i2c_client(dev);
1343 struct w83795_data *data = i2c_get_clientdata(client);
1344 struct sensor_device_attribute_2 *sensor_attr =
1345 to_sensor_dev_attr_2(attr);
1346 int index = sensor_attr->index;
39deb699 1347 int reg_shift;
792d376b
WS		 1348 unsigned long val;
1349 u8 tmp;
792d376b
WS		 1350
1351 if (strict_strtoul(buf, 10, &val) < 0)
1352 return -EINVAL;
1353 if ((val != 4) && (val != 3))
1354 return -EINVAL;
792d376b
WS		 1355
1356 mutex_lock(&data->update_lock);
1357 if (val == 3) {
39deb699
JD		 1358 /* Thermal diode */
1359 val = 0x01;
792d376b
WS		 1360 data->temp_mode |= 1 << index;
1361 } else if (val == 4) {
39deb699
JD		 1362 /* Thermistor */
1363 val = 0x03;
1364 data->temp_mode &= ~(1 << index);
792d376b
WS		 1365 }
1366
39deb699
JD		 1367 reg_shift = 2 * index;
1368 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1369 tmp &= ~(0x03 << reg_shift);
1370 tmp |= val << reg_shift;
1371 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
792d376b
WS		 1372
1373 mutex_unlock(&data->update_lock);
1374 return count;
1375}
1376
1377
1378/* show/store VIN */
1379static ssize_t
1380show_in(struct device *dev, struct device_attribute *attr, char *buf)
1381{
1382 struct sensor_device_attribute_2 *sensor_attr =
1383 to_sensor_dev_attr_2(attr);
1384 int nr = sensor_attr->nr;
1385 int index = sensor_attr->index;
1386 struct w83795_data *data = w83795_update_device(dev);
1387 u16 val = data->in[index][nr];
1388 u8 lsb_idx;
1389
1390 switch (nr) {
1391 case IN_READ:
1392 /* calculate this value again by sensors as sensors3.conf */
1393 if ((index >= 17) &&
6f9dfd85 1394 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1395 val *= 8;
1396 break;
1397 case IN_MAX:
1398 case IN_LOW:
1399 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1400 val <<= 2;
1401 val |= (data->in_lsb[lsb_idx][nr] >>
1402 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
1403 if ((index >= 17) &&
6f9dfd85 1404 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1405 val *= 8;
1406 break;
1407 }
1408 val = in_from_reg(index, val);
1409
1410 return sprintf(buf, "%d\n", val);
1411}
1412
1413static ssize_t
1414store_in(struct device *dev, struct device_attribute *attr,
1415 const char *buf, size_t count)
1416{
1417 struct sensor_device_attribute_2 *sensor_attr =
1418 to_sensor_dev_attr_2(attr);
1419 int nr = sensor_attr->nr;
1420 int index = sensor_attr->index;
1421 struct i2c_client *client = to_i2c_client(dev);
1422 struct w83795_data *data = i2c_get_clientdata(client);
1423 unsigned long val;
1424 u8 tmp;
1425 u8 lsb_idx;
1426
1427 if (strict_strtoul(buf, 10, &val) < 0)
1428 return -EINVAL;
1429 val = in_to_reg(index, val);
1430
1431 if ((index >= 17) &&
6f9dfd85 1432 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1433 val /= 8;
1434 val = SENSORS_LIMIT(val, 0, 0x3FF);
1435 mutex_lock(&data->update_lock);
1436
1437 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1438 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1439 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1440 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1441 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1442 data->in_lsb[lsb_idx][nr] = tmp;
1443
1444 tmp = (val >> 2) & 0xff;
1445 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1446 data->in[index][nr] = tmp;
1447
1448 mutex_unlock(&data->update_lock);
1449 return count;
1450}
1451
1452
1453static ssize_t
1454show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1455{
1456 struct sensor_device_attribute_2 *sensor_attr =
1457 to_sensor_dev_attr_2(attr);
1458 int nr = sensor_attr->nr;
1459 struct i2c_client *client = to_i2c_client(dev);
1460 struct w83795_data *data = i2c_get_clientdata(client);
1461 u16 val = data->setup_pwm[nr];
1462
1463 switch (nr) {
1464 case SETUP_PWM_UPTIME:
1465 case SETUP_PWM_DOWNTIME:
1466 val = time_from_reg(val);
1467 break;
1468 }
1469
1470 return sprintf(buf, "%d\n", val);
1471}
1472
1473static ssize_t
1474store_sf_setup(struct device *dev, struct device_attribute *attr,
1475 const char *buf, size_t count)
1476{
1477 struct sensor_device_attribute_2 *sensor_attr =
1478 to_sensor_dev_attr_2(attr);
1479 int nr = sensor_attr->nr;
1480 struct i2c_client *client = to_i2c_client(dev);
1481 struct w83795_data *data = i2c_get_clientdata(client);
1482 unsigned long val;
1483
1484 if (strict_strtoul(buf, 10, &val) < 0)
1485 return -EINVAL;
1486
1487 switch (nr) {
1488 case SETUP_PWM_DEFAULT:
1489 val = SENSORS_LIMIT(val, 0, 0xff);
1490 break;
1491 case SETUP_PWM_UPTIME:
1492 case SETUP_PWM_DOWNTIME:
1493 val = time_to_reg(val);
1494 if (val == 0)
1495 return -EINVAL;
1496 break;
1497 }
1498
1499 mutex_lock(&data->update_lock);
1500 data->setup_pwm[nr] = val;
1501 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1502 mutex_unlock(&data->update_lock);
1503 return count;
1504}
1505
1506
1507#define NOT_USED -1
1508
0e256018
JD		 1509/* Don't change the attribute order, _max and _min are accessed by index
1510 * somewhere else in the code */
87df0dad 1511#define SENSOR_ATTR_IN(index) { \
792d376b
WS		 1512 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1513 IN_READ, index), \
1514 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1515 store_in, IN_MAX, index), \
1516 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1517 store_in, IN_LOW, index), \
1518 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1519 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1520 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1521 show_alarm_beep, store_beep, BEEP_ENABLE, \
87df0dad 1522 index + ((index > 14) ? 1 : 0)) }
792d376b 1523
87df0dad 1524#define SENSOR_ATTR_FAN(index) { \
792d376b
WS		 1525 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1526 NULL, FAN_INPUT, index - 1), \
1527 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1528 show_fan, store_fan_min, FAN_MIN, index - 1), \
1529 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1530 NULL, ALARM_STATUS, index + 31), \
1531 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1532 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
792d376b 1533
b5f6a90a 1534#define SENSOR_ATTR_PWM(index) { \
792d376b
WS		 1535 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1536 store_pwm, PWM_OUTPUT, index - 1), \
1537 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1538 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1539 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1540 show_pwm, store_pwm, PWM_START, index - 1), \
1541 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1542 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
01879a85
JD		 1543 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1544 show_pwm, store_pwm, PWM_FREQ, index - 1), \
792d376b 1545 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
b2cc528e
JD		 1546 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1547 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1548 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
792d376b 1549
87df0dad 1550#define SENSOR_ATTR_DTS(index) { \
792d376b
WS		 1551 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1552 show_dts_mode, NULL, NOT_USED, index - 7), \
1553 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1554 NULL, NOT_USED, index - 7), \
a0ce402f 1555 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1556 store_dts_ext, DTS_CRIT, NOT_USED), \
a0ce402f 1557 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1558 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
a0ce402f 1559 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1560 store_dts_ext, DTS_WARN, NOT_USED), \
a0ce402f 1561 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1562 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1563 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1564 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1565 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1566 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
792d376b 1567
87df0dad 1568#define SENSOR_ATTR_TEMP(index) { \
39deb699 1569 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
792d376b
WS		 1570 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1571 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1572 NULL, TEMP_READ, index - 1), \
a0ce402f 1573 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1574 store_temp, TEMP_CRIT, index - 1), \
a0ce402f 1575 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1576 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
a0ce402f 1577 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1578 store_temp, TEMP_WARN, index - 1), \
a0ce402f 1579 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1580 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1581 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1582 show_alarm_beep, NULL, ALARM_STATUS, \
1583 index + (index > 4 ? 11 : 17)), \
1584 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1585 show_alarm_beep, store_beep, BEEP_ENABLE, \
1586 index + (index > 4 ? 11 : 17)), \
1587 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1588 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1589 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1590 show_temp_pwm_enable, store_temp_pwm_enable, \
1591 TEMP_PWM_ENABLE, index - 1), \
1592 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1593 show_temp_pwm_enable, store_temp_pwm_enable, \
1594 TEMP_PWM_FAN_MAP, index - 1), \
1595 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1596 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
a0ce402f 1597 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
792d376b 1598 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
a0ce402f 1599 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
792d376b
WS		 1600 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1601 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1602 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1603 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1604 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1605 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1606 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1607 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1608 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1609 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1610 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1611 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1612 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1613 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1614 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1615 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1616 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1617 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1618 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1619 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1620 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1621 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1622 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1623 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1624 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1625 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1626 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1627 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1628 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1629 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
87df0dad 1630 show_sf4_temp, store_sf4_temp, 6, index - 1) }
792d376b
WS		 1631
1632
87df0dad 1633static struct sensor_device_attribute_2 w83795_in[][5] = {
792d376b
WS		 1634 SENSOR_ATTR_IN(0),
1635 SENSOR_ATTR_IN(1),
1636 SENSOR_ATTR_IN(2),
1637 SENSOR_ATTR_IN(3),
1638 SENSOR_ATTR_IN(4),
1639 SENSOR_ATTR_IN(5),
1640 SENSOR_ATTR_IN(6),
1641 SENSOR_ATTR_IN(7),
1642 SENSOR_ATTR_IN(8),
1643 SENSOR_ATTR_IN(9),
1644 SENSOR_ATTR_IN(10),
1645 SENSOR_ATTR_IN(11),
1646 SENSOR_ATTR_IN(12),
1647 SENSOR_ATTR_IN(13),
1648 SENSOR_ATTR_IN(14),
1649 SENSOR_ATTR_IN(15),
1650 SENSOR_ATTR_IN(16),
1651 SENSOR_ATTR_IN(17),
1652 SENSOR_ATTR_IN(18),
1653 SENSOR_ATTR_IN(19),
1654 SENSOR_ATTR_IN(20),
1655};
1656
86ef4d2f 1657static const struct sensor_device_attribute_2 w83795_fan[][4] = {
792d376b
WS		 1658 SENSOR_ATTR_FAN(1),
1659 SENSOR_ATTR_FAN(2),
1660 SENSOR_ATTR_FAN(3),
1661 SENSOR_ATTR_FAN(4),
1662 SENSOR_ATTR_FAN(5),
1663 SENSOR_ATTR_FAN(6),
1664 SENSOR_ATTR_FAN(7),
1665 SENSOR_ATTR_FAN(8),
1666 SENSOR_ATTR_FAN(9),
1667 SENSOR_ATTR_FAN(10),
1668 SENSOR_ATTR_FAN(11),
1669 SENSOR_ATTR_FAN(12),
1670 SENSOR_ATTR_FAN(13),
1671 SENSOR_ATTR_FAN(14),
1672};
1673
86ef4d2f 1674static const struct sensor_device_attribute_2 w83795_temp[][29] = {
792d376b
WS		 1675 SENSOR_ATTR_TEMP(1),
1676 SENSOR_ATTR_TEMP(2),
1677 SENSOR_ATTR_TEMP(3),
1678 SENSOR_ATTR_TEMP(4),
1679 SENSOR_ATTR_TEMP(5),
1680 SENSOR_ATTR_TEMP(6),
1681};
1682
86ef4d2f 1683static const struct sensor_device_attribute_2 w83795_dts[][8] = {
792d376b
WS		 1684 SENSOR_ATTR_DTS(7),
1685 SENSOR_ATTR_DTS(8),
1686 SENSOR_ATTR_DTS(9),
1687 SENSOR_ATTR_DTS(10),
1688 SENSOR_ATTR_DTS(11),
1689 SENSOR_ATTR_DTS(12),
1690 SENSOR_ATTR_DTS(13),
1691 SENSOR_ATTR_DTS(14),
1692};
1693
86ef4d2f 1694static const struct sensor_device_attribute_2 w83795_pwm[][7] = {
b5f6a90a
JD		 1695 SENSOR_ATTR_PWM(1),
1696 SENSOR_ATTR_PWM(2),
792d376b
WS		 1697 SENSOR_ATTR_PWM(3),
1698 SENSOR_ATTR_PWM(4),
1699 SENSOR_ATTR_PWM(5),
1700 SENSOR_ATTR_PWM(6),
1701 SENSOR_ATTR_PWM(7),
1702 SENSOR_ATTR_PWM(8),
1703};
1704
86ef4d2f 1705static const struct sensor_device_attribute_2 sda_single_files[] = {
792d376b
WS		 1706 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1707 store_chassis_clear, ALARM_STATUS, 46),
02728ffe
JD		 1708 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1709 store_beep, BEEP_ENABLE, 47),
792d376b
WS		 1710 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1711 store_fanin, FANIN_TOL, NOT_USED),
1712 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1713 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1714 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1715 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1716 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1717 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1718};
1719
1720/*
1721 * Driver interface
1722 */
1723
1724static void w83795_init_client(struct i2c_client *client)
1725{
01879a85
JD		 1726 struct w83795_data *data = i2c_get_clientdata(client);
1727 static const u16 clkin[4] = { /* in kHz */
1728 14318, 24000, 33333, 48000
1729 };
80646b95
JD		 1730 u8 config;
1731
792d376b
WS		 1732 if (reset)
1733 w83795_write(client, W83795_REG_CONFIG, 0x80);
1734
80646b95
JD		 1735 /* Start monitoring if needed */
1736 config = w83795_read(client, W83795_REG_CONFIG);
1737 if (!(config & W83795_REG_CONFIG_START)) {
1738 dev_info(&client->dev, "Enabling monitoring operations\n");
1739 w83795_write(client, W83795_REG_CONFIG,
1740 config | W83795_REG_CONFIG_START);
1741 }
01879a85
JD		 1742
1743 data->clkin = clkin[(config >> 3) & 0x3];
1744 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
792d376b
WS		 1745}
1746
2be381de
JD		 1747static int w83795_get_device_id(struct i2c_client *client)
1748{
1749 int device_id;
1750
1751 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1752
1753 /* Special case for rev. A chips; can't be checked first because later
1754 revisions emulate this for compatibility */
1755 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1756 int alt_id;
1757
1758 alt_id = i2c_smbus_read_byte_data(client,
1759 W83795_REG_DEVICEID_A);
1760 if (alt_id == 0x50)
1761 device_id = alt_id;
1762 }
1763
1764 return device_id;
1765}
1766
792d376b
WS		 1767/* Return 0 if detection is successful, -ENODEV otherwise */
1768static int w83795_detect(struct i2c_client *client,
1769 struct i2c_board_info *info)
1770{
2be381de 1771 int bank, vendor_id, device_id, expected, i2c_addr, config;
792d376b
WS		 1772 struct i2c_adapter *adapter = client->adapter;
1773 unsigned short address = client->addr;
093d1a47 1774 const char *chip_name;
792d376b
WS		 1775
1776 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1777 return -ENODEV;
1778 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2be381de
JD		 1779 if (bank < 0 || (bank & 0x7c)) {
1780 dev_dbg(&adapter->dev,
1781 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1782 address, "bank");
1783 return -ENODEV;
1784 }
792d376b 1785
792d376b 1786 /* Check Nuvoton vendor ID */
2be381de
JD		 1787 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1788 expected = bank & 0x80 ? 0x5c : 0xa3;
1789 if (vendor_id != expected) {
1790 dev_dbg(&adapter->dev,
1791 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1792 address, "vendor id");
792d376b
WS		 1793 return -ENODEV;
1794 }
1795
2be381de
JD		 1796 /* Check device ID */
1797 device_id = w83795_get_device_id(client) |
1798 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1799 if ((device_id >> 4) != 0x795) {
1800 dev_dbg(&adapter->dev,
1801 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1802 address, "device id\n");
792d376b
WS		 1803 return -ENODEV;
1804 }
1805
2be381de
JD		 1806 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1807 should match */
1808 if ((bank & 0x07) == 0) {
1809 i2c_addr = i2c_smbus_read_byte_data(client,
1810 W83795_REG_I2C_ADDR);
1811 if ((i2c_addr & 0x7f) != address) {
1812 dev_dbg(&adapter->dev,
1813 "w83795: Detection failed at addr 0x%02hx, "
1814 "check %s\n", address, "i2c addr");
1815 return -ENODEV;
1816 }
792d376b
WS		 1817 }
1818
093d1a47
JD		 1819 /* Check 795 chip type: 795G or 795ADG
1820 Usually we don't write to chips during detection, but here we don't
1821 quite have the choice; hopefully it's OK, we are about to return
1822 success anyway */
1823 if ((bank & 0x07) != 0)
1824 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1825 bank & ~0x07);
2be381de
JD		 1826 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1827 if (config & W83795_REG_CONFIG_CONFIG48)
093d1a47 1828 chip_name = "w83795adg";
2be381de 1829 else
093d1a47 1830 chip_name = "w83795g";
792d376b 1831
093d1a47 1832 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
2be381de
JD		 1833 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1834 'A' + (device_id & 0xf), address);
792d376b
WS		 1835
1836 return 0;
1837}
1838
6f3dcde9
JD		 1839static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1840 const struct device_attribute *))
892514a6
JD		 1841{
1842 struct w83795_data *data = dev_get_drvdata(dev);
87df0dad 1843 int err, i, j;
892514a6
JD		 1844
1845 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
87df0dad 1846 if (!(data->has_in & (1 << i)))
892514a6 1847 continue;
87df0dad
JD		 1848 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1849 err = fn(dev, &w83795_in[i][j].dev_attr);
1850 if (err)
1851 return err;
1852 }
892514a6
JD		 1853 }
1854
1855 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
87df0dad 1856 if (!(data->has_fan & (1 << i)))
892514a6 1857 continue;
87df0dad
JD		 1858 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1859 err = fn(dev, &w83795_fan[i][j].dev_attr);
1860 if (err)
1861 return err;
1862 }
892514a6
JD		 1863 }
1864
1865 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
6f3dcde9 1866 err = fn(dev, &sda_single_files[i].dev_attr);
892514a6
JD		 1867 if (err)
1868 return err;
1869 }
1870
b5f6a90a
JD		 1871 for (i = 0; i < data->has_pwm; i++) {
1872 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1873 err = fn(dev, &w83795_pwm[i][j].dev_attr);
892514a6
JD		 1874 if (err)
1875 return err;
1876 }
1877 }
1878
1879 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
87df0dad 1880 if (!(data->has_temp & (1 << i)))
892514a6 1881 continue;
87df0dad
JD		 1882 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
1883 err = fn(dev, &w83795_temp[i][j].dev_attr);
1884 if (err)
1885 return err;
1886 }
892514a6
JD		 1887 }
1888
1889 if (data->enable_dts != 0) {
1890 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
87df0dad 1891 if (!(data->has_dts & (1 << i)))
892514a6 1892 continue;
87df0dad
JD		 1893 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1894 err = fn(dev, &w83795_dts[i][j].dev_attr);
1895 if (err)
1896 return err;
1897 }
892514a6
JD		 1898 }
1899 }
1900
892514a6
JD		 1901 return 0;
1902}
1903
6f3dcde9
JD		 1904/* We need a wrapper that fits in w83795_handle_files */
1905static int device_remove_file_wrapper(struct device *dev,
1906 const struct device_attribute *attr)
2fa09878 1907{
6f3dcde9
JD		 1908 device_remove_file(dev, attr);
1909 return 0;
2fa09878
JD		 1910}
1911
0e256018
JD		 1912static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1913{
1914 struct w83795_data *data = i2c_get_clientdata(client);
1915 u8 vid_ctl;
1916 int i, err_max, err_min;
1917
1918 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
1919
1920 /* Return immediately if VRM isn't configured */
1921 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
1922 return;
1923
1924 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
1925 for (i = 0; i < 2; i++) {
1926 if (!(data->has_dyn_in & (1 << i)))
1927 continue;
1928
1929 /* Voltage limits in dynamic mode, switch to read-only */
1930 err_max = sysfs_chmod_file(&client->dev.kobj,
1931 &w83795_in[i][2].dev_attr.attr,
1932 S_IRUGO);
1933 err_min = sysfs_chmod_file(&client->dev.kobj,
1934 &w83795_in[i][3].dev_attr.attr,
1935 S_IRUGO);
1936 if (err_max || err_min)
1937 dev_warn(&client->dev, "Failed to set in%d limits "
1938 "read-only (%d, %d)\n", i, err_max, err_min);
1939 else
1940 dev_info(&client->dev, "in%d limits set dynamically "
1941 "from VID\n", i);
1942 }
1943}
1944
71caf46f
JD		 1945/* Check pins that can be used for either temperature or voltage monitoring */
1946static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
1947 int temp_chan, int in_chan)
1948{
1949 /* config is a 2-bit value */
1950 switch (config) {
1951 case 0x2: /* Voltage monitoring */
1952 data->has_in |= 1 << in_chan;
1953 break;
1954 case 0x1: /* Thermal diode */
1955 if (temp_chan >= 4)
1956 break;
1957 data->temp_mode |= 1 << temp_chan;
1958 /* fall through */
1959 case 0x3: /* Thermistor */
1960 data->has_temp |= 1 << temp_chan;
1961 break;
1962 }
1963}
1964
792d376b
WS		 1965static int w83795_probe(struct i2c_client *client,
1966 const struct i2c_device_id *id)
1967{
1968 int i;
1969 u8 tmp;
1970 struct device *dev = &client->dev;
1971 struct w83795_data *data;
71caf46f 1972 int err;
792d376b
WS		 1973
1974 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1975 if (!data) {
1976 err = -ENOMEM;
1977 goto exit;
1978 }
1979
1980 i2c_set_clientdata(client, data);
093d1a47 1981 data->chip_type = id->driver_data;
792d376b
WS		 1982 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1983 mutex_init(&data->update_lock);
1984
1985 /* Initialize the chip */
1986 w83795_init_client(client);
1987
71caf46f
JD		 1988 /* Check which voltages and fans are present */
1989 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
1990 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
1991 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
1992 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
792d376b 1993
71caf46f 1994 /* Check which analog temperatures and extra voltages are present */
792d376b
WS		 1995 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1996 if (tmp & 0x20)
1997 data->enable_dts = 1;
71caf46f
JD		 1998 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
1999 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
792d376b 2000 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
71caf46f
JD		 2001 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
2002 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
2003 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
2004 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
792d376b
WS		 2005
2006 /* Check DTS enable status */
71caf46f 2007 if (data->enable_dts) {
792d376b
WS		 2008 if (1 & w83795_read(client, W83795_REG_DTSC))
2009 data->enable_dts |= 2;
2010 data->has_dts = w83795_read(client, W83795_REG_DTSE);
2011 }
2012
54891a3c
JD		 2013 /* Report PECI Tbase values */
2014 if (data->enable_dts == 1) {
2015 for (i = 0; i < 8; i++) {
2016 if (!(data->has_dts & (1 << i)))
2017 continue;
2018 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
2019 dev_info(&client->dev,
2020 "PECI agent %d Tbase temperature: %u\n",
2021 i + 1, (unsigned int)tmp & 0x7f);
2022 }
2023 }
2024
792d376b 2025 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
792d376b
WS		 2026
2027 /* pwm and smart fan */
2028 if (data->chip_type == w83795g)
2029 data->has_pwm = 8;
2030 else
2031 data->has_pwm = 2;
0d7237bf 2032 w83795_update_pwm_config(client);
792d376b 2033
6f3dcde9 2034 err = w83795_handle_files(dev, device_create_file);
892514a6
JD		 2035 if (err)
2036 goto exit_remove;
792d376b 2037
0e256018
JD		 2038 if (data->chip_type == w83795g)
2039 w83795_check_dynamic_in_limits(client);
2040
792d376b
WS		 2041 data->hwmon_dev = hwmon_device_register(dev);
2042 if (IS_ERR(data->hwmon_dev)) {
2043 err = PTR_ERR(data->hwmon_dev);
2044 goto exit_remove;
2045 }
2046
2047 return 0;
2048
792d376b 2049exit_remove:
6f3dcde9 2050 w83795_handle_files(dev, device_remove_file_wrapper);
792d376b
WS		 2051 kfree(data);
2052exit:
2053 return err;
2054}
2055
2056static int w83795_remove(struct i2c_client *client)
2057{
2058 struct w83795_data *data = i2c_get_clientdata(client);
792d376b
WS		 2059
2060 hwmon_device_unregister(data->hwmon_dev);
6f3dcde9 2061 w83795_handle_files(&client->dev, device_remove_file_wrapper);
792d376b
WS		 2062 kfree(data);
2063
2064 return 0;
2065}
2066
2067
2068static const struct i2c_device_id w83795_id[] = {
093d1a47
JD		 2069 { "w83795g", w83795g },
2070 { "w83795adg", w83795adg },
792d376b
WS		 2071 { }
2072};
2073MODULE_DEVICE_TABLE(i2c, w83795_id);
2074
2075static struct i2c_driver w83795_driver = {
2076 .driver = {
2077 .name = "w83795",
2078 },
2079 .probe = w83795_probe,
2080 .remove = w83795_remove,
2081 .id_table = w83795_id,
2082
2083 .class = I2C_CLASS_HWMON,
2084 .detect = w83795_detect,
2085 .address_list = normal_i2c,
2086};
2087
2088static int __init sensors_w83795_init(void)
2089{
2090 return i2c_add_driver(&w83795_driver);
2091}
2092
2093static void __exit sensors_w83795_exit(void)
2094{
2095 i2c_del_driver(&w83795_driver);
2096}
2097
2098MODULE_AUTHOR("Wei Song");
315bacfd 2099MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
792d376b
WS		 2100MODULE_LICENSE("GPL");
2101
2102module_init(sensors_w83795_init);
2103module_exit(sensors_w83795_exit);
Linux kernel - Deliverables
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