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hwmon: (w83795) Read the intrusion state properly
[deliverable/linux.git] / drivers / hwmon / w83795.c
CommitLineData
792d376b
WS		 1/*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
e3760b43 5 * Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
792d376b
WS		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation - version 2.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301 USA.
20 *
21 * Supports following chips:
22 *
23 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
24 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
25 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
26 */
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/i2c.h>
33#include <linux/hwmon.h>
34#include <linux/hwmon-sysfs.h>
35#include <linux/err.h>
36#include <linux/mutex.h>
37#include <linux/delay.h>
38
39/* Addresses to scan */
86ef4d2f
JD		 40static const unsigned short normal_i2c[] = {
41 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
42};
792d376b 43
792d376b
WS		 44
45static int reset;
46module_param(reset, bool, 0);
47MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
48
49
50#define W83795_REG_BANKSEL 0x00
51#define W83795_REG_VENDORID 0xfd
52#define W83795_REG_CHIPID 0xfe
53#define W83795_REG_DEVICEID 0xfb
2be381de 54#define W83795_REG_DEVICEID_A 0xff
792d376b
WS		 55
56#define W83795_REG_I2C_ADDR 0xfc
57#define W83795_REG_CONFIG 0x01
58#define W83795_REG_CONFIG_CONFIG48 0x04
80646b95 59#define W83795_REG_CONFIG_START 0x01
792d376b
WS		 60
61/* Multi-Function Pin Ctrl Registers */
62#define W83795_REG_VOLT_CTRL1 0x02
63#define W83795_REG_VOLT_CTRL2 0x03
64#define W83795_REG_TEMP_CTRL1 0x04
65#define W83795_REG_TEMP_CTRL2 0x05
66#define W83795_REG_FANIN_CTRL1 0x06
67#define W83795_REG_FANIN_CTRL2 0x07
68#define W83795_REG_VMIGB_CTRL 0x08
69
792d376b
WS		 70#define TEMP_READ 0
71#define TEMP_CRIT 1
72#define TEMP_CRIT_HYST 2
73#define TEMP_WARN 3
74#define TEMP_WARN_HYST 4
75/* only crit and crit_hyst affect real-time alarm status
76 * current crit crit_hyst warn warn_hyst */
86ef4d2f 77static const u16 W83795_REG_TEMP[][5] = {
792d376b
WS		 78 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
79 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
80 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
81 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
82 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
83 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
84};
85
86#define IN_READ 0
87#define IN_MAX 1
88#define IN_LOW 2
89static const u16 W83795_REG_IN[][3] = {
90 /* Current, HL, LL */
91 {0x10, 0x70, 0x71}, /* VSEN1 */
92 {0x11, 0x72, 0x73}, /* VSEN2 */
93 {0x12, 0x74, 0x75}, /* VSEN3 */
94 {0x13, 0x76, 0x77}, /* VSEN4 */
95 {0x14, 0x78, 0x79}, /* VSEN5 */
96 {0x15, 0x7a, 0x7b}, /* VSEN6 */
97 {0x16, 0x7c, 0x7d}, /* VSEN7 */
98 {0x17, 0x7e, 0x7f}, /* VSEN8 */
99 {0x18, 0x80, 0x81}, /* VSEN9 */
100 {0x19, 0x82, 0x83}, /* VSEN10 */
101 {0x1A, 0x84, 0x85}, /* VSEN11 */
102 {0x1B, 0x86, 0x87}, /* VTT */
103 {0x1C, 0x88, 0x89}, /* 3VDD */
104 {0x1D, 0x8a, 0x8b}, /* 3VSB */
105 {0x1E, 0x8c, 0x8d}, /* VBAT */
106 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
107 {0x20, 0xaa, 0xab}, /* VSEN13 */
108 {0x21, 0x96, 0x97}, /* VSEN14 */
109 {0x22, 0x9a, 0x9b}, /* VSEN15 */
110 {0x23, 0x9e, 0x9f}, /* VSEN16 */
111 {0x24, 0xa2, 0xa3}, /* VSEN17 */
112};
113#define W83795_REG_VRLSB 0x3C
792d376b
WS		 114
115static const u8 W83795_REG_IN_HL_LSB[] = {
116 0x8e, /* VSEN1-4 */
117 0x90, /* VSEN5-8 */
118 0x92, /* VSEN9-11 */
119 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
120 0xa8, /* VSEN12 */
121 0xac, /* VSEN13 */
122 0x98, /* VSEN14 */
123 0x9c, /* VSEN15 */
124 0xa0, /* VSEN16 */
125 0xa4, /* VSEN17 */
126};
127
128#define IN_LSB_REG(index, type) \
129 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
130 : (W83795_REG_IN_HL_LSB[(index)] + 1))
131
792d376b
WS		 132#define IN_LSB_SHIFT 0
133#define IN_LSB_IDX 1
134static const u8 IN_LSB_SHIFT_IDX[][2] = {
135 /* High/Low LSB shift, LSB No. */
136 {0x00, 0x00}, /* VSEN1 */
137 {0x02, 0x00}, /* VSEN2 */
138 {0x04, 0x00}, /* VSEN3 */
139 {0x06, 0x00}, /* VSEN4 */
140 {0x00, 0x01}, /* VSEN5 */
141 {0x02, 0x01}, /* VSEN6 */
142 {0x04, 0x01}, /* VSEN7 */
143 {0x06, 0x01}, /* VSEN8 */
144 {0x00, 0x02}, /* VSEN9 */
145 {0x02, 0x02}, /* VSEN10 */
146 {0x04, 0x02}, /* VSEN11 */
147 {0x00, 0x03}, /* VTT */
148 {0x02, 0x03}, /* 3VDD */
149 {0x04, 0x03}, /* 3VSB */
150 {0x06, 0x03}, /* VBAT */
151 {0x06, 0x04}, /* VSEN12 */
152 {0x06, 0x05}, /* VSEN13 */
153 {0x06, 0x06}, /* VSEN14 */
154 {0x06, 0x07}, /* VSEN15 */
155 {0x06, 0x08}, /* VSEN16 */
156 {0x06, 0x09}, /* VSEN17 */
157};
158
159
792d376b
WS		 160#define W83795_REG_FAN(index) (0x2E + (index))
161#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
162#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
163#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
7eb8d508 164 (((index) & 1) ? 4 : 0)
792d376b
WS		 165
166#define W83795_REG_VID_CTRL 0x6A
167
cf6b9ea6
JD		 168#define W83795_REG_ALARM_CTRL 0x40
169#define ALARM_CTRL_RTSACS (1 << 7)
792d376b 170#define W83795_REG_ALARM(index) (0x41 + (index))
792d376b 171#define W83795_REG_CLR_CHASSIS 0x4D
cf6b9ea6 172#define W83795_REG_BEEP(index) (0x50 + (index))
792d376b
WS		 173
174
792d376b
WS		 175#define W83795_REG_FCMS1 0x201
176#define W83795_REG_FCMS2 0x208
177#define W83795_REG_TFMR(index) (0x202 + (index))
178#define W83795_REG_FOMC 0x20F
792d376b
WS		 179
180#define W83795_REG_TSS(index) (0x209 + (index))
181
edff2f8d
JD		 182#define TSS_MAP_RESERVED 0xff
183static const u8 tss_map[4][6] = {
184 { 0, 1, 2, 3, 4, 5},
185 { 6, 7, 8, 9, 0, 1},
186 {10, 11, 12, 13, 2, 3},
187 { 4, 5, 4, 5, TSS_MAP_RESERVED, TSS_MAP_RESERVED},
188};
189
792d376b 190#define PWM_OUTPUT 0
fd7f82b8
JD		 191#define PWM_FREQ 1
192#define PWM_START 2
193#define PWM_NONSTOP 3
194#define PWM_STOP_TIME 4
195#define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
792d376b 196
792d376b
WS		 197#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
198#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
199#define W83795_REG_TFTS 0x250
200
201#define TEMP_PWM_TTTI 0
202#define TEMP_PWM_CTFS 1
203#define TEMP_PWM_HCT 2
204#define TEMP_PWM_HOT 3
205#define W83795_REG_TTTI(index) (0x260 + (index))
206#define W83795_REG_CTFS(index) (0x268 + (index))
207#define W83795_REG_HT(index) (0x270 + (index))
208
209#define SF4_TEMP 0
210#define SF4_PWM 1
211#define W83795_REG_SF4_TEMP(temp_num, index) \
212 (0x280 + 0x10 * (temp_num) + (index))
213#define W83795_REG_SF4_PWM(temp_num, index) \
214 (0x288 + 0x10 * (temp_num) + (index))
215
216#define W83795_REG_DTSC 0x301
217#define W83795_REG_DTSE 0x302
218#define W83795_REG_DTS(index) (0x26 + (index))
54891a3c 219#define W83795_REG_PECI_TBASE(index) (0x320 + (index))
792d376b
WS		 220
221#define DTS_CRIT 0
222#define DTS_CRIT_HYST 1
223#define DTS_WARN 2
224#define DTS_WARN_HYST 3
225#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
226
227#define SETUP_PWM_DEFAULT 0
228#define SETUP_PWM_UPTIME 1
229#define SETUP_PWM_DOWNTIME 2
230#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
231
232static inline u16 in_from_reg(u8 index, u16 val)
233{
49c7347a
JD		 234 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
235 if (index >= 12 && index <= 14)
792d376b
WS		 236 return val * 6;
237 else
238 return val * 2;
239}
240
241static inline u16 in_to_reg(u8 index, u16 val)
242{
49c7347a 243 if (index >= 12 && index <= 14)
792d376b
WS		 244 return val / 6;
245 else
246 return val / 2;
247}
248
249static inline unsigned long fan_from_reg(u16 val)
250{
6c82b2f3 251 if ((val == 0xfff) || (val == 0))
792d376b
WS		 252 return 0;
253 return 1350000UL / val;
254}
255
256static inline u16 fan_to_reg(long rpm)
257{
258 if (rpm <= 0)
259 return 0x0fff;
260 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
261}
262
263static inline unsigned long time_from_reg(u8 reg)
264{
265 return reg * 100;
266}
267
268static inline u8 time_to_reg(unsigned long val)
269{
270 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
271}
272
273static inline long temp_from_reg(s8 reg)
274{
275 return reg * 1000;
276}
277
278static inline s8 temp_to_reg(long val, s8 min, s8 max)
279{
dd127f5c 280 return SENSORS_LIMIT(val / 1000, min, max);
792d376b
WS		 281}
282
01879a85
JD		 283static const u16 pwm_freq_cksel0[16] = {
284 1024, 512, 341, 256, 205, 171, 146, 128,
285 85, 64, 32, 16, 8, 4, 2, 1
286};
287
288static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
289{
290 unsigned long base_clock;
291
292 if (reg & 0x80) {
293 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
294 return base_clock / ((reg & 0x7f) + 1);
295 } else
296 return pwm_freq_cksel0[reg & 0x0f];
297}
298
299static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
300{
301 unsigned long base_clock;
302 u8 reg0, reg1;
303 unsigned long best0, best1;
304
305 /* Best fit for cksel = 0 */
306 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
307 if (val > (pwm_freq_cksel0[reg0] +
308 pwm_freq_cksel0[reg0 + 1]) / 2)
309 break;
310 }
311 if (val < 375) /* cksel = 1 can't beat this */
312 return reg0;
313 best0 = pwm_freq_cksel0[reg0];
314
315 /* Best fit for cksel = 1 */
316 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
317 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
318 best1 = base_clock / reg1;
319 reg1 = 0x80 | (reg1 - 1);
320
321 /* Choose the closest one */
322 if (abs(val - best0) > abs(val - best1))
323 return reg1;
324 else
325 return reg0;
326}
792d376b
WS		 327
328enum chip_types {w83795g, w83795adg};
329
330struct w83795_data {
331 struct device *hwmon_dev;
332 struct mutex update_lock;
333 unsigned long last_updated; /* In jiffies */
334 enum chip_types chip_type;
335
336 u8 bank;
337
338 u32 has_in; /* Enable monitor VIN or not */
0e256018 339 u8 has_dyn_in; /* Only in2-0 can have this */
792d376b
WS		 340 u16 in[21][3]; /* Register value, read/high/low */
341 u8 in_lsb[10][3]; /* LSB Register value, high/low */
342 u8 has_gain; /* has gain: in17-20 * 8 */
343
344 u16 has_fan; /* Enable fan14-1 or not */
345 u16 fan[14]; /* Register value combine */
346 u16 fan_min[14]; /* Register value combine */
347
348 u8 has_temp; /* Enable monitor temp6-1 or not */
dd127f5c 349 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
792d376b 350 u8 temp_read_vrlsb[6];
39deb699 351 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
792d376b
WS		 352 u8 temp_src[3]; /* Register value */
353
354 u8 enable_dts; /* Enable PECI and SB-TSI,
355 * bit 0: =1 enable, =0 disable,
356 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
357 u8 has_dts; /* Enable monitor DTS temp */
dd127f5c 358 s8 dts[8]; /* Register value */
792d376b 359 u8 dts_read_vrlsb[8]; /* Register value */
dd127f5c 360 s8 dts_ext[4]; /* Register value */
792d376b
WS		 361
362 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
363 * no config register, only affected by chip
364 * type */
fd7f82b8
JD		 365 u8 pwm[8][5]; /* Register value, output, freq, start,
366 * non stop, stop time */
01879a85 367 u16 clkin; /* CLKIN frequency in kHz */
792d376b
WS		 368 u8 pwm_fcms[2]; /* Register value */
369 u8 pwm_tfmr[6]; /* Register value */
370 u8 pwm_fomc; /* Register value */
371
372 u16 target_speed[8]; /* Register value, target speed for speed
373 * cruise */
374 u8 tol_speed; /* tolerance of target speed */
375 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
376 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
377
378 u8 setup_pwm[3]; /* Register value */
379
380 u8 alarms[6]; /* Register value */
381 u8 beeps[6]; /* Register value */
792d376b
WS		 382
383 char valid;
2ae61de9 384 char valid_limits;
1bb3450c 385 char valid_pwm_config;
792d376b
WS		 386};
387
388/*
389 * Hardware access
b2469f42 390 * We assume that nobdody can change the bank outside the driver.
792d376b
WS		 391 */
392
b2469f42
JD		 393/* Must be called with data->update_lock held, except during initialization */
394static int w83795_set_bank(struct i2c_client *client, u8 bank)
792d376b
WS		 395{
396 struct w83795_data *data = i2c_get_clientdata(client);
b2469f42
JD		 397 int err;
398
399 /* If the same bank is already set, nothing to do */
400 if ((data->bank & 0x07) == bank)
401 return 0;
402
403 /* Change to new bank, preserve all other bits */
404 bank |= data->bank & ~0x07;
405 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
406 if (err < 0) {
407 dev_err(&client->dev,
408 "Failed to set bank to %d, err %d\n",
409 (int)bank, err);
410 return err;
792d376b 411 }
b2469f42
JD		 412 data->bank = bank;
413
414 return 0;
792d376b
WS		 415}
416
417/* Must be called with data->update_lock held, except during initialization */
b2469f42 418static u8 w83795_read(struct i2c_client *client, u16 reg)
792d376b 419{
b2469f42
JD		 420 int err;
421
422 err = w83795_set_bank(client, reg >> 8);
423 if (err < 0)
424 return 0x00; /* Arbitrary */
425
426 err = i2c_smbus_read_byte_data(client, reg & 0xff);
427 if (err < 0) {
428 dev_err(&client->dev,
429 "Failed to read from register 0x%03x, err %d\n",
430 (int)reg, err);
431 return 0x00; /* Arbitrary */
792d376b 432 }
b2469f42
JD		 433 return err;
434}
792d376b 435
b2469f42
JD		 436/* Must be called with data->update_lock held, except during initialization */
437static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
438{
439 int err;
440
441 err = w83795_set_bank(client, reg >> 8);
442 if (err < 0)
443 return err;
444
445 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
446 if (err < 0)
447 dev_err(&client->dev,
448 "Failed to write to register 0x%03x, err %d\n",
449 (int)reg, err);
450 return err;
792d376b
WS		 451}
452
0d7237bf
JD		 453static void w83795_update_limits(struct i2c_client *client)
454{
455 struct w83795_data *data = i2c_get_clientdata(client);
456 int i, limit;
457
458 /* Read the voltage limits */
459 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
460 if (!(data->has_in & (1 << i)))
461 continue;
462 data->in[i][IN_MAX] =
463 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
464 data->in[i][IN_LOW] =
465 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
466 }
467 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
468 if ((i == 2 && data->chip_type == w83795adg) ||
469 (i >= 4 && !(data->has_in & (1 << (i + 11)))))
470 continue;
471 data->in_lsb[i][IN_MAX] =
472 w83795_read(client, IN_LSB_REG(i, IN_MAX));
473 data->in_lsb[i][IN_LOW] =
474 w83795_read(client, IN_LSB_REG(i, IN_LOW));
475 }
476
477 /* Read the fan limits */
478 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
479 u8 lsb;
480
481 /* Each register contains LSB for 2 fans, but we want to
482 * read it only once to save time */
483 if ((i & 1) == 0 && (data->has_fan & (3 << i)))
484 lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
485
486 if (!(data->has_fan & (1 << i)))
487 continue;
488 data->fan_min[i] =
489 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
490 data->fan_min[i] |=
491 (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
492 }
493
494 /* Read the temperature limits */
495 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
496 if (!(data->has_temp & (1 << i)))
497 continue;
498 for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
499 data->temp[i][limit] =
500 w83795_read(client, W83795_REG_TEMP[i][limit]);
501 }
502
503 /* Read the DTS limits */
eb02755a 504 if (data->enable_dts) {
0d7237bf
JD		 505 for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
506 data->dts_ext[limit] =
507 w83795_read(client, W83795_REG_DTS_EXT(limit));
508 }
509
510 /* Read beep settings */
511 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
512 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
2ae61de9
JD		 513
514 data->valid_limits = 1;
0d7237bf
JD		 515}
516
1bb3450c 517static struct w83795_data *w83795_update_pwm_config(struct device *dev)
0d7237bf 518{
1bb3450c 519 struct i2c_client *client = to_i2c_client(dev);
0d7237bf
JD		 520 struct w83795_data *data = i2c_get_clientdata(client);
521 int i, tmp;
522
1bb3450c
JD		 523 mutex_lock(&data->update_lock);
524
525 if (data->valid_pwm_config)
526 goto END;
527
0d7237bf
JD		 528 /* Read temperature source selection */
529 for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
530 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
531
532 /* Read automatic fan speed control settings */
533 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
534 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
535 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
536 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
537 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
538 for (i = 0; i < data->has_pwm; i++) {
539 for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
540 data->pwm[i][tmp] =
541 w83795_read(client, W83795_REG_PWM(i, tmp));
542 }
543 for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
544 data->target_speed[i] =
545 w83795_read(client, W83795_REG_FTSH(i)) << 4;
546 data->target_speed[i] |=
547 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
548 }
549 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
550
551 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
552 data->pwm_temp[i][TEMP_PWM_TTTI] =
553 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
554 data->pwm_temp[i][TEMP_PWM_CTFS] =
555 w83795_read(client, W83795_REG_CTFS(i));
556 tmp = w83795_read(client, W83795_REG_HT(i));
eb02755a 557 data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
0d7237bf
JD		 558 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
559 }
560
561 /* Read SmartFanIV trip points */
562 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
563 for (tmp = 0; tmp < 7; tmp++) {
564 data->sf4_reg[i][SF4_TEMP][tmp] =
565 w83795_read(client,
566 W83795_REG_SF4_TEMP(i, tmp));
567 data->sf4_reg[i][SF4_PWM][tmp] =
568 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
569 }
570 }
571
572 /* Read setup PWM */
573 for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
574 data->setup_pwm[i] =
575 w83795_read(client, W83795_REG_SETUP_PWM(i));
1bb3450c
JD		 576
577 data->valid_pwm_config = 1;
578
579END:
580 mutex_unlock(&data->update_lock);
581 return data;
0d7237bf
JD		 582}
583
792d376b
WS		 584static struct w83795_data *w83795_update_device(struct device *dev)
585{
586 struct i2c_client *client = to_i2c_client(dev);
587 struct w83795_data *data = i2c_get_clientdata(client);
588 u16 tmp;
cf6b9ea6 589 u8 intrusion;
792d376b
WS		 590 int i;
591
592 mutex_lock(&data->update_lock);
593
2ae61de9
JD		 594 if (!data->valid_limits)
595 w83795_update_limits(client);
596
792d376b
WS		 597 if (!(time_after(jiffies, data->last_updated + HZ * 2)
598 || !data->valid))
599 goto END;
600
601 /* Update the voltages value */
602 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
603 if (!(data->has_in & (1 << i)))
604 continue;
605 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
a654b9d4 606 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
792d376b
WS		 607 data->in[i][IN_READ] = tmp;
608 }
609
0e256018
JD		 610 /* in0-2 can have dynamic limits (W83795G only) */
611 if (data->has_dyn_in) {
612 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
613 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
614
615 for (i = 0; i < 3; i++) {
616 if (!(data->has_dyn_in & (1 << i)))
617 continue;
618 data->in[i][IN_MAX] =
619 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
620 data->in[i][IN_LOW] =
621 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
622 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
623 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
624 }
625 }
626
792d376b
WS		 627 /* Update fan */
628 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
629 if (!(data->has_fan & (1 << i)))
630 continue;
631 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
eb02755a 632 data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
792d376b
WS		 633 }
634
635 /* Update temperature */
636 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
792d376b
WS		 637 data->temp[i][TEMP_READ] =
638 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
639 data->temp_read_vrlsb[i] =
640 w83795_read(client, W83795_REG_VRLSB);
641 }
642
643 /* Update dts temperature */
eb02755a 644 if (data->enable_dts) {
792d376b
WS		 645 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
646 if (!(data->has_dts & (1 << i)))
647 continue;
648 data->dts[i] =
649 w83795_read(client, W83795_REG_DTS(i));
650 data->dts_read_vrlsb[i] =
651 w83795_read(client, W83795_REG_VRLSB);
652 }
653 }
654
655 /* Update pwm output */
656 for (i = 0; i < data->has_pwm; i++) {
657 data->pwm[i][PWM_OUTPUT] =
658 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
659 }
660
cf6b9ea6
JD		 661 /* Update intrusion and alarms
662 * It is important to read intrusion first, because reading from
663 * register SMI STS6 clears the interrupt status temporarily. */
664 tmp = w83795_read(client, W83795_REG_ALARM_CTRL);
665 /* Switch to interrupt status for intrusion if needed */
666 if (tmp & ALARM_CTRL_RTSACS)
667 w83795_write(client, W83795_REG_ALARM_CTRL,
668 tmp & ~ALARM_CTRL_RTSACS);
669 intrusion = w83795_read(client, W83795_REG_ALARM(5)) & (1 << 6);
670 /* Switch to real-time alarms */
671 w83795_write(client, W83795_REG_ALARM_CTRL, tmp | ALARM_CTRL_RTSACS);
cd316df5 672 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
792d376b 673 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
cf6b9ea6
JD		 674 data->alarms[5] |= intrusion;
675 /* Restore original configuration if needed */
676 if (!(tmp & ALARM_CTRL_RTSACS))
677 w83795_write(client, W83795_REG_ALARM_CTRL,
678 tmp & ~ALARM_CTRL_RTSACS);
792d376b
WS		 679
680 data->last_updated = jiffies;
681 data->valid = 1;
682
683END:
684 mutex_unlock(&data->update_lock);
685 return data;
686}
687
688/*
689 * Sysfs attributes
690 */
691
692#define ALARM_STATUS 0
693#define BEEP_ENABLE 1
694static ssize_t
695show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
696{
697 struct w83795_data *data = w83795_update_device(dev);
698 struct sensor_device_attribute_2 *sensor_attr =
699 to_sensor_dev_attr_2(attr);
700 int nr = sensor_attr->nr;
701 int index = sensor_attr->index >> 3;
702 int bit = sensor_attr->index & 0x07;
703 u8 val;
704
eb02755a
JD		 705 if (nr == ALARM_STATUS)
706 val = (data->alarms[index] >> bit) & 1;
707 else /* BEEP_ENABLE */
708 val = (data->beeps[index] >> bit) & 1;
792d376b
WS		 709
710 return sprintf(buf, "%u\n", val);
711}
712
713static ssize_t
714store_beep(struct device *dev, struct device_attribute *attr,
715 const char *buf, size_t count)
716{
717 struct i2c_client *client = to_i2c_client(dev);
718 struct w83795_data *data = i2c_get_clientdata(client);
719 struct sensor_device_attribute_2 *sensor_attr =
720 to_sensor_dev_attr_2(attr);
721 int index = sensor_attr->index >> 3;
722 int shift = sensor_attr->index & 0x07;
723 u8 beep_bit = 1 << shift;
724 unsigned long val;
725
726 if (strict_strtoul(buf, 10, &val) < 0)
727 return -EINVAL;
728 if (val != 0 && val != 1)
729 return -EINVAL;
730
731 mutex_lock(&data->update_lock);
732 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
733 data->beeps[index] &= ~beep_bit;
734 data->beeps[index] |= val << shift;
735 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
736 mutex_unlock(&data->update_lock);
737
738 return count;
739}
740
24377101 741/* Write 0 to clear chassis alarm */
792d376b
WS		 742static ssize_t
743store_chassis_clear(struct device *dev,
744 struct device_attribute *attr, const char *buf,
745 size_t count)
746{
747 struct i2c_client *client = to_i2c_client(dev);
748 struct w83795_data *data = i2c_get_clientdata(client);
24377101
JD		 749 unsigned long val;
750
751 if (strict_strtoul(buf, 10, &val) < 0 || val != 0)
752 return -EINVAL;
792d376b
WS		 753
754 mutex_lock(&data->update_lock);
755 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
756 val |= 0x80;
757 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
758 mutex_unlock(&data->update_lock);
759 return count;
760}
761
762#define FAN_INPUT 0
763#define FAN_MIN 1
764static ssize_t
765show_fan(struct device *dev, struct device_attribute *attr, char *buf)
766{
767 struct sensor_device_attribute_2 *sensor_attr =
768 to_sensor_dev_attr_2(attr);
769 int nr = sensor_attr->nr;
770 int index = sensor_attr->index;
771 struct w83795_data *data = w83795_update_device(dev);
772 u16 val;
773
eb02755a 774 if (nr == FAN_INPUT)
792d376b
WS		 775 val = data->fan[index] & 0x0fff;
776 else
777 val = data->fan_min[index] & 0x0fff;
778
779 return sprintf(buf, "%lu\n", fan_from_reg(val));
780}
781
782static ssize_t
783store_fan_min(struct device *dev, struct device_attribute *attr,
784 const char *buf, size_t count)
785{
786 struct sensor_device_attribute_2 *sensor_attr =
787 to_sensor_dev_attr_2(attr);
788 int index = sensor_attr->index;
789 struct i2c_client *client = to_i2c_client(dev);
790 struct w83795_data *data = i2c_get_clientdata(client);
791 unsigned long val;
792
793 if (strict_strtoul(buf, 10, &val))
794 return -EINVAL;
795 val = fan_to_reg(val);
796
797 mutex_lock(&data->update_lock);
798 data->fan_min[index] = val;
799 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
800 val &= 0x0f;
7eb8d508 801 if (index & 1) {
792d376b
WS		 802 val <<= 4;
803 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
804 & 0x0f;
805 } else {
806 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
807 & 0xf0;
808 }
809 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
810 mutex_unlock(&data->update_lock);
811
812 return count;
813}
814
815static ssize_t
816show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
817{
1bb3450c 818 struct w83795_data *data;
792d376b
WS		 819 struct sensor_device_attribute_2 *sensor_attr =
820 to_sensor_dev_attr_2(attr);
821 int nr = sensor_attr->nr;
822 int index = sensor_attr->index;
01879a85 823 unsigned int val;
792d376b 824
1bb3450c
JD		 825 data = nr == PWM_OUTPUT ? w83795_update_device(dev)
826 : w83795_update_pwm_config(dev);
827
792d376b
WS		 828 switch (nr) {
829 case PWM_STOP_TIME:
830 val = time_from_reg(data->pwm[index][nr]);
831 break;
01879a85
JD		 832 case PWM_FREQ:
833 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
792d376b
WS		 834 break;
835 default:
836 val = data->pwm[index][nr];
837 break;
838 }
839
840 return sprintf(buf, "%u\n", val);
841}
842
843static ssize_t
844store_pwm(struct device *dev, struct device_attribute *attr,
845 const char *buf, size_t count)
846{
847 struct i2c_client *client = to_i2c_client(dev);
848 struct w83795_data *data = i2c_get_clientdata(client);
849 struct sensor_device_attribute_2 *sensor_attr =
850 to_sensor_dev_attr_2(attr);
851 int nr = sensor_attr->nr;
852 int index = sensor_attr->index;
853 unsigned long val;
792d376b
WS		 854
855 if (strict_strtoul(buf, 10, &val) < 0)
856 return -EINVAL;
857
858 mutex_lock(&data->update_lock);
859 switch (nr) {
860 case PWM_STOP_TIME:
861 val = time_to_reg(val);
862 break;
01879a85
JD		 863 case PWM_FREQ:
864 val = pwm_freq_to_reg(val, data->clkin);
792d376b
WS		 865 break;
866 default:
867 val = SENSORS_LIMIT(val, 0, 0xff);
868 break;
869 }
870 w83795_write(client, W83795_REG_PWM(index, nr), val);
01879a85 871 data->pwm[index][nr] = val;
792d376b
WS		 872 mutex_unlock(&data->update_lock);
873 return count;
792d376b
WS		 874}
875
876static ssize_t
877show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
878{
879 struct sensor_device_attribute_2 *sensor_attr =
880 to_sensor_dev_attr_2(attr);
1bb3450c 881 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 882 int index = sensor_attr->index;
883 u8 tmp;
884
ae51cd9b
JD		 885 /* Speed cruise mode */
886 if (data->pwm_fcms[0] & (1 << index)) {
792d376b
WS		 887 tmp = 2;
888 goto out;
889 }
ae51cd9b 890 /* Thermal cruise or SmartFan IV mode */
792d376b
WS		 891 for (tmp = 0; tmp < 6; tmp++) {
892 if (data->pwm_tfmr[tmp] & (1 << index)) {
893 tmp = 3;
894 goto out;
895 }
896 }
ae51cd9b
JD		 897 /* Manual mode */
898 tmp = 1;
792d376b
WS		 899
900out:
901 return sprintf(buf, "%u\n", tmp);
902}
903
904static ssize_t
905store_pwm_enable(struct device *dev, struct device_attribute *attr,
906 const char *buf, size_t count)
907{
908 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 909 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 910 struct sensor_device_attribute_2 *sensor_attr =
911 to_sensor_dev_attr_2(attr);
912 int index = sensor_attr->index;
913 unsigned long val;
914 int i;
915
916 if (strict_strtoul(buf, 10, &val) < 0)
917 return -EINVAL;
ae51cd9b 918 if (val < 1 || val > 2)
792d376b
WS		 919 return -EINVAL;
920
921 mutex_lock(&data->update_lock);
922 switch (val) {
792d376b 923 case 1:
ae51cd9b 924 /* Clear speed cruise mode bits */
792d376b
WS		 925 data->pwm_fcms[0] &= ~(1 << index);
926 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
ae51cd9b 927 /* Clear thermal cruise mode bits */
792d376b
WS		 928 for (i = 0; i < 6; i++) {
929 data->pwm_tfmr[i] &= ~(1 << index);
930 w83795_write(client, W83795_REG_TFMR(i),
931 data->pwm_tfmr[i]);
932 }
792d376b
WS		 933 break;
934 case 2:
935 data->pwm_fcms[0] |= (1 << index);
936 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
937 break;
938 }
939 mutex_unlock(&data->update_lock);
940 return count;
792d376b
WS		 941}
942
d5ab845a
JD		 943static ssize_t
944show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
945{
946 struct w83795_data *data = w83795_update_pwm_config(dev);
947 int index = to_sensor_dev_attr_2(attr)->index;
948 unsigned int mode;
949
950 if (data->pwm_fomc & (1 << index))
951 mode = 0; /* DC */
952 else
953 mode = 1; /* PWM */
954
955 return sprintf(buf, "%u\n", mode);
956}
957
edff2f8d
JD		 958/*
959 * Check whether a given temperature source can ever be useful.
960 * Returns the number of selectable temperature channels which are
961 * enabled.
962 */
963static int w83795_tss_useful(const struct w83795_data *data, int tsrc)
964{
965 int useful = 0, i;
966
967 for (i = 0; i < 4; i++) {
968 if (tss_map[i][tsrc] == TSS_MAP_RESERVED)
969 continue;
970 if (tss_map[i][tsrc] < 6) /* Analog */
971 useful += (data->has_temp >> tss_map[i][tsrc]) & 1;
972 else /* Digital */
973 useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1;
974 }
975
976 return useful;
977}
978
792d376b
WS		 979static ssize_t
980show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
981{
982 struct sensor_device_attribute_2 *sensor_attr =
983 to_sensor_dev_attr_2(attr);
1bb3450c 984 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b 985 int index = sensor_attr->index;
2a2d27da 986 u8 tmp = data->temp_src[index / 2];
792d376b 987
7eb8d508 988 if (index & 1)
2a2d27da 989 tmp >>= 4; /* Pick high nibble */
792d376b 990 else
2a2d27da 991 tmp &= 0x0f; /* Pick low nibble */
792d376b 992
2a2d27da
JD		 993 /* Look-up the actual temperature channel number */
994 if (tmp >= 4 || tss_map[tmp][index] == TSS_MAP_RESERVED)
995 return -EINVAL; /* Shouldn't happen */
996
997 return sprintf(buf, "%u\n", (unsigned int)tss_map[tmp][index] + 1);
792d376b
WS		 998}
999
1000static ssize_t
1001store_temp_src(struct device *dev, struct device_attribute *attr,
1002 const char *buf, size_t count)
1003{
1004 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 1005 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1006 struct sensor_device_attribute_2 *sensor_attr =
1007 to_sensor_dev_attr_2(attr);
1008 int index = sensor_attr->index;
2a2d27da
JD		 1009 int tmp;
1010 unsigned long channel;
792d376b
WS		 1011 u8 val = index / 2;
1012
2a2d27da
JD		 1013 if (strict_strtoul(buf, 10, &channel) < 0 ||
1014 channel < 1 || channel > 14)
1015 return -EINVAL;
1016
1017 /* Check if request can be fulfilled */
1018 for (tmp = 0; tmp < 4; tmp++) {
1019 if (tss_map[tmp][index] == channel - 1)
1020 break;
1021 }
1022 if (tmp == 4) /* No match */
792d376b 1023 return -EINVAL;
792d376b
WS		 1024
1025 mutex_lock(&data->update_lock);
7eb8d508 1026 if (index & 1) {
792d376b
WS		 1027 tmp <<= 4;
1028 data->temp_src[val] &= 0x0f;
1029 } else {
1030 data->temp_src[val] &= 0xf0;
1031 }
1032 data->temp_src[val] |= tmp;
1033 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
1034 mutex_unlock(&data->update_lock);
1035
1036 return count;
1037}
1038
1039#define TEMP_PWM_ENABLE 0
1040#define TEMP_PWM_FAN_MAP 1
1041static ssize_t
1042show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
1043 char *buf)
1044{
1bb3450c 1045 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1046 struct sensor_device_attribute_2 *sensor_attr =
1047 to_sensor_dev_attr_2(attr);
1048 int nr = sensor_attr->nr;
1049 int index = sensor_attr->index;
1050 u8 tmp = 0xff;
1051
1052 switch (nr) {
1053 case TEMP_PWM_ENABLE:
1054 tmp = (data->pwm_fcms[1] >> index) & 1;
1055 if (tmp)
1056 tmp = 4;
1057 else
1058 tmp = 3;
1059 break;
1060 case TEMP_PWM_FAN_MAP:
1061 tmp = data->pwm_tfmr[index];
1062 break;
1063 }
1064
1065 return sprintf(buf, "%u\n", tmp);
1066}
1067
1068static ssize_t
1069store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
1070 const char *buf, size_t count)
1071{
1072 struct i2c_client *client = to_i2c_client(dev);
1bb3450c 1073 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1074 struct sensor_device_attribute_2 *sensor_attr =
1075 to_sensor_dev_attr_2(attr);
1076 int nr = sensor_attr->nr;
1077 int index = sensor_attr->index;
1078 unsigned long tmp;
1079
1080 if (strict_strtoul(buf, 10, &tmp) < 0)
1081 return -EINVAL;
1082
1083 switch (nr) {
1084 case TEMP_PWM_ENABLE:
eb02755a 1085 if (tmp != 3 && tmp != 4)
792d376b
WS		 1086 return -EINVAL;
1087 tmp -= 3;
1088 mutex_lock(&data->update_lock);
1089 data->pwm_fcms[1] &= ~(1 << index);
1090 data->pwm_fcms[1] |= tmp << index;
1091 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
1092 mutex_unlock(&data->update_lock);
1093 break;
1094 case TEMP_PWM_FAN_MAP:
1095 mutex_lock(&data->update_lock);
1096 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
1097 w83795_write(client, W83795_REG_TFMR(index), tmp);
1098 data->pwm_tfmr[index] = tmp;
1099 mutex_unlock(&data->update_lock);
1100 break;
1101 }
1102 return count;
1103}
1104
1105#define FANIN_TARGET 0
1106#define FANIN_TOL 1
1107static ssize_t
1108show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
1109{
1bb3450c 1110 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1111 struct sensor_device_attribute_2 *sensor_attr =
1112 to_sensor_dev_attr_2(attr);
1113 int nr = sensor_attr->nr;
1114 int index = sensor_attr->index;
1115 u16 tmp = 0;
1116
1117 switch (nr) {
1118 case FANIN_TARGET:
1119 tmp = fan_from_reg(data->target_speed[index]);
1120 break;
1121 case FANIN_TOL:
1122 tmp = data->tol_speed;
1123 break;
1124 }
1125
1126 return sprintf(buf, "%u\n", tmp);
1127}
1128
1129static ssize_t
1130store_fanin(struct device *dev, struct device_attribute *attr,
1131 const char *buf, size_t count)
1132{
1133 struct i2c_client *client = to_i2c_client(dev);
1134 struct w83795_data *data = i2c_get_clientdata(client);
1135 struct sensor_device_attribute_2 *sensor_attr =
1136 to_sensor_dev_attr_2(attr);
1137 int nr = sensor_attr->nr;
1138 int index = sensor_attr->index;
1139 unsigned long val;
1140
1141 if (strict_strtoul(buf, 10, &val) < 0)
1142 return -EINVAL;
1143
1144 mutex_lock(&data->update_lock);
1145 switch (nr) {
1146 case FANIN_TARGET:
1147 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
eb02755a 1148 w83795_write(client, W83795_REG_FTSH(index), val >> 4);
792d376b
WS		 1149 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
1150 data->target_speed[index] = val;
1151 break;
1152 case FANIN_TOL:
1153 val = SENSORS_LIMIT(val, 0, 0x3f);
1154 w83795_write(client, W83795_REG_TFTS, val);
1155 data->tol_speed = val;
1156 break;
1157 }
1158 mutex_unlock(&data->update_lock);
1159
1160 return count;
1161}
1162
1163
1164static ssize_t
1165show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1166{
1bb3450c 1167 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1168 struct sensor_device_attribute_2 *sensor_attr =
1169 to_sensor_dev_attr_2(attr);
1170 int nr = sensor_attr->nr;
1171 int index = sensor_attr->index;
1172 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1173
1174 return sprintf(buf, "%ld\n", tmp);
1175}
1176
1177static ssize_t
1178store_temp_pwm(struct device *dev, struct device_attribute *attr,
1179 const char *buf, size_t count)
1180{
1181 struct i2c_client *client = to_i2c_client(dev);
1182 struct w83795_data *data = i2c_get_clientdata(client);
1183 struct sensor_device_attribute_2 *sensor_attr =
1184 to_sensor_dev_attr_2(attr);
1185 int nr = sensor_attr->nr;
1186 int index = sensor_attr->index;
1187 unsigned long val;
1188 u8 tmp;
1189
1190 if (strict_strtoul(buf, 10, &val) < 0)
1191 return -EINVAL;
1192 val /= 1000;
1193
1194 mutex_lock(&data->update_lock);
1195 switch (nr) {
1196 case TEMP_PWM_TTTI:
1197 val = SENSORS_LIMIT(val, 0, 0x7f);
1198 w83795_write(client, W83795_REG_TTTI(index), val);
1199 break;
1200 case TEMP_PWM_CTFS:
1201 val = SENSORS_LIMIT(val, 0, 0x7f);
1202 w83795_write(client, W83795_REG_CTFS(index), val);
1203 break;
1204 case TEMP_PWM_HCT:
1205 val = SENSORS_LIMIT(val, 0, 0x0f);
1206 tmp = w83795_read(client, W83795_REG_HT(index));
1207 tmp &= 0x0f;
1208 tmp |= (val << 4) & 0xf0;
1209 w83795_write(client, W83795_REG_HT(index), tmp);
1210 break;
1211 case TEMP_PWM_HOT:
1212 val = SENSORS_LIMIT(val, 0, 0x0f);
1213 tmp = w83795_read(client, W83795_REG_HT(index));
1214 tmp &= 0xf0;
1215 tmp |= val & 0x0f;
1216 w83795_write(client, W83795_REG_HT(index), tmp);
1217 break;
1218 }
1219 data->pwm_temp[index][nr] = val;
1220 mutex_unlock(&data->update_lock);
1221
1222 return count;
1223}
1224
1225static ssize_t
1226show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1227{
1bb3450c 1228 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1229 struct sensor_device_attribute_2 *sensor_attr =
1230 to_sensor_dev_attr_2(attr);
1231 int nr = sensor_attr->nr;
1232 int index = sensor_attr->index;
1233
1234 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1235}
1236
1237static ssize_t
1238store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1239 const char *buf, size_t count)
1240{
1241 struct i2c_client *client = to_i2c_client(dev);
1242 struct w83795_data *data = i2c_get_clientdata(client);
1243 struct sensor_device_attribute_2 *sensor_attr =
1244 to_sensor_dev_attr_2(attr);
1245 int nr = sensor_attr->nr;
1246 int index = sensor_attr->index;
1247 unsigned long val;
1248
1249 if (strict_strtoul(buf, 10, &val) < 0)
1250 return -EINVAL;
1251
1252 mutex_lock(&data->update_lock);
1253 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1254 data->sf4_reg[index][SF4_PWM][nr] = val;
1255 mutex_unlock(&data->update_lock);
1256
1257 return count;
1258}
1259
1260static ssize_t
1261show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1262{
1bb3450c 1263 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1264 struct sensor_device_attribute_2 *sensor_attr =
1265 to_sensor_dev_attr_2(attr);
1266 int nr = sensor_attr->nr;
1267 int index = sensor_attr->index;
1268
1269 return sprintf(buf, "%u\n",
1270 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1271}
1272
1273static ssize_t
1274store_sf4_temp(struct device *dev, struct device_attribute *attr,
1275 const char *buf, size_t count)
1276{
1277 struct i2c_client *client = to_i2c_client(dev);
1278 struct w83795_data *data = i2c_get_clientdata(client);
1279 struct sensor_device_attribute_2 *sensor_attr =
1280 to_sensor_dev_attr_2(attr);
1281 int nr = sensor_attr->nr;
1282 int index = sensor_attr->index;
1283 unsigned long val;
1284
1285 if (strict_strtoul(buf, 10, &val) < 0)
1286 return -EINVAL;
1287 val /= 1000;
1288
1289 mutex_lock(&data->update_lock);
1290 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1291 data->sf4_reg[index][SF4_TEMP][nr] = val;
1292 mutex_unlock(&data->update_lock);
1293
1294 return count;
1295}
1296
1297
1298static ssize_t
1299show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1300{
1301 struct sensor_device_attribute_2 *sensor_attr =
1302 to_sensor_dev_attr_2(attr);
1303 int nr = sensor_attr->nr;
1304 int index = sensor_attr->index;
1305 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1306 long temp = temp_from_reg(data->temp[index][nr]);
792d376b 1307
eb02755a 1308 if (nr == TEMP_READ)
a654b9d4 1309 temp += (data->temp_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1310 return sprintf(buf, "%ld\n", temp);
1311}
1312
1313static ssize_t
1314store_temp(struct device *dev, struct device_attribute *attr,
1315 const char *buf, size_t count)
1316{
1317 struct sensor_device_attribute_2 *sensor_attr =
1318 to_sensor_dev_attr_2(attr);
1319 int nr = sensor_attr->nr;
1320 int index = sensor_attr->index;
1321 struct i2c_client *client = to_i2c_client(dev);
1322 struct w83795_data *data = i2c_get_clientdata(client);
1323 long tmp;
1324
1325 if (strict_strtol(buf, 10, &tmp) < 0)
1326 return -EINVAL;
1327
1328 mutex_lock(&data->update_lock);
1329 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1330 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1331 mutex_unlock(&data->update_lock);
1332 return count;
1333}
1334
1335
1336static ssize_t
1337show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1338{
21fc9775 1339 struct w83795_data *data = dev_get_drvdata(dev);
39deb699 1340 int tmp;
792d376b 1341
39deb699
JD		 1342 if (data->enable_dts & 2)
1343 tmp = 5;
1344 else
1345 tmp = 6;
792d376b
WS		 1346
1347 return sprintf(buf, "%d\n", tmp);
1348}
1349
1350static ssize_t
1351show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1352{
1353 struct sensor_device_attribute_2 *sensor_attr =
1354 to_sensor_dev_attr_2(attr);
1355 int index = sensor_attr->index;
1356 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1357 long temp = temp_from_reg(data->dts[index]);
792d376b 1358
a654b9d4 1359 temp += (data->dts_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1360 return sprintf(buf, "%ld\n", temp);
1361}
1362
1363static ssize_t
1364show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1365{
1366 struct sensor_device_attribute_2 *sensor_attr =
1367 to_sensor_dev_attr_2(attr);
1368 int nr = sensor_attr->nr;
21fc9775 1369 struct w83795_data *data = dev_get_drvdata(dev);
dd127f5c 1370 long temp = temp_from_reg(data->dts_ext[nr]);
792d376b 1371
792d376b
WS		 1372 return sprintf(buf, "%ld\n", temp);
1373}
1374
1375static ssize_t
1376store_dts_ext(struct device *dev, struct device_attribute *attr,
1377 const char *buf, size_t count)
1378{
1379 struct sensor_device_attribute_2 *sensor_attr =
1380 to_sensor_dev_attr_2(attr);
1381 int nr = sensor_attr->nr;
1382 struct i2c_client *client = to_i2c_client(dev);
1383 struct w83795_data *data = i2c_get_clientdata(client);
1384 long tmp;
1385
1386 if (strict_strtol(buf, 10, &tmp) < 0)
1387 return -EINVAL;
1388
1389 mutex_lock(&data->update_lock);
1390 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1391 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1392 mutex_unlock(&data->update_lock);
1393 return count;
1394}
1395
1396
792d376b
WS		 1397static ssize_t
1398show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1399{
21fc9775 1400 struct w83795_data *data = dev_get_drvdata(dev);
792d376b
WS		 1401 struct sensor_device_attribute_2 *sensor_attr =
1402 to_sensor_dev_attr_2(attr);
1403 int index = sensor_attr->index;
39deb699 1404 int tmp;
792d376b 1405
39deb699
JD		 1406 if (data->temp_mode & (1 << index))
1407 tmp = 3; /* Thermal diode */
1408 else
1409 tmp = 4; /* Thermistor */
792d376b
WS		 1410
1411 return sprintf(buf, "%d\n", tmp);
1412}
1413
39deb699 1414/* Only for temp1-4 (temp5-6 can only be thermistor) */
792d376b
WS		 1415static ssize_t
1416store_temp_mode(struct device *dev, struct device_attribute *attr,
1417 const char *buf, size_t count)
1418{
1419 struct i2c_client *client = to_i2c_client(dev);
1420 struct w83795_data *data = i2c_get_clientdata(client);
1421 struct sensor_device_attribute_2 *sensor_attr =
1422 to_sensor_dev_attr_2(attr);
1423 int index = sensor_attr->index;
39deb699 1424 int reg_shift;
792d376b
WS		 1425 unsigned long val;
1426 u8 tmp;
792d376b
WS		 1427
1428 if (strict_strtoul(buf, 10, &val) < 0)
1429 return -EINVAL;
1430 if ((val != 4) && (val != 3))
1431 return -EINVAL;
792d376b
WS		 1432
1433 mutex_lock(&data->update_lock);
1434 if (val == 3) {
39deb699
JD		 1435 /* Thermal diode */
1436 val = 0x01;
792d376b
WS		 1437 data->temp_mode |= 1 << index;
1438 } else if (val == 4) {
39deb699
JD		 1439 /* Thermistor */
1440 val = 0x03;
1441 data->temp_mode &= ~(1 << index);
792d376b
WS		 1442 }
1443
39deb699
JD		 1444 reg_shift = 2 * index;
1445 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1446 tmp &= ~(0x03 << reg_shift);
1447 tmp |= val << reg_shift;
1448 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
792d376b
WS		 1449
1450 mutex_unlock(&data->update_lock);
1451 return count;
1452}
1453
1454
1455/* show/store VIN */
1456static ssize_t
1457show_in(struct device *dev, struct device_attribute *attr, char *buf)
1458{
1459 struct sensor_device_attribute_2 *sensor_attr =
1460 to_sensor_dev_attr_2(attr);
1461 int nr = sensor_attr->nr;
1462 int index = sensor_attr->index;
1463 struct w83795_data *data = w83795_update_device(dev);
1464 u16 val = data->in[index][nr];
1465 u8 lsb_idx;
1466
1467 switch (nr) {
1468 case IN_READ:
1469 /* calculate this value again by sensors as sensors3.conf */
1470 if ((index >= 17) &&
6f9dfd85 1471 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1472 val *= 8;
1473 break;
1474 case IN_MAX:
1475 case IN_LOW:
1476 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1477 val <<= 2;
1478 val |= (data->in_lsb[lsb_idx][nr] >>
5d2cd958 1479 IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
792d376b 1480 if ((index >= 17) &&
6f9dfd85 1481 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1482 val *= 8;
1483 break;
1484 }
1485 val = in_from_reg(index, val);
1486
1487 return sprintf(buf, "%d\n", val);
1488}
1489
1490static ssize_t
1491store_in(struct device *dev, struct device_attribute *attr,
1492 const char *buf, size_t count)
1493{
1494 struct sensor_device_attribute_2 *sensor_attr =
1495 to_sensor_dev_attr_2(attr);
1496 int nr = sensor_attr->nr;
1497 int index = sensor_attr->index;
1498 struct i2c_client *client = to_i2c_client(dev);
1499 struct w83795_data *data = i2c_get_clientdata(client);
1500 unsigned long val;
1501 u8 tmp;
1502 u8 lsb_idx;
1503
1504 if (strict_strtoul(buf, 10, &val) < 0)
1505 return -EINVAL;
1506 val = in_to_reg(index, val);
1507
1508 if ((index >= 17) &&
6f9dfd85 1509 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1510 val /= 8;
1511 val = SENSORS_LIMIT(val, 0, 0x3FF);
1512 mutex_lock(&data->update_lock);
1513
1514 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1515 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1516 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1517 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1518 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1519 data->in_lsb[lsb_idx][nr] = tmp;
1520
1521 tmp = (val >> 2) & 0xff;
1522 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1523 data->in[index][nr] = tmp;
1524
1525 mutex_unlock(&data->update_lock);
1526 return count;
1527}
1528
1529
00030af2 1530#ifdef CONFIG_SENSORS_W83795_FANCTRL
792d376b
WS		 1531static ssize_t
1532show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1533{
1534 struct sensor_device_attribute_2 *sensor_attr =
1535 to_sensor_dev_attr_2(attr);
1536 int nr = sensor_attr->nr;
1bb3450c 1537 struct w83795_data *data = w83795_update_pwm_config(dev);
792d376b
WS		 1538 u16 val = data->setup_pwm[nr];
1539
1540 switch (nr) {
1541 case SETUP_PWM_UPTIME:
1542 case SETUP_PWM_DOWNTIME:
1543 val = time_from_reg(val);
1544 break;
1545 }
1546
1547 return sprintf(buf, "%d\n", val);
1548}
1549
1550static ssize_t
1551store_sf_setup(struct device *dev, struct device_attribute *attr,
1552 const char *buf, size_t count)
1553{
1554 struct sensor_device_attribute_2 *sensor_attr =
1555 to_sensor_dev_attr_2(attr);
1556 int nr = sensor_attr->nr;
1557 struct i2c_client *client = to_i2c_client(dev);
1558 struct w83795_data *data = i2c_get_clientdata(client);
1559 unsigned long val;
1560
1561 if (strict_strtoul(buf, 10, &val) < 0)
1562 return -EINVAL;
1563
1564 switch (nr) {
1565 case SETUP_PWM_DEFAULT:
1566 val = SENSORS_LIMIT(val, 0, 0xff);
1567 break;
1568 case SETUP_PWM_UPTIME:
1569 case SETUP_PWM_DOWNTIME:
1570 val = time_to_reg(val);
1571 if (val == 0)
1572 return -EINVAL;
1573 break;
1574 }
1575
1576 mutex_lock(&data->update_lock);
1577 data->setup_pwm[nr] = val;
1578 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1579 mutex_unlock(&data->update_lock);
1580 return count;
1581}
00030af2 1582#endif
792d376b
WS		 1583
1584
1585#define NOT_USED -1
1586
0e256018
JD		 1587/* Don't change the attribute order, _max and _min are accessed by index
1588 * somewhere else in the code */
87df0dad 1589#define SENSOR_ATTR_IN(index) { \
792d376b
WS		 1590 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1591 IN_READ, index), \
1592 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1593 store_in, IN_MAX, index), \
1594 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1595 store_in, IN_LOW, index), \
1596 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1597 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1598 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1599 show_alarm_beep, store_beep, BEEP_ENABLE, \
87df0dad 1600 index + ((index > 14) ? 1 : 0)) }
792d376b 1601
87df0dad 1602#define SENSOR_ATTR_FAN(index) { \
792d376b
WS		 1603 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1604 NULL, FAN_INPUT, index - 1), \
1605 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1606 show_fan, store_fan_min, FAN_MIN, index - 1), \
1607 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1608 NULL, ALARM_STATUS, index + 31), \
1609 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1610 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
792d376b 1611
b5f6a90a 1612#define SENSOR_ATTR_PWM(index) { \
792d376b
WS		 1613 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1614 store_pwm, PWM_OUTPUT, index - 1), \
1615 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1616 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1617 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1618 show_pwm, store_pwm, PWM_START, index - 1), \
1619 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1620 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
01879a85
JD		 1621 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1622 show_pwm, store_pwm, PWM_FREQ, index - 1), \
792d376b 1623 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
b2cc528e 1624 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
d5ab845a
JD		 1625 SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO, \
1626 show_pwm_mode, NULL, NOT_USED, index - 1), \
b2cc528e
JD		 1627 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1628 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
792d376b 1629
87df0dad 1630#define SENSOR_ATTR_DTS(index) { \
792d376b
WS		 1631 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1632 show_dts_mode, NULL, NOT_USED, index - 7), \
1633 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1634 NULL, NOT_USED, index - 7), \
a0ce402f 1635 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1636 store_dts_ext, DTS_CRIT, NOT_USED), \
a0ce402f 1637 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1638 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
a0ce402f 1639 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1640 store_dts_ext, DTS_WARN, NOT_USED), \
a0ce402f 1641 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1642 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1643 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1644 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1645 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1646 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
792d376b 1647
87df0dad 1648#define SENSOR_ATTR_TEMP(index) { \
39deb699 1649 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
792d376b
WS		 1650 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1651 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1652 NULL, TEMP_READ, index - 1), \
a0ce402f 1653 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1654 store_temp, TEMP_CRIT, index - 1), \
a0ce402f 1655 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1656 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
a0ce402f 1657 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1658 store_temp, TEMP_WARN, index - 1), \
a0ce402f 1659 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1660 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1661 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1662 show_alarm_beep, NULL, ALARM_STATUS, \
1663 index + (index > 4 ? 11 : 17)), \
1664 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1665 show_alarm_beep, store_beep, BEEP_ENABLE, \
1666 index + (index > 4 ? 11 : 17)), \
792d376b
WS		 1667 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1668 show_temp_pwm_enable, store_temp_pwm_enable, \
1669 TEMP_PWM_ENABLE, index - 1), \
1670 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1671 show_temp_pwm_enable, store_temp_pwm_enable, \
1672 TEMP_PWM_FAN_MAP, index - 1), \
1673 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1674 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
a0ce402f 1675 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
792d376b 1676 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
a0ce402f 1677 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
792d376b
WS		 1678 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1679 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1680 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1681 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1682 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1683 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1684 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1685 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1686 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1687 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1688 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1689 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1690 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1691 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1692 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1693 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1694 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1695 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1696 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1697 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1698 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1699 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1700 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1701 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1702 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1703 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1704 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1705 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1706 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1707 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
87df0dad 1708 show_sf4_temp, store_sf4_temp, 6, index - 1) }
792d376b
WS		 1709
1710
87df0dad 1711static struct sensor_device_attribute_2 w83795_in[][5] = {
792d376b
WS		 1712 SENSOR_ATTR_IN(0),
1713 SENSOR_ATTR_IN(1),
1714 SENSOR_ATTR_IN(2),
1715 SENSOR_ATTR_IN(3),
1716 SENSOR_ATTR_IN(4),
1717 SENSOR_ATTR_IN(5),
1718 SENSOR_ATTR_IN(6),
1719 SENSOR_ATTR_IN(7),
1720 SENSOR_ATTR_IN(8),
1721 SENSOR_ATTR_IN(9),
1722 SENSOR_ATTR_IN(10),
1723 SENSOR_ATTR_IN(11),
1724 SENSOR_ATTR_IN(12),
1725 SENSOR_ATTR_IN(13),
1726 SENSOR_ATTR_IN(14),
1727 SENSOR_ATTR_IN(15),
1728 SENSOR_ATTR_IN(16),
1729 SENSOR_ATTR_IN(17),
1730 SENSOR_ATTR_IN(18),
1731 SENSOR_ATTR_IN(19),
1732 SENSOR_ATTR_IN(20),
1733};
1734
86ef4d2f 1735static const struct sensor_device_attribute_2 w83795_fan[][4] = {
792d376b
WS		 1736 SENSOR_ATTR_FAN(1),
1737 SENSOR_ATTR_FAN(2),
1738 SENSOR_ATTR_FAN(3),
1739 SENSOR_ATTR_FAN(4),
1740 SENSOR_ATTR_FAN(5),
1741 SENSOR_ATTR_FAN(6),
1742 SENSOR_ATTR_FAN(7),
1743 SENSOR_ATTR_FAN(8),
1744 SENSOR_ATTR_FAN(9),
1745 SENSOR_ATTR_FAN(10),
1746 SENSOR_ATTR_FAN(11),
1747 SENSOR_ATTR_FAN(12),
1748 SENSOR_ATTR_FAN(13),
1749 SENSOR_ATTR_FAN(14),
1750};
1751
edff2f8d 1752static const struct sensor_device_attribute_2 w83795_temp[][28] = {
792d376b
WS		 1753 SENSOR_ATTR_TEMP(1),
1754 SENSOR_ATTR_TEMP(2),
1755 SENSOR_ATTR_TEMP(3),
1756 SENSOR_ATTR_TEMP(4),
1757 SENSOR_ATTR_TEMP(5),
1758 SENSOR_ATTR_TEMP(6),
1759};
1760
86ef4d2f 1761static const struct sensor_device_attribute_2 w83795_dts[][8] = {
792d376b
WS		 1762 SENSOR_ATTR_DTS(7),
1763 SENSOR_ATTR_DTS(8),
1764 SENSOR_ATTR_DTS(9),
1765 SENSOR_ATTR_DTS(10),
1766 SENSOR_ATTR_DTS(11),
1767 SENSOR_ATTR_DTS(12),
1768 SENSOR_ATTR_DTS(13),
1769 SENSOR_ATTR_DTS(14),
1770};
1771
d5ab845a 1772static const struct sensor_device_attribute_2 w83795_pwm[][8] = {
b5f6a90a
JD		 1773 SENSOR_ATTR_PWM(1),
1774 SENSOR_ATTR_PWM(2),
792d376b
WS		 1775 SENSOR_ATTR_PWM(3),
1776 SENSOR_ATTR_PWM(4),
1777 SENSOR_ATTR_PWM(5),
1778 SENSOR_ATTR_PWM(6),
1779 SENSOR_ATTR_PWM(7),
1780 SENSOR_ATTR_PWM(8),
1781};
1782
edff2f8d
JD		 1783static const struct sensor_device_attribute_2 w83795_tss[6] = {
1784 SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO,
1785 show_temp_src, store_temp_src, NOT_USED, 0),
1786 SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO,
1787 show_temp_src, store_temp_src, NOT_USED, 1),
1788 SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO,
1789 show_temp_src, store_temp_src, NOT_USED, 2),
1790 SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO,
1791 show_temp_src, store_temp_src, NOT_USED, 3),
1792 SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO,
1793 show_temp_src, store_temp_src, NOT_USED, 4),
1794 SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO,
1795 show_temp_src, store_temp_src, NOT_USED, 5),
1796};
1797
86ef4d2f 1798static const struct sensor_device_attribute_2 sda_single_files[] = {
24377101 1799 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
792d376b 1800 store_chassis_clear, ALARM_STATUS, 46),
24377101
JD		 1801 SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep,
1802 store_beep, BEEP_ENABLE, 46),
02728ffe
JD		 1803 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1804 store_beep, BEEP_ENABLE, 47),
00030af2 1805#ifdef CONFIG_SENSORS_W83795_FANCTRL
792d376b
WS		 1806 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1807 store_fanin, FANIN_TOL, NOT_USED),
1808 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1809 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1810 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1811 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1812 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1813 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
00030af2 1814#endif
792d376b
WS		 1815};
1816
1817/*
1818 * Driver interface
1819 */
1820
1821static void w83795_init_client(struct i2c_client *client)
1822{
01879a85
JD		 1823 struct w83795_data *data = i2c_get_clientdata(client);
1824 static const u16 clkin[4] = { /* in kHz */
1825 14318, 24000, 33333, 48000
1826 };
80646b95
JD		 1827 u8 config;
1828
792d376b
WS		 1829 if (reset)
1830 w83795_write(client, W83795_REG_CONFIG, 0x80);
1831
80646b95
JD		 1832 /* Start monitoring if needed */
1833 config = w83795_read(client, W83795_REG_CONFIG);
1834 if (!(config & W83795_REG_CONFIG_START)) {
1835 dev_info(&client->dev, "Enabling monitoring operations\n");
1836 w83795_write(client, W83795_REG_CONFIG,
1837 config | W83795_REG_CONFIG_START);
1838 }
01879a85
JD		 1839
1840 data->clkin = clkin[(config >> 3) & 0x3];
1841 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
792d376b
WS		 1842}
1843
2be381de
JD		 1844static int w83795_get_device_id(struct i2c_client *client)
1845{
1846 int device_id;
1847
1848 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1849
1850 /* Special case for rev. A chips; can't be checked first because later
1851 revisions emulate this for compatibility */
1852 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1853 int alt_id;
1854
1855 alt_id = i2c_smbus_read_byte_data(client,
1856 W83795_REG_DEVICEID_A);
1857 if (alt_id == 0x50)
1858 device_id = alt_id;
1859 }
1860
1861 return device_id;
1862}
1863
792d376b
WS		 1864/* Return 0 if detection is successful, -ENODEV otherwise */
1865static int w83795_detect(struct i2c_client *client,
1866 struct i2c_board_info *info)
1867{
2be381de 1868 int bank, vendor_id, device_id, expected, i2c_addr, config;
792d376b
WS		 1869 struct i2c_adapter *adapter = client->adapter;
1870 unsigned short address = client->addr;
093d1a47 1871 const char *chip_name;
792d376b
WS		 1872
1873 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1874 return -ENODEV;
1875 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2be381de
JD		 1876 if (bank < 0 || (bank & 0x7c)) {
1877 dev_dbg(&adapter->dev,
1878 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1879 address, "bank");
1880 return -ENODEV;
1881 }
792d376b 1882
792d376b 1883 /* Check Nuvoton vendor ID */
2be381de
JD		 1884 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1885 expected = bank & 0x80 ? 0x5c : 0xa3;
1886 if (vendor_id != expected) {
1887 dev_dbg(&adapter->dev,
1888 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1889 address, "vendor id");
792d376b
WS		 1890 return -ENODEV;
1891 }
1892
2be381de
JD		 1893 /* Check device ID */
1894 device_id = w83795_get_device_id(client) |
1895 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1896 if ((device_id >> 4) != 0x795) {
1897 dev_dbg(&adapter->dev,
1898 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1899 address, "device id\n");
792d376b
WS		 1900 return -ENODEV;
1901 }
1902
2be381de
JD		 1903 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1904 should match */
1905 if ((bank & 0x07) == 0) {
1906 i2c_addr = i2c_smbus_read_byte_data(client,
1907 W83795_REG_I2C_ADDR);
1908 if ((i2c_addr & 0x7f) != address) {
1909 dev_dbg(&adapter->dev,
1910 "w83795: Detection failed at addr 0x%02hx, "
1911 "check %s\n", address, "i2c addr");
1912 return -ENODEV;
1913 }
792d376b
WS		 1914 }
1915
093d1a47
JD		 1916 /* Check 795 chip type: 795G or 795ADG
1917 Usually we don't write to chips during detection, but here we don't
1918 quite have the choice; hopefully it's OK, we are about to return
1919 success anyway */
1920 if ((bank & 0x07) != 0)
1921 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1922 bank & ~0x07);
2be381de
JD		 1923 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1924 if (config & W83795_REG_CONFIG_CONFIG48)
093d1a47 1925 chip_name = "w83795adg";
2be381de 1926 else
093d1a47 1927 chip_name = "w83795g";
792d376b 1928
093d1a47 1929 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
2be381de
JD		 1930 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1931 'A' + (device_id & 0xf), address);
792d376b
WS		 1932
1933 return 0;
1934}
1935
6f3dcde9
JD		 1936static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1937 const struct device_attribute *))
892514a6
JD		 1938{
1939 struct w83795_data *data = dev_get_drvdata(dev);
87df0dad 1940 int err, i, j;
892514a6
JD		 1941
1942 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
87df0dad 1943 if (!(data->has_in & (1 << i)))
892514a6 1944 continue;
87df0dad
JD		 1945 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1946 err = fn(dev, &w83795_in[i][j].dev_attr);
1947 if (err)
1948 return err;
1949 }
892514a6
JD		 1950 }
1951
1952 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
87df0dad 1953 if (!(data->has_fan & (1 << i)))
892514a6 1954 continue;
87df0dad
JD		 1955 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1956 err = fn(dev, &w83795_fan[i][j].dev_attr);
1957 if (err)
1958 return err;
1959 }
892514a6
JD		 1960 }
1961
edff2f8d
JD		 1962 for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) {
1963 j = w83795_tss_useful(data, i);
1964 if (!j)
1965 continue;
1966 err = fn(dev, &w83795_tss[i].dev_attr);
1967 if (err)
1968 return err;
1969 }
1970
892514a6 1971 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
6f3dcde9 1972 err = fn(dev, &sda_single_files[i].dev_attr);
892514a6
JD		 1973 if (err)
1974 return err;
1975 }
1976
00030af2 1977#ifdef CONFIG_SENSORS_W83795_FANCTRL
b5f6a90a
JD		 1978 for (i = 0; i < data->has_pwm; i++) {
1979 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1980 err = fn(dev, &w83795_pwm[i][j].dev_attr);
892514a6
JD		 1981 if (err)
1982 return err;
1983 }
1984 }
00030af2 1985#endif
892514a6
JD		 1986
1987 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
87df0dad 1988 if (!(data->has_temp & (1 << i)))
892514a6 1989 continue;
00030af2 1990#ifdef CONFIG_SENSORS_W83795_FANCTRL
87df0dad 1991 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
00030af2
JD		 1992#else
1993 for (j = 0; j < 8; j++) {
1994#endif
87df0dad
JD		 1995 err = fn(dev, &w83795_temp[i][j].dev_attr);
1996 if (err)
1997 return err;
1998 }
892514a6
JD		 1999 }
2000
eb02755a 2001 if (data->enable_dts) {
892514a6 2002 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
87df0dad 2003 if (!(data->has_dts & (1 << i)))
892514a6 2004 continue;
87df0dad
JD		 2005 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
2006 err = fn(dev, &w83795_dts[i][j].dev_attr);
2007 if (err)
2008 return err;
2009 }
892514a6
JD		 2010 }
2011 }
2012
892514a6
JD		 2013 return 0;
2014}
2015
6f3dcde9
JD		 2016/* We need a wrapper that fits in w83795_handle_files */
2017static int device_remove_file_wrapper(struct device *dev,
2018 const struct device_attribute *attr)
2fa09878 2019{
6f3dcde9
JD		 2020 device_remove_file(dev, attr);
2021 return 0;
2fa09878
JD		 2022}
2023
0e256018
JD		 2024static void w83795_check_dynamic_in_limits(struct i2c_client *client)
2025{
2026 struct w83795_data *data = i2c_get_clientdata(client);
2027 u8 vid_ctl;
2028 int i, err_max, err_min;
2029
2030 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
2031
2032 /* Return immediately if VRM isn't configured */
2033 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
2034 return;
2035
2036 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
2037 for (i = 0; i < 2; i++) {
2038 if (!(data->has_dyn_in & (1 << i)))
2039 continue;
2040
2041 /* Voltage limits in dynamic mode, switch to read-only */
2042 err_max = sysfs_chmod_file(&client->dev.kobj,
2043 &w83795_in[i][2].dev_attr.attr,
2044 S_IRUGO);
2045 err_min = sysfs_chmod_file(&client->dev.kobj,
2046 &w83795_in[i][3].dev_attr.attr,
2047 S_IRUGO);
2048 if (err_max || err_min)
2049 dev_warn(&client->dev, "Failed to set in%d limits "
2050 "read-only (%d, %d)\n", i, err_max, err_min);
2051 else
2052 dev_info(&client->dev, "in%d limits set dynamically "
2053 "from VID\n", i);
2054 }
2055}
2056
71caf46f
JD		 2057/* Check pins that can be used for either temperature or voltage monitoring */
2058static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
2059 int temp_chan, int in_chan)
2060{
2061 /* config is a 2-bit value */
2062 switch (config) {
2063 case 0x2: /* Voltage monitoring */
2064 data->has_in |= 1 << in_chan;
2065 break;
2066 case 0x1: /* Thermal diode */
2067 if (temp_chan >= 4)
2068 break;
2069 data->temp_mode |= 1 << temp_chan;
2070 /* fall through */
2071 case 0x3: /* Thermistor */
2072 data->has_temp |= 1 << temp_chan;
2073 break;
2074 }
2075}
2076
792d376b
WS		 2077static int w83795_probe(struct i2c_client *client,
2078 const struct i2c_device_id *id)
2079{
2080 int i;
2081 u8 tmp;
2082 struct device *dev = &client->dev;
2083 struct w83795_data *data;
71caf46f 2084 int err;
792d376b
WS		 2085
2086 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
2087 if (!data) {
2088 err = -ENOMEM;
2089 goto exit;
2090 }
2091
2092 i2c_set_clientdata(client, data);
093d1a47 2093 data->chip_type = id->driver_data;
792d376b
WS		 2094 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2095 mutex_init(&data->update_lock);
2096
2097 /* Initialize the chip */
2098 w83795_init_client(client);
2099
71caf46f
JD		 2100 /* Check which voltages and fans are present */
2101 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
2102 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
2103 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
2104 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
792d376b 2105
71caf46f 2106 /* Check which analog temperatures and extra voltages are present */
792d376b
WS		 2107 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
2108 if (tmp & 0x20)
2109 data->enable_dts = 1;
71caf46f
JD		 2110 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
2111 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
792d376b 2112 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
71caf46f
JD		 2113 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
2114 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
2115 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
2116 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
792d376b
WS		 2117
2118 /* Check DTS enable status */
71caf46f 2119 if (data->enable_dts) {
792d376b
WS		 2120 if (1 & w83795_read(client, W83795_REG_DTSC))
2121 data->enable_dts |= 2;
2122 data->has_dts = w83795_read(client, W83795_REG_DTSE);
2123 }
2124
54891a3c
JD		 2125 /* Report PECI Tbase values */
2126 if (data->enable_dts == 1) {
2127 for (i = 0; i < 8; i++) {
2128 if (!(data->has_dts & (1 << i)))
2129 continue;
2130 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
2131 dev_info(&client->dev,
2132 "PECI agent %d Tbase temperature: %u\n",
2133 i + 1, (unsigned int)tmp & 0x7f);
2134 }
2135 }
2136
792d376b 2137 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
792d376b
WS		 2138
2139 /* pwm and smart fan */
2140 if (data->chip_type == w83795g)
2141 data->has_pwm = 8;
2142 else
2143 data->has_pwm = 2;
792d376b 2144
6f3dcde9 2145 err = w83795_handle_files(dev, device_create_file);
892514a6
JD		 2146 if (err)
2147 goto exit_remove;
792d376b 2148
0e256018
JD		 2149 if (data->chip_type == w83795g)
2150 w83795_check_dynamic_in_limits(client);
2151
792d376b
WS		 2152 data->hwmon_dev = hwmon_device_register(dev);
2153 if (IS_ERR(data->hwmon_dev)) {
2154 err = PTR_ERR(data->hwmon_dev);
2155 goto exit_remove;
2156 }
2157
2158 return 0;
2159
792d376b 2160exit_remove:
6f3dcde9 2161 w83795_handle_files(dev, device_remove_file_wrapper);
792d376b
WS		 2162 kfree(data);
2163exit:
2164 return err;
2165}
2166
2167static int w83795_remove(struct i2c_client *client)
2168{
2169 struct w83795_data *data = i2c_get_clientdata(client);
792d376b
WS		 2170
2171 hwmon_device_unregister(data->hwmon_dev);
6f3dcde9 2172 w83795_handle_files(&client->dev, device_remove_file_wrapper);
792d376b
WS		 2173 kfree(data);
2174
2175 return 0;
2176}
2177
2178
2179static const struct i2c_device_id w83795_id[] = {
093d1a47
JD		 2180 { "w83795g", w83795g },
2181 { "w83795adg", w83795adg },
792d376b
WS		 2182 { }
2183};
2184MODULE_DEVICE_TABLE(i2c, w83795_id);
2185
2186static struct i2c_driver w83795_driver = {
2187 .driver = {
2188 .name = "w83795",
2189 },
2190 .probe = w83795_probe,
2191 .remove = w83795_remove,
2192 .id_table = w83795_id,
2193
2194 .class = I2C_CLASS_HWMON,
2195 .detect = w83795_detect,
2196 .address_list = normal_i2c,
2197};
2198
2199static int __init sensors_w83795_init(void)
2200{
2201 return i2c_add_driver(&w83795_driver);
2202}
2203
2204static void __exit sensors_w83795_exit(void)
2205{
2206 i2c_del_driver(&w83795_driver);
2207}
2208
e3760b43 2209MODULE_AUTHOR("Wei Song, Jean Delvare <khali@linux-fr.org>");
315bacfd 2210MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
792d376b
WS		 2211MODULE_LICENSE("GPL");
2212
2213module_init(sensors_w83795_init);
2214module_exit(sensors_w83795_exit);
Linux kernel - Deliverables
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