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a06ae860 PP |
1 | /* Copyright (c) 2012, The Linux Foundation. All rights reserved. |
2 | * | |
3 | * This program is free software; you can redistribute it and/or modify | |
4 | * it under the terms of the GNU General Public License version 2 and | |
5 | * only version 2 as published by the Free Software Foundation. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
a06ae860 PP |
14 | #include <linux/init.h> |
15 | #include <linux/types.h> | |
16 | #include <linux/device.h> | |
17 | #include <linux/io.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/export.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/mutex.h> | |
22 | #include <linux/clk.h> | |
23 | #include <linux/coresight.h> | |
24 | #include <linux/of_platform.h> | |
25 | #include <linux/delay.h> | |
5da5325f | 26 | #include <linux/pm_runtime.h> |
a06ae860 PP |
27 | |
28 | #include "coresight-priv.h" | |
29 | ||
30 | static DEFINE_MUTEX(coresight_mutex); | |
31 | ||
b3e94405 MP |
32 | /** |
33 | * struct coresight_node - elements of a path, from source to sink | |
34 | * @csdev: Address of an element. | |
35 | * @link: hook to the list. | |
36 | */ | |
37 | struct coresight_node { | |
38 | struct coresight_device *csdev; | |
39 | struct list_head link; | |
40 | }; | |
41 | ||
42 | /* | |
43 | * When operating Coresight drivers from the sysFS interface, only a single | |
44 | * path can exist from a tracer (associated to a CPU) to a sink. | |
45 | */ | |
a685d683 MP |
46 | static DEFINE_PER_CPU(struct list_head *, tracer_path); |
47 | ||
48 | /* | |
49 | * As of this writing only a single STM can be found in CS topologies. Since | |
50 | * there is no way to know if we'll ever see more and what kind of | |
51 | * configuration they will enact, for the time being only define a single path | |
52 | * for STM. | |
53 | */ | |
54 | static struct list_head *stm_path; | |
b3e94405 | 55 | |
a06ae860 PP |
56 | static int coresight_id_match(struct device *dev, void *data) |
57 | { | |
58 | int trace_id, i_trace_id; | |
59 | struct coresight_device *csdev, *i_csdev; | |
60 | ||
61 | csdev = data; | |
62 | i_csdev = to_coresight_device(dev); | |
63 | ||
64 | /* | |
65 | * No need to care about oneself and components that are not | |
66 | * sources or not enabled | |
67 | */ | |
68 | if (i_csdev == csdev || !i_csdev->enable || | |
69 | i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE) | |
70 | return 0; | |
71 | ||
72 | /* Get the source ID for both compoment */ | |
73 | trace_id = source_ops(csdev)->trace_id(csdev); | |
74 | i_trace_id = source_ops(i_csdev)->trace_id(i_csdev); | |
75 | ||
76 | /* All you need is one */ | |
77 | if (trace_id == i_trace_id) | |
78 | return 1; | |
79 | ||
80 | return 0; | |
81 | } | |
82 | ||
83 | static int coresight_source_is_unique(struct coresight_device *csdev) | |
84 | { | |
85 | int trace_id = source_ops(csdev)->trace_id(csdev); | |
86 | ||
87 | /* this shouldn't happen */ | |
88 | if (trace_id < 0) | |
89 | return 0; | |
90 | ||
91 | return !bus_for_each_dev(&coresight_bustype, NULL, | |
92 | csdev, coresight_id_match); | |
93 | } | |
94 | ||
b3e94405 MP |
95 | static int coresight_find_link_inport(struct coresight_device *csdev, |
96 | struct coresight_device *parent) | |
a06ae860 PP |
97 | { |
98 | int i; | |
a06ae860 PP |
99 | struct coresight_connection *conn; |
100 | ||
a06ae860 PP |
101 | for (i = 0; i < parent->nr_outport; i++) { |
102 | conn = &parent->conns[i]; | |
103 | if (conn->child_dev == csdev) | |
104 | return conn->child_port; | |
105 | } | |
106 | ||
107 | dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n", | |
108 | dev_name(&parent->dev), dev_name(&csdev->dev)); | |
109 | ||
110 | return 0; | |
111 | } | |
112 | ||
b3e94405 MP |
113 | static int coresight_find_link_outport(struct coresight_device *csdev, |
114 | struct coresight_device *child) | |
a06ae860 PP |
115 | { |
116 | int i; | |
a06ae860 PP |
117 | struct coresight_connection *conn; |
118 | ||
a06ae860 PP |
119 | for (i = 0; i < csdev->nr_outport; i++) { |
120 | conn = &csdev->conns[i]; | |
121 | if (conn->child_dev == child) | |
122 | return conn->outport; | |
123 | } | |
124 | ||
125 | dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n", | |
126 | dev_name(&csdev->dev), dev_name(&child->dev)); | |
127 | ||
128 | return 0; | |
129 | } | |
130 | ||
e827d455 | 131 | static int coresight_enable_sink(struct coresight_device *csdev, u32 mode) |
a06ae860 PP |
132 | { |
133 | int ret; | |
134 | ||
135 | if (!csdev->enable) { | |
136 | if (sink_ops(csdev)->enable) { | |
e827d455 | 137 | ret = sink_ops(csdev)->enable(csdev, mode); |
a06ae860 PP |
138 | if (ret) |
139 | return ret; | |
140 | } | |
141 | csdev->enable = true; | |
142 | } | |
143 | ||
144 | atomic_inc(csdev->refcnt); | |
145 | ||
146 | return 0; | |
147 | } | |
148 | ||
149 | static void coresight_disable_sink(struct coresight_device *csdev) | |
150 | { | |
151 | if (atomic_dec_return(csdev->refcnt) == 0) { | |
152 | if (sink_ops(csdev)->disable) { | |
153 | sink_ops(csdev)->disable(csdev); | |
154 | csdev->enable = false; | |
155 | } | |
156 | } | |
157 | } | |
158 | ||
b3e94405 MP |
159 | static int coresight_enable_link(struct coresight_device *csdev, |
160 | struct coresight_device *parent, | |
161 | struct coresight_device *child) | |
a06ae860 PP |
162 | { |
163 | int ret; | |
164 | int link_subtype; | |
165 | int refport, inport, outport; | |
166 | ||
b3e94405 MP |
167 | if (!parent || !child) |
168 | return -EINVAL; | |
169 | ||
170 | inport = coresight_find_link_inport(csdev, parent); | |
171 | outport = coresight_find_link_outport(csdev, child); | |
a06ae860 PP |
172 | link_subtype = csdev->subtype.link_subtype; |
173 | ||
174 | if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) | |
175 | refport = inport; | |
176 | else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) | |
177 | refport = outport; | |
178 | else | |
179 | refport = 0; | |
180 | ||
181 | if (atomic_inc_return(&csdev->refcnt[refport]) == 1) { | |
182 | if (link_ops(csdev)->enable) { | |
183 | ret = link_ops(csdev)->enable(csdev, inport, outport); | |
184 | if (ret) | |
185 | return ret; | |
186 | } | |
187 | } | |
188 | ||
189 | csdev->enable = true; | |
190 | ||
191 | return 0; | |
192 | } | |
193 | ||
b3e94405 MP |
194 | static void coresight_disable_link(struct coresight_device *csdev, |
195 | struct coresight_device *parent, | |
196 | struct coresight_device *child) | |
a06ae860 PP |
197 | { |
198 | int i, nr_conns; | |
199 | int link_subtype; | |
200 | int refport, inport, outport; | |
201 | ||
b3e94405 MP |
202 | if (!parent || !child) |
203 | return; | |
204 | ||
205 | inport = coresight_find_link_inport(csdev, parent); | |
206 | outport = coresight_find_link_outport(csdev, child); | |
a06ae860 PP |
207 | link_subtype = csdev->subtype.link_subtype; |
208 | ||
209 | if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) { | |
210 | refport = inport; | |
211 | nr_conns = csdev->nr_inport; | |
212 | } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) { | |
213 | refport = outport; | |
214 | nr_conns = csdev->nr_outport; | |
215 | } else { | |
216 | refport = 0; | |
217 | nr_conns = 1; | |
218 | } | |
219 | ||
220 | if (atomic_dec_return(&csdev->refcnt[refport]) == 0) { | |
221 | if (link_ops(csdev)->disable) | |
222 | link_ops(csdev)->disable(csdev, inport, outport); | |
223 | } | |
224 | ||
225 | for (i = 0; i < nr_conns; i++) | |
226 | if (atomic_read(&csdev->refcnt[i]) != 0) | |
227 | return; | |
228 | ||
229 | csdev->enable = false; | |
230 | } | |
231 | ||
22fd532e | 232 | static int coresight_enable_source(struct coresight_device *csdev, u32 mode) |
a06ae860 PP |
233 | { |
234 | int ret; | |
235 | ||
236 | if (!coresight_source_is_unique(csdev)) { | |
237 | dev_warn(&csdev->dev, "traceID %d not unique\n", | |
238 | source_ops(csdev)->trace_id(csdev)); | |
239 | return -EINVAL; | |
240 | } | |
241 | ||
242 | if (!csdev->enable) { | |
243 | if (source_ops(csdev)->enable) { | |
882d5e11 | 244 | ret = source_ops(csdev)->enable(csdev, NULL, mode); |
a06ae860 PP |
245 | if (ret) |
246 | return ret; | |
247 | } | |
248 | csdev->enable = true; | |
249 | } | |
250 | ||
251 | atomic_inc(csdev->refcnt); | |
252 | ||
253 | return 0; | |
254 | } | |
255 | ||
256 | static void coresight_disable_source(struct coresight_device *csdev) | |
257 | { | |
258 | if (atomic_dec_return(csdev->refcnt) == 0) { | |
259 | if (source_ops(csdev)->disable) { | |
260 | source_ops(csdev)->disable(csdev); | |
261 | csdev->enable = false; | |
262 | } | |
263 | } | |
264 | } | |
265 | ||
b3e94405 | 266 | void coresight_disable_path(struct list_head *path) |
a06ae860 | 267 | { |
dc2c4ef1 | 268 | u32 type; |
b3e94405 MP |
269 | struct coresight_node *nd; |
270 | struct coresight_device *csdev, *parent, *child; | |
271 | ||
272 | list_for_each_entry(nd, path, link) { | |
273 | csdev = nd->csdev; | |
dc2c4ef1 MP |
274 | type = csdev->type; |
275 | ||
276 | /* | |
277 | * ETF devices are tricky... They can be a link or a sink, | |
278 | * depending on how they are configured. If an ETF has been | |
279 | * "activated" it will be configured as a sink, otherwise | |
280 | * go ahead with the link configuration. | |
281 | */ | |
282 | if (type == CORESIGHT_DEV_TYPE_LINKSINK) | |
283 | type = (csdev == coresight_get_sink(path)) ? | |
284 | CORESIGHT_DEV_TYPE_SINK : | |
285 | CORESIGHT_DEV_TYPE_LINK; | |
286 | ||
287 | switch (type) { | |
b3e94405 | 288 | case CORESIGHT_DEV_TYPE_SINK: |
b3e94405 MP |
289 | coresight_disable_sink(csdev); |
290 | break; | |
291 | case CORESIGHT_DEV_TYPE_SOURCE: | |
292 | /* sources are disabled from either sysFS or Perf */ | |
293 | break; | |
294 | case CORESIGHT_DEV_TYPE_LINK: | |
295 | parent = list_prev_entry(nd, link)->csdev; | |
296 | child = list_next_entry(nd, link)->csdev; | |
297 | coresight_disable_link(csdev, parent, child); | |
298 | break; | |
299 | default: | |
300 | break; | |
a06ae860 | 301 | } |
a06ae860 | 302 | } |
b3e94405 | 303 | } |
a06ae860 | 304 | |
e827d455 | 305 | int coresight_enable_path(struct list_head *path, u32 mode) |
b3e94405 MP |
306 | { |
307 | ||
308 | int ret = 0; | |
dc2c4ef1 | 309 | u32 type; |
b3e94405 MP |
310 | struct coresight_node *nd; |
311 | struct coresight_device *csdev, *parent, *child; | |
312 | ||
313 | list_for_each_entry_reverse(nd, path, link) { | |
314 | csdev = nd->csdev; | |
dc2c4ef1 MP |
315 | type = csdev->type; |
316 | ||
317 | /* | |
318 | * ETF devices are tricky... They can be a link or a sink, | |
319 | * depending on how they are configured. If an ETF has been | |
320 | * "activated" it will be configured as a sink, otherwise | |
321 | * go ahead with the link configuration. | |
322 | */ | |
323 | if (type == CORESIGHT_DEV_TYPE_LINKSINK) | |
324 | type = (csdev == coresight_get_sink(path)) ? | |
325 | CORESIGHT_DEV_TYPE_SINK : | |
326 | CORESIGHT_DEV_TYPE_LINK; | |
327 | ||
328 | switch (type) { | |
b3e94405 | 329 | case CORESIGHT_DEV_TYPE_SINK: |
e827d455 | 330 | ret = coresight_enable_sink(csdev, mode); |
b3e94405 MP |
331 | if (ret) |
332 | goto err; | |
333 | break; | |
334 | case CORESIGHT_DEV_TYPE_SOURCE: | |
335 | /* sources are enabled from either sysFS or Perf */ | |
336 | break; | |
337 | case CORESIGHT_DEV_TYPE_LINK: | |
338 | parent = list_prev_entry(nd, link)->csdev; | |
339 | child = list_next_entry(nd, link)->csdev; | |
340 | ret = coresight_enable_link(csdev, parent, child); | |
341 | if (ret) | |
342 | goto err; | |
343 | break; | |
344 | default: | |
345 | goto err; | |
a06ae860 PP |
346 | } |
347 | } | |
348 | ||
b3e94405 | 349 | out: |
a06ae860 | 350 | return ret; |
b3e94405 MP |
351 | err: |
352 | coresight_disable_path(path); | |
353 | goto out; | |
a06ae860 PP |
354 | } |
355 | ||
b6404e21 MP |
356 | struct coresight_device *coresight_get_sink(struct list_head *path) |
357 | { | |
358 | struct coresight_device *csdev; | |
359 | ||
360 | if (!path) | |
361 | return NULL; | |
362 | ||
363 | csdev = list_last_entry(path, struct coresight_node, link)->csdev; | |
364 | if (csdev->type != CORESIGHT_DEV_TYPE_SINK && | |
365 | csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) | |
366 | return NULL; | |
367 | ||
368 | return csdev; | |
369 | } | |
370 | ||
b3e94405 MP |
371 | /** |
372 | * _coresight_build_path - recursively build a path from a @csdev to a sink. | |
373 | * @csdev: The device to start from. | |
374 | * @path: The list to add devices to. | |
375 | * | |
376 | * The tree of Coresight device is traversed until an activated sink is | |
377 | * found. From there the sink is added to the list along with all the | |
378 | * devices that led to that point - the end result is a list from source | |
379 | * to sink. In that list the source is the first device and the sink the | |
380 | * last one. | |
381 | */ | |
382 | static int _coresight_build_path(struct coresight_device *csdev, | |
383 | struct list_head *path) | |
a06ae860 | 384 | { |
b3e94405 MP |
385 | int i; |
386 | bool found = false; | |
387 | struct coresight_node *node; | |
b3e94405 MP |
388 | |
389 | /* An activated sink has been found. Enqueue the element */ | |
390 | if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || | |
391 | csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && csdev->activated) | |
392 | goto out; | |
393 | ||
394 | /* Not a sink - recursively explore each port found on this element */ | |
395 | for (i = 0; i < csdev->nr_outport; i++) { | |
ec48a1d9 SP |
396 | struct coresight_device *child_dev = csdev->conns[i].child_dev; |
397 | ||
398 | if (child_dev && _coresight_build_path(child_dev, path) == 0) { | |
b3e94405 MP |
399 | found = true; |
400 | break; | |
a06ae860 PP |
401 | } |
402 | } | |
403 | ||
b3e94405 MP |
404 | if (!found) |
405 | return -ENODEV; | |
406 | ||
407 | out: | |
408 | /* | |
409 | * A path from this element to a sink has been found. The elements | |
410 | * leading to the sink are already enqueued, all that is left to do | |
5da5325f MP |
411 | * is tell the PM runtime core we need this element and add a node |
412 | * for it. | |
b3e94405 MP |
413 | */ |
414 | node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL); | |
415 | if (!node) | |
416 | return -ENOMEM; | |
417 | ||
418 | node->csdev = csdev; | |
419 | list_add(&node->link, path); | |
5da5325f | 420 | pm_runtime_get_sync(csdev->dev.parent); |
b3e94405 | 421 | |
a06ae860 PP |
422 | return 0; |
423 | } | |
424 | ||
b3e94405 | 425 | struct list_head *coresight_build_path(struct coresight_device *csdev) |
a06ae860 | 426 | { |
b3e94405 | 427 | struct list_head *path; |
5014e904 | 428 | int rc; |
a06ae860 | 429 | |
b3e94405 MP |
430 | path = kzalloc(sizeof(struct list_head), GFP_KERNEL); |
431 | if (!path) | |
432 | return NULL; | |
a06ae860 | 433 | |
b3e94405 MP |
434 | INIT_LIST_HEAD(path); |
435 | ||
5014e904 SP |
436 | rc = _coresight_build_path(csdev, path); |
437 | if (rc) { | |
b3e94405 | 438 | kfree(path); |
5014e904 | 439 | return ERR_PTR(rc); |
a06ae860 PP |
440 | } |
441 | ||
b3e94405 MP |
442 | return path; |
443 | } | |
a06ae860 | 444 | |
b3e94405 MP |
445 | /** |
446 | * coresight_release_path - release a previously built path. | |
447 | * @path: the path to release. | |
448 | * | |
449 | * Go through all the elements of a path and 1) removed it from the list and | |
450 | * 2) free the memory allocated for each node. | |
451 | */ | |
452 | void coresight_release_path(struct list_head *path) | |
453 | { | |
5da5325f | 454 | struct coresight_device *csdev; |
b3e94405 | 455 | struct coresight_node *nd, *next; |
a06ae860 | 456 | |
b3e94405 | 457 | list_for_each_entry_safe(nd, next, path, link) { |
5da5325f MP |
458 | csdev = nd->csdev; |
459 | ||
460 | pm_runtime_put_sync(csdev->dev.parent); | |
b3e94405 MP |
461 | list_del(&nd->link); |
462 | kfree(nd); | |
463 | } | |
464 | ||
465 | kfree(path); | |
466 | path = NULL; | |
a06ae860 PP |
467 | } |
468 | ||
a685d683 MP |
469 | /** coresight_validate_source - make sure a source has the right credentials |
470 | * @csdev: the device structure for a source. | |
471 | * @function: the function this was called from. | |
472 | * | |
473 | * Assumes the coresight_mutex is held. | |
474 | */ | |
475 | static int coresight_validate_source(struct coresight_device *csdev, | |
476 | const char *function) | |
477 | { | |
478 | u32 type, subtype; | |
479 | ||
480 | type = csdev->type; | |
481 | subtype = csdev->subtype.source_subtype; | |
482 | ||
483 | if (type != CORESIGHT_DEV_TYPE_SOURCE) { | |
484 | dev_err(&csdev->dev, "wrong device type in %s\n", function); | |
485 | return -EINVAL; | |
486 | } | |
487 | ||
488 | if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && | |
489 | subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) { | |
490 | dev_err(&csdev->dev, "wrong device subtype in %s\n", function); | |
491 | return -EINVAL; | |
492 | } | |
493 | ||
494 | return 0; | |
495 | } | |
496 | ||
a06ae860 PP |
497 | int coresight_enable(struct coresight_device *csdev) |
498 | { | |
a685d683 | 499 | int cpu, ret = 0; |
b3e94405 | 500 | struct list_head *path; |
a06ae860 PP |
501 | |
502 | mutex_lock(&coresight_mutex); | |
a685d683 MP |
503 | |
504 | ret = coresight_validate_source(csdev, __func__); | |
505 | if (ret) | |
a06ae860 | 506 | goto out; |
a685d683 | 507 | |
a06ae860 PP |
508 | if (csdev->enable) |
509 | goto out; | |
510 | ||
b3e94405 | 511 | path = coresight_build_path(csdev); |
5014e904 | 512 | if (IS_ERR(path)) { |
b3e94405 | 513 | pr_err("building path(s) failed\n"); |
5014e904 | 514 | ret = PTR_ERR(path); |
a06ae860 PP |
515 | goto out; |
516 | } | |
517 | ||
e827d455 | 518 | ret = coresight_enable_path(path, CS_MODE_SYSFS); |
b3e94405 MP |
519 | if (ret) |
520 | goto err_path; | |
521 | ||
22fd532e | 522 | ret = coresight_enable_source(csdev, CS_MODE_SYSFS); |
b3e94405 MP |
523 | if (ret) |
524 | goto err_source; | |
525 | ||
a685d683 MP |
526 | switch (csdev->subtype.source_subtype) { |
527 | case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: | |
528 | /* | |
529 | * When working from sysFS it is important to keep track | |
530 | * of the paths that were created so that they can be | |
531 | * undone in 'coresight_disable()'. Since there can only | |
532 | * be a single session per tracer (when working from sysFS) | |
533 | * a per-cpu variable will do just fine. | |
534 | */ | |
535 | cpu = source_ops(csdev)->cpu_id(csdev); | |
536 | per_cpu(tracer_path, cpu) = path; | |
537 | break; | |
538 | case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: | |
539 | stm_path = path; | |
540 | break; | |
541 | default: | |
542 | /* We can't be here */ | |
543 | break; | |
544 | } | |
b3e94405 | 545 | |
a06ae860 PP |
546 | out: |
547 | mutex_unlock(&coresight_mutex); | |
548 | return ret; | |
b3e94405 MP |
549 | |
550 | err_source: | |
551 | coresight_disable_path(path); | |
552 | ||
553 | err_path: | |
554 | coresight_release_path(path); | |
555 | goto out; | |
a06ae860 PP |
556 | } |
557 | EXPORT_SYMBOL_GPL(coresight_enable); | |
558 | ||
559 | void coresight_disable(struct coresight_device *csdev) | |
560 | { | |
a685d683 MP |
561 | int cpu, ret; |
562 | struct list_head *path = NULL; | |
a06ae860 PP |
563 | |
564 | mutex_lock(&coresight_mutex); | |
a685d683 MP |
565 | |
566 | ret = coresight_validate_source(csdev, __func__); | |
567 | if (ret) | |
a06ae860 | 568 | goto out; |
a685d683 | 569 | |
a06ae860 PP |
570 | if (!csdev->enable) |
571 | goto out; | |
572 | ||
a685d683 MP |
573 | switch (csdev->subtype.source_subtype) { |
574 | case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: | |
575 | cpu = source_ops(csdev)->cpu_id(csdev); | |
576 | path = per_cpu(tracer_path, cpu); | |
577 | per_cpu(tracer_path, cpu) = NULL; | |
578 | break; | |
579 | case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: | |
580 | path = stm_path; | |
581 | stm_path = NULL; | |
582 | break; | |
583 | default: | |
584 | /* We can't be here */ | |
585 | break; | |
586 | } | |
587 | ||
a06ae860 | 588 | coresight_disable_source(csdev); |
b3e94405 MP |
589 | coresight_disable_path(path); |
590 | coresight_release_path(path); | |
a06ae860 PP |
591 | |
592 | out: | |
593 | mutex_unlock(&coresight_mutex); | |
594 | } | |
595 | EXPORT_SYMBOL_GPL(coresight_disable); | |
596 | ||
597 | static ssize_t enable_sink_show(struct device *dev, | |
598 | struct device_attribute *attr, char *buf) | |
599 | { | |
600 | struct coresight_device *csdev = to_coresight_device(dev); | |
601 | ||
e8dc27d0 | 602 | return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated); |
a06ae860 PP |
603 | } |
604 | ||
605 | static ssize_t enable_sink_store(struct device *dev, | |
606 | struct device_attribute *attr, | |
607 | const char *buf, size_t size) | |
608 | { | |
609 | int ret; | |
610 | unsigned long val; | |
611 | struct coresight_device *csdev = to_coresight_device(dev); | |
612 | ||
613 | ret = kstrtoul(buf, 10, &val); | |
614 | if (ret) | |
615 | return ret; | |
616 | ||
617 | if (val) | |
618 | csdev->activated = true; | |
619 | else | |
620 | csdev->activated = false; | |
621 | ||
622 | return size; | |
623 | ||
624 | } | |
625 | static DEVICE_ATTR_RW(enable_sink); | |
626 | ||
627 | static ssize_t enable_source_show(struct device *dev, | |
628 | struct device_attribute *attr, char *buf) | |
629 | { | |
630 | struct coresight_device *csdev = to_coresight_device(dev); | |
631 | ||
e8dc27d0 | 632 | return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable); |
a06ae860 PP |
633 | } |
634 | ||
635 | static ssize_t enable_source_store(struct device *dev, | |
636 | struct device_attribute *attr, | |
637 | const char *buf, size_t size) | |
638 | { | |
639 | int ret = 0; | |
640 | unsigned long val; | |
641 | struct coresight_device *csdev = to_coresight_device(dev); | |
642 | ||
643 | ret = kstrtoul(buf, 10, &val); | |
644 | if (ret) | |
645 | return ret; | |
646 | ||
647 | if (val) { | |
648 | ret = coresight_enable(csdev); | |
649 | if (ret) | |
650 | return ret; | |
651 | } else { | |
652 | coresight_disable(csdev); | |
653 | } | |
654 | ||
655 | return size; | |
656 | } | |
657 | static DEVICE_ATTR_RW(enable_source); | |
658 | ||
659 | static struct attribute *coresight_sink_attrs[] = { | |
660 | &dev_attr_enable_sink.attr, | |
661 | NULL, | |
662 | }; | |
663 | ATTRIBUTE_GROUPS(coresight_sink); | |
664 | ||
665 | static struct attribute *coresight_source_attrs[] = { | |
666 | &dev_attr_enable_source.attr, | |
667 | NULL, | |
668 | }; | |
669 | ATTRIBUTE_GROUPS(coresight_source); | |
670 | ||
671 | static struct device_type coresight_dev_type[] = { | |
672 | { | |
673 | .name = "none", | |
674 | }, | |
675 | { | |
676 | .name = "sink", | |
677 | .groups = coresight_sink_groups, | |
678 | }, | |
679 | { | |
680 | .name = "link", | |
681 | }, | |
682 | { | |
683 | .name = "linksink", | |
684 | .groups = coresight_sink_groups, | |
685 | }, | |
686 | { | |
687 | .name = "source", | |
688 | .groups = coresight_source_groups, | |
689 | }, | |
690 | }; | |
691 | ||
692 | static void coresight_device_release(struct device *dev) | |
693 | { | |
694 | struct coresight_device *csdev = to_coresight_device(dev); | |
695 | ||
fae54158 MP |
696 | kfree(csdev->conns); |
697 | kfree(csdev->refcnt); | |
a06ae860 PP |
698 | kfree(csdev); |
699 | } | |
700 | ||
701 | static int coresight_orphan_match(struct device *dev, void *data) | |
702 | { | |
703 | int i; | |
704 | bool still_orphan = false; | |
705 | struct coresight_device *csdev, *i_csdev; | |
706 | struct coresight_connection *conn; | |
707 | ||
708 | csdev = data; | |
709 | i_csdev = to_coresight_device(dev); | |
710 | ||
711 | /* No need to check oneself */ | |
712 | if (csdev == i_csdev) | |
713 | return 0; | |
714 | ||
715 | /* Move on to another component if no connection is orphan */ | |
716 | if (!i_csdev->orphan) | |
717 | return 0; | |
718 | /* | |
719 | * Circle throuch all the connection of that component. If we find | |
720 | * an orphan connection whose name matches @csdev, link it. | |
721 | */ | |
d786a47d | 722 | for (i = 0; i < i_csdev->nr_outport; i++) { |
a06ae860 PP |
723 | conn = &i_csdev->conns[i]; |
724 | ||
725 | /* We have found at least one orphan connection */ | |
726 | if (conn->child_dev == NULL) { | |
727 | /* Does it match this newly added device? */ | |
22394bc5 | 728 | if (!strcmp(dev_name(&csdev->dev), conn->child_name)) { |
a06ae860 | 729 | conn->child_dev = csdev; |
22394bc5 KX |
730 | } else { |
731 | /* This component still has an orphan */ | |
732 | still_orphan = true; | |
733 | } | |
a06ae860 PP |
734 | } |
735 | } | |
736 | ||
737 | i_csdev->orphan = still_orphan; | |
738 | ||
739 | /* | |
740 | * Returning '0' ensures that all known component on the | |
741 | * bus will be checked. | |
742 | */ | |
743 | return 0; | |
744 | } | |
745 | ||
746 | static void coresight_fixup_orphan_conns(struct coresight_device *csdev) | |
747 | { | |
748 | /* | |
749 | * No need to check for a return value as orphan connection(s) | |
750 | * are hooked-up with each newly added component. | |
751 | */ | |
752 | bus_for_each_dev(&coresight_bustype, NULL, | |
ff874227 | 753 | csdev, coresight_orphan_match); |
a06ae860 PP |
754 | } |
755 | ||
756 | ||
757 | static int coresight_name_match(struct device *dev, void *data) | |
758 | { | |
759 | char *to_match; | |
760 | struct coresight_device *i_csdev; | |
761 | ||
762 | to_match = data; | |
763 | i_csdev = to_coresight_device(dev); | |
764 | ||
fadf3a44 | 765 | if (to_match && !strcmp(to_match, dev_name(&i_csdev->dev))) |
a06ae860 PP |
766 | return 1; |
767 | ||
768 | return 0; | |
769 | } | |
770 | ||
771 | static void coresight_fixup_device_conns(struct coresight_device *csdev) | |
772 | { | |
773 | int i; | |
774 | struct device *dev = NULL; | |
775 | struct coresight_connection *conn; | |
776 | ||
777 | for (i = 0; i < csdev->nr_outport; i++) { | |
778 | conn = &csdev->conns[i]; | |
779 | dev = bus_find_device(&coresight_bustype, NULL, | |
780 | (void *)conn->child_name, | |
781 | coresight_name_match); | |
782 | ||
783 | if (dev) { | |
784 | conn->child_dev = to_coresight_device(dev); | |
f2dfab35 MP |
785 | /* and put reference from 'bus_find_device()' */ |
786 | put_device(dev); | |
a06ae860 PP |
787 | } else { |
788 | csdev->orphan = true; | |
789 | conn->child_dev = NULL; | |
790 | } | |
791 | } | |
792 | } | |
793 | ||
ad725aee MP |
794 | static int coresight_remove_match(struct device *dev, void *data) |
795 | { | |
796 | int i; | |
797 | struct coresight_device *csdev, *iterator; | |
798 | struct coresight_connection *conn; | |
799 | ||
800 | csdev = data; | |
801 | iterator = to_coresight_device(dev); | |
802 | ||
803 | /* No need to check oneself */ | |
804 | if (csdev == iterator) | |
805 | return 0; | |
806 | ||
807 | /* | |
808 | * Circle throuch all the connection of that component. If we find | |
809 | * a connection whose name matches @csdev, remove it. | |
810 | */ | |
811 | for (i = 0; i < iterator->nr_outport; i++) { | |
812 | conn = &iterator->conns[i]; | |
813 | ||
814 | if (conn->child_dev == NULL) | |
815 | continue; | |
816 | ||
817 | if (!strcmp(dev_name(&csdev->dev), conn->child_name)) { | |
818 | iterator->orphan = true; | |
819 | conn->child_dev = NULL; | |
820 | /* No need to continue */ | |
821 | break; | |
822 | } | |
823 | } | |
824 | ||
825 | /* | |
826 | * Returning '0' ensures that all known component on the | |
827 | * bus will be checked. | |
828 | */ | |
829 | return 0; | |
830 | } | |
831 | ||
832 | static void coresight_remove_conns(struct coresight_device *csdev) | |
833 | { | |
834 | bus_for_each_dev(&coresight_bustype, NULL, | |
835 | csdev, coresight_remove_match); | |
836 | } | |
837 | ||
a06ae860 PP |
838 | /** |
839 | * coresight_timeout - loop until a bit has changed to a specific state. | |
840 | * @addr: base address of the area of interest. | |
841 | * @offset: address of a register, starting from @addr. | |
842 | * @position: the position of the bit of interest. | |
843 | * @value: the value the bit should have. | |
844 | * | |
845 | * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if | |
846 | * TIMEOUT_US has elapsed, which ever happens first. | |
847 | */ | |
848 | ||
849 | int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) | |
850 | { | |
851 | int i; | |
852 | u32 val; | |
853 | ||
854 | for (i = TIMEOUT_US; i > 0; i--) { | |
855 | val = __raw_readl(addr + offset); | |
856 | /* waiting on the bit to go from 0 to 1 */ | |
857 | if (value) { | |
858 | if (val & BIT(position)) | |
859 | return 0; | |
860 | /* waiting on the bit to go from 1 to 0 */ | |
861 | } else { | |
862 | if (!(val & BIT(position))) | |
863 | return 0; | |
864 | } | |
865 | ||
866 | /* | |
867 | * Delay is arbitrary - the specification doesn't say how long | |
868 | * we are expected to wait. Extra check required to make sure | |
869 | * we don't wait needlessly on the last iteration. | |
870 | */ | |
871 | if (i - 1) | |
872 | udelay(1); | |
873 | } | |
874 | ||
875 | return -EAGAIN; | |
876 | } | |
877 | ||
878 | struct bus_type coresight_bustype = { | |
879 | .name = "coresight", | |
880 | }; | |
881 | ||
882 | static int __init coresight_init(void) | |
883 | { | |
884 | return bus_register(&coresight_bustype); | |
885 | } | |
886 | postcore_initcall(coresight_init); | |
887 | ||
888 | struct coresight_device *coresight_register(struct coresight_desc *desc) | |
889 | { | |
890 | int i; | |
891 | int ret; | |
892 | int link_subtype; | |
893 | int nr_refcnts = 1; | |
894 | atomic_t *refcnts = NULL; | |
895 | struct coresight_device *csdev; | |
896 | struct coresight_connection *conns; | |
897 | ||
898 | csdev = kzalloc(sizeof(*csdev), GFP_KERNEL); | |
899 | if (!csdev) { | |
900 | ret = -ENOMEM; | |
901 | goto err_kzalloc_csdev; | |
902 | } | |
903 | ||
904 | if (desc->type == CORESIGHT_DEV_TYPE_LINK || | |
905 | desc->type == CORESIGHT_DEV_TYPE_LINKSINK) { | |
906 | link_subtype = desc->subtype.link_subtype; | |
907 | ||
908 | if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) | |
909 | nr_refcnts = desc->pdata->nr_inport; | |
910 | else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) | |
911 | nr_refcnts = desc->pdata->nr_outport; | |
912 | } | |
913 | ||
914 | refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL); | |
915 | if (!refcnts) { | |
916 | ret = -ENOMEM; | |
917 | goto err_kzalloc_refcnts; | |
918 | } | |
919 | ||
920 | csdev->refcnt = refcnts; | |
921 | ||
922 | csdev->nr_inport = desc->pdata->nr_inport; | |
923 | csdev->nr_outport = desc->pdata->nr_outport; | |
924 | conns = kcalloc(csdev->nr_outport, sizeof(*conns), GFP_KERNEL); | |
925 | if (!conns) { | |
926 | ret = -ENOMEM; | |
927 | goto err_kzalloc_conns; | |
928 | } | |
929 | ||
930 | for (i = 0; i < csdev->nr_outport; i++) { | |
931 | conns[i].outport = desc->pdata->outports[i]; | |
932 | conns[i].child_name = desc->pdata->child_names[i]; | |
933 | conns[i].child_port = desc->pdata->child_ports[i]; | |
934 | } | |
935 | ||
936 | csdev->conns = conns; | |
937 | ||
938 | csdev->type = desc->type; | |
939 | csdev->subtype = desc->subtype; | |
940 | csdev->ops = desc->ops; | |
941 | csdev->orphan = false; | |
942 | ||
943 | csdev->dev.type = &coresight_dev_type[desc->type]; | |
944 | csdev->dev.groups = desc->groups; | |
945 | csdev->dev.parent = desc->dev; | |
946 | csdev->dev.release = coresight_device_release; | |
947 | csdev->dev.bus = &coresight_bustype; | |
948 | dev_set_name(&csdev->dev, "%s", desc->pdata->name); | |
949 | ||
950 | ret = device_register(&csdev->dev); | |
951 | if (ret) | |
952 | goto err_device_register; | |
953 | ||
954 | mutex_lock(&coresight_mutex); | |
955 | ||
956 | coresight_fixup_device_conns(csdev); | |
957 | coresight_fixup_orphan_conns(csdev); | |
958 | ||
959 | mutex_unlock(&coresight_mutex); | |
960 | ||
961 | return csdev; | |
962 | ||
963 | err_device_register: | |
964 | kfree(conns); | |
965 | err_kzalloc_conns: | |
966 | kfree(refcnts); | |
967 | err_kzalloc_refcnts: | |
968 | kfree(csdev); | |
969 | err_kzalloc_csdev: | |
970 | return ERR_PTR(ret); | |
971 | } | |
972 | EXPORT_SYMBOL_GPL(coresight_register); | |
973 | ||
974 | void coresight_unregister(struct coresight_device *csdev) | |
975 | { | |
ad725aee MP |
976 | /* Remove references of that device in the topology */ |
977 | coresight_remove_conns(csdev); | |
a06ae860 | 978 | device_unregister(&csdev->dev); |
a06ae860 PP |
979 | } |
980 | EXPORT_SYMBOL_GPL(coresight_unregister); |