Merge branch 'devel'
[deliverable/linux.git] / drivers / i2c / algos / i2c-algo-bit.c
CommitLineData
cf978ab2
DB
1/* -------------------------------------------------------------------------
2 * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters
3 * -------------------------------------------------------------------------
4 * Copyright (C) 1995-2000 Simon G. Vogl
1da177e4
LT
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
5694f8a8
JD
18 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 MA 02110-1301 USA.
cf978ab2 20 * ------------------------------------------------------------------------- */
1da177e4 21
96de0e25 22/* With some changes from Frodo Looijaard <frodol@dds.nl>, Kyösti Mälkki
1da177e4
LT
23 <kmalkki@cc.hut.fi> and Jean Delvare <khali@linux-fr.org> */
24
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/delay.h>
1da177e4
LT
28#include <linux/init.h>
29#include <linux/errno.h>
30#include <linux/sched.h>
31#include <linux/i2c.h>
32#include <linux/i2c-algo-bit.h>
33
34
35/* ----- global defines ----------------------------------------------- */
1da177e4 36
494dbb64
JD
37#ifdef DEBUG
38#define bit_dbg(level, dev, format, args...) \
39 do { \
40 if (i2c_debug >= level) \
41 dev_dbg(dev, format, ##args); \
42 } while (0)
43#else
44#define bit_dbg(level, dev, format, args...) \
45 do {} while (0)
46#endif /* DEBUG */
1da177e4
LT
47
48/* ----- global variables --------------------------------------------- */
49
1da177e4 50static int bit_test; /* see if the line-setting functions work */
1bddab7f
JD
51module_param(bit_test, int, S_IRUGO);
52MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
494dbb64
JD
53
54#ifdef DEBUG
55static int i2c_debug = 1;
56module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
57MODULE_PARM_DESC(i2c_debug,
58 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
59#endif
1da177e4
LT
60
61/* --- setting states on the bus with the right timing: --------------- */
62
cf978ab2
DB
63#define setsda(adap, val) adap->setsda(adap->data, val)
64#define setscl(adap, val) adap->setscl(adap->data, val)
65#define getsda(adap) adap->getsda(adap->data)
66#define getscl(adap) adap->getscl(adap->data)
1da177e4
LT
67
68static inline void sdalo(struct i2c_algo_bit_data *adap)
69{
cf978ab2 70 setsda(adap, 0);
424ed67c 71 udelay((adap->udelay + 1) / 2);
1da177e4
LT
72}
73
74static inline void sdahi(struct i2c_algo_bit_data *adap)
75{
cf978ab2 76 setsda(adap, 1);
424ed67c 77 udelay((adap->udelay + 1) / 2);
1da177e4
LT
78}
79
80static inline void scllo(struct i2c_algo_bit_data *adap)
81{
cf978ab2 82 setscl(adap, 0);
424ed67c 83 udelay(adap->udelay / 2);
1da177e4
LT
84}
85
86/*
87 * Raise scl line, and do checking for delays. This is necessary for slower
88 * devices.
89 */
7b288a01 90static int sclhi(struct i2c_algo_bit_data *adap)
1da177e4
LT
91{
92 unsigned long start;
93
cf978ab2 94 setscl(adap, 1);
1da177e4
LT
95
96 /* Not all adapters have scl sense line... */
7b288a01
JD
97 if (!adap->getscl)
98 goto done;
1da177e4 99
cf978ab2
DB
100 start = jiffies;
101 while (!getscl(adap)) {
102 /* This hw knows how to read the clock line, so we wait
103 * until it actually gets high. This is safer as some
104 * chips may hold it low ("clock stretching") while they
105 * are processing data internally.
106 */
8ee161ce
VS
107 if (time_after(jiffies, start + adap->timeout)) {
108 /* Test one last time, as we may have been preempted
109 * between last check and timeout test.
110 */
111 if (getscl(adap))
112 break;
1da177e4 113 return -ETIMEDOUT;
8ee161ce 114 }
41101a33 115 cpu_relax();
1da177e4 116 }
494dbb64
JD
117#ifdef DEBUG
118 if (jiffies != start && i2c_debug >= 3)
119 pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go "
120 "high\n", jiffies - start);
121#endif
7b288a01
JD
122
123done:
1da177e4
LT
124 udelay(adap->udelay);
125 return 0;
cf978ab2 126}
1da177e4
LT
127
128
129/* --- other auxiliary functions -------------------------------------- */
cf978ab2 130static void i2c_start(struct i2c_algo_bit_data *adap)
1da177e4
LT
131{
132 /* assert: scl, sda are high */
424ed67c
JD
133 setsda(adap, 0);
134 udelay(adap->udelay);
1da177e4
LT
135 scllo(adap);
136}
137
cf978ab2 138static void i2c_repstart(struct i2c_algo_bit_data *adap)
1da177e4 139{
424ed67c 140 /* assert: scl is low */
424ed67c 141 sdahi(adap);
1da177e4 142 sclhi(adap);
424ed67c
JD
143 setsda(adap, 0);
144 udelay(adap->udelay);
1da177e4
LT
145 scllo(adap);
146}
147
148
cf978ab2 149static void i2c_stop(struct i2c_algo_bit_data *adap)
1da177e4 150{
1da177e4
LT
151 /* assert: scl is low */
152 sdalo(adap);
cf978ab2 153 sclhi(adap);
424ed67c
JD
154 setsda(adap, 1);
155 udelay(adap->udelay);
1da177e4
LT
156}
157
158
159
cf978ab2 160/* send a byte without start cond., look for arbitration,
1da177e4
LT
161 check ackn. from slave */
162/* returns:
163 * 1 if the device acknowledged
164 * 0 if the device did not ack
165 * -ETIMEDOUT if an error occurred (while raising the scl line)
166 */
494dbb64 167static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)
1da177e4
LT
168{
169 int i;
170 int sb;
171 int ack;
172 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
173
174 /* assert: scl is low */
cf978ab2 175 for (i = 7; i >= 0; i--) {
494dbb64 176 sb = (c >> i) & 1;
cf978ab2 177 setsda(adap, sb);
424ed67c 178 udelay((adap->udelay + 1) / 2);
cf978ab2 179 if (sclhi(adap) < 0) { /* timed out */
494dbb64
JD
180 bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
181 "timeout at bit #%d\n", (int)c, i);
1da177e4 182 return -ETIMEDOUT;
cf978ab2
DB
183 }
184 /* FIXME do arbitration here:
185 * if (sb && !getsda(adap)) -> ouch! Get out of here.
186 *
187 * Report a unique code, so higher level code can retry
188 * the whole (combined) message and *NOT* issue STOP.
1da177e4 189 */
424ed67c 190 scllo(adap);
1da177e4
LT
191 }
192 sdahi(adap);
cf978ab2 193 if (sclhi(adap) < 0) { /* timeout */
494dbb64
JD
194 bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
195 "timeout at ack\n", (int)c);
196 return -ETIMEDOUT;
cf978ab2
DB
197 }
198
199 /* read ack: SDA should be pulled down by slave, or it may
200 * NAK (usually to report problems with the data we wrote).
201 */
494dbb64
JD
202 ack = !getsda(adap); /* ack: sda is pulled low -> success */
203 bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c,
204 ack ? "A" : "NA");
1da177e4 205
1da177e4 206 scllo(adap);
494dbb64 207 return ack;
1da177e4
LT
208 /* assert: scl is low (sda undef) */
209}
210
211
cf978ab2 212static int i2c_inb(struct i2c_adapter *i2c_adap)
1da177e4
LT
213{
214 /* read byte via i2c port, without start/stop sequence */
215 /* acknowledge is sent in i2c_read. */
216 int i;
cf978ab2 217 unsigned char indata = 0;
1da177e4
LT
218 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
219
220 /* assert: scl is low */
221 sdahi(adap);
cf978ab2
DB
222 for (i = 0; i < 8; i++) {
223 if (sclhi(adap) < 0) { /* timeout */
494dbb64
JD
224 bit_dbg(1, &i2c_adap->dev, "i2c_inb: timeout at bit "
225 "#%d\n", 7 - i);
1da177e4 226 return -ETIMEDOUT;
cf978ab2 227 }
1da177e4 228 indata *= 2;
cf978ab2 229 if (getsda(adap))
1da177e4 230 indata |= 0x01;
424ed67c
JD
231 setscl(adap, 0);
232 udelay(i == 7 ? adap->udelay / 2 : adap->udelay);
1da177e4
LT
233 }
234 /* assert: scl is low */
494dbb64 235 return indata;
1da177e4
LT
236}
237
238/*
239 * Sanity check for the adapter hardware - check the reaction of
240 * the bus lines only if it seems to be idle.
241 */
d3b3e15d 242static int test_bus(struct i2c_adapter *i2c_adap)
cf978ab2 243{
d3b3e15d
AD
244 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
245 const char *name = i2c_adap->name;
246 int scl, sda, ret;
247
248 if (adap->pre_xfer) {
249 ret = adap->pre_xfer(i2c_adap);
250 if (ret < 0)
251 return -ENODEV;
252 }
1da177e4 253
cf978ab2 254 if (adap->getscl == NULL)
494dbb64 255 pr_info("%s: Testing SDA only, SCL is not readable\n", name);
1da177e4 256
cf978ab2
DB
257 sda = getsda(adap);
258 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
259 if (!scl || !sda) {
f6beb67d
JD
260 printk(KERN_WARNING
261 "%s: bus seems to be busy (scl=%d, sda=%d)\n",
262 name, scl, sda);
1da177e4
LT
263 goto bailout;
264 }
265
266 sdalo(adap);
cf978ab2
DB
267 sda = getsda(adap);
268 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
269 if (sda) {
494dbb64 270 printk(KERN_WARNING "%s: SDA stuck high!\n", name);
1da177e4
LT
271 goto bailout;
272 }
cf978ab2 273 if (!scl) {
494dbb64
JD
274 printk(KERN_WARNING "%s: SCL unexpected low "
275 "while pulling SDA low!\n", name);
1da177e4 276 goto bailout;
cf978ab2 277 }
1da177e4
LT
278
279 sdahi(adap);
cf978ab2
DB
280 sda = getsda(adap);
281 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
282 if (!sda) {
494dbb64 283 printk(KERN_WARNING "%s: SDA stuck low!\n", name);
1da177e4
LT
284 goto bailout;
285 }
cf978ab2 286 if (!scl) {
494dbb64
JD
287 printk(KERN_WARNING "%s: SCL unexpected low "
288 "while pulling SDA high!\n", name);
1da177e4
LT
289 goto bailout;
290 }
291
292 scllo(adap);
cf978ab2
DB
293 sda = getsda(adap);
294 scl = (adap->getscl == NULL) ? 0 : getscl(adap);
295 if (scl) {
494dbb64 296 printk(KERN_WARNING "%s: SCL stuck high!\n", name);
1da177e4
LT
297 goto bailout;
298 }
cf978ab2 299 if (!sda) {
494dbb64
JD
300 printk(KERN_WARNING "%s: SDA unexpected low "
301 "while pulling SCL low!\n", name);
1da177e4
LT
302 goto bailout;
303 }
cf978ab2 304
1da177e4 305 sclhi(adap);
cf978ab2
DB
306 sda = getsda(adap);
307 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
308 if (!scl) {
494dbb64 309 printk(KERN_WARNING "%s: SCL stuck low!\n", name);
1da177e4
LT
310 goto bailout;
311 }
cf978ab2 312 if (!sda) {
494dbb64
JD
313 printk(KERN_WARNING "%s: SDA unexpected low "
314 "while pulling SCL high!\n", name);
1da177e4
LT
315 goto bailout;
316 }
d3b3e15d
AD
317
318 if (adap->post_xfer)
319 adap->post_xfer(i2c_adap);
320
494dbb64 321 pr_info("%s: Test OK\n", name);
1da177e4
LT
322 return 0;
323bailout:
324 sdahi(adap);
325 sclhi(adap);
d3b3e15d
AD
326
327 if (adap->post_xfer)
328 adap->post_xfer(i2c_adap);
329
1da177e4
LT
330 return -ENODEV;
331}
332
333/* ----- Utility functions
334 */
335
336/* try_address tries to contact a chip for a number of
337 * times before it gives up.
338 * return values:
339 * 1 chip answered
340 * 0 chip did not answer
341 * -x transmission error
342 */
7b288a01 343static int try_address(struct i2c_adapter *i2c_adap,
1da177e4
LT
344 unsigned char addr, int retries)
345{
346 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
97140342 347 int i, ret = 0;
cf978ab2
DB
348
349 for (i = 0; i <= retries; i++) {
350 ret = i2c_outb(i2c_adap, addr);
1ecac07a
JD
351 if (ret == 1 || i == retries)
352 break;
494dbb64 353 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
1da177e4 354 i2c_stop(adap);
1da177e4 355 udelay(adap->udelay);
424ed67c 356 yield();
494dbb64 357 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
424ed67c 358 i2c_start(adap);
1da177e4 359 }
494dbb64
JD
360 if (i && ret)
361 bit_dbg(1, &i2c_adap->dev, "Used %d tries to %s client at "
362 "0x%02x: %s\n", i + 1,
363 addr & 1 ? "read from" : "write to", addr >> 1,
364 ret == 1 ? "success" : "failed, timeout?");
1da177e4
LT
365 return ret;
366}
367
368static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
369{
494dbb64 370 const unsigned char *temp = msg->buf;
1da177e4 371 int count = msg->len;
cf978ab2 372 unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
1da177e4 373 int retval;
cf978ab2 374 int wrcount = 0;
1da177e4
LT
375
376 while (count > 0) {
494dbb64 377 retval = i2c_outb(i2c_adap, *temp);
cf978ab2
DB
378
379 /* OK/ACK; or ignored NAK */
380 if ((retval > 0) || (nak_ok && (retval == 0))) {
381 count--;
1da177e4
LT
382 temp++;
383 wrcount++;
bf3e2d1d
DB
384
385 /* A slave NAKing the master means the slave didn't like
386 * something about the data it saw. For example, maybe
387 * the SMBus PEC was wrong.
388 */
389 } else if (retval == 0) {
390 dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n");
391 return -EIO;
392
393 /* Timeout; or (someday) lost arbitration
394 *
395 * FIXME Lost ARB implies retrying the transaction from
396 * the first message, after the "winning" master issues
397 * its STOP. As a rule, upper layer code has no reason
398 * to know or care about this ... it is *NOT* an error.
399 */
400 } else {
401 dev_err(&i2c_adap->dev, "sendbytes: error %d\n",
402 retval);
403 return retval;
1da177e4 404 }
1da177e4
LT
405 }
406 return wrcount;
407}
408
939bc494
DB
409static int acknak(struct i2c_adapter *i2c_adap, int is_ack)
410{
411 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
412
413 /* assert: sda is high */
414 if (is_ack) /* send ack */
415 setsda(adap, 0);
416 udelay((adap->udelay + 1) / 2);
417 if (sclhi(adap) < 0) { /* timeout */
418 dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n");
419 return -ETIMEDOUT;
420 }
421 scllo(adap);
422 return 0;
423}
424
7b288a01 425static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
1da177e4
LT
426{
427 int inval;
cf978ab2 428 int rdcount = 0; /* counts bytes read */
494dbb64 429 unsigned char *temp = msg->buf;
1da177e4 430 int count = msg->len;
939bc494 431 const unsigned flags = msg->flags;
1da177e4
LT
432
433 while (count > 0) {
434 inval = i2c_inb(i2c_adap);
cf978ab2 435 if (inval >= 0) {
1da177e4
LT
436 *temp = inval;
437 rdcount++;
438 } else { /* read timed out */
1da177e4
LT
439 break;
440 }
441
442 temp++;
443 count--;
444
3c4bb241
JD
445 /* Some SMBus transactions require that we receive the
446 transaction length as the first read byte. */
939bc494 447 if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {
3c4bb241 448 if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {
939bc494
DB
449 if (!(flags & I2C_M_NO_RD_ACK))
450 acknak(i2c_adap, 0);
494dbb64
JD
451 dev_err(&i2c_adap->dev, "readbytes: invalid "
452 "block length (%d)\n", inval);
abc01b27 453 return -EPROTO;
3c4bb241
JD
454 }
455 /* The original count value accounts for the extra
456 bytes, that is, either 1 for a regular transaction,
457 or 2 for a PEC transaction. */
458 count += inval;
459 msg->len += inval;
460 }
939bc494
DB
461
462 bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n",
463 inval,
464 (flags & I2C_M_NO_RD_ACK)
465 ? "(no ack/nak)"
466 : (count ? "A" : "NA"));
467
468 if (!(flags & I2C_M_NO_RD_ACK)) {
469 inval = acknak(i2c_adap, count);
470 if (inval < 0)
471 return inval;
472 }
1da177e4
LT
473 }
474 return rdcount;
475}
476
477/* doAddress initiates the transfer by generating the start condition (in
478 * try_address) and transmits the address in the necessary format to handle
479 * reads, writes as well as 10bit-addresses.
480 * returns:
481 * 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
abc01b27 482 * -x an error occurred (like: -ENXIO if the device did not answer, or
cf978ab2 483 * -ETIMEDOUT, for example if the lines are stuck...)
1da177e4 484 */
7b288a01 485static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
1da177e4
LT
486{
487 unsigned short flags = msg->flags;
488 unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
489 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
490
491 unsigned char addr;
492 int ret, retries;
493
494 retries = nak_ok ? 0 : i2c_adap->retries;
cf978ab2
DB
495
496 if (flags & I2C_M_TEN) {
1da177e4 497 /* a ten bit address */
cc6bcf7d 498 addr = 0xf0 | ((msg->addr >> 7) & 0x06);
494dbb64 499 bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr);
1da177e4
LT
500 /* try extended address code...*/
501 ret = try_address(i2c_adap, addr, retries);
502 if ((ret != 1) && !nak_ok) {
494dbb64
JD
503 dev_err(&i2c_adap->dev,
504 "died at extended address code\n");
abc01b27 505 return -ENXIO;
1da177e4
LT
506 }
507 /* the remaining 8 bit address */
cc6bcf7d 508 ret = i2c_outb(i2c_adap, msg->addr & 0xff);
1da177e4
LT
509 if ((ret != 1) && !nak_ok) {
510 /* the chip did not ack / xmission error occurred */
494dbb64 511 dev_err(&i2c_adap->dev, "died at 2nd address code\n");
abc01b27 512 return -ENXIO;
1da177e4 513 }
cf978ab2 514 if (flags & I2C_M_RD) {
494dbb64
JD
515 bit_dbg(3, &i2c_adap->dev, "emitting repeated "
516 "start condition\n");
1da177e4
LT
517 i2c_repstart(adap);
518 /* okay, now switch into reading mode */
519 addr |= 0x01;
520 ret = try_address(i2c_adap, addr, retries);
cf978ab2 521 if ((ret != 1) && !nak_ok) {
494dbb64
JD
522 dev_err(&i2c_adap->dev,
523 "died at repeated address code\n");
abc01b27 524 return -EIO;
1da177e4
LT
525 }
526 }
527 } else { /* normal 7bit address */
cf978ab2
DB
528 addr = msg->addr << 1;
529 if (flags & I2C_M_RD)
1da177e4 530 addr |= 1;
cf978ab2 531 if (flags & I2C_M_REV_DIR_ADDR)
1da177e4
LT
532 addr ^= 1;
533 ret = try_address(i2c_adap, addr, retries);
cf978ab2 534 if ((ret != 1) && !nak_ok)
97140342 535 return -ENXIO;
1da177e4
LT
536 }
537
538 return 0;
539}
540
541static int bit_xfer(struct i2c_adapter *i2c_adap,
542 struct i2c_msg msgs[], int num)
543{
544 struct i2c_msg *pmsg;
545 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
cf978ab2 546 int i, ret;
1da177e4
LT
547 unsigned short nak_ok;
548
0a9c1475
JD
549 if (adap->pre_xfer) {
550 ret = adap->pre_xfer(i2c_adap);
551 if (ret < 0)
552 return ret;
553 }
554
494dbb64 555 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
1da177e4 556 i2c_start(adap);
cf978ab2 557 for (i = 0; i < num; i++) {
1da177e4 558 pmsg = &msgs[i];
cf978ab2 559 nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
1da177e4
LT
560 if (!(pmsg->flags & I2C_M_NOSTART)) {
561 if (i) {
494dbb64
JD
562 bit_dbg(3, &i2c_adap->dev, "emitting "
563 "repeated start condition\n");
1da177e4
LT
564 i2c_repstart(adap);
565 }
566 ret = bit_doAddress(i2c_adap, pmsg);
567 if ((ret != 0) && !nak_ok) {
494dbb64
JD
568 bit_dbg(1, &i2c_adap->dev, "NAK from "
569 "device addr 0x%02x msg #%d\n",
570 msgs[i].addr, i);
1ecac07a 571 goto bailout;
1da177e4
LT
572 }
573 }
cf978ab2 574 if (pmsg->flags & I2C_M_RD) {
1da177e4
LT
575 /* read bytes into buffer*/
576 ret = readbytes(i2c_adap, pmsg);
494dbb64
JD
577 if (ret >= 1)
578 bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n",
579 ret, ret == 1 ? "" : "s");
1ecac07a
JD
580 if (ret < pmsg->len) {
581 if (ret >= 0)
abc01b27 582 ret = -EIO;
1ecac07a 583 goto bailout;
1da177e4
LT
584 }
585 } else {
586 /* write bytes from buffer */
587 ret = sendbytes(i2c_adap, pmsg);
494dbb64
JD
588 if (ret >= 1)
589 bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n",
590 ret, ret == 1 ? "" : "s");
1ecac07a
JD
591 if (ret < pmsg->len) {
592 if (ret >= 0)
abc01b27 593 ret = -EIO;
1ecac07a 594 goto bailout;
1da177e4
LT
595 }
596 }
597 }
1ecac07a
JD
598 ret = i;
599
600bailout:
494dbb64 601 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
1da177e4 602 i2c_stop(adap);
0a9c1475
JD
603
604 if (adap->post_xfer)
605 adap->post_xfer(i2c_adap);
1ecac07a 606 return ret;
1da177e4
LT
607}
608
609static u32 bit_func(struct i2c_adapter *adap)
610{
14674e70 611 return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL |
3c4bb241
JD
612 I2C_FUNC_SMBUS_READ_BLOCK_DATA |
613 I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
1da177e4
LT
614 I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
615}
616
617
618/* -----exported algorithm data: ------------------------------------- */
619
b0209b39 620const struct i2c_algorithm i2c_bit_algo = {
1da177e4
LT
621 .master_xfer = bit_xfer,
622 .functionality = bit_func,
623};
b0209b39 624EXPORT_SYMBOL(i2c_bit_algo);
1da177e4 625
cf978ab2
DB
626/*
627 * registering functions to load algorithms at runtime
1da177e4 628 */
f451171c
JD
629static int __i2c_bit_add_bus(struct i2c_adapter *adap,
630 int (*add_adapter)(struct i2c_adapter *))
1da177e4
LT
631{
632 struct i2c_algo_bit_data *bit_adap = adap->algo_data;
af5a60ba 633 int ret;
1da177e4
LT
634
635 if (bit_test) {
d3b3e15d 636 ret = test_bus(adap);
1bddab7f 637 if (bit_test >= 2 && ret < 0)
1da177e4
LT
638 return -ENODEV;
639 }
640
1da177e4 641 /* register new adapter to i2c module... */
1da177e4 642 adap->algo = &i2c_bit_algo;
8fcfef6e 643 adap->retries = 3;
1da177e4 644
af5a60ba
JD
645 ret = add_adapter(adap);
646 if (ret < 0)
647 return ret;
648
649 /* Complain if SCL can't be read */
650 if (bit_adap->getscl == NULL) {
651 dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
652 dev_warn(&adap->dev, "Bus may be unreliable\n");
653 }
654 return 0;
0f3b4838
JD
655}
656
657int i2c_bit_add_bus(struct i2c_adapter *adap)
658{
f451171c 659 return __i2c_bit_add_bus(adap, i2c_add_adapter);
1da177e4 660}
1da177e4 661EXPORT_SYMBOL(i2c_bit_add_bus);
1da177e4 662
0f3b4838
JD
663int i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
664{
f451171c 665 return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
0f3b4838
JD
666}
667EXPORT_SYMBOL(i2c_bit_add_numbered_bus);
668
1da177e4
LT
669MODULE_AUTHOR("Simon G. Vogl <simon@tk.uni-linz.ac.at>");
670MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
671MODULE_LICENSE("GPL");
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