i2c-algo-bit: Be verbose on bus testing failure
[deliverable/linux.git] / drivers / i2c / algos / i2c-algo-bit.c
CommitLineData
cf978ab2
DB
1/* -------------------------------------------------------------------------
2 * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters
3 * -------------------------------------------------------------------------
4 * Copyright (C) 1995-2000 Simon G. Vogl
1da177e4
LT
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
cf978ab2
DB
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * ------------------------------------------------------------------------- */
1da177e4 20
96de0e25 21/* With some changes from Frodo Looijaard <frodol@dds.nl>, Kyösti Mälkki
1da177e4
LT
22 <kmalkki@cc.hut.fi> and Jean Delvare <khali@linux-fr.org> */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/delay.h>
1da177e4
LT
27#include <linux/init.h>
28#include <linux/errno.h>
29#include <linux/sched.h>
30#include <linux/i2c.h>
31#include <linux/i2c-algo-bit.h>
32
33
34/* ----- global defines ----------------------------------------------- */
1da177e4 35
494dbb64
JD
36#ifdef DEBUG
37#define bit_dbg(level, dev, format, args...) \
38 do { \
39 if (i2c_debug >= level) \
40 dev_dbg(dev, format, ##args); \
41 } while (0)
42#else
43#define bit_dbg(level, dev, format, args...) \
44 do {} while (0)
45#endif /* DEBUG */
1da177e4
LT
46
47/* ----- global variables --------------------------------------------- */
48
1da177e4 49static int bit_test; /* see if the line-setting functions work */
1bddab7f
JD
50module_param(bit_test, int, S_IRUGO);
51MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
494dbb64
JD
52
53#ifdef DEBUG
54static int i2c_debug = 1;
55module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
56MODULE_PARM_DESC(i2c_debug,
57 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
58#endif
1da177e4
LT
59
60/* --- setting states on the bus with the right timing: --------------- */
61
cf978ab2
DB
62#define setsda(adap, val) adap->setsda(adap->data, val)
63#define setscl(adap, val) adap->setscl(adap->data, val)
64#define getsda(adap) adap->getsda(adap->data)
65#define getscl(adap) adap->getscl(adap->data)
1da177e4
LT
66
67static inline void sdalo(struct i2c_algo_bit_data *adap)
68{
cf978ab2 69 setsda(adap, 0);
424ed67c 70 udelay((adap->udelay + 1) / 2);
1da177e4
LT
71}
72
73static inline void sdahi(struct i2c_algo_bit_data *adap)
74{
cf978ab2 75 setsda(adap, 1);
424ed67c 76 udelay((adap->udelay + 1) / 2);
1da177e4
LT
77}
78
79static inline void scllo(struct i2c_algo_bit_data *adap)
80{
cf978ab2 81 setscl(adap, 0);
424ed67c 82 udelay(adap->udelay / 2);
1da177e4
LT
83}
84
85/*
86 * Raise scl line, and do checking for delays. This is necessary for slower
87 * devices.
88 */
7b288a01 89static int sclhi(struct i2c_algo_bit_data *adap)
1da177e4
LT
90{
91 unsigned long start;
92
cf978ab2 93 setscl(adap, 1);
1da177e4
LT
94
95 /* Not all adapters have scl sense line... */
7b288a01
JD
96 if (!adap->getscl)
97 goto done;
1da177e4 98
cf978ab2
DB
99 start = jiffies;
100 while (!getscl(adap)) {
101 /* This hw knows how to read the clock line, so we wait
102 * until it actually gets high. This is safer as some
103 * chips may hold it low ("clock stretching") while they
104 * are processing data internally.
105 */
0cdba07b 106 if (time_after(jiffies, start + adap->timeout))
1da177e4 107 return -ETIMEDOUT;
1da177e4
LT
108 cond_resched();
109 }
494dbb64
JD
110#ifdef DEBUG
111 if (jiffies != start && i2c_debug >= 3)
112 pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go "
113 "high\n", jiffies - start);
114#endif
7b288a01
JD
115
116done:
1da177e4
LT
117 udelay(adap->udelay);
118 return 0;
cf978ab2 119}
1da177e4
LT
120
121
122/* --- other auxiliary functions -------------------------------------- */
cf978ab2 123static void i2c_start(struct i2c_algo_bit_data *adap)
1da177e4
LT
124{
125 /* assert: scl, sda are high */
424ed67c
JD
126 setsda(adap, 0);
127 udelay(adap->udelay);
1da177e4
LT
128 scllo(adap);
129}
130
cf978ab2 131static void i2c_repstart(struct i2c_algo_bit_data *adap)
1da177e4 132{
424ed67c 133 /* assert: scl is low */
424ed67c 134 sdahi(adap);
1da177e4 135 sclhi(adap);
424ed67c
JD
136 setsda(adap, 0);
137 udelay(adap->udelay);
1da177e4
LT
138 scllo(adap);
139}
140
141
cf978ab2 142static void i2c_stop(struct i2c_algo_bit_data *adap)
1da177e4 143{
1da177e4
LT
144 /* assert: scl is low */
145 sdalo(adap);
cf978ab2 146 sclhi(adap);
424ed67c
JD
147 setsda(adap, 1);
148 udelay(adap->udelay);
1da177e4
LT
149}
150
151
152
cf978ab2 153/* send a byte without start cond., look for arbitration,
1da177e4
LT
154 check ackn. from slave */
155/* returns:
156 * 1 if the device acknowledged
157 * 0 if the device did not ack
158 * -ETIMEDOUT if an error occurred (while raising the scl line)
159 */
494dbb64 160static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)
1da177e4
LT
161{
162 int i;
163 int sb;
164 int ack;
165 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
166
167 /* assert: scl is low */
cf978ab2 168 for (i = 7; i >= 0; i--) {
494dbb64 169 sb = (c >> i) & 1;
cf978ab2 170 setsda(adap, sb);
424ed67c 171 udelay((adap->udelay + 1) / 2);
cf978ab2 172 if (sclhi(adap) < 0) { /* timed out */
494dbb64
JD
173 bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
174 "timeout at bit #%d\n", (int)c, i);
1da177e4 175 return -ETIMEDOUT;
cf978ab2
DB
176 }
177 /* FIXME do arbitration here:
178 * if (sb && !getsda(adap)) -> ouch! Get out of here.
179 *
180 * Report a unique code, so higher level code can retry
181 * the whole (combined) message and *NOT* issue STOP.
1da177e4 182 */
424ed67c 183 scllo(adap);
1da177e4
LT
184 }
185 sdahi(adap);
cf978ab2 186 if (sclhi(adap) < 0) { /* timeout */
494dbb64
JD
187 bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
188 "timeout at ack\n", (int)c);
189 return -ETIMEDOUT;
cf978ab2
DB
190 }
191
192 /* read ack: SDA should be pulled down by slave, or it may
193 * NAK (usually to report problems with the data we wrote).
194 */
494dbb64
JD
195 ack = !getsda(adap); /* ack: sda is pulled low -> success */
196 bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c,
197 ack ? "A" : "NA");
1da177e4 198
1da177e4 199 scllo(adap);
494dbb64 200 return ack;
1da177e4
LT
201 /* assert: scl is low (sda undef) */
202}
203
204
cf978ab2 205static int i2c_inb(struct i2c_adapter *i2c_adap)
1da177e4
LT
206{
207 /* read byte via i2c port, without start/stop sequence */
208 /* acknowledge is sent in i2c_read. */
209 int i;
cf978ab2 210 unsigned char indata = 0;
1da177e4
LT
211 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
212
213 /* assert: scl is low */
214 sdahi(adap);
cf978ab2
DB
215 for (i = 0; i < 8; i++) {
216 if (sclhi(adap) < 0) { /* timeout */
494dbb64
JD
217 bit_dbg(1, &i2c_adap->dev, "i2c_inb: timeout at bit "
218 "#%d\n", 7 - i);
1da177e4 219 return -ETIMEDOUT;
cf978ab2 220 }
1da177e4 221 indata *= 2;
cf978ab2 222 if (getsda(adap))
1da177e4 223 indata |= 0x01;
424ed67c
JD
224 setscl(adap, 0);
225 udelay(i == 7 ? adap->udelay / 2 : adap->udelay);
1da177e4
LT
226 }
227 /* assert: scl is low */
494dbb64 228 return indata;
1da177e4
LT
229}
230
231/*
232 * Sanity check for the adapter hardware - check the reaction of
233 * the bus lines only if it seems to be idle.
234 */
d3b3e15d 235static int test_bus(struct i2c_adapter *i2c_adap)
cf978ab2 236{
d3b3e15d
AD
237 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
238 const char *name = i2c_adap->name;
239 int scl, sda, ret;
240
241 if (adap->pre_xfer) {
242 ret = adap->pre_xfer(i2c_adap);
243 if (ret < 0)
244 return -ENODEV;
245 }
1da177e4 246
cf978ab2 247 if (adap->getscl == NULL)
494dbb64 248 pr_info("%s: Testing SDA only, SCL is not readable\n", name);
1da177e4 249
cf978ab2
DB
250 sda = getsda(adap);
251 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
252 if (!scl || !sda) {
f6beb67d
JD
253 printk(KERN_WARNING
254 "%s: bus seems to be busy (scl=%d, sda=%d)\n",
255 name, scl, sda);
1da177e4
LT
256 goto bailout;
257 }
258
259 sdalo(adap);
cf978ab2
DB
260 sda = getsda(adap);
261 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
262 if (sda) {
494dbb64 263 printk(KERN_WARNING "%s: SDA stuck high!\n", name);
1da177e4
LT
264 goto bailout;
265 }
cf978ab2 266 if (!scl) {
494dbb64
JD
267 printk(KERN_WARNING "%s: SCL unexpected low "
268 "while pulling SDA low!\n", name);
1da177e4 269 goto bailout;
cf978ab2 270 }
1da177e4
LT
271
272 sdahi(adap);
cf978ab2
DB
273 sda = getsda(adap);
274 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
275 if (!sda) {
494dbb64 276 printk(KERN_WARNING "%s: SDA stuck low!\n", name);
1da177e4
LT
277 goto bailout;
278 }
cf978ab2 279 if (!scl) {
494dbb64
JD
280 printk(KERN_WARNING "%s: SCL unexpected low "
281 "while pulling SDA high!\n", name);
1da177e4
LT
282 goto bailout;
283 }
284
285 scllo(adap);
cf978ab2
DB
286 sda = getsda(adap);
287 scl = (adap->getscl == NULL) ? 0 : getscl(adap);
288 if (scl) {
494dbb64 289 printk(KERN_WARNING "%s: SCL stuck high!\n", name);
1da177e4
LT
290 goto bailout;
291 }
cf978ab2 292 if (!sda) {
494dbb64
JD
293 printk(KERN_WARNING "%s: SDA unexpected low "
294 "while pulling SCL low!\n", name);
1da177e4
LT
295 goto bailout;
296 }
cf978ab2 297
1da177e4 298 sclhi(adap);
cf978ab2
DB
299 sda = getsda(adap);
300 scl = (adap->getscl == NULL) ? 1 : getscl(adap);
301 if (!scl) {
494dbb64 302 printk(KERN_WARNING "%s: SCL stuck low!\n", name);
1da177e4
LT
303 goto bailout;
304 }
cf978ab2 305 if (!sda) {
494dbb64
JD
306 printk(KERN_WARNING "%s: SDA unexpected low "
307 "while pulling SCL high!\n", name);
1da177e4
LT
308 goto bailout;
309 }
d3b3e15d
AD
310
311 if (adap->post_xfer)
312 adap->post_xfer(i2c_adap);
313
494dbb64 314 pr_info("%s: Test OK\n", name);
1da177e4
LT
315 return 0;
316bailout:
317 sdahi(adap);
318 sclhi(adap);
d3b3e15d
AD
319
320 if (adap->post_xfer)
321 adap->post_xfer(i2c_adap);
322
1da177e4
LT
323 return -ENODEV;
324}
325
326/* ----- Utility functions
327 */
328
329/* try_address tries to contact a chip for a number of
330 * times before it gives up.
331 * return values:
332 * 1 chip answered
333 * 0 chip did not answer
334 * -x transmission error
335 */
7b288a01 336static int try_address(struct i2c_adapter *i2c_adap,
1da177e4
LT
337 unsigned char addr, int retries)
338{
339 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
97140342 340 int i, ret = 0;
cf978ab2
DB
341
342 for (i = 0; i <= retries; i++) {
343 ret = i2c_outb(i2c_adap, addr);
1ecac07a
JD
344 if (ret == 1 || i == retries)
345 break;
494dbb64 346 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
1da177e4 347 i2c_stop(adap);
1da177e4 348 udelay(adap->udelay);
424ed67c 349 yield();
494dbb64 350 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
424ed67c 351 i2c_start(adap);
1da177e4 352 }
494dbb64
JD
353 if (i && ret)
354 bit_dbg(1, &i2c_adap->dev, "Used %d tries to %s client at "
355 "0x%02x: %s\n", i + 1,
356 addr & 1 ? "read from" : "write to", addr >> 1,
357 ret == 1 ? "success" : "failed, timeout?");
1da177e4
LT
358 return ret;
359}
360
361static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
362{
494dbb64 363 const unsigned char *temp = msg->buf;
1da177e4 364 int count = msg->len;
cf978ab2 365 unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
1da177e4 366 int retval;
cf978ab2 367 int wrcount = 0;
1da177e4
LT
368
369 while (count > 0) {
494dbb64 370 retval = i2c_outb(i2c_adap, *temp);
cf978ab2
DB
371
372 /* OK/ACK; or ignored NAK */
373 if ((retval > 0) || (nak_ok && (retval == 0))) {
374 count--;
1da177e4
LT
375 temp++;
376 wrcount++;
bf3e2d1d
DB
377
378 /* A slave NAKing the master means the slave didn't like
379 * something about the data it saw. For example, maybe
380 * the SMBus PEC was wrong.
381 */
382 } else if (retval == 0) {
383 dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n");
384 return -EIO;
385
386 /* Timeout; or (someday) lost arbitration
387 *
388 * FIXME Lost ARB implies retrying the transaction from
389 * the first message, after the "winning" master issues
390 * its STOP. As a rule, upper layer code has no reason
391 * to know or care about this ... it is *NOT* an error.
392 */
393 } else {
394 dev_err(&i2c_adap->dev, "sendbytes: error %d\n",
395 retval);
396 return retval;
1da177e4 397 }
1da177e4
LT
398 }
399 return wrcount;
400}
401
939bc494
DB
402static int acknak(struct i2c_adapter *i2c_adap, int is_ack)
403{
404 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
405
406 /* assert: sda is high */
407 if (is_ack) /* send ack */
408 setsda(adap, 0);
409 udelay((adap->udelay + 1) / 2);
410 if (sclhi(adap) < 0) { /* timeout */
411 dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n");
412 return -ETIMEDOUT;
413 }
414 scllo(adap);
415 return 0;
416}
417
7b288a01 418static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
1da177e4
LT
419{
420 int inval;
cf978ab2 421 int rdcount = 0; /* counts bytes read */
494dbb64 422 unsigned char *temp = msg->buf;
1da177e4 423 int count = msg->len;
939bc494 424 const unsigned flags = msg->flags;
1da177e4
LT
425
426 while (count > 0) {
427 inval = i2c_inb(i2c_adap);
cf978ab2 428 if (inval >= 0) {
1da177e4
LT
429 *temp = inval;
430 rdcount++;
431 } else { /* read timed out */
1da177e4
LT
432 break;
433 }
434
435 temp++;
436 count--;
437
3c4bb241
JD
438 /* Some SMBus transactions require that we receive the
439 transaction length as the first read byte. */
939bc494 440 if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {
3c4bb241 441 if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {
939bc494
DB
442 if (!(flags & I2C_M_NO_RD_ACK))
443 acknak(i2c_adap, 0);
494dbb64
JD
444 dev_err(&i2c_adap->dev, "readbytes: invalid "
445 "block length (%d)\n", inval);
3c4bb241
JD
446 return -EREMOTEIO;
447 }
448 /* The original count value accounts for the extra
449 bytes, that is, either 1 for a regular transaction,
450 or 2 for a PEC transaction. */
451 count += inval;
452 msg->len += inval;
453 }
939bc494
DB
454
455 bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n",
456 inval,
457 (flags & I2C_M_NO_RD_ACK)
458 ? "(no ack/nak)"
459 : (count ? "A" : "NA"));
460
461 if (!(flags & I2C_M_NO_RD_ACK)) {
462 inval = acknak(i2c_adap, count);
463 if (inval < 0)
464 return inval;
465 }
1da177e4
LT
466 }
467 return rdcount;
468}
469
470/* doAddress initiates the transfer by generating the start condition (in
471 * try_address) and transmits the address in the necessary format to handle
472 * reads, writes as well as 10bit-addresses.
473 * returns:
474 * 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
475 * -x an error occurred (like: -EREMOTEIO if the device did not answer, or
cf978ab2 476 * -ETIMEDOUT, for example if the lines are stuck...)
1da177e4 477 */
7b288a01 478static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
1da177e4
LT
479{
480 unsigned short flags = msg->flags;
481 unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
482 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
483
484 unsigned char addr;
485 int ret, retries;
486
487 retries = nak_ok ? 0 : i2c_adap->retries;
cf978ab2
DB
488
489 if (flags & I2C_M_TEN) {
1da177e4 490 /* a ten bit address */
cf978ab2 491 addr = 0xf0 | ((msg->addr >> 7) & 0x03);
494dbb64 492 bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr);
1da177e4
LT
493 /* try extended address code...*/
494 ret = try_address(i2c_adap, addr, retries);
495 if ((ret != 1) && !nak_ok) {
494dbb64
JD
496 dev_err(&i2c_adap->dev,
497 "died at extended address code\n");
1da177e4
LT
498 return -EREMOTEIO;
499 }
500 /* the remaining 8 bit address */
cf978ab2 501 ret = i2c_outb(i2c_adap, msg->addr & 0x7f);
1da177e4
LT
502 if ((ret != 1) && !nak_ok) {
503 /* the chip did not ack / xmission error occurred */
494dbb64 504 dev_err(&i2c_adap->dev, "died at 2nd address code\n");
1da177e4
LT
505 return -EREMOTEIO;
506 }
cf978ab2 507 if (flags & I2C_M_RD) {
494dbb64
JD
508 bit_dbg(3, &i2c_adap->dev, "emitting repeated "
509 "start condition\n");
1da177e4
LT
510 i2c_repstart(adap);
511 /* okay, now switch into reading mode */
512 addr |= 0x01;
513 ret = try_address(i2c_adap, addr, retries);
cf978ab2 514 if ((ret != 1) && !nak_ok) {
494dbb64
JD
515 dev_err(&i2c_adap->dev,
516 "died at repeated address code\n");
1da177e4
LT
517 return -EREMOTEIO;
518 }
519 }
520 } else { /* normal 7bit address */
cf978ab2
DB
521 addr = msg->addr << 1;
522 if (flags & I2C_M_RD)
1da177e4 523 addr |= 1;
cf978ab2 524 if (flags & I2C_M_REV_DIR_ADDR)
1da177e4
LT
525 addr ^= 1;
526 ret = try_address(i2c_adap, addr, retries);
cf978ab2 527 if ((ret != 1) && !nak_ok)
97140342 528 return -ENXIO;
1da177e4
LT
529 }
530
531 return 0;
532}
533
534static int bit_xfer(struct i2c_adapter *i2c_adap,
535 struct i2c_msg msgs[], int num)
536{
537 struct i2c_msg *pmsg;
538 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
cf978ab2 539 int i, ret;
1da177e4
LT
540 unsigned short nak_ok;
541
0a9c1475
JD
542 if (adap->pre_xfer) {
543 ret = adap->pre_xfer(i2c_adap);
544 if (ret < 0)
545 return ret;
546 }
547
494dbb64 548 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
1da177e4 549 i2c_start(adap);
cf978ab2 550 for (i = 0; i < num; i++) {
1da177e4 551 pmsg = &msgs[i];
cf978ab2 552 nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
1da177e4
LT
553 if (!(pmsg->flags & I2C_M_NOSTART)) {
554 if (i) {
494dbb64
JD
555 bit_dbg(3, &i2c_adap->dev, "emitting "
556 "repeated start condition\n");
1da177e4
LT
557 i2c_repstart(adap);
558 }
559 ret = bit_doAddress(i2c_adap, pmsg);
560 if ((ret != 0) && !nak_ok) {
494dbb64
JD
561 bit_dbg(1, &i2c_adap->dev, "NAK from "
562 "device addr 0x%02x msg #%d\n",
563 msgs[i].addr, i);
1ecac07a 564 goto bailout;
1da177e4
LT
565 }
566 }
cf978ab2 567 if (pmsg->flags & I2C_M_RD) {
1da177e4
LT
568 /* read bytes into buffer*/
569 ret = readbytes(i2c_adap, pmsg);
494dbb64
JD
570 if (ret >= 1)
571 bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n",
572 ret, ret == 1 ? "" : "s");
1ecac07a
JD
573 if (ret < pmsg->len) {
574 if (ret >= 0)
575 ret = -EREMOTEIO;
576 goto bailout;
1da177e4
LT
577 }
578 } else {
579 /* write bytes from buffer */
580 ret = sendbytes(i2c_adap, pmsg);
494dbb64
JD
581 if (ret >= 1)
582 bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n",
583 ret, ret == 1 ? "" : "s");
1ecac07a
JD
584 if (ret < pmsg->len) {
585 if (ret >= 0)
586 ret = -EREMOTEIO;
587 goto bailout;
1da177e4
LT
588 }
589 }
590 }
1ecac07a
JD
591 ret = i;
592
593bailout:
494dbb64 594 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
1da177e4 595 i2c_stop(adap);
0a9c1475
JD
596
597 if (adap->post_xfer)
598 adap->post_xfer(i2c_adap);
1ecac07a 599 return ret;
1da177e4
LT
600}
601
602static u32 bit_func(struct i2c_adapter *adap)
603{
cf978ab2 604 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
3c4bb241
JD
605 I2C_FUNC_SMBUS_READ_BLOCK_DATA |
606 I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
1da177e4
LT
607 I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
608}
609
610
611/* -----exported algorithm data: ------------------------------------- */
612
9e11a9fb 613static const struct i2c_algorithm i2c_bit_algo = {
1da177e4
LT
614 .master_xfer = bit_xfer,
615 .functionality = bit_func,
616};
617
cf978ab2
DB
618/*
619 * registering functions to load algorithms at runtime
1da177e4 620 */
f451171c
JD
621static int __i2c_bit_add_bus(struct i2c_adapter *adap,
622 int (*add_adapter)(struct i2c_adapter *))
1da177e4
LT
623{
624 struct i2c_algo_bit_data *bit_adap = adap->algo_data;
af5a60ba 625 int ret;
1da177e4
LT
626
627 if (bit_test) {
d3b3e15d 628 ret = test_bus(adap);
1bddab7f 629 if (bit_test >= 2 && ret < 0)
1da177e4
LT
630 return -ENODEV;
631 }
632
1da177e4 633 /* register new adapter to i2c module... */
1da177e4 634 adap->algo = &i2c_bit_algo;
8fcfef6e 635 adap->retries = 3;
1da177e4 636
af5a60ba
JD
637 ret = add_adapter(adap);
638 if (ret < 0)
639 return ret;
640
641 /* Complain if SCL can't be read */
642 if (bit_adap->getscl == NULL) {
643 dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
644 dev_warn(&adap->dev, "Bus may be unreliable\n");
645 }
646 return 0;
0f3b4838
JD
647}
648
649int i2c_bit_add_bus(struct i2c_adapter *adap)
650{
f451171c 651 return __i2c_bit_add_bus(adap, i2c_add_adapter);
1da177e4 652}
1da177e4 653EXPORT_SYMBOL(i2c_bit_add_bus);
1da177e4 654
0f3b4838
JD
655int i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
656{
f451171c 657 return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
0f3b4838
JD
658}
659EXPORT_SYMBOL(i2c_bit_add_numbered_bus);
660
1da177e4
LT
661MODULE_AUTHOR("Simon G. Vogl <simon@tk.uni-linz.ac.at>");
662MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
663MODULE_LICENSE("GPL");
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