[deliverable/linux.git] / drivers / i2c / busses / i2c-amd756.c

/*
    amd756.c - Part of lm_sensors, Linux kernel modules for hardware
              monitoring

    Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>

    Shamelessly ripped from i2c-piix4.c:

    Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
    Philip Edelbrock <phil@netroedge.com>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

/*
    2002-04-08: Added nForce support. (Csaba Halasz)
    2002-10-03: Fixed nForce PnP I/O port. (Michael Steil)
    2002-12-28: Rewritten into something that resembles a Linux driver (hch)
    2003-11-29: Added back AMD8111 removed by the previous rewrite.
                (Philip Pokorny)
*/

/*
   Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce
   Note: we assume there can only be one device, with one SMBus interface.
*/

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/stddef.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <asm/io.h>

/* AMD756 SMBus address offsets */
#define SMB_ADDR_OFFSET		0xE0
#define SMB_IOSIZE		16
#define SMB_GLOBAL_STATUS	(0x0 + amd756_ioport)
#define SMB_GLOBAL_ENABLE	(0x2 + amd756_ioport)
#define SMB_HOST_ADDRESS	(0x4 + amd756_ioport)
#define SMB_HOST_DATA		(0x6 + amd756_ioport)
#define SMB_HOST_COMMAND	(0x8 + amd756_ioport)
#define SMB_HOST_BLOCK_DATA	(0x9 + amd756_ioport)
#define SMB_HAS_DATA		(0xA + amd756_ioport)
#define SMB_HAS_DEVICE_ADDRESS	(0xC + amd756_ioport)
#define SMB_HAS_HOST_ADDRESS	(0xE + amd756_ioport)
#define SMB_SNOOP_ADDRESS	(0xF + amd756_ioport)

/* PCI Address Constants */

/* address of I/O space */
#define SMBBA		0x058		/* mh */
#define SMBBANFORCE	0x014

/* general configuration */
#define SMBGCFG		0x041		/* mh */

/* silicon revision code */
#define SMBREV		0x008

/* Other settings */
#define MAX_TIMEOUT	500

/* AMD756 constants */
#define AMD756_QUICK		0x00
#define AMD756_BYTE		0x01
#define AMD756_BYTE_DATA	0x02
#define AMD756_WORD_DATA	0x03
#define AMD756_PROCESS_CALL	0x04
#define AMD756_BLOCK_DATA	0x05

static struct pci_driver amd756_driver;
static unsigned short amd756_ioport;

/* 
  SMBUS event = I/O 28-29 bit 11
     see E0 for the status bits and enabled in E2
     
*/
#define GS_ABRT_STS	(1 << 0)
#define GS_COL_STS	(1 << 1)
#define GS_PRERR_STS	(1 << 2)
#define GS_HST_STS	(1 << 3)
#define GS_HCYC_STS	(1 << 4)
#define GS_TO_STS	(1 << 5)
#define GS_SMB_STS	(1 << 11)

#define GS_CLEAR_STS	(GS_ABRT_STS | GS_COL_STS | GS_PRERR_STS | \
			 GS_HCYC_STS | GS_TO_STS )

#define GE_CYC_TYPE_MASK	(7)
#define GE_HOST_STC		(1 << 3)
#define GE_ABORT		(1 << 5)


static int amd756_transaction(struct i2c_adapter *adap)
{
	int temp;
	int result = 0;
	int timeout = 0;

	dev_dbg(&adap->dev, "Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, "
		"DAT=%04x\n", inw_p(SMB_GLOBAL_STATUS),
		inw_p(SMB_GLOBAL_ENABLE), inw_p(SMB_HOST_ADDRESS),
		inb_p(SMB_HOST_DATA));

	/* Make sure the SMBus host is ready to start transmitting */
	if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS | GS_SMB_STS)) {
		dev_dbg(&adap->dev, "SMBus busy (%04x). Waiting...\n", temp);
		do {
			msleep(1);
			temp = inw_p(SMB_GLOBAL_STATUS);
		} while ((temp & (GS_HST_STS | GS_SMB_STS)) &&
		         (timeout++ < MAX_TIMEOUT));
		/* If the SMBus is still busy, we give up */
		if (timeout >= MAX_TIMEOUT) {
			dev_dbg(&adap->dev, "Busy wait timeout (%04x)\n", temp);
			goto abort;
		}
		timeout = 0;
	}

	/* start the transaction by setting the start bit */
	outw_p(inw(SMB_GLOBAL_ENABLE) | GE_HOST_STC, SMB_GLOBAL_ENABLE);

	/* We will always wait for a fraction of a second! */
	do {
		msleep(1);
		temp = inw_p(SMB_GLOBAL_STATUS);
	} while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT));

	/* If the SMBus is still busy, we give up */
	if (timeout >= MAX_TIMEOUT) {
		dev_dbg(&adap->dev, "Completion timeout!\n");
		goto abort;
	}

	if (temp & GS_PRERR_STS) {
		result = -1;
		dev_dbg(&adap->dev, "SMBus Protocol error (no response)!\n");
	}

	if (temp & GS_COL_STS) {
		result = -1;
		dev_warn(&adap->dev, "SMBus collision!\n");
	}

	if (temp & GS_TO_STS) {
		result = -1;
		dev_dbg(&adap->dev, "SMBus protocol timeout!\n");
	}

	if (temp & GS_HCYC_STS)
		dev_dbg(&adap->dev, "SMBus protocol success!\n");

	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);

#ifdef DEBUG
	if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) {
		dev_dbg(&adap->dev,
			"Failed reset at end of transaction (%04x)\n", temp);
	}
#endif

	dev_dbg(&adap->dev,
		"Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
		inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
		inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));

	return result;

 abort:
	dev_warn(&adap->dev, "Sending abort\n");
	outw_p(inw(SMB_GLOBAL_ENABLE) | GE_ABORT, SMB_GLOBAL_ENABLE);
	msleep(100);
	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
	return -1;
}

/* Return -1 on error. */
static s32 amd756_access(struct i2c_adapter * adap, u16 addr,
		  unsigned short flags, char read_write,
		  u8 command, int size, union i2c_smbus_data * data)
{
	int i, len;

	/** TODO: Should I supporte the 10-bit transfers? */
	switch (size) {
	case I2C_SMBUS_PROC_CALL:
		dev_dbg(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
		/* TODO: Well... It is supported, I'm just not sure what to do here... */
		return -1;
	case I2C_SMBUS_QUICK:
		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMB_HOST_ADDRESS);
		size = AMD756_QUICK;
		break;
	case I2C_SMBUS_BYTE:
		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMB_HOST_ADDRESS);
		if (read_write == I2C_SMBUS_WRITE)
			outb_p(command, SMB_HOST_DATA);
		size = AMD756_BYTE;
		break;
	case I2C_SMBUS_BYTE_DATA:
		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMB_HOST_ADDRESS);
		outb_p(command, SMB_HOST_COMMAND);
		if (read_write == I2C_SMBUS_WRITE)
			outw_p(data->byte, SMB_HOST_DATA);
		size = AMD756_BYTE_DATA;
		break;
	case I2C_SMBUS_WORD_DATA:
		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMB_HOST_ADDRESS);
		outb_p(command, SMB_HOST_COMMAND);
		if (read_write == I2C_SMBUS_WRITE)
			outw_p(data->word, SMB_HOST_DATA);	/* TODO: endian???? */
		size = AMD756_WORD_DATA;
		break;
	case I2C_SMBUS_BLOCK_DATA:
		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMB_HOST_ADDRESS);
		outb_p(command, SMB_HOST_COMMAND);
		if (read_write == I2C_SMBUS_WRITE) {
			len = data->block[0];
			if (len < 0)
				len = 0;
			if (len > 32)
				len = 32;
			outw_p(len, SMB_HOST_DATA);
			/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
			for (i = 1; i <= len; i++)
				outb_p(data->block[i],
				       SMB_HOST_BLOCK_DATA);
		}
		size = AMD756_BLOCK_DATA;
		break;
	}

	/* How about enabling interrupts... */
	outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE);

	if (amd756_transaction(adap))	/* Error in transaction */
		return -1;

	if ((read_write == I2C_SMBUS_WRITE) || (size == AMD756_QUICK))
		return 0;


	switch (size) {
	case AMD756_BYTE:
		data->byte = inw_p(SMB_HOST_DATA);
		break;
	case AMD756_BYTE_DATA:
		data->byte = inw_p(SMB_HOST_DATA);
		break;
	case AMD756_WORD_DATA:
		data->word = inw_p(SMB_HOST_DATA);	/* TODO: endian???? */
		break;
	case AMD756_BLOCK_DATA:
		data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f;
		if(data->block[0] > 32)
			data->block[0] = 32;
		/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
		for (i = 1; i <= data->block[0]; i++)
			data->block[i] = inb_p(SMB_HOST_BLOCK_DATA);
		break;
	}

	return 0;
}

static u32 amd756_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	    I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
	    I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_PROC_CALL;
}

static const struct i2c_algorithm smbus_algorithm = {
	.smbus_xfer	= amd756_access,
	.functionality	= amd756_func,
};

struct i2c_adapter amd756_smbus = {
	.owner		= THIS_MODULE,
	.class          = I2C_CLASS_HWMON,
	.algo		= &smbus_algorithm,
};

enum chiptype { AMD756, AMD766, AMD768, NFORCE, AMD8111 };
static const char* chipname[] = {
	"AMD756", "AMD766", "AMD768",
	"nVidia nForce", "AMD8111",
};

static struct pci_device_id amd756_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_740B),
	  .driver_data = AMD756 },
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7413),
	  .driver_data = AMD766 },
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7443),
	  .driver_data = AMD768 },
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS),
	  .driver_data = AMD8111 },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS),
	  .driver_data = NFORCE },
	{ 0, }
};

MODULE_DEVICE_TABLE (pci, amd756_ids);

static int __devinit amd756_probe(struct pci_dev *pdev,
				  const struct pci_device_id *id)
{
	int nforce = (id->driver_data == NFORCE);
	int error;
	u8 temp;
	
	if (amd756_ioport) {
		dev_err(&pdev->dev, "Only one device supported "
		       "(you have a strange motherboard, btw)\n");
		return -ENODEV;
	}

	if (nforce) {
		if (PCI_FUNC(pdev->devfn) != 1)
			return -ENODEV;

		pci_read_config_word(pdev, SMBBANFORCE, &amd756_ioport);
		amd756_ioport &= 0xfffc;
	} else { /* amd */
		if (PCI_FUNC(pdev->devfn) != 3)
			return -ENODEV;

		pci_read_config_byte(pdev, SMBGCFG, &temp);
		if ((temp & 128) == 0) {
			dev_err(&pdev->dev,
				"Error: SMBus controller I/O not enabled!\n");
			return -ENODEV;
		}

		/* Determine the address of the SMBus areas */
		/* Technically it is a dword but... */
		pci_read_config_word(pdev, SMBBA, &amd756_ioport);
		amd756_ioport &= 0xff00;
		amd756_ioport += SMB_ADDR_OFFSET;
	}

	if (!request_region(amd756_ioport, SMB_IOSIZE, amd756_driver.name)) {
		dev_err(&pdev->dev, "SMB region 0x%x already in use!\n",
			amd756_ioport);
		return -ENODEV;
	}

	pci_read_config_byte(pdev, SMBREV, &temp);
	dev_dbg(&pdev->dev, "SMBREV = 0x%X\n", temp);
	dev_dbg(&pdev->dev, "AMD756_smba = 0x%X\n", amd756_ioport);

	/* set up the driverfs linkage to our parent device */
	amd756_smbus.dev.parent = &pdev->dev;

	sprintf(amd756_smbus.name, "SMBus %s adapter at %04x",
		chipname[id->driver_data], amd756_ioport);

	error = i2c_add_adapter(&amd756_smbus);
	if (error) {
		dev_err(&pdev->dev,
			"Adapter registration failed, module not inserted\n");
		goto out_err;
	}

	return 0;

 out_err:
	release_region(amd756_ioport, SMB_IOSIZE);
	return error;
}

static void __devexit amd756_remove(struct pci_dev *dev)
{
	i2c_del_adapter(&amd756_smbus);
	release_region(amd756_ioport, SMB_IOSIZE);
}

static struct pci_driver amd756_driver = {
	.name		= "amd756_smbus",
	.id_table	= amd756_ids,
	.probe		= amd756_probe,
	.remove		= __devexit_p(amd756_remove),
};

static int __init amd756_init(void)
{
	return pci_register_driver(&amd756_driver);
}

static void __exit amd756_exit(void)
{
	pci_unregister_driver(&amd756_driver);
}

MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>");
MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver");
MODULE_LICENSE("GPL");

EXPORT_SYMBOL(amd756_smbus);

module_init(amd756_init)
module_exit(amd756_exit)
Commit	Line	Data
1da177e4 LT	1	/*
	2	amd756.c - Part of lm_sensors, Linux kernel modules for hardware
	3	monitoring
	4
	5	Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>
	6
	7	Shamelessly ripped from i2c-piix4.c:
	8
	9	Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and
	10	Philip Edelbrock <phil@netroedge.com>
	11
	12	This program is free software; you can redistribute it and/or modify
	13	it under the terms of the GNU General Public License as published by
	14	the Free Software Foundation; either version 2 of the License, or
	15	(at your option) any later version.
	16
	17	This program is distributed in the hope that it will be useful,
	18	but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	GNU General Public License for more details.
	21
	22	You should have received a copy of the GNU General Public License
	23	along with this program; if not, write to the Free Software
	24	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	25	*/
	26
	27	/*
	28	2002-04-08: Added nForce support. (Csaba Halasz)
	29	2002-10-03: Fixed nForce PnP I/O port. (Michael Steil)
	30	2002-12-28: Rewritten into something that resembles a Linux driver (hch)
	31	2003-11-29: Added back AMD8111 removed by the previous rewrite.
	32	(Philip Pokorny)
	33	*/
	34
	35	/*
	36	Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce
	37	Note: we assume there can only be one device, with one SMBus interface.
	38	*/
	39
1da177e4 LT	40	#include <linux/module.h>
	41	#include <linux/pci.h>
	42	#include <linux/kernel.h>
	43	#include <linux/delay.h>
	44	#include <linux/stddef.h>
	45	#include <linux/sched.h>
	46	#include <linux/ioport.h>
	47	#include <linux/i2c.h>
	48	#include <linux/init.h>
	49	#include <asm/io.h>
	50
	51	/* AMD756 SMBus address offsets */
	52	#define SMB_ADDR_OFFSET 0xE0
	53	#define SMB_IOSIZE 16
	54	#define SMB_GLOBAL_STATUS (0x0 + amd756_ioport)
	55	#define SMB_GLOBAL_ENABLE (0x2 + amd756_ioport)
	56	#define SMB_HOST_ADDRESS (0x4 + amd756_ioport)
	57	#define SMB_HOST_DATA (0x6 + amd756_ioport)
	58	#define SMB_HOST_COMMAND (0x8 + amd756_ioport)
	59	#define SMB_HOST_BLOCK_DATA (0x9 + amd756_ioport)
	60	#define SMB_HAS_DATA (0xA + amd756_ioport)
	61	#define SMB_HAS_DEVICE_ADDRESS (0xC + amd756_ioport)
	62	#define SMB_HAS_HOST_ADDRESS (0xE + amd756_ioport)
	63	#define SMB_SNOOP_ADDRESS (0xF + amd756_ioport)
	64
	65	/* PCI Address Constants */
	66
	67	/* address of I/O space */
	68	#define SMBBA 0x058 /* mh */
	69	#define SMBBANFORCE 0x014
	70
	71	/* general configuration */
	72	#define SMBGCFG 0x041 /* mh */
	73
	74	/* silicon revision code */
	75	#define SMBREV 0x008
	76
	77	/* Other settings */
	78	#define MAX_TIMEOUT 500
	79
	80	/* AMD756 constants */
	81	#define AMD756_QUICK 0x00
	82	#define AMD756_BYTE 0x01
	83	#define AMD756_BYTE_DATA 0x02
	84	#define AMD756_WORD_DATA 0x03
	85	#define AMD756_PROCESS_CALL 0x04
	86	#define AMD756_BLOCK_DATA 0x05
	87
d6072f84	88	static struct pci_driver amd756_driver;
60507095	89	static unsigned short amd756_ioport;
1da177e4 LT	90
	91	/*
	92	SMBUS event = I/O 28-29 bit 11
	93	see E0 for the status bits and enabled in E2
	94
	95	*/
	96	#define GS_ABRT_STS (1 << 0)
	97	#define GS_COL_STS (1 << 1)
	98	#define GS_PRERR_STS (1 << 2)
	99	#define GS_HST_STS (1 << 3)
	100	#define GS_HCYC_STS (1 << 4)
	101	#define GS_TO_STS (1 << 5)
	102	#define GS_SMB_STS (1 << 11)
	103
	104	#define GS_CLEAR_STS (GS_ABRT_STS \| GS_COL_STS \| GS_PRERR_STS \| \
	105	GS_HCYC_STS \| GS_TO_STS )
	106
	107	#define GE_CYC_TYPE_MASK (7)
	108	#define GE_HOST_STC (1 << 3)
	109	#define GE_ABORT (1 << 5)
	110
	111
	112	static int amd756_transaction(struct i2c_adapter *adap)
	113	{
	114	int temp;
	115	int result = 0;
	116	int timeout = 0;
	117
	118	dev_dbg(&adap->dev, "Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, "
	119	"DAT=%04x\n", inw_p(SMB_GLOBAL_STATUS),
	120	inw_p(SMB_GLOBAL_ENABLE), inw_p(SMB_HOST_ADDRESS),
	121	inb_p(SMB_HOST_DATA));
	122
	123	/* Make sure the SMBus host is ready to start transmitting */
	124	if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS \| GS_SMB_STS)) {
	125	dev_dbg(&adap->dev, "SMBus busy (%04x). Waiting...\n", temp);
	126	do {
	127	msleep(1);
	128	temp = inw_p(SMB_GLOBAL_STATUS);
	129	} while ((temp & (GS_HST_STS \| GS_SMB_STS)) &&
	130	(timeout++ < MAX_TIMEOUT));
	131	/* If the SMBus is still busy, we give up */
	132	if (timeout >= MAX_TIMEOUT) {
	133	dev_dbg(&adap->dev, "Busy wait timeout (%04x)\n", temp);
	134	goto abort;
	135	}
	136	timeout = 0;
	137	}
	138
	139	/* start the transaction by setting the start bit */
	140	outw_p(inw(SMB_GLOBAL_ENABLE) \| GE_HOST_STC, SMB_GLOBAL_ENABLE);
	141
	142	/* We will always wait for a fraction of a second! */
	143	do {
	144	msleep(1);
	145	temp = inw_p(SMB_GLOBAL_STATUS);
	146	} while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT));
	147
	148	/* If the SMBus is still busy, we give up */
	149	if (timeout >= MAX_TIMEOUT) {
	150	dev_dbg(&adap->dev, "Completion timeout!\n");
	151	goto abort;
	152	}
	153
154	if (temp & GS_PRERR_STS) {
155	result = -1;
156	dev_dbg(&adap->dev, "SMBus Protocol error (no response)!\n");
157	}
158
159	if (temp & GS_COL_STS) {
160	result = -1;
161	dev_warn(&adap->dev, "SMBus collision!\n");
162	}
163
164	if (temp & GS_TO_STS) {
165	result = -1;
166	dev_dbg(&adap->dev, "SMBus protocol timeout!\n");
167	}
168
169	if (temp & GS_HCYC_STS)
170	dev_dbg(&adap->dev, "SMBus protocol success!\n");
171
172	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
173
174	#ifdef DEBUG
175	if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) {
176	dev_dbg(&adap->dev,
177	"Failed reset at end of transaction (%04x)\n", temp);
178	}
179	#endif
180
181	dev_dbg(&adap->dev,
182	"Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
183	inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
184	inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));
185
186	return result;
187
188	abort:
189	dev_warn(&adap->dev, "Sending abort\n");
190	outw_p(inw(SMB_GLOBAL_ENABLE) \| GE_ABORT, SMB_GLOBAL_ENABLE);
191	msleep(100);
192	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
193	return -1;
194	}
195
196	/* Return -1 on error. */
197	static s32 amd756_access(struct i2c_adapter * adap, u16 addr,
198	unsigned short flags, char read_write,
199	u8 command, int size, union i2c_smbus_data * data)
200	{
201	int i, len;
202
203	/** TODO: Should I supporte the 10-bit transfers? */
204	switch (size) {
205	case I2C_SMBUS_PROC_CALL:
206	dev_dbg(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
207	/* TODO: Well... It is supported, I'm just not sure what to do here... */
208	return -1;
209	case I2C_SMBUS_QUICK:
210	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
211	SMB_HOST_ADDRESS);
212	size = AMD756_QUICK;
213	break;
214	case I2C_SMBUS_BYTE:
215	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
216	SMB_HOST_ADDRESS);
217	if (read_write == I2C_SMBUS_WRITE)
218	outb_p(command, SMB_HOST_DATA);
219	size = AMD756_BYTE;
220	break;
221	case I2C_SMBUS_BYTE_DATA:
222	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
223	SMB_HOST_ADDRESS);
224	outb_p(command, SMB_HOST_COMMAND);
225	if (read_write == I2C_SMBUS_WRITE)
226	outw_p(data->byte, SMB_HOST_DATA);
227	size = AMD756_BYTE_DATA;
228	break;
229	case I2C_SMBUS_WORD_DATA:
230	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
231	SMB_HOST_ADDRESS);
232	outb_p(command, SMB_HOST_COMMAND);
233	if (read_write == I2C_SMBUS_WRITE)
234	outw_p(data->word, SMB_HOST_DATA); /* TODO: endian???? */
235	size = AMD756_WORD_DATA;
236	break;
237	case I2C_SMBUS_BLOCK_DATA:
238	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
239	SMB_HOST_ADDRESS);
240	outb_p(command, SMB_HOST_COMMAND);
241	if (read_write == I2C_SMBUS_WRITE) {
242	len = data->block[0];
243	if (len < 0)
244	len = 0;
245	if (len > 32)
246	len = 32;
247	outw_p(len, SMB_HOST_DATA);
248	/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
249	for (i = 1; i <= len; i++)
250	outb_p(data->block[i],
251	SMB_HOST_BLOCK_DATA);
252	}
253	size = AMD756_BLOCK_DATA;
254	break;
255	}
256
257	/* How about enabling interrupts... */
258	outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE);
259
260	if (amd756_transaction(adap)) /* Error in transaction */
261	return -1;
262
263	if ((read_write == I2C_SMBUS_WRITE) \|\| (size == AMD756_QUICK))
264	return 0;
265
266
267	switch (size) {
268	case AMD756_BYTE:
269	data->byte = inw_p(SMB_HOST_DATA);
270	break;
271	case AMD756_BYTE_DATA:
272	data->byte = inw_p(SMB_HOST_DATA);
273	break;
274	case AMD756_WORD_DATA:
275	data->word = inw_p(SMB_HOST_DATA); /* TODO: endian???? */
276	break;
277	case AMD756_BLOCK_DATA:
278	data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f;
279	if(data->block[0] > 32)
280	data->block[0] = 32;
281	/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
282	for (i = 1; i <= data->block[0]; i++)
283	data->block[i] = inb_p(SMB_HOST_BLOCK_DATA);
284	break;
285	}
286
287	return 0;
288	}
289
290	static u32 amd756_func(struct i2c_adapter *adapter)
291	{
292	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
293	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
294	I2C_FUNC_SMBUS_BLOCK_DATA \| I2C_FUNC_SMBUS_PROC_CALL;
295	}
296
8f9082c5	297	static const struct i2c_algorithm smbus_algorithm = {
1da177e4 LT	298	.smbus_xfer = amd756_access,
	299	.functionality = amd756_func,
	300	};
	301
	302	struct i2c_adapter amd756_smbus = {
	303	.owner = THIS_MODULE,
	304	.class = I2C_CLASS_HWMON,
	305	.algo = &smbus_algorithm,
1da177e4 LT	306	};
	307
	308	enum chiptype { AMD756, AMD766, AMD768, NFORCE, AMD8111 };
	309	static const char* chipname[] = {
	310	"AMD756", "AMD766", "AMD768",
	311	"nVidia nForce", "AMD8111",
	312	};
	313
	314	static struct pci_device_id amd756_ids[] = {
	315	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_740B),
	316	.driver_data = AMD756 },
	317	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7413),
	318	.driver_data = AMD766 },
	319	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7443),
	320	.driver_data = AMD768 },
	321	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS),
	322	.driver_data = AMD8111 },
	323	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS),
	324	.driver_data = NFORCE },
	325	{ 0, }
	326	};
	327
	328	MODULE_DEVICE_TABLE (pci, amd756_ids);
	329
	330	static int __devinit amd756_probe(struct pci_dev *pdev,
	331	const struct pci_device_id *id)
	332	{
	333	int nforce = (id->driver_data == NFORCE);
	334	int error;
	335	u8 temp;
	336
	337	if (amd756_ioport) {
	338	dev_err(&pdev->dev, "Only one device supported "
	339	"(you have a strange motherboard, btw)\n");
	340	return -ENODEV;
	341	}
	342
	343	if (nforce) {
	344	if (PCI_FUNC(pdev->devfn) != 1)
	345	return -ENODEV;
	346
	347	pci_read_config_word(pdev, SMBBANFORCE, &amd756_ioport);
	348	amd756_ioport &= 0xfffc;
	349	} else { /* amd */
	350	if (PCI_FUNC(pdev->devfn) != 3)
	351	return -ENODEV;
	352
	353	pci_read_config_byte(pdev, SMBGCFG, &temp);
	354	if ((temp & 128) == 0) {
	355	dev_err(&pdev->dev,
	356	"Error: SMBus controller I/O not enabled!\n");
	357	return -ENODEV;
	358	}
	359
	360	/* Determine the address of the SMBus areas */
	361	/* Technically it is a dword but... */
	362	pci_read_config_word(pdev, SMBBA, &amd756_ioport);
	363	amd756_ioport &= 0xff00;
	364	amd756_ioport += SMB_ADDR_OFFSET;
	365	}
	366
d6072f84	367	if (!request_region(amd756_ioport, SMB_IOSIZE, amd756_driver.name)) {
1da177e4 LT	368	dev_err(&pdev->dev, "SMB region 0x%x already in use!\n",
	369	amd756_ioport);
	370	return -ENODEV;
	371	}
	372
	373	pci_read_config_byte(pdev, SMBREV, &temp);
	374	dev_dbg(&pdev->dev, "SMBREV = 0x%X\n", temp);
	375	dev_dbg(&pdev->dev, "AMD756_smba = 0x%X\n", amd756_ioport);
	376
	377	/* set up the driverfs linkage to our parent device */
	378	amd756_smbus.dev.parent = &pdev->dev;
	379
	380	sprintf(amd756_smbus.name, "SMBus %s adapter at %04x",
	381	chipname[id->driver_data], amd756_ioport);
	382
	383	error = i2c_add_adapter(&amd756_smbus);
	384	if (error) {
	385	dev_err(&pdev->dev,
	386	"Adapter registration failed, module not inserted\n");
	387	goto out_err;
	388	}
	389
	390	return 0;
	391
	392	out_err:
	393	release_region(amd756_ioport, SMB_IOSIZE);
	394	return error;
	395	}
	396
	397	static void __devexit amd756_remove(struct pci_dev *dev)
	398	{
	399	i2c_del_adapter(&amd756_smbus);
	400	release_region(amd756_ioport, SMB_IOSIZE);
	401	}
	402
	403	static struct pci_driver amd756_driver = {
	404	.name = "amd756_smbus",
	405	.id_table = amd756_ids,
	406	.probe = amd756_probe,
	407	.remove = __devexit_p(amd756_remove),
	408	};
	409
	410	static int __init amd756_init(void)
	411	{
	412	return pci_register_driver(&amd756_driver);
	413	}
	414
	415	static void __exit amd756_exit(void)
	416	{
	417	pci_unregister_driver(&amd756_driver);
	418	}
	419
	420	MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>");
	421	MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver");
	422	MODULE_LICENSE("GPL");
	423
	424	EXPORT_SYMBOL(amd756_smbus);
	425
	426	module_init(amd756_init)
	427	module_exit(amd756_exit)