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aa11e38c DA |
1 | /* |
2 | * Copyright (C) 2002 Motorola GSG-China | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation; either version 2 | |
7 | * of the License, or (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, | |
17 | * USA. | |
18 | * | |
19 | * Author: | |
20 | * Darius Augulis, Teltonika Inc. | |
21 | * | |
22 | * Desc.: | |
23 | * Implementation of I2C Adapter/Algorithm Driver | |
24 | * for I2C Bus integrated in Freescale i.MX/MXC processors | |
25 | * | |
26 | * Derived from Motorola GSG China I2C example driver | |
27 | * | |
28 | * Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de | |
29 | * Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de | |
30 | * Copyright (C) 2007 RightHand Technologies, Inc. | |
31 | * Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt> | |
32 | * | |
d533f049 JL |
33 | * Copyright 2013 Freescale Semiconductor, Inc. |
34 | * | |
aa11e38c DA |
35 | */ |
36 | ||
37 | /** Includes ******************************************************************* | |
38 | *******************************************************************************/ | |
39 | ||
40 | #include <linux/init.h> | |
41 | #include <linux/kernel.h> | |
42 | #include <linux/module.h> | |
43 | #include <linux/errno.h> | |
44 | #include <linux/err.h> | |
45 | #include <linux/interrupt.h> | |
46 | #include <linux/delay.h> | |
47 | #include <linux/i2c.h> | |
48 | #include <linux/io.h> | |
49 | #include <linux/sched.h> | |
50 | #include <linux/platform_device.h> | |
51 | #include <linux/clk.h> | |
5a0e3ad6 | 52 | #include <linux/slab.h> |
dfcd04b1 SG |
53 | #include <linux/of.h> |
54 | #include <linux/of_device.h> | |
55 | #include <linux/of_i2c.h> | |
82906b13 | 56 | #include <linux/platform_data/i2c-imx.h> |
aa11e38c DA |
57 | |
58 | /** Defines ******************************************************************** | |
59 | *******************************************************************************/ | |
60 | ||
61 | /* This will be the driver name the kernel reports */ | |
62 | #define DRIVER_NAME "imx-i2c" | |
63 | ||
64 | /* Default value */ | |
65 | #define IMX_I2C_BIT_RATE 100000 /* 100kHz */ | |
66 | ||
67 | /* IMX I2C registers */ | |
68 | #define IMX_I2C_IADR 0x00 /* i2c slave address */ | |
69 | #define IMX_I2C_IFDR 0x04 /* i2c frequency divider */ | |
70 | #define IMX_I2C_I2CR 0x08 /* i2c control */ | |
71 | #define IMX_I2C_I2SR 0x0C /* i2c status */ | |
72 | #define IMX_I2C_I2DR 0x10 /* i2c transfer data */ | |
73 | ||
74 | /* Bits of IMX I2C registers */ | |
75 | #define I2SR_RXAK 0x01 | |
76 | #define I2SR_IIF 0x02 | |
77 | #define I2SR_SRW 0x04 | |
78 | #define I2SR_IAL 0x10 | |
79 | #define I2SR_IBB 0x20 | |
80 | #define I2SR_IAAS 0x40 | |
81 | #define I2SR_ICF 0x80 | |
82 | #define I2CR_RSTA 0x04 | |
83 | #define I2CR_TXAK 0x08 | |
84 | #define I2CR_MTX 0x10 | |
85 | #define I2CR_MSTA 0x20 | |
86 | #define I2CR_IIEN 0x40 | |
87 | #define I2CR_IEN 0x80 | |
88 | ||
89 | /** Variables ****************************************************************** | |
90 | *******************************************************************************/ | |
91 | ||
aa11e38c DA |
92 | /* |
93 | * sorted list of clock divider, register value pairs | |
94 | * taken from table 26-5, p.26-9, Freescale i.MX | |
95 | * Integrated Portable System Processor Reference Manual | |
96 | * Document Number: MC9328MXLRM, Rev. 5.1, 06/2007 | |
97 | * | |
98 | * Duplicated divider values removed from list | |
99 | */ | |
d533f049 JL |
100 | struct imx_i2c_clk_pair { |
101 | u16 div; | |
102 | u16 val; | |
103 | }; | |
aa11e38c | 104 | |
d533f049 | 105 | static struct imx_i2c_clk_pair __initdata i2c_clk_div[] = { |
aa11e38c DA |
106 | { 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 }, |
107 | { 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 }, | |
108 | { 42, 0x03 }, { 44, 0x27 }, { 48, 0x28 }, { 52, 0x05 }, | |
109 | { 56, 0x29 }, { 60, 0x06 }, { 64, 0x2A }, { 72, 0x2B }, | |
110 | { 80, 0x2C }, { 88, 0x09 }, { 96, 0x2D }, { 104, 0x0A }, | |
111 | { 112, 0x2E }, { 128, 0x2F }, { 144, 0x0C }, { 160, 0x30 }, | |
112 | { 192, 0x31 }, { 224, 0x32 }, { 240, 0x0F }, { 256, 0x33 }, | |
113 | { 288, 0x10 }, { 320, 0x34 }, { 384, 0x35 }, { 448, 0x36 }, | |
114 | { 480, 0x13 }, { 512, 0x37 }, { 576, 0x14 }, { 640, 0x38 }, | |
115 | { 768, 0x39 }, { 896, 0x3A }, { 960, 0x17 }, { 1024, 0x3B }, | |
116 | { 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E }, | |
117 | { 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D }, | |
118 | { 3072, 0x1E }, { 3840, 0x1F } | |
119 | }; | |
120 | ||
5bdfba29 SG |
121 | enum imx_i2c_type { |
122 | IMX1_I2C, | |
123 | IMX21_I2C, | |
124 | }; | |
125 | ||
aa11e38c DA |
126 | struct imx_i2c_struct { |
127 | struct i2c_adapter adapter; | |
aa11e38c DA |
128 | struct clk *clk; |
129 | void __iomem *base; | |
aa11e38c DA |
130 | wait_queue_head_t queue; |
131 | unsigned long i2csr; | |
65de394d | 132 | unsigned int disable_delay; |
43309f3b | 133 | int stopped; |
db3a3d4e | 134 | unsigned int ifdr; /* IMX_I2C_IFDR */ |
5bdfba29 SG |
135 | enum imx_i2c_type devtype; |
136 | }; | |
137 | ||
138 | static struct platform_device_id imx_i2c_devtype[] = { | |
139 | { | |
140 | .name = "imx1-i2c", | |
141 | .driver_data = IMX1_I2C, | |
142 | }, { | |
143 | .name = "imx21-i2c", | |
144 | .driver_data = IMX21_I2C, | |
145 | }, { | |
146 | /* sentinel */ | |
147 | } | |
aa11e38c | 148 | }; |
5bdfba29 | 149 | MODULE_DEVICE_TABLE(platform, imx_i2c_devtype); |
aa11e38c | 150 | |
dfcd04b1 | 151 | static const struct of_device_id i2c_imx_dt_ids[] = { |
5bdfba29 SG |
152 | { .compatible = "fsl,imx1-i2c", .data = &imx_i2c_devtype[IMX1_I2C], }, |
153 | { .compatible = "fsl,imx21-i2c", .data = &imx_i2c_devtype[IMX21_I2C], }, | |
dfcd04b1 SG |
154 | { /* sentinel */ } |
155 | }; | |
2f641a8b | 156 | MODULE_DEVICE_TABLE(of, i2c_imx_dt_ids); |
dfcd04b1 | 157 | |
5bdfba29 SG |
158 | static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx) |
159 | { | |
160 | return i2c_imx->devtype == IMX1_I2C; | |
161 | } | |
162 | ||
aa11e38c DA |
163 | /** Functions for IMX I2C adapter driver *************************************** |
164 | *******************************************************************************/ | |
165 | ||
43309f3b | 166 | static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy) |
aa11e38c DA |
167 | { |
168 | unsigned long orig_jiffies = jiffies; | |
43309f3b | 169 | unsigned int temp; |
aa11e38c DA |
170 | |
171 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | |
172 | ||
43309f3b RZ |
173 | while (1) { |
174 | temp = readb(i2c_imx->base + IMX_I2C_I2SR); | |
175 | if (for_busy && (temp & I2SR_IBB)) | |
176 | break; | |
177 | if (!for_busy && !(temp & I2SR_IBB)) | |
178 | break; | |
da9c99fc | 179 | if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) { |
aa11e38c DA |
180 | dev_dbg(&i2c_imx->adapter.dev, |
181 | "<%s> I2C bus is busy\n", __func__); | |
da9c99fc | 182 | return -ETIMEDOUT; |
aa11e38c DA |
183 | } |
184 | schedule(); | |
185 | } | |
186 | ||
187 | return 0; | |
188 | } | |
189 | ||
190 | static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx) | |
191 | { | |
e39428d5 | 192 | wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10); |
aa11e38c | 193 | |
e39428d5 | 194 | if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) { |
aa11e38c DA |
195 | dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__); |
196 | return -ETIMEDOUT; | |
197 | } | |
198 | dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__); | |
199 | i2c_imx->i2csr = 0; | |
200 | return 0; | |
201 | } | |
202 | ||
203 | static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) | |
204 | { | |
205 | if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) { | |
206 | dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__); | |
207 | return -EIO; /* No ACK */ | |
208 | } | |
209 | ||
210 | dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__); | |
211 | return 0; | |
212 | } | |
213 | ||
43309f3b | 214 | static int i2c_imx_start(struct imx_i2c_struct *i2c_imx) |
aa11e38c DA |
215 | { |
216 | unsigned int temp = 0; | |
43309f3b | 217 | int result; |
aa11e38c DA |
218 | |
219 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | |
220 | ||
83914337 | 221 | clk_prepare_enable(i2c_imx->clk); |
db3a3d4e | 222 | writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR); |
aa11e38c | 223 | /* Enable I2C controller */ |
43309f3b | 224 | writeb(0, i2c_imx->base + IMX_I2C_I2SR); |
aa11e38c | 225 | writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); |
43309f3b RZ |
226 | |
227 | /* Wait controller to be stable */ | |
228 | udelay(50); | |
229 | ||
aa11e38c DA |
230 | /* Start I2C transaction */ |
231 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | |
232 | temp |= I2CR_MSTA; | |
233 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | |
43309f3b RZ |
234 | result = i2c_imx_bus_busy(i2c_imx, 1); |
235 | if (result) | |
236 | return result; | |
237 | i2c_imx->stopped = 0; | |
238 | ||
aa11e38c DA |
239 | temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; |
240 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | |
43309f3b | 241 | return result; |
aa11e38c DA |
242 | } |
243 | ||
244 | static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) | |
245 | { | |
246 | unsigned int temp = 0; | |
247 | ||
43309f3b RZ |
248 | if (!i2c_imx->stopped) { |
249 | /* Stop I2C transaction */ | |
250 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | |
251 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | |
252 | temp &= ~(I2CR_MSTA | I2CR_MTX); | |
253 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | |
43309f3b | 254 | } |
5bdfba29 | 255 | if (is_imx1_i2c(i2c_imx)) { |
a4094a76 RZ |
256 | /* |
257 | * This delay caused by an i.MXL hardware bug. | |
258 | * If no (or too short) delay, no "STOP" bit will be generated. | |
259 | */ | |
260 | udelay(i2c_imx->disable_delay); | |
261 | } | |
43309f3b | 262 | |
a1ee06b7 | 263 | if (!i2c_imx->stopped) { |
43309f3b | 264 | i2c_imx_bus_busy(i2c_imx, 0); |
a1ee06b7 VL |
265 | i2c_imx->stopped = 1; |
266 | } | |
43309f3b | 267 | |
aa11e38c DA |
268 | /* Disable I2C controller */ |
269 | writeb(0, i2c_imx->base + IMX_I2C_I2CR); | |
83914337 | 270 | clk_disable_unprepare(i2c_imx->clk); |
aa11e38c DA |
271 | } |
272 | ||
273 | static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, | |
274 | unsigned int rate) | |
275 | { | |
276 | unsigned int i2c_clk_rate; | |
277 | unsigned int div; | |
278 | int i; | |
279 | ||
280 | /* Divider value calculation */ | |
281 | i2c_clk_rate = clk_get_rate(i2c_imx->clk); | |
282 | div = (i2c_clk_rate + rate - 1) / rate; | |
d533f049 | 283 | if (div < i2c_clk_div[0].div) |
aa11e38c | 284 | i = 0; |
d533f049 | 285 | else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1].div) |
aa11e38c DA |
286 | i = ARRAY_SIZE(i2c_clk_div) - 1; |
287 | else | |
d533f049 | 288 | for (i = 0; i2c_clk_div[i].div < div; i++); |
aa11e38c | 289 | |
db3a3d4e | 290 | /* Store divider value */ |
d533f049 | 291 | i2c_imx->ifdr = i2c_clk_div[i].val; |
aa11e38c DA |
292 | |
293 | /* | |
294 | * There dummy delay is calculated. | |
295 | * It should be about one I2C clock period long. | |
296 | * This delay is used in I2C bus disable function | |
297 | * to fix chip hardware bug. | |
298 | */ | |
d533f049 | 299 | i2c_imx->disable_delay = (500000U * i2c_clk_div[i].div |
aa11e38c DA |
300 | + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2); |
301 | ||
302 | /* dev_dbg() can't be used, because adapter is not yet registered */ | |
303 | #ifdef CONFIG_I2C_DEBUG_BUS | |
002f002d | 304 | dev_dbg(&i2c_imx->adapter.dev, "<%s> I2C_CLK=%d, REQ DIV=%d\n", |
aa11e38c | 305 | __func__, i2c_clk_rate, div); |
002f002d | 306 | dev_dbg(&i2c_imx->adapter.dev, "<%s> IFDR[IC]=0x%x, REAL DIV=%d\n", |
d533f049 | 307 | __func__, i2c_clk_div[i].val, i2c_clk_div[i].div); |
aa11e38c DA |
308 | #endif |
309 | } | |
310 | ||
311 | static irqreturn_t i2c_imx_isr(int irq, void *dev_id) | |
312 | { | |
313 | struct imx_i2c_struct *i2c_imx = dev_id; | |
314 | unsigned int temp; | |
315 | ||
316 | temp = readb(i2c_imx->base + IMX_I2C_I2SR); | |
317 | if (temp & I2SR_IIF) { | |
318 | /* save status register */ | |
319 | i2c_imx->i2csr = temp; | |
320 | temp &= ~I2SR_IIF; | |
321 | writeb(temp, i2c_imx->base + IMX_I2C_I2SR); | |
e39428d5 | 322 | wake_up(&i2c_imx->queue); |
aa11e38c DA |
323 | return IRQ_HANDLED; |
324 | } | |
325 | ||
326 | return IRQ_NONE; | |
327 | } | |
328 | ||
329 | static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) | |
330 | { | |
331 | int i, result; | |
332 | ||
333 | dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n", | |
334 | __func__, msgs->addr << 1); | |
335 | ||
336 | /* write slave address */ | |
337 | writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR); | |
338 | result = i2c_imx_trx_complete(i2c_imx); | |
339 | if (result) | |
340 | return result; | |
341 | result = i2c_imx_acked(i2c_imx); | |
342 | if (result) | |
343 | return result; | |
344 | dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__); | |
345 | ||
346 | /* write data */ | |
347 | for (i = 0; i < msgs->len; i++) { | |
348 | dev_dbg(&i2c_imx->adapter.dev, | |
349 | "<%s> write byte: B%d=0x%X\n", | |
350 | __func__, i, msgs->buf[i]); | |
351 | writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR); | |
352 | result = i2c_imx_trx_complete(i2c_imx); | |
353 | if (result) | |
354 | return result; | |
355 | result = i2c_imx_acked(i2c_imx); | |
356 | if (result) | |
357 | return result; | |
358 | } | |
359 | return 0; | |
360 | } | |
361 | ||
362 | static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) | |
363 | { | |
364 | int i, result; | |
365 | unsigned int temp; | |
366 | ||
367 | dev_dbg(&i2c_imx->adapter.dev, | |
368 | "<%s> write slave address: addr=0x%x\n", | |
369 | __func__, (msgs->addr << 1) | 0x01); | |
370 | ||
371 | /* write slave address */ | |
372 | writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR); | |
373 | result = i2c_imx_trx_complete(i2c_imx); | |
374 | if (result) | |
375 | return result; | |
376 | result = i2c_imx_acked(i2c_imx); | |
377 | if (result) | |
378 | return result; | |
379 | ||
380 | dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__); | |
381 | ||
382 | /* setup bus to read data */ | |
383 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | |
384 | temp &= ~I2CR_MTX; | |
385 | if (msgs->len - 1) | |
386 | temp &= ~I2CR_TXAK; | |
387 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | |
388 | readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */ | |
389 | ||
390 | dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__); | |
391 | ||
392 | /* read data */ | |
393 | for (i = 0; i < msgs->len; i++) { | |
394 | result = i2c_imx_trx_complete(i2c_imx); | |
395 | if (result) | |
396 | return result; | |
397 | if (i == (msgs->len - 1)) { | |
43309f3b RZ |
398 | /* It must generate STOP before read I2DR to prevent |
399 | controller from generating another clock cycle */ | |
aa11e38c DA |
400 | dev_dbg(&i2c_imx->adapter.dev, |
401 | "<%s> clear MSTA\n", __func__); | |
402 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | |
43309f3b | 403 | temp &= ~(I2CR_MSTA | I2CR_MTX); |
aa11e38c | 404 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); |
43309f3b RZ |
405 | i2c_imx_bus_busy(i2c_imx, 0); |
406 | i2c_imx->stopped = 1; | |
aa11e38c DA |
407 | } else if (i == (msgs->len - 2)) { |
408 | dev_dbg(&i2c_imx->adapter.dev, | |
409 | "<%s> set TXAK\n", __func__); | |
410 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | |
411 | temp |= I2CR_TXAK; | |
412 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | |
413 | } | |
414 | msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR); | |
415 | dev_dbg(&i2c_imx->adapter.dev, | |
416 | "<%s> read byte: B%d=0x%X\n", | |
417 | __func__, i, msgs->buf[i]); | |
418 | } | |
419 | return 0; | |
420 | } | |
421 | ||
422 | static int i2c_imx_xfer(struct i2c_adapter *adapter, | |
423 | struct i2c_msg *msgs, int num) | |
424 | { | |
425 | unsigned int i, temp; | |
426 | int result; | |
427 | struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter); | |
428 | ||
429 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | |
430 | ||
43309f3b RZ |
431 | /* Start I2C transfer */ |
432 | result = i2c_imx_start(i2c_imx); | |
aa11e38c DA |
433 | if (result) |
434 | goto fail0; | |
435 | ||
aa11e38c DA |
436 | /* read/write data */ |
437 | for (i = 0; i < num; i++) { | |
438 | if (i) { | |
439 | dev_dbg(&i2c_imx->adapter.dev, | |
440 | "<%s> repeated start\n", __func__); | |
441 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | |
442 | temp |= I2CR_RSTA; | |
443 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | |
43309f3b RZ |
444 | result = i2c_imx_bus_busy(i2c_imx, 1); |
445 | if (result) | |
446 | goto fail0; | |
aa11e38c DA |
447 | } |
448 | dev_dbg(&i2c_imx->adapter.dev, | |
449 | "<%s> transfer message: %d\n", __func__, i); | |
450 | /* write/read data */ | |
451 | #ifdef CONFIG_I2C_DEBUG_BUS | |
452 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | |
453 | dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, " | |
454 | "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__, | |
455 | (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0), | |
456 | (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0), | |
457 | (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0)); | |
458 | temp = readb(i2c_imx->base + IMX_I2C_I2SR); | |
459 | dev_dbg(&i2c_imx->adapter.dev, | |
460 | "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, " | |
461 | "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__, | |
462 | (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0), | |
463 | (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0), | |
464 | (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0), | |
465 | (temp & I2SR_RXAK ? 1 : 0)); | |
466 | #endif | |
467 | if (msgs[i].flags & I2C_M_RD) | |
468 | result = i2c_imx_read(i2c_imx, &msgs[i]); | |
469 | else | |
470 | result = i2c_imx_write(i2c_imx, &msgs[i]); | |
da9c99fc AP |
471 | if (result) |
472 | goto fail0; | |
aa11e38c DA |
473 | } |
474 | ||
475 | fail0: | |
476 | /* Stop I2C transfer */ | |
477 | i2c_imx_stop(i2c_imx); | |
478 | ||
479 | dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__, | |
480 | (result < 0) ? "error" : "success msg", | |
481 | (result < 0) ? result : num); | |
482 | return (result < 0) ? result : num; | |
483 | } | |
484 | ||
485 | static u32 i2c_imx_func(struct i2c_adapter *adapter) | |
486 | { | |
487 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; | |
488 | } | |
489 | ||
490 | static struct i2c_algorithm i2c_imx_algo = { | |
491 | .master_xfer = i2c_imx_xfer, | |
492 | .functionality = i2c_imx_func, | |
493 | }; | |
494 | ||
495 | static int __init i2c_imx_probe(struct platform_device *pdev) | |
496 | { | |
5bdfba29 SG |
497 | const struct of_device_id *of_id = of_match_device(i2c_imx_dt_ids, |
498 | &pdev->dev); | |
aa11e38c DA |
499 | struct imx_i2c_struct *i2c_imx; |
500 | struct resource *res; | |
593702c7 | 501 | struct imxi2c_platform_data *pdata = pdev->dev.platform_data; |
0fc1347a | 502 | const struct platform_device_id *imx_id; |
aa11e38c | 503 | void __iomem *base; |
8c88ab04 WS |
504 | int irq, ret; |
505 | u32 bitrate; | |
aa11e38c DA |
506 | |
507 | dev_dbg(&pdev->dev, "<%s>\n", __func__); | |
508 | ||
aa11e38c DA |
509 | irq = platform_get_irq(pdev, 0); |
510 | if (irq < 0) { | |
511 | dev_err(&pdev->dev, "can't get irq number\n"); | |
512 | return -ENOENT; | |
513 | } | |
514 | ||
3cc2d009 | 515 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
84dbf809 TR |
516 | base = devm_ioremap_resource(&pdev->dev, res); |
517 | if (IS_ERR(base)) | |
518 | return PTR_ERR(base); | |
aa11e38c | 519 | |
9f8a3e7f RZ |
520 | i2c_imx = devm_kzalloc(&pdev->dev, sizeof(struct imx_i2c_struct), |
521 | GFP_KERNEL); | |
aa11e38c DA |
522 | if (!i2c_imx) { |
523 | dev_err(&pdev->dev, "can't allocate interface\n"); | |
9f8a3e7f | 524 | return -ENOMEM; |
309c18d2 DA |
525 | } |
526 | ||
5bdfba29 | 527 | if (of_id) |
0fc1347a JL |
528 | imx_id = of_id->data; |
529 | else | |
530 | imx_id = platform_get_device_id(pdev); | |
531 | ||
532 | i2c_imx->devtype = imx_id->driver_data; | |
5bdfba29 | 533 | |
aa11e38c | 534 | /* Setup i2c_imx driver structure */ |
973c5ed4 | 535 | strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name)); |
aa11e38c DA |
536 | i2c_imx->adapter.owner = THIS_MODULE; |
537 | i2c_imx->adapter.algo = &i2c_imx_algo; | |
538 | i2c_imx->adapter.dev.parent = &pdev->dev; | |
539 | i2c_imx->adapter.nr = pdev->id; | |
dfcd04b1 | 540 | i2c_imx->adapter.dev.of_node = pdev->dev.of_node; |
aa11e38c | 541 | i2c_imx->base = base; |
aa11e38c DA |
542 | |
543 | /* Get I2C clock */ | |
1f09c672 | 544 | i2c_imx->clk = devm_clk_get(&pdev->dev, NULL); |
aa11e38c | 545 | if (IS_ERR(i2c_imx->clk)) { |
aa11e38c | 546 | dev_err(&pdev->dev, "can't get I2C clock\n"); |
9f8a3e7f | 547 | return PTR_ERR(i2c_imx->clk); |
aa11e38c | 548 | } |
aa11e38c | 549 | |
46f2832b JL |
550 | ret = clk_prepare_enable(i2c_imx->clk); |
551 | if (ret) { | |
552 | dev_err(&pdev->dev, "can't enable I2C clock\n"); | |
553 | return ret; | |
554 | } | |
aa11e38c | 555 | /* Request IRQ */ |
9f8a3e7f RZ |
556 | ret = devm_request_irq(&pdev->dev, irq, i2c_imx_isr, 0, |
557 | pdev->name, i2c_imx); | |
aa11e38c | 558 | if (ret) { |
9f8a3e7f RZ |
559 | dev_err(&pdev->dev, "can't claim irq %d\n", irq); |
560 | return ret; | |
aa11e38c DA |
561 | } |
562 | ||
563 | /* Init queue */ | |
564 | init_waitqueue_head(&i2c_imx->queue); | |
565 | ||
566 | /* Set up adapter data */ | |
567 | i2c_set_adapdata(&i2c_imx->adapter, i2c_imx); | |
568 | ||
569 | /* Set up clock divider */ | |
dfcd04b1 SG |
570 | bitrate = IMX_I2C_BIT_RATE; |
571 | ret = of_property_read_u32(pdev->dev.of_node, | |
572 | "clock-frequency", &bitrate); | |
573 | if (ret < 0 && pdata && pdata->bitrate) | |
574 | bitrate = pdata->bitrate; | |
575 | i2c_imx_set_clk(i2c_imx, bitrate); | |
aa11e38c DA |
576 | |
577 | /* Set up chip registers to defaults */ | |
578 | writeb(0, i2c_imx->base + IMX_I2C_I2CR); | |
579 | writeb(0, i2c_imx->base + IMX_I2C_I2SR); | |
580 | ||
581 | /* Add I2C adapter */ | |
582 | ret = i2c_add_numbered_adapter(&i2c_imx->adapter); | |
583 | if (ret < 0) { | |
584 | dev_err(&pdev->dev, "registration failed\n"); | |
9f8a3e7f | 585 | return ret; |
aa11e38c DA |
586 | } |
587 | ||
dfcd04b1 SG |
588 | of_i2c_register_devices(&i2c_imx->adapter); |
589 | ||
aa11e38c DA |
590 | /* Set up platform driver data */ |
591 | platform_set_drvdata(pdev, i2c_imx); | |
46f2832b | 592 | clk_disable_unprepare(i2c_imx->clk); |
aa11e38c | 593 | |
9f8a3e7f | 594 | dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", irq); |
aa11e38c | 595 | dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n", |
9f8a3e7f RZ |
596 | res->start, res->end); |
597 | dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x\n", | |
598 | resource_size(res), res->start); | |
aa11e38c DA |
599 | dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n", |
600 | i2c_imx->adapter.name); | |
06d141e9 | 601 | dev_info(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n"); |
aa11e38c DA |
602 | |
603 | return 0; /* Return OK */ | |
aa11e38c DA |
604 | } |
605 | ||
606 | static int __exit i2c_imx_remove(struct platform_device *pdev) | |
607 | { | |
608 | struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev); | |
aa11e38c DA |
609 | |
610 | /* remove adapter */ | |
611 | dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n"); | |
612 | i2c_del_adapter(&i2c_imx->adapter); | |
aa11e38c | 613 | |
aa11e38c DA |
614 | /* setup chip registers to defaults */ |
615 | writeb(0, i2c_imx->base + IMX_I2C_IADR); | |
616 | writeb(0, i2c_imx->base + IMX_I2C_IFDR); | |
617 | writeb(0, i2c_imx->base + IMX_I2C_I2CR); | |
618 | writeb(0, i2c_imx->base + IMX_I2C_I2SR); | |
619 | ||
aa11e38c DA |
620 | return 0; |
621 | } | |
622 | ||
623 | static struct platform_driver i2c_imx_driver = { | |
aa11e38c DA |
624 | .remove = __exit_p(i2c_imx_remove), |
625 | .driver = { | |
626 | .name = DRIVER_NAME, | |
627 | .owner = THIS_MODULE, | |
dfcd04b1 | 628 | .of_match_table = i2c_imx_dt_ids, |
5bdfba29 SG |
629 | }, |
630 | .id_table = imx_i2c_devtype, | |
aa11e38c DA |
631 | }; |
632 | ||
633 | static int __init i2c_adap_imx_init(void) | |
634 | { | |
635 | return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe); | |
636 | } | |
5d3f3331 | 637 | subsys_initcall(i2c_adap_imx_init); |
aa11e38c DA |
638 | |
639 | static void __exit i2c_adap_imx_exit(void) | |
640 | { | |
641 | platform_driver_unregister(&i2c_imx_driver); | |
642 | } | |
aa11e38c DA |
643 | module_exit(i2c_adap_imx_exit); |
644 | ||
645 | MODULE_LICENSE("GPL"); | |
646 | MODULE_AUTHOR("Darius Augulis"); | |
647 | MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus"); | |
648 | MODULE_ALIAS("platform:" DRIVER_NAME); |