[deliverable/linux.git] / drivers / i2c / busses / i2c-nforce2.c

/*
    SMBus driver for nVidia nForce2 MCP

    Added nForce3 Pro 150  Thomas Leibold <thomas@plx.com>,
	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
    Copyright (c) 2003  Hans-Frieder Vogt <hfvogt@arcor.de>,
    Based on
    SMBus 2.0 driver for AMD-8111 IO-Hub
    Copyright (c) 2002 Vojtech Pavlik

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

/*
    SUPPORTED DEVICES		PCI ID
    nForce2 MCP			0064
    nForce2 Ultra 400 MCP	0084
    nForce3 Pro150 MCP		00D4
    nForce3 250Gb MCP		00E4
    nForce4 MCP			0052
    nForce4 MCP-04		0034
    nForce4 MCP51		0264
    nForce4 MCP55		0368

    This driver supports the 2 SMBuses that are included in the MCP of the
    nForce2/3/4/5xx chipsets.
*/

/* Note: we assume there can only be one nForce2, with two SMBus interfaces */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <asm/io.h>

MODULE_LICENSE("GPL");
MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");


struct nforce2_smbus {
	struct i2c_adapter adapter;
	int base;
	int size;
};


/*
 * nVidia nForce2 SMBus control register definitions
 * (Newer incarnations use standard BARs 4 and 5 instead)
 */
#define NFORCE_PCI_SMB1	0x50
#define NFORCE_PCI_SMB2	0x54


/*
 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
 */
#define NVIDIA_SMB_PRTCL	(smbus->base + 0x00)	/* protocol, PEC */
#define NVIDIA_SMB_STS		(smbus->base + 0x01)	/* status */
#define NVIDIA_SMB_ADDR		(smbus->base + 0x02)	/* address */
#define NVIDIA_SMB_CMD		(smbus->base + 0x03)	/* command */
#define NVIDIA_SMB_DATA		(smbus->base + 0x04)	/* 32 data registers */

#define NVIDIA_SMB_STS_DONE	0x80
#define NVIDIA_SMB_STS_ALRM	0x40
#define NVIDIA_SMB_STS_RES	0x20
#define NVIDIA_SMB_STS_STATUS	0x1f

#define NVIDIA_SMB_PRTCL_WRITE			0x00
#define NVIDIA_SMB_PRTCL_READ			0x01
#define NVIDIA_SMB_PRTCL_QUICK			0x02
#define NVIDIA_SMB_PRTCL_BYTE			0x04
#define NVIDIA_SMB_PRTCL_BYTE_DATA		0x06
#define NVIDIA_SMB_PRTCL_WORD_DATA		0x08
#define NVIDIA_SMB_PRTCL_PEC			0x80

static struct pci_driver nforce2_driver;

/* Return -1 on error */
static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
		unsigned short flags, char read_write,
		u8 command, int size, union i2c_smbus_data * data)
{
	struct nforce2_smbus *smbus = adap->algo_data;
	unsigned char protocol, pec, temp;

	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
		NVIDIA_SMB_PRTCL_WRITE;
	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;

	switch (size) {

		case I2C_SMBUS_QUICK:
			protocol |= NVIDIA_SMB_PRTCL_QUICK;
			read_write = I2C_SMBUS_WRITE;
			break;

		case I2C_SMBUS_BYTE:
			if (read_write == I2C_SMBUS_WRITE)
				outb_p(command, NVIDIA_SMB_CMD);
			protocol |= NVIDIA_SMB_PRTCL_BYTE;
			break;

		case I2C_SMBUS_BYTE_DATA:
			outb_p(command, NVIDIA_SMB_CMD);
			if (read_write == I2C_SMBUS_WRITE)
				outb_p(data->byte, NVIDIA_SMB_DATA);
			protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
			break;

		case I2C_SMBUS_WORD_DATA:
			outb_p(command, NVIDIA_SMB_CMD);
			if (read_write == I2C_SMBUS_WRITE) {
				 outb_p(data->word, NVIDIA_SMB_DATA);
				 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
			}
			protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
			break;

		default:
			dev_err(&adap->dev, "Unsupported transaction %d\n", size);
			return -1;
	}

	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
	outb_p(protocol, NVIDIA_SMB_PRTCL);

	temp = inb_p(NVIDIA_SMB_STS);

	if (~temp & NVIDIA_SMB_STS_DONE) {
		udelay(500);
		temp = inb_p(NVIDIA_SMB_STS);
	}
	if (~temp & NVIDIA_SMB_STS_DONE) {
		msleep(10);
		temp = inb_p(NVIDIA_SMB_STS);
	}

	if ((~temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
		dev_dbg(&adap->dev, "SMBus Timeout! (0x%02x)\n", temp);
		return -1;
	}

	if (read_write == I2C_SMBUS_WRITE)
		return 0;

	switch (size) {

		case I2C_SMBUS_BYTE:
		case I2C_SMBUS_BYTE_DATA:
			data->byte = inb_p(NVIDIA_SMB_DATA);
			break;

		case I2C_SMBUS_WORD_DATA:
			data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
			break;
	}

	return 0;
}


static u32 nforce2_func(struct i2c_adapter *adapter)
{
	/* other functionality might be possible, but is not tested */
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	    I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA;
}

static struct i2c_algorithm smbus_algorithm = {
	.smbus_xfer	= nforce2_access,
	.functionality	= nforce2_func,
};


static struct pci_device_id nforce2_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
	{ 0 }
};

MODULE_DEVICE_TABLE (pci, nforce2_ids);


static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
	int alt_reg, struct nforce2_smbus *smbus, const char *name)
{
	int error;

	smbus->base = pci_resource_start(dev, bar);
	if (smbus->base) {
		smbus->size = pci_resource_len(dev, bar);
	} else {
		/* Older incarnations of the device used non-standard BARs */
		u16 iobase;

		if (pci_read_config_word(dev, alt_reg, &iobase)
		    != PCIBIOS_SUCCESSFUL) {
			dev_err(&dev->dev, "Error reading PCI config for %s\n",
				name);
			return -1;
		}

		smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
		smbus->size = 64;
	}

	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
		dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
			smbus->base, smbus->base+smbus->size-1, name);
		return -1;
	}
	smbus->adapter.owner = THIS_MODULE;
	smbus->adapter.id = I2C_HW_SMBUS_NFORCE2;
	smbus->adapter.class = I2C_CLASS_HWMON;
	smbus->adapter.algo = &smbus_algorithm;
	smbus->adapter.algo_data = smbus;
	smbus->adapter.dev.parent = &dev->dev;
	snprintf(smbus->adapter.name, I2C_NAME_SIZE,
		"SMBus nForce2 adapter at %04x", smbus->base);

	error = i2c_add_adapter(&smbus->adapter);
	if (error) {
		dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
		release_region(smbus->base, smbus->size);
		return -1;
	}
	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
	return 0;
}


static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	struct nforce2_smbus *smbuses;
	int res1, res2;

	/* we support 2 SMBus adapters */
	if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
		return -ENOMEM;
	pci_set_drvdata(dev, smbuses);

	/* SMBus adapter 1 */
	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
	if (res1 < 0) {
		dev_err(&dev->dev, "Error probing SMB1.\n");
		smbuses[0].base = 0;	/* to have a check value */
	}
	/* SMBus adapter 2 */
	res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
	if (res2 < 0) {
		dev_err(&dev->dev, "Error probing SMB2.\n");
		smbuses[1].base = 0;	/* to have a check value */
	}
	if ((res1 < 0) && (res2 < 0)) {
		/* we did not find even one of the SMBuses, so we give up */
		kfree(smbuses);
		return -ENODEV;
	}

	return 0;
}


static void __devexit nforce2_remove(struct pci_dev *dev)
{
	struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);

	if (smbuses[0].base) {
		i2c_del_adapter(&smbuses[0].adapter);
		release_region(smbuses[0].base, smbuses[0].size);
	}
	if (smbuses[1].base) {
		i2c_del_adapter(&smbuses[1].adapter);
		release_region(smbuses[1].base, smbuses[1].size);
	}
	kfree(smbuses);
}

static struct pci_driver nforce2_driver = {
	.name		= "nForce2_smbus",
	.id_table	= nforce2_ids,
	.probe		= nforce2_probe,
	.remove		= __devexit_p(nforce2_remove),
};

static int __init nforce2_init(void)
{
	return pci_register_driver(&nforce2_driver);
}

static void __exit nforce2_exit(void)
{
	pci_unregister_driver(&nforce2_driver);
}

module_init(nforce2_init);
module_exit(nforce2_exit);
Commit	Line	Data
1da177e4 LT	1	/*
	2	SMBus driver for nVidia nForce2 MCP
	3
	4	Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
	5	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
	6	Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
	7	Based on
	8	SMBus 2.0 driver for AMD-8111 IO-Hub
	9	Copyright (c) 2002 Vojtech Pavlik
	10
	11	This program is free software; you can redistribute it and/or modify
	12	it under the terms of the GNU General Public License as published by
	13	the Free Software Foundation; either version 2 of the License, or
	14	(at your option) any later version.
	15
	16	This program is distributed in the hope that it will be useful,
	17	but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	GNU General Public License for more details.
	20
	21	You should have received a copy of the GNU General Public License
	22	along with this program; if not, write to the Free Software
	23	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	24	*/
	25
	26	/*
	27	SUPPORTED DEVICES PCI ID
	28	nForce2 MCP 0064
	29	nForce2 Ultra 400 MCP 0084
	30	nForce3 Pro150 MCP 00D4
	31	nForce3 250Gb MCP 00E4
	32	nForce4 MCP 0052
7c72ccf0	33	nForce4 MCP-04 0034
5c7ae658 JD	34	nForce4 MCP51 0264
5c7ae658 JD	35	nForce4 MCP55 0368
1da177e4 LT	36
1da177e4 LT	37	This driver supports the 2 SMBuses that are included in the MCP of the
ad04d5c3	38	nForce2/3/4/5xx chipsets.
1da177e4 LT	39	*/
	40
	41	/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
	42
1da177e4 LT	43	#include <linux/module.h>
	44	#include <linux/pci.h>
	45	#include <linux/kernel.h>
	46	#include <linux/stddef.h>
1da177e4 LT	47	#include <linux/ioport.h>
	48	#include <linux/init.h>
	49	#include <linux/i2c.h>
	50	#include <linux/delay.h>
	51	#include <asm/io.h>
	52
	53	MODULE_LICENSE("GPL");
ad04d5c3 HFV	54	MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
ad04d5c3 HFV	55	MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
1da177e4 LT	56
	57
	58	struct nforce2_smbus {
1da177e4 LT	59	struct i2c_adapter adapter;
	60	int base;
	61	int size;
	62	};
	63
	64
	65	/*
	66	* nVidia nForce2 SMBus control register definitions
5c7ae658	67	* (Newer incarnations use standard BARs 4 and 5 instead)
1da177e4 LT	68	*/
	69	#define NFORCE_PCI_SMB1 0x50
	70	#define NFORCE_PCI_SMB2 0x54
	71
	72
	73	/*
	74	* ACPI 2.0 chapter 13 SMBus 2.0 EC register model
	75	*/
	76	#define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
	77	#define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
	78	#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
	79	#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
	80	#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
1da177e4 LT	81
	82	#define NVIDIA_SMB_STS_DONE 0x80
	83	#define NVIDIA_SMB_STS_ALRM 0x40
	84	#define NVIDIA_SMB_STS_RES 0x20
	85	#define NVIDIA_SMB_STS_STATUS 0x1f
	86
	87	#define NVIDIA_SMB_PRTCL_WRITE 0x00
	88	#define NVIDIA_SMB_PRTCL_READ 0x01
	89	#define NVIDIA_SMB_PRTCL_QUICK 0x02
	90	#define NVIDIA_SMB_PRTCL_BYTE 0x04
	91	#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
	92	#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
1da177e4 LT	93	#define NVIDIA_SMB_PRTCL_PEC 0x80
1da177e4 LT	94
d6072f84	95	static struct pci_driver nforce2_driver;
1da177e4	96
ad04d5c3	97	/* Return -1 on error */
1da177e4 LT	98	static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
	99	unsigned short flags, char read_write,
	100	u8 command, int size, union i2c_smbus_data * data)
	101	{
	102	struct nforce2_smbus *smbus = adap->algo_data;
	103	unsigned char protocol, pec, temp;
1da177e4 LT	104
	105	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
	106	NVIDIA_SMB_PRTCL_WRITE;
	107	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
	108
	109	switch (size) {
	110
	111	case I2C_SMBUS_QUICK:
	112	protocol \|= NVIDIA_SMB_PRTCL_QUICK;
	113	read_write = I2C_SMBUS_WRITE;
	114	break;
	115
	116	case I2C_SMBUS_BYTE:
	117	if (read_write == I2C_SMBUS_WRITE)
	118	outb_p(command, NVIDIA_SMB_CMD);
	119	protocol \|= NVIDIA_SMB_PRTCL_BYTE;
	120	break;
	121
	122	case I2C_SMBUS_BYTE_DATA:
	123	outb_p(command, NVIDIA_SMB_CMD);
	124	if (read_write == I2C_SMBUS_WRITE)
	125	outb_p(data->byte, NVIDIA_SMB_DATA);
	126	protocol \|= NVIDIA_SMB_PRTCL_BYTE_DATA;
	127	break;
	128
	129	case I2C_SMBUS_WORD_DATA:
	130	outb_p(command, NVIDIA_SMB_CMD);
	131	if (read_write == I2C_SMBUS_WRITE) {
	132	outb_p(data->word, NVIDIA_SMB_DATA);
	133	outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
	134	}
	135	protocol \|= NVIDIA_SMB_PRTCL_WORD_DATA \| pec;
	136	break;
	137
1da177e4 LT	138	default:
	139	dev_err(&adap->dev, "Unsupported transaction %d\n", size);
	140	return -1;
	141	}
	142
	143	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
	144	outb_p(protocol, NVIDIA_SMB_PRTCL);
	145
	146	temp = inb_p(NVIDIA_SMB_STS);
	147
1da177e4 LT	148	if (~temp & NVIDIA_SMB_STS_DONE) {
	149	udelay(500);
	150	temp = inb_p(NVIDIA_SMB_STS);
	151	}
	152	if (~temp & NVIDIA_SMB_STS_DONE) {
	153	msleep(10);
	154	temp = inb_p(NVIDIA_SMB_STS);
	155	}
	156
5033017c HFV	157	if ((~temp & NVIDIA_SMB_STS_DONE) \|\| (temp & NVIDIA_SMB_STS_STATUS)) {
5033017c HFV	158	dev_dbg(&adap->dev, "SMBus Timeout! (0x%02x)\n", temp);
1da177e4	159	return -1;
5033017c	160	}
1da177e4 LT	161
	162	if (read_write == I2C_SMBUS_WRITE)
	163	return 0;
	164
	165	switch (size) {
	166
	167	case I2C_SMBUS_BYTE:
	168	case I2C_SMBUS_BYTE_DATA:
	169	data->byte = inb_p(NVIDIA_SMB_DATA);
	170	break;
	171
	172	case I2C_SMBUS_WORD_DATA:
1da177e4 LT	173	data->word = inb_p(NVIDIA_SMB_DATA) \| (inb_p(NVIDIA_SMB_DATA+1) << 8);
1da177e4 LT	174	break;
1da177e4 LT	175	}
	176
	177	return 0;
	178	}
	179
	180
	181	static u32 nforce2_func(struct i2c_adapter *adapter)
	182	{
	183	/* other functionality might be possible, but is not tested */
	184	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
ad04d5c3	185	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA;
1da177e4 LT	186	}
1da177e4 LT	187
ad04d5c3 HFV	188	static struct i2c_algorithm smbus_algorithm = {
	189	.smbus_xfer = nforce2_access,
	190	.functionality = nforce2_func,
	191	};
	192
1da177e4 LT	193
	194	static struct pci_device_id nforce2_ids[] = {
	195	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
	196	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
	197	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
	198	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
	199	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
7c72ccf0	200	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
5c7ae658 JD	201	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
5c7ae658 JD	202	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
1da177e4 LT	203	{ 0 }
	204	};
	205
1da177e4 LT	206	MODULE_DEVICE_TABLE (pci, nforce2_ids);
	207
	208
5c7ae658 JD	209	static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
5c7ae658 JD	210	int alt_reg, struct nforce2_smbus smbus, const char name)
1da177e4	211	{
1da177e4 LT	212	int error;
1da177e4 LT	213
5c7ae658 JD	214	smbus->base = pci_resource_start(dev, bar);
	215	if (smbus->base) {
	216	smbus->size = pci_resource_len(dev, bar);
	217	} else {
	218	/* Older incarnations of the device used non-standard BARs */
	219	u16 iobase;
	220
	221	if (pci_read_config_word(dev, alt_reg, &iobase)
	222	!= PCIBIOS_SUCCESSFUL) {
	223	dev_err(&dev->dev, "Error reading PCI config for %s\n",
	224	name);
	225	return -1;
	226	}
	227
	228	smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
ad04d5c3	229	smbus->size = 64;
1da177e4	230	}
1da177e4	231
d6072f84	232	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
1da177e4 LT	233	dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
	234	smbus->base, smbus->base+smbus->size-1, name);
	235	return -1;
	236	}
ad04d5c3	237	smbus->adapter.owner = THIS_MODULE;
9ace555d	238	smbus->adapter.id = I2C_HW_SMBUS_NFORCE2;
ad04d5c3 HFV	239	smbus->adapter.class = I2C_CLASS_HWMON;
ad04d5c3 HFV	240	smbus->adapter.algo = &smbus_algorithm;
1da177e4 LT	241	smbus->adapter.algo_data = smbus;
	242	smbus->adapter.dev.parent = &dev->dev;
	243	snprintf(smbus->adapter.name, I2C_NAME_SIZE,
	244	"SMBus nForce2 adapter at %04x", smbus->base);
	245
	246	error = i2c_add_adapter(&smbus->adapter);
	247	if (error) {
	248	dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
	249	release_region(smbus->base, smbus->size);
	250	return -1;
	251	}
	252	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
	253	return 0;
	254	}
	255
	256
	257	static int __devinit nforce2_probe(struct pci_dev dev, const struct pci_device_id id)
	258	{
	259	struct nforce2_smbus *smbuses;
	260	int res1, res2;
	261
	262	/* we support 2 SMBus adapters */
078d9fe4	263	if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
1da177e4	264	return -ENOMEM;
1da177e4 LT	265	pci_set_drvdata(dev, smbuses);
	266
	267	/* SMBus adapter 1 */
5c7ae658	268	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
1da177e4 LT	269	if (res1 < 0) {
	270	dev_err(&dev->dev, "Error probing SMB1.\n");
	271	smbuses[0].base = 0; /* to have a check value */
	272	}
5c7ae658 JD	273	/* SMBus adapter 2 */
5c7ae658 JD	274	res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
1da177e4 LT	275	if (res2 < 0) {
	276	dev_err(&dev->dev, "Error probing SMB2.\n");
	277	smbuses[1].base = 0; /* to have a check value */
	278	}
	279	if ((res1 < 0) && (res2 < 0)) {
	280	/* we did not find even one of the SMBuses, so we give up */
	281	kfree(smbuses);
	282	return -ENODEV;
	283	}
	284
	285	return 0;
	286	}
	287
	288
	289	static void __devexit nforce2_remove(struct pci_dev *dev)
	290	{
	291	struct nforce2_smbus smbuses = (void) pci_get_drvdata(dev);
	292
	293	if (smbuses[0].base) {
	294	i2c_del_adapter(&smbuses[0].adapter);
	295	release_region(smbuses[0].base, smbuses[0].size);
	296	}
	297	if (smbuses[1].base) {
	298	i2c_del_adapter(&smbuses[1].adapter);
	299	release_region(smbuses[1].base, smbuses[1].size);
	300	}
	301	kfree(smbuses);
	302	}
	303
	304	static struct pci_driver nforce2_driver = {
	305	.name = "nForce2_smbus",
	306	.id_table = nforce2_ids,
	307	.probe = nforce2_probe,
	308	.remove = __devexit_p(nforce2_remove),
	309	};
	310
	311	static int __init nforce2_init(void)
	312	{
	313	return pci_register_driver(&nforce2_driver);
	314	}
	315
	316	static void __exit nforce2_exit(void)
	317	{
	318	pci_unregister_driver(&nforce2_driver);
	319	}
	320
	321	module_init(nforce2_init);
	322	module_exit(nforce2_exit);
	323