i2c: Spelling fix (successful)
[deliverable/linux.git] / drivers / i2c / busses / i2c-piix4.c
CommitLineData
1da177e4
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1/*
2 piix4.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
5 Philip Edelbrock <phil@netroedge.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22/*
23 Supports:
24 Intel PIIX4, 440MX
5f7ea3c5 25 Serverworks OSB4, CSB5, CSB6, HT-1000
60693e5a 26 ATI IXP200, IXP300, IXP400, SB600, SB700, SB800
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27 SMSC Victory66
28
29 Note: we assume there can only be one device, with one SMBus interface.
30*/
31
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32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/pci.h>
35#include <linux/kernel.h>
36#include <linux/delay.h>
37#include <linux/stddef.h>
1da177e4
LT
38#include <linux/ioport.h>
39#include <linux/i2c.h>
40#include <linux/init.h>
41#include <linux/apm_bios.h>
42#include <linux/dmi.h>
43#include <asm/io.h>
44
45
46struct sd {
47 const unsigned short mfr;
48 const unsigned short dev;
49 const unsigned char fn;
50 const char *name;
51};
52
53/* PIIX4 SMBus address offsets */
54#define SMBHSTSTS (0 + piix4_smba)
55#define SMBHSLVSTS (1 + piix4_smba)
56#define SMBHSTCNT (2 + piix4_smba)
57#define SMBHSTCMD (3 + piix4_smba)
58#define SMBHSTADD (4 + piix4_smba)
59#define SMBHSTDAT0 (5 + piix4_smba)
60#define SMBHSTDAT1 (6 + piix4_smba)
61#define SMBBLKDAT (7 + piix4_smba)
62#define SMBSLVCNT (8 + piix4_smba)
63#define SMBSHDWCMD (9 + piix4_smba)
64#define SMBSLVEVT (0xA + piix4_smba)
65#define SMBSLVDAT (0xC + piix4_smba)
66
67/* count for request_region */
68#define SMBIOSIZE 8
69
70/* PCI Address Constants */
71#define SMBBA 0x090
72#define SMBHSTCFG 0x0D2
73#define SMBSLVC 0x0D3
74#define SMBSHDW1 0x0D4
75#define SMBSHDW2 0x0D5
76#define SMBREV 0x0D6
77
78/* Other settings */
79#define MAX_TIMEOUT 500
80#define ENABLE_INT9 0
81
82/* PIIX4 constants */
83#define PIIX4_QUICK 0x00
84#define PIIX4_BYTE 0x04
85#define PIIX4_BYTE_DATA 0x08
86#define PIIX4_WORD_DATA 0x0C
87#define PIIX4_BLOCK_DATA 0x14
88
89/* insmod parameters */
90
91/* If force is set to anything different from 0, we forcibly enable the
92 PIIX4. DANGEROUS! */
60507095 93static int force;
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94module_param (force, int, 0);
95MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
96
97/* If force_addr is set to anything different from 0, we forcibly enable
98 the PIIX4 at the given address. VERY DANGEROUS! */
60507095 99static int force_addr;
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100module_param (force_addr, int, 0);
101MODULE_PARM_DESC(force_addr,
102 "Forcibly enable the PIIX4 at the given address. "
103 "EXTREMELY DANGEROUS!");
104
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105static int piix4_transaction(void);
106
60507095 107static unsigned short piix4_smba;
d6072f84 108static struct pci_driver piix4_driver;
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109static struct i2c_adapter piix4_adapter;
110
111static struct dmi_system_id __devinitdata piix4_dmi_table[] = {
112 {
113 .ident = "IBM",
114 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
115 },
116 { },
117};
118
119static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
120 const struct pci_device_id *id)
121{
122 unsigned char temp;
123
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124 dev_info(&PIIX4_dev->dev, "Found %s device\n", pci_name(PIIX4_dev));
125
126 /* Don't access SMBus on IBM systems which get corrupted eeproms */
127 if (dmi_check_system(piix4_dmi_table) &&
128 PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
f9ba6c04 129 dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
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130 "may corrupt your serial eeprom! Refusing to load "
131 "module!\n");
132 return -EPERM;
133 }
134
135 /* Determine the address of the SMBus areas */
136 if (force_addr) {
137 piix4_smba = force_addr & 0xfff0;
138 force = 0;
139 } else {
140 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
141 piix4_smba &= 0xfff0;
142 if(piix4_smba == 0) {
143 dev_err(&PIIX4_dev->dev, "SMB base address "
144 "uninitialized - upgrade BIOS or use "
145 "force_addr=0xaddr\n");
146 return -ENODEV;
147 }
148 }
149
d6072f84 150 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
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151 dev_err(&PIIX4_dev->dev, "SMB region 0x%x already in use!\n",
152 piix4_smba);
153 return -ENODEV;
154 }
155
156 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
157
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158 /* If force_addr is set, we program the new address here. Just to make
159 sure, we disable the PIIX4 first. */
160 if (force_addr) {
161 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
162 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
163 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
164 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
165 "new address %04x!\n", piix4_smba);
166 } else if ((temp & 1) == 0) {
167 if (force) {
168 /* This should never need to be done, but has been
169 * noted that many Dell machines have the SMBus
170 * interface on the PIIX4 disabled!? NOTE: This assumes
171 * I/O space and other allocations WERE done by the
172 * Bios! Don't complain if your hardware does weird
173 * things after enabling this. :') Check for Bios
174 * updates before resorting to this.
175 */
176 pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
177 temp | 1);
178 dev_printk(KERN_NOTICE, &PIIX4_dev->dev,
179 "WARNING: SMBus interface has been "
180 "FORCEFULLY ENABLED!\n");
181 } else {
182 dev_err(&PIIX4_dev->dev,
183 "Host SMBus controller not enabled!\n");
184 release_region(piix4_smba, SMBIOSIZE);
185 piix4_smba = 0;
186 return -ENODEV;
187 }
188 }
189
54aaa1ca 190 if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
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191 dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n");
192 else if ((temp & 0x0E) == 0)
193 dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n");
194 else
195 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
196 "(or code out of date)!\n");
197
198 pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
199 dev_dbg(&PIIX4_dev->dev, "SMBREV = 0x%X\n", temp);
200 dev_dbg(&PIIX4_dev->dev, "SMBA = 0x%X\n", piix4_smba);
201
202 return 0;
203}
204
205/* Another internally used function */
206static int piix4_transaction(void)
207{
208 int temp;
209 int result = 0;
210 int timeout = 0;
211
212 dev_dbg(&piix4_adapter.dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
213 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
214 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
215 inb_p(SMBHSTDAT1));
216
217 /* Make sure the SMBus host is ready to start transmitting */
218 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
219 dev_dbg(&piix4_adapter.dev, "SMBus busy (%02x). "
541e6a02 220 "Resetting...\n", temp);
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221 outb_p(temp, SMBHSTSTS);
222 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
223 dev_err(&piix4_adapter.dev, "Failed! (%02x)\n", temp);
224 return -1;
225 } else {
c5d21b7f 226 dev_dbg(&piix4_adapter.dev, "Successful!\n");
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227 }
228 }
229
230 /* start the transaction by setting bit 6 */
231 outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
232
233 /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
234 do {
235 msleep(1);
236 temp = inb_p(SMBHSTSTS);
237 } while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT));
238
239 /* If the SMBus is still busy, we give up */
240 if (timeout >= MAX_TIMEOUT) {
241 dev_err(&piix4_adapter.dev, "SMBus Timeout!\n");
242 result = -1;
243 }
244
245 if (temp & 0x10) {
246 result = -1;
247 dev_err(&piix4_adapter.dev, "Error: Failed bus transaction\n");
248 }
249
250 if (temp & 0x08) {
251 result = -1;
252 dev_dbg(&piix4_adapter.dev, "Bus collision! SMBus may be "
253 "locked until next hard reset. (sorry!)\n");
254 /* Clock stops and slave is stuck in mid-transmission */
255 }
256
257 if (temp & 0x04) {
258 result = -1;
259 dev_dbg(&piix4_adapter.dev, "Error: no response!\n");
260 }
261
262 if (inb_p(SMBHSTSTS) != 0x00)
263 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
264
265 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
266 dev_err(&piix4_adapter.dev, "Failed reset at end of "
267 "transaction (%02x)\n", temp);
268 }
269 dev_dbg(&piix4_adapter.dev, "Transaction (post): CNT=%02x, CMD=%02x, "
270 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
271 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
272 inb_p(SMBHSTDAT1));
273 return result;
274}
275
276/* Return -1 on error. */
277static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
278 unsigned short flags, char read_write,
279 u8 command, int size, union i2c_smbus_data * data)
280{
281 int i, len;
282
283 switch (size) {
284 case I2C_SMBUS_PROC_CALL:
285 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
286 return -1;
287 case I2C_SMBUS_QUICK:
288 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
289 SMBHSTADD);
290 size = PIIX4_QUICK;
291 break;
292 case I2C_SMBUS_BYTE:
293 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
294 SMBHSTADD);
295 if (read_write == I2C_SMBUS_WRITE)
296 outb_p(command, SMBHSTCMD);
297 size = PIIX4_BYTE;
298 break;
299 case I2C_SMBUS_BYTE_DATA:
300 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
301 SMBHSTADD);
302 outb_p(command, SMBHSTCMD);
303 if (read_write == I2C_SMBUS_WRITE)
304 outb_p(data->byte, SMBHSTDAT0);
305 size = PIIX4_BYTE_DATA;
306 break;
307 case I2C_SMBUS_WORD_DATA:
308 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
309 SMBHSTADD);
310 outb_p(command, SMBHSTCMD);
311 if (read_write == I2C_SMBUS_WRITE) {
312 outb_p(data->word & 0xff, SMBHSTDAT0);
313 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
314 }
315 size = PIIX4_WORD_DATA;
316 break;
317 case I2C_SMBUS_BLOCK_DATA:
318 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
319 SMBHSTADD);
320 outb_p(command, SMBHSTCMD);
321 if (read_write == I2C_SMBUS_WRITE) {
322 len = data->block[0];
323 if (len < 0)
324 len = 0;
325 if (len > 32)
326 len = 32;
327 outb_p(len, SMBHSTDAT0);
328 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
329 for (i = 1; i <= len; i++)
330 outb_p(data->block[i], SMBBLKDAT);
331 }
332 size = PIIX4_BLOCK_DATA;
333 break;
334 }
335
336 outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
337
338 if (piix4_transaction()) /* Error in transaction */
339 return -1;
340
341 if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
342 return 0;
343
344
345 switch (size) {
346 case PIIX4_BYTE: /* Where is the result put? I assume here it is in
347 SMBHSTDAT0 but it might just as well be in the
348 SMBHSTCMD. No clue in the docs */
349
350 data->byte = inb_p(SMBHSTDAT0);
351 break;
352 case PIIX4_BYTE_DATA:
353 data->byte = inb_p(SMBHSTDAT0);
354 break;
355 case PIIX4_WORD_DATA:
356 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
357 break;
358 case PIIX4_BLOCK_DATA:
359 data->block[0] = inb_p(SMBHSTDAT0);
360 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
361 for (i = 1; i <= data->block[0]; i++)
362 data->block[i] = inb_p(SMBBLKDAT);
363 break;
364 }
365 return 0;
366}
367
368static u32 piix4_func(struct i2c_adapter *adapter)
369{
370 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
371 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
372 I2C_FUNC_SMBUS_BLOCK_DATA;
373}
374
8f9082c5 375static const struct i2c_algorithm smbus_algorithm = {
1da177e4
LT
376 .smbus_xfer = piix4_access,
377 .functionality = piix4_func,
378};
379
380static struct i2c_adapter piix4_adapter = {
381 .owner = THIS_MODULE,
9ace555d 382 .id = I2C_HW_SMBUS_PIIX4,
1da177e4
LT
383 .class = I2C_CLASS_HWMON,
384 .algo = &smbus_algorithm,
1da177e4
LT
385};
386
387static struct pci_device_id piix4_ids[] = {
9b7389c0
JD
388 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
389 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
390 { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
391 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) },
392 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
393 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
394 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
395 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
396 PCI_DEVICE_ID_SERVERWORKS_OSB4) },
397 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
398 PCI_DEVICE_ID_SERVERWORKS_CSB5) },
399 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
400 PCI_DEVICE_ID_SERVERWORKS_CSB6) },
401 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
402 PCI_DEVICE_ID_SERVERWORKS_HT1000SB) },
1da177e4
LT
403 { 0, }
404};
405
406MODULE_DEVICE_TABLE (pci, piix4_ids);
407
408static int __devinit piix4_probe(struct pci_dev *dev,
409 const struct pci_device_id *id)
410{
411 int retval;
412
413 retval = piix4_setup(dev, id);
414 if (retval)
415 return retval;
416
405ae7d3 417 /* set up the sysfs linkage to our parent device */
1da177e4
LT
418 piix4_adapter.dev.parent = &dev->dev;
419
2096b956 420 snprintf(piix4_adapter.name, sizeof(piix4_adapter.name),
1da177e4
LT
421 "SMBus PIIX4 adapter at %04x", piix4_smba);
422
423 if ((retval = i2c_add_adapter(&piix4_adapter))) {
424 dev_err(&dev->dev, "Couldn't register adapter!\n");
425 release_region(piix4_smba, SMBIOSIZE);
426 piix4_smba = 0;
427 }
428
429 return retval;
430}
431
432static void __devexit piix4_remove(struct pci_dev *dev)
433{
434 if (piix4_smba) {
435 i2c_del_adapter(&piix4_adapter);
436 release_region(piix4_smba, SMBIOSIZE);
437 piix4_smba = 0;
438 }
439}
440
441static struct pci_driver piix4_driver = {
442 .name = "piix4_smbus",
443 .id_table = piix4_ids,
444 .probe = piix4_probe,
445 .remove = __devexit_p(piix4_remove),
446};
447
448static int __init i2c_piix4_init(void)
449{
450 return pci_register_driver(&piix4_driver);
451}
452
453static void __exit i2c_piix4_exit(void)
454{
455 pci_unregister_driver(&piix4_driver);
456}
457
458MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
459 "Philip Edelbrock <phil@netroedge.com>");
460MODULE_DESCRIPTION("PIIX4 SMBus driver");
461MODULE_LICENSE("GPL");
462
463module_init(i2c_piix4_init);
464module_exit(i2c_piix4_exit);
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