[deliverable/linux.git] / drivers / i2c / busses / scx200_acb.c

/*
    Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>

    National Semiconductor SCx200 ACCESS.bus support

    Based on i2c-keywest.c which is:
        Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
        Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>

    This program is free software; you can redistribute it and/or
    modify it under the terms of the GNU General Public License as
    published by the Free Software Foundation; either version 2 of the
    License, or (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

#include <linux/module.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/smp_lock.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <asm/io.h>

#include <linux/scx200.h>

#define NAME "scx200_acb"

MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
MODULE_LICENSE("GPL");

#define MAX_DEVICES 4
static int base[MAX_DEVICES] = { 0x820, 0x840 };
module_param_array(base, int, NULL, 0);
MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");

/* The hardware supports interrupt driven mode too, but I haven't
   implemented that. */
#define POLLED_MODE 1
#define POLL_TIMEOUT (HZ)

enum scx200_acb_state {
	state_idle,
	state_address,
	state_command,
	state_repeat_start,
	state_quick,
	state_read,
	state_write,
};

static const char *scx200_acb_state_name[] = {
	"idle",
	"address",
	"command",
	"repeat_start",
	"quick",
	"read",
	"write",
};

/* Physical interface */
struct scx200_acb_iface {
	struct scx200_acb_iface *next;
	struct i2c_adapter adapter;
	unsigned base;
	struct semaphore sem;

	/* State machine data */
	enum scx200_acb_state state;
	int result;
	u8 address_byte;
	u8 command;
	u8 *ptr;
	char needs_reset;
	unsigned len;
};

/* Register Definitions */
#define ACBSDA		(iface->base + 0)
#define ACBST		(iface->base + 1)
#define    ACBST_SDAST		0x40 /* SDA Status */
#define    ACBST_BER		0x20
#define    ACBST_NEGACK		0x10 /* Negative Acknowledge */
#define    ACBST_STASTR		0x08 /* Stall After Start */
#define    ACBST_MASTER		0x02
#define ACBCST		(iface->base + 2)
#define    ACBCST_BB		0x02
#define ACBCTL1		(iface->base + 3)
#define    ACBCTL1_STASTRE	0x80
#define    ACBCTL1_NMINTE	0x40
#define    ACBCTL1_ACK		0x10
#define    ACBCTL1_STOP		0x02
#define    ACBCTL1_START	0x01
#define ACBADDR		(iface->base + 4)
#define ACBCTL2		(iface->base + 5)
#define    ACBCTL2_ENABLE	0x01

/************************************************************************/

static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
{
	const char *errmsg;

	dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
		scx200_acb_state_name[iface->state], status);

	if (status & ACBST_BER) {
		errmsg = "bus error";
		goto error;
	}
	if (!(status & ACBST_MASTER)) {
		errmsg = "not master";
		goto error;
	}
	if (status & ACBST_NEGACK)
		goto negack;

	switch (iface->state) {
	case state_idle:
		dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
		break;

	case state_address:
		/* Do a pointer write first */
		outb(iface->address_byte & ~1, ACBSDA);

		iface->state = state_command;
		break;

	case state_command:
		outb(iface->command, ACBSDA);

		if (iface->address_byte & 1)
			iface->state = state_repeat_start;
		else
			iface->state = state_write;
		break;

	case state_repeat_start:
		outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
		/* fallthrough */

	case state_quick:
		if (iface->address_byte & 1) {
			if (iface->len == 1)
				outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
			else
				outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
			outb(iface->address_byte, ACBSDA);

			iface->state = state_read;
		} else {
			outb(iface->address_byte, ACBSDA);

			iface->state = state_write;
		}
		break;

	case state_read:
		/* Set ACK if receiving the last byte */
		if (iface->len == 1)
			outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
		else
			outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);

		*iface->ptr++ = inb(ACBSDA);
		--iface->len;

		if (iface->len == 0) {
			iface->result = 0;
			iface->state = state_idle;
			outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
		}

		break;

	case state_write:
		if (iface->len == 0) {
			iface->result = 0;
			iface->state = state_idle;
			outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
			break;
		}

		outb(*iface->ptr++, ACBSDA);
		--iface->len;

		break;
	}

	return;

 negack:
	dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
		scx200_acb_state_name[iface->state]);

	iface->state = state_idle;
	iface->result = -ENXIO;

	outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
	outb(ACBST_STASTR | ACBST_NEGACK, ACBST);
	return;

 error:
	dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
		scx200_acb_state_name[iface->state]);

	iface->state = state_idle;
	iface->result = -EIO;
	iface->needs_reset = 1;
}

static void scx200_acb_timeout(struct scx200_acb_iface *iface)
{
	dev_err(&iface->adapter.dev, "timeout in state %s\n",
		scx200_acb_state_name[iface->state]);

	iface->state = state_idle;
	iface->result = -EIO;
	iface->needs_reset = 1;
}

#ifdef POLLED_MODE
static void scx200_acb_poll(struct scx200_acb_iface *iface)
{
	u8 status = 0;
	unsigned long timeout;

	timeout = jiffies + POLL_TIMEOUT;
	while (time_before(jiffies, timeout)) {
		status = inb(ACBST);
		if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) {
			scx200_acb_machine(iface, status);
			return;
		}
		msleep(10);
	}

	scx200_acb_timeout(iface);
}
#endif /* POLLED_MODE */

static void scx200_acb_reset(struct scx200_acb_iface *iface)
{
	/* Disable the ACCESS.bus device and Configure the SCL
	   frequency: 16 clock cycles */
	outb(0x70, ACBCTL2);
	/* Polling mode */
	outb(0, ACBCTL1);
	/* Disable slave address */
	outb(0, ACBADDR);
	/* Enable the ACCESS.bus device */
	outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
	/* Free STALL after START */
	outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1);
	/* Send a STOP */
	outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
	/* Clear BER, NEGACK and STASTR bits */
	outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST);
	/* Clear BB bit */
	outb(inb(ACBCST) | ACBCST_BB, ACBCST);
}

static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
				 u16 address, unsigned short flags,
				 char rw, u8 command, int size,
				 union i2c_smbus_data *data)
{
	struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
	int len;
	u8 *buffer;
	u16 cur_word;
	int rc;

	switch (size) {
	case I2C_SMBUS_QUICK:
		len = 0;
		buffer = NULL;
		break;

	case I2C_SMBUS_BYTE:
		if (rw == I2C_SMBUS_READ) {
			len = 1;
			buffer = &data->byte;
		} else {
			len = 1;
			buffer = &command;
		}
		break;

	case I2C_SMBUS_BYTE_DATA:
		len = 1;
		buffer = &data->byte;
		break;

	case I2C_SMBUS_WORD_DATA:
		len = 2;
		cur_word = cpu_to_le16(data->word);
		buffer = (u8 *)&cur_word;
		break;

	case I2C_SMBUS_BLOCK_DATA:
		len = data->block[0];
		buffer = &data->block[1];
		break;

	default:
		return -EINVAL;
	}

	dev_dbg(&adapter->dev,
		"size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
		size, address, command, len, rw);

	if (!len && rw == I2C_SMBUS_READ) {
		dev_dbg(&adapter->dev, "zero length read\n");
		return -EINVAL;
	}

	down(&iface->sem);

	iface->address_byte = address<<1;
	if (rw == I2C_SMBUS_READ)
		iface->address_byte |= 1;
	iface->command = command;
	iface->ptr = buffer;
	iface->len = len;
	iface->result = -EINVAL;
	iface->needs_reset = 0;

	outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);

	if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)
		iface->state = state_quick;
	else
		iface->state = state_address;

#ifdef POLLED_MODE
	while (iface->state != state_idle)
		scx200_acb_poll(iface);
#else /* POLLED_MODE */
#error Interrupt driven mode not implemented
#endif /* POLLED_MODE */	

	if (iface->needs_reset)
		scx200_acb_reset(iface);

	rc = iface->result;

	up(&iface->sem);

	if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
		data->word = le16_to_cpu(cur_word);

#ifdef DEBUG
	dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
	if (buffer) {
		int i;
		printk(" data:");
		for (i = 0; i < len; ++i)
			printk(" %02x", buffer[i]);
	}
	printk("\n");
#endif

	return rc;
}

static u32 scx200_acb_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
	       I2C_FUNC_SMBUS_BLOCK_DATA;
}

/* For now, we only handle combined mode (smbus) */
static struct i2c_algorithm scx200_acb_algorithm = {
	.smbus_xfer	= scx200_acb_smbus_xfer,
	.functionality	= scx200_acb_func,
};

static struct scx200_acb_iface *scx200_acb_list;

static int scx200_acb_probe(struct scx200_acb_iface *iface)
{
	u8 val;

	/* Disable the ACCESS.bus device and Configure the SCL
	   frequency: 16 clock cycles */
	outb(0x70, ACBCTL2);

	if (inb(ACBCTL2) != 0x70) {
		pr_debug(NAME ": ACBCTL2 readback failed\n");
		return -ENXIO;
	}

	outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);

	val = inb(ACBCTL1);
	if (val) {
		pr_debug(NAME ": disabled, but ACBCTL1=0x%02x\n",
			val);
		return -ENXIO;
	}

	outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);

	outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);

	val = inb(ACBCTL1);
	if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
		pr_debug(NAME ": enabled, but NMINTE won't be set, "
			 "ACBCTL1=0x%02x\n", val);
		return -ENXIO;
	}

	return 0;
}

static int  __init scx200_acb_create(int base, int index)
{
	struct scx200_acb_iface *iface;
	struct i2c_adapter *adapter;
	int rc = 0;
	char description[64];

	iface = kzalloc(sizeof(*iface), GFP_KERNEL);
	if (!iface) {
		printk(KERN_ERR NAME ": can't allocate memory\n");
		rc = -ENOMEM;
		goto errout;
	}

	adapter = &iface->adapter;
	i2c_set_adapdata(adapter, iface);
	snprintf(adapter->name, I2C_NAME_SIZE, "SCx200 ACB%d", index);
	adapter->owner = THIS_MODULE;
	adapter->id = I2C_HW_SMBUS_SCX200;
	adapter->algo = &scx200_acb_algorithm;
	adapter->class = I2C_CLASS_HWMON;

	init_MUTEX(&iface->sem);

	snprintf(description, sizeof(description),
		 "NatSemi SCx200 ACCESS.bus [%s]", adapter->name);
	if (request_region(base, 8, description) == 0) {
		printk(KERN_ERR NAME ": can't allocate io 0x%x-0x%x\n",
			base, base + 8-1);
		rc = -EBUSY;
		goto errout;
	}
	iface->base = base;

	rc = scx200_acb_probe(iface);
	if (rc) {
		printk(KERN_WARNING NAME ": probe failed\n");
		goto errout;
	}

	scx200_acb_reset(iface);

	if (i2c_add_adapter(adapter) < 0) {
		printk(KERN_ERR NAME ": failed to register\n");
		rc = -ENODEV;
		goto errout;
	}

	lock_kernel();
	iface->next = scx200_acb_list;
	scx200_acb_list = iface;
	unlock_kernel();

	return 0;

 errout:
	if (iface) {
		if (iface->base)
			release_region(iface->base, 8);
		kfree(iface);
	}
	return rc;
}

static struct pci_device_id scx200[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
	{ },
};

static int __init scx200_acb_init(void)
{
	int i;
	int rc;

	pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");

	/* Verify that this really is a SCx200 processor */
	if (pci_dev_present(scx200) == 0)
		return -ENODEV;

	rc = -ENXIO;
	for (i = 0; i < MAX_DEVICES; ++i) {
		if (base[i] > 0)
			rc = scx200_acb_create(base[i], i);
	}
	if (scx200_acb_list)
		return 0;
	return rc;
}

static void __exit scx200_acb_cleanup(void)
{
	struct scx200_acb_iface *iface;

	lock_kernel();
	while ((iface = scx200_acb_list) != NULL) {
		scx200_acb_list = iface->next;
		unlock_kernel();

		i2c_del_adapter(&iface->adapter);
		release_region(iface->base, 8);
		kfree(iface);
		lock_kernel();
	}
	unlock_kernel();
}

module_init(scx200_acb_init);
module_exit(scx200_acb_cleanup);
Commit	Line	Data
99c3adb4	1	/*
1da177e4 LT	2	Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
	3
	4	National Semiconductor SCx200 ACCESS.bus support
99c3adb4	5
1da177e4 LT	6	Based on i2c-keywest.c which is:
	7	Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
	8	Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
99c3adb4	9
1da177e4 LT	10	This program is free software; you can redistribute it and/or
	11	modify it under the terms of the GNU General Public License as
	12	published by the Free Software Foundation; either version 2 of the
	13	License, or (at your option) any later version.
99c3adb4	14
1da177e4 LT	15	This program is distributed in the hope that it will be useful,
	16	but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	18	General Public License for more details.
99c3adb4	19
1da177e4 LT	20	You should have received a copy of the GNU General Public License
	21	along with this program; if not, write to the Free Software
	22	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
1da177e4 LT	23	*/
1da177e4 LT	24
1da177e4 LT	25	#include <linux/module.h>
	26	#include <linux/errno.h>
	27	#include <linux/kernel.h>
	28	#include <linux/init.h>
	29	#include <linux/i2c.h>
	30	#include <linux/smp_lock.h>
	31	#include <linux/pci.h>
	32	#include <linux/delay.h>
	33	#include <asm/io.h>
	34
	35	#include <linux/scx200.h>
	36
	37	#define NAME "scx200_acb"
	38
	39	MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
	40	MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
	41	MODULE_LICENSE("GPL");
	42
	43	#define MAX_DEVICES 4
	44	static int base[MAX_DEVICES] = { 0x820, 0x840 };
	45	module_param_array(base, int, NULL, 0);
	46	MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");
	47
1da177e4 LT	48	/* The hardware supports interrupt driven mode too, but I haven't
	49	implemented that. */
	50	#define POLLED_MODE 1
	51	#define POLL_TIMEOUT (HZ)
	52
	53	enum scx200_acb_state {
	54	state_idle,
	55	state_address,
	56	state_command,
	57	state_repeat_start,
	58	state_quick,
	59	state_read,
	60	state_write,
	61	};
	62
	63	static const char *scx200_acb_state_name[] = {
	64	"idle",
	65	"address",
	66	"command",
	67	"repeat_start",
	68	"quick",
	69	"read",
	70	"write",
	71	};
	72
	73	/* Physical interface */
99c3adb4	74	struct scx200_acb_iface {
1da177e4 LT	75	struct scx200_acb_iface *next;
	76	struct i2c_adapter adapter;
	77	unsigned base;
	78	struct semaphore sem;
	79
	80	/* State machine data */
	81	enum scx200_acb_state state;
	82	int result;
	83	u8 address_byte;
	84	u8 command;
	85	u8 *ptr;
	86	char needs_reset;
	87	unsigned len;
	88	};
	89
	90	/* Register Definitions */
	91	#define ACBSDA (iface->base + 0)
	92	#define ACBST (iface->base + 1)
	93	#define ACBST_SDAST 0x40 /* SDA Status */
99c3adb4	94	#define ACBST_BER 0x20
1da177e4 LT	95	#define ACBST_NEGACK 0x10 /* Negative Acknowledge */
	96	#define ACBST_STASTR 0x08 /* Stall After Start */
	97	#define ACBST_MASTER 0x02
	98	#define ACBCST (iface->base + 2)
	99	#define ACBCST_BB 0x02
	100	#define ACBCTL1 (iface->base + 3)
	101	#define ACBCTL1_STASTRE 0x80
	102	#define ACBCTL1_NMINTE 0x40
99c3adb4 BG	103	#define ACBCTL1_ACK 0x10
	104	#define ACBCTL1_STOP 0x02
	105	#define ACBCTL1_START 0x01
1da177e4 LT	106	#define ACBADDR (iface->base + 4)
	107	#define ACBCTL2 (iface->base + 5)
	108	#define ACBCTL2_ENABLE 0x01
	109
	110	/************************************************************************/
	111
	112	static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
	113	{
	114	const char *errmsg;
	115
ef4d9275 BG	116	dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
ef4d9275 BG	117	scx200_acb_state_name[iface->state], status);
1da177e4 LT	118
	119	if (status & ACBST_BER) {
	120	errmsg = "bus error";
	121	goto error;
	122	}
	123	if (!(status & ACBST_MASTER)) {
	124	errmsg = "not master";
	125	goto error;
	126	}
	127	if (status & ACBST_NEGACK)
	128	goto negack;
	129
	130	switch (iface->state) {
	131	case state_idle:
	132	dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
	133	break;
	134
	135	case state_address:
	136	/* Do a pointer write first */
	137	outb(iface->address_byte & ~1, ACBSDA);
	138
	139	iface->state = state_command;
	140	break;
	141
	142	case state_command:
	143	outb(iface->command, ACBSDA);
	144
	145	if (iface->address_byte & 1)
	146	iface->state = state_repeat_start;
	147	else
	148	iface->state = state_write;
	149	break;
	150
	151	case state_repeat_start:
	152	outb(inb(ACBCTL1) \| ACBCTL1_START, ACBCTL1);
	153	/* fallthrough */
99c3adb4	154
1da177e4 LT	155	case state_quick:
1da177e4 LT	156	if (iface->address_byte & 1) {
99c3adb4	157	if (iface->len == 1)
1da177e4 LT	158	outb(inb(ACBCTL1) \| ACBCTL1_ACK, ACBCTL1);
	159	else
	160	outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
	161	outb(iface->address_byte, ACBSDA);
	162
	163	iface->state = state_read;
	164	} else {
	165	outb(iface->address_byte, ACBSDA);
	166
	167	iface->state = state_write;
	168	}
	169	break;
	170
	171	case state_read:
	172	/* Set ACK if receiving the last byte */
	173	if (iface->len == 1)
	174	outb(inb(ACBCTL1) \| ACBCTL1_ACK, ACBCTL1);
	175	else
	176	outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
	177
	178	*iface->ptr++ = inb(ACBSDA);
	179	--iface->len;
	180
	181	if (iface->len == 0) {
	182	iface->result = 0;
	183	iface->state = state_idle;
	184	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	185	}
	186
	187	break;
	188
	189	case state_write:
	190	if (iface->len == 0) {
	191	iface->result = 0;
	192	iface->state = state_idle;
	193	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	194	break;
	195	}
99c3adb4	196
1da177e4 LT	197	outb(*iface->ptr++, ACBSDA);
1da177e4 LT	198	--iface->len;
99c3adb4	199
1da177e4 LT	200	break;
	201	}
	202
	203	return;
	204
	205	negack:
ef4d9275 BG	206	dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
ef4d9275 BG	207	scx200_acb_state_name[iface->state]);
1da177e4 LT	208
	209	iface->state = state_idle;
	210	iface->result = -ENXIO;
	211
	212	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	213	outb(ACBST_STASTR \| ACBST_NEGACK, ACBST);
	214	return;
	215
	216	error:
	217	dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
	218	scx200_acb_state_name[iface->state]);
	219
	220	iface->state = state_idle;
	221	iface->result = -EIO;
	222	iface->needs_reset = 1;
	223	}
	224
99c3adb4	225	static void scx200_acb_timeout(struct scx200_acb_iface *iface)
1da177e4 LT	226	{
	227	dev_err(&iface->adapter.dev, "timeout in state %s\n",
	228	scx200_acb_state_name[iface->state]);
	229
	230	iface->state = state_idle;
	231	iface->result = -EIO;
	232	iface->needs_reset = 1;
	233	}
	234
	235	#ifdef POLLED_MODE
	236	static void scx200_acb_poll(struct scx200_acb_iface *iface)
	237	{
	238	u8 status = 0;
	239	unsigned long timeout;
	240
	241	timeout = jiffies + POLL_TIMEOUT;
	242	while (time_before(jiffies, timeout)) {
	243	status = inb(ACBST);
	244	if ((status & (ACBST_SDAST\|ACBST_BER\|ACBST_NEGACK)) != 0) {
	245	scx200_acb_machine(iface, status);
	246	return;
	247	}
	248	msleep(10);
	249	}
	250
	251	scx200_acb_timeout(iface);
	252	}
	253	#endif /* POLLED_MODE */
	254
	255	static void scx200_acb_reset(struct scx200_acb_iface *iface)
	256	{
	257	/* Disable the ACCESS.bus device and Configure the SCL
99c3adb4	258	frequency: 16 clock cycles */
1da177e4 LT	259	outb(0x70, ACBCTL2);
	260	/* Polling mode */
	261	outb(0, ACBCTL1);
	262	/* Disable slave address */
	263	outb(0, ACBADDR);
	264	/* Enable the ACCESS.bus device */
	265	outb(inb(ACBCTL2) \| ACBCTL2_ENABLE, ACBCTL2);
	266	/* Free STALL after START */
	267	outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE \| ACBCTL1_NMINTE), ACBCTL1);
	268	/* Send a STOP */
	269	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	270	/* Clear BER, NEGACK and STASTR bits */
	271	outb(ACBST_BER \| ACBST_NEGACK \| ACBST_STASTR, ACBST);
	272	/* Clear BB bit */
	273	outb(inb(ACBCST) \| ACBCST_BB, ACBCST);
	274	}
	275
	276	static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
99c3adb4 BG	277	u16 address, unsigned short flags,
	278	char rw, u8 command, int size,
	279	union i2c_smbus_data *data)
1da177e4 LT	280	{
	281	struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
	282	int len;
	283	u8 *buffer;
	284	u16 cur_word;
	285	int rc;
	286
	287	switch (size) {
	288	case I2C_SMBUS_QUICK:
99c3adb4 BG	289	len = 0;
	290	buffer = NULL;
	291	break;
	292
1da177e4 LT	293	case I2C_SMBUS_BYTE:
	294	if (rw == I2C_SMBUS_READ) {
	295	len = 1;
	296	buffer = &data->byte;
	297	} else {
	298	len = 1;
	299	buffer = &command;
	300	}
99c3adb4 BG	301	break;
99c3adb4 BG	302
1da177e4	303	case I2C_SMBUS_BYTE_DATA:
99c3adb4 BG	304	len = 1;
	305	buffer = &data->byte;
	306	break;
	307
1da177e4 LT	308	case I2C_SMBUS_WORD_DATA:
1da177e4 LT	309	len = 2;
99c3adb4 BG	310	cur_word = cpu_to_le16(data->word);
99c3adb4 BG	311	buffer = (u8 *)&cur_word;
1da177e4	312	break;
99c3adb4	313
1da177e4	314	case I2C_SMBUS_BLOCK_DATA:
99c3adb4 BG	315	len = data->block[0];
99c3adb4 BG	316	buffer = &data->block[1];
1da177e4	317	break;
99c3adb4	318
1da177e4	319	default:
99c3adb4	320	return -EINVAL;
1da177e4 LT	321	}
1da177e4 LT	322
ef4d9275 BG	323	dev_dbg(&adapter->dev,
	324	"size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
	325	size, address, command, len, rw);
1da177e4 LT	326
1da177e4 LT	327	if (!len && rw == I2C_SMBUS_READ) {
ef4d9275	328	dev_dbg(&adapter->dev, "zero length read\n");
1da177e4 LT	329	return -EINVAL;
	330	}
	331
1da177e4 LT	332	down(&iface->sem);
	333
	334	iface->address_byte = address<<1;
	335	if (rw == I2C_SMBUS_READ)
	336	iface->address_byte \|= 1;
	337	iface->command = command;
	338	iface->ptr = buffer;
	339	iface->len = len;
	340	iface->result = -EINVAL;
	341	iface->needs_reset = 0;
	342
	343	outb(inb(ACBCTL1) \| ACBCTL1_START, ACBCTL1);
	344
	345	if (size == I2C_SMBUS_QUICK \|\| size == I2C_SMBUS_BYTE)
	346	iface->state = state_quick;
	347	else
	348	iface->state = state_address;
	349
	350	#ifdef POLLED_MODE
	351	while (iface->state != state_idle)
	352	scx200_acb_poll(iface);
	353	#else /* POLLED_MODE */
	354	#error Interrupt driven mode not implemented
	355	#endif /* POLLED_MODE */
	356
	357	if (iface->needs_reset)
	358	scx200_acb_reset(iface);
	359
	360	rc = iface->result;
	361
	362	up(&iface->sem);
	363
	364	if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
99c3adb4	365	data->word = le16_to_cpu(cur_word);
1da177e4 LT	366
1da177e4 LT	367	#ifdef DEBUG
ef4d9275	368	dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
1da177e4 LT	369	if (buffer) {
	370	int i;
	371	printk(" data:");
	372	for (i = 0; i < len; ++i)
	373	printk(" %02x", buffer[i]);
	374	}
	375	printk("\n");
	376	#endif
	377
	378	return rc;
	379	}
	380
	381	static u32 scx200_acb_func(struct i2c_adapter *adapter)
	382	{
	383	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
	384	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
	385	I2C_FUNC_SMBUS_BLOCK_DATA;
	386	}
	387
	388	/* For now, we only handle combined mode (smbus) */
	389	static struct i2c_algorithm scx200_acb_algorithm = {
1da177e4 LT	390	.smbus_xfer = scx200_acb_smbus_xfer,
	391	.functionality = scx200_acb_func,
	392	};
	393
	394	static struct scx200_acb_iface *scx200_acb_list;
	395
	396	static int scx200_acb_probe(struct scx200_acb_iface *iface)
	397	{
	398	u8 val;
	399
	400	/* Disable the ACCESS.bus device and Configure the SCL
99c3adb4	401	frequency: 16 clock cycles */
1da177e4 LT	402	outb(0x70, ACBCTL2);
	403
	404	if (inb(ACBCTL2) != 0x70) {
ef4d9275	405	pr_debug(NAME ": ACBCTL2 readback failed\n");
1da177e4 LT	406	return -ENXIO;
	407	}
	408
	409	outb(inb(ACBCTL1) \| ACBCTL1_NMINTE, ACBCTL1);
	410
	411	val = inb(ACBCTL1);
	412	if (val) {
ef4d9275 BG	413	pr_debug(NAME ": disabled, but ACBCTL1=0x%02x\n",
ef4d9275 BG	414	val);
1da177e4 LT	415	return -ENXIO;
	416	}
	417
	418	outb(inb(ACBCTL2) \| ACBCTL2_ENABLE, ACBCTL2);
	419
	420	outb(inb(ACBCTL1) \| ACBCTL1_NMINTE, ACBCTL1);
	421
	422	val = inb(ACBCTL1);
	423	if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
ef4d9275 BG	424	pr_debug(NAME ": enabled, but NMINTE won't be set, "
ef4d9275 BG	425	"ACBCTL1=0x%02x\n", val);
1da177e4 LT	426	return -ENXIO;
	427	}
	428
	429	return 0;
	430	}
	431
	432	static int __init scx200_acb_create(int base, int index)
	433	{
	434	struct scx200_acb_iface *iface;
	435	struct i2c_adapter *adapter;
	436	int rc = 0;
	437	char description[64];
	438
5263ebb5	439	iface = kzalloc(sizeof(*iface), GFP_KERNEL);
1da177e4 LT	440	if (!iface) {
	441	printk(KERN_ERR NAME ": can't allocate memory\n");
	442	rc = -ENOMEM;
	443	goto errout;
	444	}
	445
1da177e4 LT	446	adapter = &iface->adapter;
	447	i2c_set_adapdata(adapter, iface);
	448	snprintf(adapter->name, I2C_NAME_SIZE, "SCx200 ACB%d", index);
	449	adapter->owner = THIS_MODULE;
1684a984	450	adapter->id = I2C_HW_SMBUS_SCX200;
1da177e4 LT	451	adapter->algo = &scx200_acb_algorithm;
	452	adapter->class = I2C_CLASS_HWMON;
	453
	454	init_MUTEX(&iface->sem);
	455
99c3adb4 BG	456	snprintf(description, sizeof(description),
99c3adb4 BG	457	"NatSemi SCx200 ACCESS.bus [%s]", adapter->name);
1da177e4	458	if (request_region(base, 8, description) == 0) {
ef4d9275	459	printk(KERN_ERR NAME ": can't allocate io 0x%x-0x%x\n",
1da177e4 LT	460	base, base + 8-1);
	461	rc = -EBUSY;
	462	goto errout;
	463	}
	464	iface->base = base;
	465
	466	rc = scx200_acb_probe(iface);
	467	if (rc) {
ef4d9275	468	printk(KERN_WARNING NAME ": probe failed\n");
1da177e4 LT	469	goto errout;
	470	}
	471
	472	scx200_acb_reset(iface);
	473
	474	if (i2c_add_adapter(adapter) < 0) {
ef4d9275	475	printk(KERN_ERR NAME ": failed to register\n");
1da177e4 LT	476	rc = -ENODEV;
	477	goto errout;
	478	}
	479
	480	lock_kernel();
	481	iface->next = scx200_acb_list;
	482	scx200_acb_list = iface;
	483	unlock_kernel();
	484
	485	return 0;
	486
	487	errout:
	488	if (iface) {
	489	if (iface->base)
	490	release_region(iface->base, 8);
	491	kfree(iface);
	492	}
	493	return rc;
	494	}
	495
	496	static struct pci_device_id scx200[] = {
	497	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
	498	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
	499	{ },
	500	};
	501
	502	static int __init scx200_acb_init(void)
	503	{
	504	int i;
	505	int rc;
	506
	507	pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
	508
	509	/* Verify that this really is a SCx200 processor */
	510	if (pci_dev_present(scx200) == 0)
	511	return -ENODEV;
	512
	513	rc = -ENXIO;
	514	for (i = 0; i < MAX_DEVICES; ++i) {
	515	if (base[i] > 0)
	516	rc = scx200_acb_create(base[i], i);
	517	}
	518	if (scx200_acb_list)
	519	return 0;
	520	return rc;
	521	}
	522
	523	static void __exit scx200_acb_cleanup(void)
	524	{
	525	struct scx200_acb_iface *iface;
99c3adb4	526
1da177e4 LT	527	lock_kernel();
	528	while ((iface = scx200_acb_list) != NULL) {
	529	scx200_acb_list = iface->next;
	530	unlock_kernel();
	531
	532	i2c_del_adapter(&iface->adapter);
	533	release_region(iface->base, 8);
	534	kfree(iface);
	535	lock_kernel();
	536	}
	537	unlock_kernel();
	538	}
	539
	540	module_init(scx200_acb_init);
	541	module_exit(scx200_acb_cleanup);