Commit | Line | Data |
---|---|---|
ae63b13b GR |
1 | /* |
2 | * I2C multiplexer driver for PCA9541 bus master selector | |
3 | * | |
4 | * Copyright (c) 2010 Ericsson AB. | |
5 | * | |
b104153e | 6 | * Author: Guenter Roeck <linux@roeck-us.net> |
ae63b13b GR |
7 | * |
8 | * Derived from: | |
9 | * pca954x.c | |
10 | * | |
11 | * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it> | |
12 | * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it> | |
13 | * | |
14 | * This file is licensed under the terms of the GNU General Public | |
15 | * License version 2. This program is licensed "as is" without any | |
16 | * warranty of any kind, whether express or implied. | |
17 | */ | |
18 | ||
19 | #include <linux/module.h> | |
ae63b13b GR |
20 | #include <linux/jiffies.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/device.h> | |
24 | #include <linux/i2c.h> | |
25 | #include <linux/i2c-mux.h> | |
26 | ||
27 | #include <linux/i2c/pca954x.h> | |
28 | ||
29 | /* | |
30 | * The PCA9541 is a bus master selector. It supports two I2C masters connected | |
31 | * to a single slave bus. | |
32 | * | |
33 | * Before each bus transaction, a master has to acquire bus ownership. After the | |
34 | * transaction is complete, bus ownership has to be released. This fits well | |
35 | * into the I2C multiplexer framework, which provides select and release | |
36 | * functions for this purpose. For this reason, this driver is modeled as | |
37 | * single-channel I2C bus multiplexer. | |
38 | * | |
39 | * This driver assumes that the two bus masters are controlled by two different | |
40 | * hosts. If a single host controls both masters, platform code has to ensure | |
41 | * that only one of the masters is instantiated at any given time. | |
42 | */ | |
43 | ||
44 | #define PCA9541_CONTROL 0x01 | |
45 | #define PCA9541_ISTAT 0x02 | |
46 | ||
47 | #define PCA9541_CTL_MYBUS (1 << 0) | |
48 | #define PCA9541_CTL_NMYBUS (1 << 1) | |
49 | #define PCA9541_CTL_BUSON (1 << 2) | |
50 | #define PCA9541_CTL_NBUSON (1 << 3) | |
51 | #define PCA9541_CTL_BUSINIT (1 << 4) | |
52 | #define PCA9541_CTL_TESTON (1 << 6) | |
53 | #define PCA9541_CTL_NTESTON (1 << 7) | |
54 | ||
55 | #define PCA9541_ISTAT_INTIN (1 << 0) | |
56 | #define PCA9541_ISTAT_BUSINIT (1 << 1) | |
57 | #define PCA9541_ISTAT_BUSOK (1 << 2) | |
58 | #define PCA9541_ISTAT_BUSLOST (1 << 3) | |
59 | #define PCA9541_ISTAT_MYTEST (1 << 6) | |
60 | #define PCA9541_ISTAT_NMYTEST (1 << 7) | |
61 | ||
62 | #define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON) | |
63 | #define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS) | |
64 | #define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS) | |
65 | #define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON) | |
66 | ||
67 | /* arbitration timeouts, in jiffies */ | |
68 | #define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */ | |
69 | #define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */ | |
70 | ||
71 | /* arbitration retry delays, in us */ | |
72 | #define SELECT_DELAY_SHORT 50 | |
73 | #define SELECT_DELAY_LONG 1000 | |
74 | ||
75 | struct pca9541 { | |
ab88b97c | 76 | struct i2c_client *client; |
ae63b13b GR |
77 | unsigned long select_timeout; |
78 | unsigned long arb_timeout; | |
79 | }; | |
80 | ||
81 | static const struct i2c_device_id pca9541_id[] = { | |
82 | {"pca9541", 0}, | |
83 | {} | |
84 | }; | |
85 | ||
86 | MODULE_DEVICE_TABLE(i2c, pca9541_id); | |
87 | ||
a1cbf338 PR |
88 | #ifdef CONFIG_OF |
89 | static const struct of_device_id pca9541_of_match[] = { | |
90 | { .compatible = "nxp,pca9541" }, | |
91 | {} | |
92 | }; | |
93 | #endif | |
94 | ||
ae63b13b GR |
95 | /* |
96 | * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer() | |
97 | * as they will try to lock the adapter a second time. | |
98 | */ | |
99 | static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val) | |
100 | { | |
101 | struct i2c_adapter *adap = client->adapter; | |
102 | int ret; | |
103 | ||
104 | if (adap->algo->master_xfer) { | |
105 | struct i2c_msg msg; | |
106 | char buf[2]; | |
107 | ||
108 | msg.addr = client->addr; | |
109 | msg.flags = 0; | |
110 | msg.len = 2; | |
111 | buf[0] = command; | |
112 | buf[1] = val; | |
113 | msg.buf = buf; | |
0a8237ae | 114 | ret = __i2c_transfer(adap, &msg, 1); |
ae63b13b GR |
115 | } else { |
116 | union i2c_smbus_data data; | |
117 | ||
118 | data.byte = val; | |
119 | ret = adap->algo->smbus_xfer(adap, client->addr, | |
120 | client->flags, | |
121 | I2C_SMBUS_WRITE, | |
122 | command, | |
123 | I2C_SMBUS_BYTE_DATA, &data); | |
124 | } | |
125 | ||
126 | return ret; | |
127 | } | |
128 | ||
129 | /* | |
130 | * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer() | |
131 | * as they will try to lock adapter a second time. | |
132 | */ | |
133 | static int pca9541_reg_read(struct i2c_client *client, u8 command) | |
134 | { | |
135 | struct i2c_adapter *adap = client->adapter; | |
136 | int ret; | |
137 | u8 val; | |
138 | ||
139 | if (adap->algo->master_xfer) { | |
140 | struct i2c_msg msg[2] = { | |
141 | { | |
142 | .addr = client->addr, | |
143 | .flags = 0, | |
144 | .len = 1, | |
145 | .buf = &command | |
146 | }, | |
147 | { | |
148 | .addr = client->addr, | |
149 | .flags = I2C_M_RD, | |
150 | .len = 1, | |
151 | .buf = &val | |
152 | } | |
153 | }; | |
0a8237ae | 154 | ret = __i2c_transfer(adap, msg, 2); |
ae63b13b GR |
155 | if (ret == 2) |
156 | ret = val; | |
157 | else if (ret >= 0) | |
158 | ret = -EIO; | |
159 | } else { | |
160 | union i2c_smbus_data data; | |
161 | ||
162 | ret = adap->algo->smbus_xfer(adap, client->addr, | |
163 | client->flags, | |
164 | I2C_SMBUS_READ, | |
165 | command, | |
166 | I2C_SMBUS_BYTE_DATA, &data); | |
167 | if (!ret) | |
168 | ret = data.byte; | |
169 | } | |
170 | return ret; | |
171 | } | |
172 | ||
173 | /* | |
174 | * Arbitration management functions | |
175 | */ | |
176 | ||
177 | /* Release bus. Also reset NTESTON and BUSINIT if it was set. */ | |
178 | static void pca9541_release_bus(struct i2c_client *client) | |
179 | { | |
180 | int reg; | |
181 | ||
182 | reg = pca9541_reg_read(client, PCA9541_CONTROL); | |
183 | if (reg >= 0 && !busoff(reg) && mybus(reg)) | |
184 | pca9541_reg_write(client, PCA9541_CONTROL, | |
185 | (reg & PCA9541_CTL_NBUSON) >> 1); | |
186 | } | |
187 | ||
188 | /* | |
189 | * Arbitration is defined as a two-step process. A bus master can only activate | |
190 | * the slave bus if it owns it; otherwise it has to request ownership first. | |
191 | * This multi-step process ensures that access contention is resolved | |
192 | * gracefully. | |
193 | * | |
194 | * Bus Ownership Other master Action | |
195 | * state requested access | |
196 | * ---------------------------------------------------- | |
197 | * off - yes wait for arbitration timeout or | |
198 | * for other master to drop request | |
199 | * off no no take ownership | |
200 | * off yes no turn on bus | |
201 | * on yes - done | |
202 | * on no - wait for arbitration timeout or | |
203 | * for other master to release bus | |
204 | * | |
205 | * The main contention point occurs if the slave bus is off and both masters | |
206 | * request ownership at the same time. In this case, one master will turn on | |
207 | * the slave bus, believing that it owns it. The other master will request | |
208 | * bus ownership. Result is that the bus is turned on, and master which did | |
209 | * _not_ own the slave bus before ends up owning it. | |
210 | */ | |
211 | ||
212 | /* Control commands per PCA9541 datasheet */ | |
213 | static const u8 pca9541_control[16] = { | |
214 | 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1 | |
215 | }; | |
216 | ||
217 | /* | |
218 | * Channel arbitration | |
219 | * | |
220 | * Return values: | |
221 | * <0: error | |
222 | * 0 : bus not acquired | |
223 | * 1 : bus acquired | |
224 | */ | |
225 | static int pca9541_arbitrate(struct i2c_client *client) | |
226 | { | |
ab88b97c PR |
227 | struct i2c_mux_core *muxc = i2c_get_clientdata(client); |
228 | struct pca9541 *data = i2c_mux_priv(muxc); | |
ae63b13b GR |
229 | int reg; |
230 | ||
231 | reg = pca9541_reg_read(client, PCA9541_CONTROL); | |
232 | if (reg < 0) | |
233 | return reg; | |
234 | ||
235 | if (busoff(reg)) { | |
236 | int istat; | |
237 | /* | |
238 | * Bus is off. Request ownership or turn it on unless | |
239 | * other master requested ownership. | |
240 | */ | |
241 | istat = pca9541_reg_read(client, PCA9541_ISTAT); | |
242 | if (!(istat & PCA9541_ISTAT_NMYTEST) | |
243 | || time_is_before_eq_jiffies(data->arb_timeout)) { | |
244 | /* | |
245 | * Other master did not request ownership, | |
246 | * or arbitration timeout expired. Take the bus. | |
247 | */ | |
248 | pca9541_reg_write(client, | |
249 | PCA9541_CONTROL, | |
250 | pca9541_control[reg & 0x0f] | |
251 | | PCA9541_CTL_NTESTON); | |
252 | data->select_timeout = SELECT_DELAY_SHORT; | |
253 | } else { | |
254 | /* | |
255 | * Other master requested ownership. | |
256 | * Set extra long timeout to give it time to acquire it. | |
257 | */ | |
258 | data->select_timeout = SELECT_DELAY_LONG * 2; | |
259 | } | |
260 | } else if (mybus(reg)) { | |
261 | /* | |
262 | * Bus is on, and we own it. We are done with acquisition. | |
263 | * Reset NTESTON and BUSINIT, then return success. | |
264 | */ | |
265 | if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT)) | |
266 | pca9541_reg_write(client, | |
267 | PCA9541_CONTROL, | |
268 | reg & ~(PCA9541_CTL_NTESTON | |
269 | | PCA9541_CTL_BUSINIT)); | |
270 | return 1; | |
271 | } else { | |
272 | /* | |
273 | * Other master owns the bus. | |
274 | * If arbitration timeout has expired, force ownership. | |
275 | * Otherwise request it. | |
276 | */ | |
277 | data->select_timeout = SELECT_DELAY_LONG; | |
278 | if (time_is_before_eq_jiffies(data->arb_timeout)) { | |
279 | /* Time is up, take the bus and reset it. */ | |
280 | pca9541_reg_write(client, | |
281 | PCA9541_CONTROL, | |
282 | pca9541_control[reg & 0x0f] | |
283 | | PCA9541_CTL_BUSINIT | |
284 | | PCA9541_CTL_NTESTON); | |
285 | } else { | |
286 | /* Request bus ownership if needed */ | |
287 | if (!(reg & PCA9541_CTL_NTESTON)) | |
288 | pca9541_reg_write(client, | |
289 | PCA9541_CONTROL, | |
290 | reg | PCA9541_CTL_NTESTON); | |
291 | } | |
292 | } | |
293 | return 0; | |
294 | } | |
295 | ||
ab88b97c | 296 | static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan) |
ae63b13b | 297 | { |
ab88b97c PR |
298 | struct pca9541 *data = i2c_mux_priv(muxc); |
299 | struct i2c_client *client = data->client; | |
ae63b13b GR |
300 | int ret; |
301 | unsigned long timeout = jiffies + ARB2_TIMEOUT; | |
302 | /* give up after this time */ | |
303 | ||
304 | data->arb_timeout = jiffies + ARB_TIMEOUT; | |
305 | /* force bus ownership after this time */ | |
306 | ||
307 | do { | |
308 | ret = pca9541_arbitrate(client); | |
309 | if (ret) | |
310 | return ret < 0 ? ret : 0; | |
311 | ||
312 | if (data->select_timeout == SELECT_DELAY_SHORT) | |
313 | udelay(data->select_timeout); | |
314 | else | |
315 | msleep(data->select_timeout / 1000); | |
316 | } while (time_is_after_eq_jiffies(timeout)); | |
317 | ||
318 | return -ETIMEDOUT; | |
319 | } | |
320 | ||
ab88b97c | 321 | static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan) |
ae63b13b | 322 | { |
ab88b97c PR |
323 | struct pca9541 *data = i2c_mux_priv(muxc); |
324 | struct i2c_client *client = data->client; | |
325 | ||
ae63b13b GR |
326 | pca9541_release_bus(client); |
327 | return 0; | |
328 | } | |
329 | ||
330 | /* | |
331 | * I2C init/probing/exit functions | |
332 | */ | |
333 | static int pca9541_probe(struct i2c_client *client, | |
334 | const struct i2c_device_id *id) | |
335 | { | |
336 | struct i2c_adapter *adap = client->adapter; | |
6d4028c6 | 337 | struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); |
ab88b97c | 338 | struct i2c_mux_core *muxc; |
ae63b13b GR |
339 | struct pca9541 *data; |
340 | int force; | |
ab88b97c | 341 | int ret; |
ae63b13b GR |
342 | |
343 | if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) | |
ab88b97c | 344 | return -ENODEV; |
ae63b13b GR |
345 | |
346 | /* | |
347 | * I2C accesses are unprotected here. | |
348 | * We have to lock the adapter before releasing the bus. | |
349 | */ | |
350 | i2c_lock_adapter(adap); | |
351 | pca9541_release_bus(client); | |
352 | i2c_unlock_adapter(adap); | |
353 | ||
354 | /* Create mux adapter */ | |
355 | ||
356 | force = 0; | |
357 | if (pdata) | |
358 | force = pdata->modes[0].adap_id; | |
40839590 PR |
359 | muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), |
360 | I2C_MUX_ARBITRATOR, | |
ab88b97c PR |
361 | pca9541_select_chan, pca9541_release_chan); |
362 | if (!muxc) | |
363 | return -ENOMEM; | |
ae63b13b | 364 | |
ab88b97c PR |
365 | data = i2c_mux_priv(muxc); |
366 | data->client = client; | |
367 | ||
368 | i2c_set_clientdata(client, muxc); | |
369 | ||
370 | ret = i2c_mux_add_adapter(muxc, force, 0, 0); | |
371 | if (ret) { | |
ae63b13b | 372 | dev_err(&client->dev, "failed to register master selector\n"); |
ab88b97c | 373 | return ret; |
ae63b13b GR |
374 | } |
375 | ||
376 | dev_info(&client->dev, "registered master selector for I2C %s\n", | |
377 | client->name); | |
378 | ||
379 | return 0; | |
ae63b13b GR |
380 | } |
381 | ||
382 | static int pca9541_remove(struct i2c_client *client) | |
383 | { | |
ab88b97c | 384 | struct i2c_mux_core *muxc = i2c_get_clientdata(client); |
ae63b13b | 385 | |
ab88b97c | 386 | i2c_mux_del_adapters(muxc); |
ae63b13b GR |
387 | return 0; |
388 | } | |
389 | ||
390 | static struct i2c_driver pca9541_driver = { | |
391 | .driver = { | |
392 | .name = "pca9541", | |
a1cbf338 | 393 | .of_match_table = of_match_ptr(pca9541_of_match), |
ae63b13b GR |
394 | }, |
395 | .probe = pca9541_probe, | |
396 | .remove = pca9541_remove, | |
397 | .id_table = pca9541_id, | |
398 | }; | |
399 | ||
de05497a | 400 | module_i2c_driver(pca9541_driver); |
ae63b13b | 401 | |
83a638df | 402 | MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); |
ae63b13b GR |
403 | MODULE_DESCRIPTION("PCA9541 I2C master selector driver"); |
404 | MODULE_LICENSE("GPL v2"); |