ide: use ide_complete_cmd() for REQ_UNPARK_HEADS
[deliverable/linux.git] / drivers / ide / ide-dma.c
CommitLineData
1da177e4 1/*
204f47c5
BZ
2 * IDE DMA support (including IDE PCI BM-DMA).
3 *
59bca8cc
BZ
4 * Copyright (C) 1995-1998 Mark Lord
5 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
58f189fc 7 *
1da177e4 8 * May be copied or modified under the terms of the GNU General Public License
204f47c5
BZ
9 *
10 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
1da177e4
LT
11 */
12
13/*
14 * Special Thanks to Mark for his Six years of work.
1da177e4
LT
15 */
16
17/*
1da177e4
LT
18 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
19 * fixing the problem with the BIOS on some Acer motherboards.
20 *
21 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
22 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
23 *
24 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
25 * at generic DMA -- his patches were referred to when preparing this code.
26 *
27 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
28 * for supplying a Promise UDMA board & WD UDMA drive for this work!
1da177e4
LT
29 */
30
1da177e4
LT
31#include <linux/types.h>
32#include <linux/kernel.h>
1da177e4 33#include <linux/ide.h>
1da177e4 34#include <linux/scatterlist.h>
5c05ff68 35#include <linux/dma-mapping.h>
1da177e4 36
db3f99ef 37static const struct drive_list_entry drive_whitelist[] = {
c2d3ce8c
JH
38 { "Micropolis 2112A" , NULL },
39 { "CONNER CTMA 4000" , NULL },
40 { "CONNER CTT8000-A" , NULL },
41 { "ST34342A" , NULL },
1da177e4
LT
42 { NULL , NULL }
43};
44
db3f99ef 45static const struct drive_list_entry drive_blacklist[] = {
c2d3ce8c
JH
46 { "WDC AC11000H" , NULL },
47 { "WDC AC22100H" , NULL },
48 { "WDC AC32500H" , NULL },
49 { "WDC AC33100H" , NULL },
50 { "WDC AC31600H" , NULL },
1da177e4
LT
51 { "WDC AC32100H" , "24.09P07" },
52 { "WDC AC23200L" , "21.10N21" },
c2d3ce8c
JH
53 { "Compaq CRD-8241B" , NULL },
54 { "CRD-8400B" , NULL },
55 { "CRD-8480B", NULL },
56 { "CRD-8482B", NULL },
57 { "CRD-84" , NULL },
58 { "SanDisk SDP3B" , NULL },
59 { "SanDisk SDP3B-64" , NULL },
60 { "SANYO CD-ROM CRD" , NULL },
61 { "HITACHI CDR-8" , NULL },
62 { "HITACHI CDR-8335" , NULL },
63 { "HITACHI CDR-8435" , NULL },
64 { "Toshiba CD-ROM XM-6202B" , NULL },
65 { "TOSHIBA CD-ROM XM-1702BC", NULL },
66 { "CD-532E-A" , NULL },
67 { "E-IDE CD-ROM CR-840", NULL },
68 { "CD-ROM Drive/F5A", NULL },
69 { "WPI CDD-820", NULL },
70 { "SAMSUNG CD-ROM SC-148C", NULL },
71 { "SAMSUNG CD-ROM SC", NULL },
72 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
73 { "_NEC DV5800A", NULL },
5a6248ca 74 { "SAMSUNG CD-ROM SN-124", "N001" },
c2d3ce8c 75 { "Seagate STT20000A", NULL },
b0bc65b9 76 { "CD-ROM CDR_U200", "1.09" },
1da177e4
LT
77 { NULL , NULL }
78
79};
80
1da177e4
LT
81/**
82 * ide_dma_intr - IDE DMA interrupt handler
83 * @drive: the drive the interrupt is for
84 *
db3f99ef 85 * Handle an interrupt completing a read/write DMA transfer on an
1da177e4
LT
86 * IDE device
87 */
db3f99ef
BZ
88
89ide_startstop_t ide_dma_intr(ide_drive_t *drive)
1da177e4 90{
b73c7ee2 91 ide_hwif_t *hwif = drive->hwif;
1da177e4
LT
92 u8 stat = 0, dma_stat = 0;
93
b73c7ee2 94 dma_stat = hwif->dma_ops->dma_end(drive);
374e042c 95 stat = hwif->tp_ops->read_status(hwif);
c47137a9 96
3a7d2484 97 if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
1da177e4 98 if (!dma_stat) {
adb1af98 99 struct ide_cmd *cmd = &hwif->cmd;
1da177e4 100
adb1af98 101 ide_finish_cmd(drive, cmd, stat);
1da177e4
LT
102 return ide_stopped;
103 }
db3f99ef
BZ
104 printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
105 drive->name, __func__, dma_stat);
1da177e4
LT
106 }
107 return ide_error(drive, "dma_intr", stat);
108}
1da177e4
LT
109EXPORT_SYMBOL_GPL(ide_dma_intr);
110
2dbe7e91 111int ide_dma_good_drive(ide_drive_t *drive)
75d7d963
BZ
112{
113 return ide_in_drive_list(drive->id, drive_whitelist);
114}
115
1da177e4
LT
116/**
117 * ide_build_sglist - map IDE scatter gather for DMA I/O
118 * @drive: the drive to build the DMA table for
119 * @rq: the request holding the sg list
120 *
5c05ff68
BZ
121 * Perform the DMA mapping magic necessary to access the source or
122 * target buffers of a request via DMA. The lower layers of the
1da177e4 123 * kernel provide the necessary cache management so that we can
5c05ff68 124 * operate in a portable fashion.
1da177e4
LT
125 */
126
127int ide_build_sglist(ide_drive_t *drive, struct request *rq)
128{
db3f99ef 129 ide_hwif_t *hwif = drive->hwif;
1da177e4 130 struct scatterlist *sg = hwif->sg_table;
b6308ee0 131 struct ide_cmd *cmd = &hwif->cmd;
5d82720a 132 int i;
1da177e4 133
1da177e4
LT
134 ide_map_sg(drive, rq);
135
136 if (rq_data_dir(rq) == READ)
b6308ee0 137 cmd->sg_dma_direction = DMA_FROM_DEVICE;
1da177e4 138 else
b6308ee0 139 cmd->sg_dma_direction = DMA_TO_DEVICE;
1da177e4 140
b6308ee0 141 i = dma_map_sg(hwif->dev, sg, cmd->sg_nents, cmd->sg_dma_direction);
e6830a86
BZ
142 if (i == 0)
143 ide_map_sg(drive, rq);
144 else {
b6308ee0
BZ
145 cmd->orig_sg_nents = cmd->sg_nents;
146 cmd->sg_nents = i;
5d82720a
FT
147 }
148
149 return i;
1da177e4 150}
1da177e4 151
1da177e4
LT
152/**
153 * ide_destroy_dmatable - clean up DMA mapping
154 * @drive: The drive to unmap
155 *
156 * Teardown mappings after DMA has completed. This must be called
157 * after the completion of each use of ide_build_dmatable and before
158 * the next use of ide_build_dmatable. Failure to do so will cause
159 * an oops as only one mapping can be live for each target at a given
160 * time.
161 */
db3f99ef
BZ
162
163void ide_destroy_dmatable(ide_drive_t *drive)
1da177e4 164{
36501650 165 ide_hwif_t *hwif = drive->hwif;
b6308ee0 166 struct ide_cmd *cmd = &hwif->cmd;
1da177e4 167
b6308ee0
BZ
168 dma_unmap_sg(hwif->dev, hwif->sg_table, cmd->orig_sg_nents,
169 cmd->sg_dma_direction);
1da177e4 170}
1da177e4
LT
171EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
172
1da177e4 173/**
7469aaf6 174 * ide_dma_off_quietly - Generic DMA kill
1da177e4
LT
175 * @drive: drive to control
176 *
db3f99ef 177 * Turn off the current DMA on this IDE controller.
1da177e4
LT
178 */
179
7469aaf6 180void ide_dma_off_quietly(ide_drive_t *drive)
1da177e4 181{
97100fc8 182 drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
1da177e4
LT
183 ide_toggle_bounce(drive, 0);
184
5e37bdc0 185 drive->hwif->dma_ops->dma_host_set(drive, 0);
1da177e4 186}
7469aaf6 187EXPORT_SYMBOL(ide_dma_off_quietly);
1da177e4
LT
188
189/**
7469aaf6 190 * ide_dma_off - disable DMA on a device
1da177e4
LT
191 * @drive: drive to disable DMA on
192 *
193 * Disable IDE DMA for a device on this IDE controller.
194 * Inform the user that DMA has been disabled.
195 */
196
7469aaf6 197void ide_dma_off(ide_drive_t *drive)
1da177e4
LT
198{
199 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
4a546e04 200 ide_dma_off_quietly(drive);
1da177e4 201}
7469aaf6 202EXPORT_SYMBOL(ide_dma_off);
1da177e4 203
1da177e4 204/**
4a546e04 205 * ide_dma_on - Enable DMA on a device
1da177e4
LT
206 * @drive: drive to enable DMA on
207 *
208 * Enable IDE DMA for a device on this IDE controller.
209 */
4a546e04
BZ
210
211void ide_dma_on(ide_drive_t *drive)
1da177e4 212{
97100fc8 213 drive->dev_flags |= IDE_DFLAG_USING_DMA;
1da177e4
LT
214 ide_toggle_bounce(drive, 1);
215
5e37bdc0 216 drive->hwif->dma_ops->dma_host_set(drive, 1);
1da177e4
LT
217}
218
db3f99ef 219int __ide_dma_bad_drive(ide_drive_t *drive)
1da177e4 220{
4dde4492 221 u16 *id = drive->id;
1da177e4 222
65e5f2e3 223 int blacklist = ide_in_drive_list(id, drive_blacklist);
1da177e4
LT
224 if (blacklist) {
225 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
4dde4492 226 drive->name, (char *)&id[ATA_ID_PROD]);
1da177e4
LT
227 return blacklist;
228 }
229 return 0;
230}
1da177e4
LT
231EXPORT_SYMBOL(__ide_dma_bad_drive);
232
2d5eaa6d
BZ
233static const u8 xfer_mode_bases[] = {
234 XFER_UDMA_0,
235 XFER_MW_DMA_0,
236 XFER_SW_DMA_0,
237};
238
7670df73 239static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
2d5eaa6d 240{
4dde4492 241 u16 *id = drive->id;
2d5eaa6d 242 ide_hwif_t *hwif = drive->hwif;
ac95beed 243 const struct ide_port_ops *port_ops = hwif->port_ops;
2d5eaa6d
BZ
244 unsigned int mask = 0;
245
db3f99ef 246 switch (base) {
2d5eaa6d 247 case XFER_UDMA_0:
4dde4492 248 if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
2d5eaa6d
BZ
249 break;
250
ac95beed
BZ
251 if (port_ops && port_ops->udma_filter)
252 mask = port_ops->udma_filter(drive);
851dd33b
SS
253 else
254 mask = hwif->ultra_mask;
4dde4492 255 mask &= id[ATA_ID_UDMA_MODES];
2d5eaa6d 256
7670df73
BZ
257 /*
258 * avoid false cable warning from eighty_ninty_three()
259 */
260 if (req_mode > XFER_UDMA_2) {
261 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
262 mask &= 0x07;
263 }
2d5eaa6d
BZ
264 break;
265 case XFER_MW_DMA_0:
4dde4492 266 if ((id[ATA_ID_FIELD_VALID] & 2) == 0)
b4e44369 267 break;
ac95beed
BZ
268 if (port_ops && port_ops->mdma_filter)
269 mask = port_ops->mdma_filter(drive);
b4e44369
SS
270 else
271 mask = hwif->mwdma_mask;
4dde4492 272 mask &= id[ATA_ID_MWDMA_MODES];
2d5eaa6d
BZ
273 break;
274 case XFER_SW_DMA_0:
4dde4492
BZ
275 if (id[ATA_ID_FIELD_VALID] & 2) {
276 mask = id[ATA_ID_SWDMA_MODES] & hwif->swdma_mask;
48fb2688
BZ
277 } else if (id[ATA_ID_OLD_DMA_MODES] >> 8) {
278 u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
15a4f943
BZ
279
280 /*
281 * if the mode is valid convert it to the mask
282 * (the maximum allowed mode is XFER_SW_DMA_2)
283 */
284 if (mode <= 2)
285 mask = ((2 << mode) - 1) & hwif->swdma_mask;
286 }
2d5eaa6d
BZ
287 break;
288 default:
289 BUG();
290 break;
291 }
292
293 return mask;
294}
295
296/**
7670df73 297 * ide_find_dma_mode - compute DMA speed
2d5eaa6d 298 * @drive: IDE device
7670df73
BZ
299 * @req_mode: requested mode
300 *
301 * Checks the drive/host capabilities and finds the speed to use for
302 * the DMA transfer. The speed is then limited by the requested mode.
2d5eaa6d 303 *
7670df73
BZ
304 * Returns 0 if the drive/host combination is incapable of DMA transfers
305 * or if the requested mode is not a DMA mode.
2d5eaa6d
BZ
306 */
307
7670df73 308u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
2d5eaa6d
BZ
309{
310 ide_hwif_t *hwif = drive->hwif;
311 unsigned int mask;
312 int x, i;
313 u8 mode = 0;
314
33c1002e
BZ
315 if (drive->media != ide_disk) {
316 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
317 return 0;
318 }
2d5eaa6d
BZ
319
320 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
7670df73
BZ
321 if (req_mode < xfer_mode_bases[i])
322 continue;
323 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
2d5eaa6d
BZ
324 x = fls(mask) - 1;
325 if (x >= 0) {
326 mode = xfer_mode_bases[i] + x;
327 break;
328 }
329 }
330
75d7d963
BZ
331 if (hwif->chipset == ide_acorn && mode == 0) {
332 /*
333 * is this correct?
334 */
4dde4492
BZ
335 if (ide_dma_good_drive(drive) &&
336 drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
75d7d963
BZ
337 mode = XFER_MW_DMA_1;
338 }
339
3ab7efe8
BZ
340 mode = min(mode, req_mode);
341
342 printk(KERN_INFO "%s: %s mode selected\n", drive->name,
d34887da 343 mode ? ide_xfer_verbose(mode) : "no DMA");
2d5eaa6d 344
3ab7efe8 345 return mode;
2d5eaa6d 346}
7670df73 347EXPORT_SYMBOL_GPL(ide_find_dma_mode);
2d5eaa6d 348
0ae2e178 349static int ide_tune_dma(ide_drive_t *drive)
29e744d0 350{
8704de8f 351 ide_hwif_t *hwif = drive->hwif;
29e744d0
BZ
352 u8 speed;
353
97100fc8
BZ
354 if (ata_id_has_dma(drive->id) == 0 ||
355 (drive->dev_flags & IDE_DFLAG_NODMA))
122ab088
BZ
356 return 0;
357
358 /* consult the list of known "bad" drives */
359 if (__ide_dma_bad_drive(drive))
29e744d0
BZ
360 return 0;
361
3ab7efe8
BZ
362 if (ide_id_dma_bug(drive))
363 return 0;
364
8704de8f 365 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
0ae2e178
BZ
366 return config_drive_for_dma(drive);
367
29e744d0
BZ
368 speed = ide_max_dma_mode(drive);
369
951784b6
BZ
370 if (!speed)
371 return 0;
29e744d0 372
88b2b32b 373 if (ide_set_dma_mode(drive, speed))
4728d546 374 return 0;
29e744d0 375
4728d546 376 return 1;
29e744d0
BZ
377}
378
0ae2e178
BZ
379static int ide_dma_check(ide_drive_t *drive)
380{
381 ide_hwif_t *hwif = drive->hwif;
0ae2e178 382
ba4b2e60 383 if (ide_tune_dma(drive))
0ae2e178
BZ
384 return 0;
385
386 /* TODO: always do PIO fallback */
387 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
388 return -1;
389
390 ide_set_max_pio(drive);
391
ba4b2e60 392 return -1;
0ae2e178
BZ
393}
394
3ab7efe8 395int ide_id_dma_bug(ide_drive_t *drive)
1da177e4 396{
4dde4492 397 u16 *id = drive->id;
1da177e4 398
4dde4492
BZ
399 if (id[ATA_ID_FIELD_VALID] & 4) {
400 if ((id[ATA_ID_UDMA_MODES] >> 8) &&
401 (id[ATA_ID_MWDMA_MODES] >> 8))
3ab7efe8 402 goto err_out;
4dde4492
BZ
403 } else if (id[ATA_ID_FIELD_VALID] & 2) {
404 if ((id[ATA_ID_MWDMA_MODES] >> 8) &&
405 (id[ATA_ID_SWDMA_MODES] >> 8))
3ab7efe8 406 goto err_out;
1da177e4 407 }
3ab7efe8
BZ
408 return 0;
409err_out:
410 printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
411 return 1;
1da177e4
LT
412}
413
3608b5d7
BZ
414int ide_set_dma(ide_drive_t *drive)
415{
3608b5d7
BZ
416 int rc;
417
7b905994
BZ
418 /*
419 * Force DMAing for the beginning of the check.
420 * Some chipsets appear to do interesting
421 * things, if not checked and cleared.
422 * PARANOIA!!!
423 */
4a546e04 424 ide_dma_off_quietly(drive);
3608b5d7 425
7b905994
BZ
426 rc = ide_dma_check(drive);
427 if (rc)
428 return rc;
3608b5d7 429
4a546e04
BZ
430 ide_dma_on(drive);
431
432 return 0;
3608b5d7
BZ
433}
434
578cfa0d
BZ
435void ide_check_dma_crc(ide_drive_t *drive)
436{
437 u8 mode;
438
439 ide_dma_off_quietly(drive);
440 drive->crc_count = 0;
441 mode = drive->current_speed;
442 /*
443 * Don't try non Ultra-DMA modes without iCRC's. Force the
444 * device to PIO and make the user enable SWDMA/MWDMA modes.
445 */
446 if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
447 mode--;
448 else
449 mode = XFER_PIO_4;
450 ide_set_xfer_rate(drive, mode);
451 if (drive->current_speed >= XFER_SW_DMA_0)
452 ide_dma_on(drive);
453}
454
de23ec9c 455void ide_dma_lost_irq(ide_drive_t *drive)
1da177e4 456{
de23ec9c 457 printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
1da177e4 458}
de23ec9c 459EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
1da177e4 460
ffa15a69 461void ide_dma_timeout(ide_drive_t *drive)
1da177e4 462{
db3f99ef 463 ide_hwif_t *hwif = drive->hwif;
c283f5db 464
1da177e4 465 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
1da177e4 466
5e37bdc0 467 if (hwif->dma_ops->dma_test_irq(drive))
c283f5db
SS
468 return;
469
ffa15a69
BZ
470 ide_dump_status(drive, "DMA timeout", hwif->tp_ops->read_status(hwif));
471
5e37bdc0 472 hwif->dma_ops->dma_end(drive);
1da177e4 473}
ffa15a69 474EXPORT_SYMBOL_GPL(ide_dma_timeout);
1da177e4 475
65ca5377
BZ
476/*
477 * un-busy the port etc, and clear any pending DMA status. we want to
478 * retry the current request in pio mode instead of risking tossing it
479 * all away
480 */
481ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
482{
483 ide_hwif_t *hwif = drive->hwif;
484 struct request *rq;
485 ide_startstop_t ret = ide_stopped;
486
487 /*
488 * end current dma transaction
489 */
490
491 if (error < 0) {
492 printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
493 (void)hwif->dma_ops->dma_end(drive);
494 ret = ide_error(drive, "dma timeout error",
495 hwif->tp_ops->read_status(hwif));
496 } else {
497 printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name);
498 hwif->dma_ops->dma_timeout(drive);
499 }
500
501 /*
502 * disable dma for now, but remember that we did so because of
503 * a timeout -- we'll reenable after we finish this next request
504 * (or rather the first chunk of it) in pio.
505 */
506 drive->dev_flags |= IDE_DFLAG_DMA_PIO_RETRY;
507 drive->retry_pio++;
508 ide_dma_off_quietly(drive);
509
510 /*
511 * un-busy drive etc and make sure request is sane
512 */
513
514 rq = hwif->rq;
515 if (!rq)
516 goto out;
517
518 hwif->rq = NULL;
519
520 rq->errors = 0;
521
522 if (!rq->bio)
523 goto out;
524
525 rq->sector = rq->bio->bi_sector;
526 rq->current_nr_sectors = bio_iovec(rq->bio)->bv_len >> 9;
527 rq->hard_cur_sectors = rq->current_nr_sectors;
528 rq->buffer = bio_data(rq->bio);
529out:
530 return ret;
531}
532
0d1bad21 533void ide_release_dma_engine(ide_hwif_t *hwif)
1da177e4
LT
534{
535 if (hwif->dmatable_cpu) {
2bbd57ca 536 int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
36501650 537
2bbd57ca
BZ
538 dma_free_coherent(hwif->dev, prd_size,
539 hwif->dmatable_cpu, hwif->dmatable_dma);
1da177e4
LT
540 hwif->dmatable_cpu = NULL;
541 }
1da177e4 542}
2bbd57ca 543EXPORT_SYMBOL_GPL(ide_release_dma_engine);
1da177e4 544
b8e73fba 545int ide_allocate_dma_engine(ide_hwif_t *hwif)
1da177e4 546{
2bbd57ca 547 int prd_size;
36501650 548
2bbd57ca
BZ
549 if (hwif->prd_max_nents == 0)
550 hwif->prd_max_nents = PRD_ENTRIES;
551 if (hwif->prd_ent_size == 0)
552 hwif->prd_ent_size = PRD_BYTES;
1da177e4 553
2bbd57ca 554 prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
1da177e4 555
2bbd57ca
BZ
556 hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
557 &hwif->dmatable_dma,
558 GFP_ATOMIC);
559 if (hwif->dmatable_cpu == NULL) {
560 printk(KERN_ERR "%s: unable to allocate PRD table\n",
5e59c236 561 hwif->name);
2bbd57ca
BZ
562 return -ENOMEM;
563 }
1da177e4 564
2bbd57ca 565 return 0;
1da177e4 566}
b8e73fba 567EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);
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