[deliverable/linux.git] / drivers / ide / ide-io-std.c


#include <linux/kernel.h>
#include <linux/ide.h>

#if defined(CONFIG_ARM) || defined(CONFIG_M68K) || defined(CONFIG_MIPS) || \
    defined(CONFIG_PARISC) || defined(CONFIG_PPC) || defined(CONFIG_SPARC)
#include <asm/ide.h>
#else
#include <asm-generic/ide_iops.h>
#endif

/*
 *	Conventional PIO operations for ATA devices
 */

static u8 ide_inb(unsigned long port)
{
	return (u8) inb(port);
}

static void ide_outb(u8 val, unsigned long port)
{
	outb(val, port);
}

/*
 *	MMIO operations, typically used for SATA controllers
 */

static u8 ide_mm_inb(unsigned long port)
{
	return (u8) readb((void __iomem *) port);
}

static void ide_mm_outb(u8 value, unsigned long port)
{
	writeb(value, (void __iomem *) port);
}

void ide_exec_command(ide_hwif_t *hwif, u8 cmd)
{
	if (hwif->host_flags & IDE_HFLAG_MMIO)
		writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
	else
		outb(cmd, hwif->io_ports.command_addr);
}
EXPORT_SYMBOL_GPL(ide_exec_command);

u8 ide_read_status(ide_hwif_t *hwif)
{
	if (hwif->host_flags & IDE_HFLAG_MMIO)
		return readb((void __iomem *)hwif->io_ports.status_addr);
	else
		return inb(hwif->io_ports.status_addr);
}
EXPORT_SYMBOL_GPL(ide_read_status);

u8 ide_read_altstatus(ide_hwif_t *hwif)
{
	if (hwif->host_flags & IDE_HFLAG_MMIO)
		return readb((void __iomem *)hwif->io_ports.ctl_addr);
	else
		return inb(hwif->io_ports.ctl_addr);
}
EXPORT_SYMBOL_GPL(ide_read_altstatus);

void ide_write_devctl(ide_hwif_t *hwif, u8 ctl)
{
	if (hwif->host_flags & IDE_HFLAG_MMIO)
		writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
	else
		outb(ctl, hwif->io_ports.ctl_addr);
}
EXPORT_SYMBOL_GPL(ide_write_devctl);

void ide_tf_load(ide_drive_t *drive, struct ide_cmd *cmd)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	struct ide_taskfile *tf = &cmd->tf;
	void (*tf_outb)(u8 addr, unsigned long port);
	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
	u8 HIHI = (cmd->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;

	if (mmio)
		tf_outb = ide_mm_outb;
	else
		tf_outb = ide_outb;

	if (cmd->ftf_flags & IDE_FTFLAG_FLAGGED)
		HIHI = 0xFF;

	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
		tf_outb(tf->hob_feature, io_ports->feature_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
		tf_outb(tf->hob_nsect, io_ports->nsect_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
		tf_outb(tf->hob_lbal, io_ports->lbal_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
		tf_outb(tf->hob_lbam, io_ports->lbam_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
		tf_outb(tf->hob_lbah, io_ports->lbah_addr);

	if (cmd->tf_flags & IDE_TFLAG_OUT_FEATURE)
		tf_outb(tf->feature, io_ports->feature_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_NSECT)
		tf_outb(tf->nsect, io_ports->nsect_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAL)
		tf_outb(tf->lbal, io_ports->lbal_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAM)
		tf_outb(tf->lbam, io_ports->lbam_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAH)
		tf_outb(tf->lbah, io_ports->lbah_addr);

	if (cmd->tf_flags & IDE_TFLAG_OUT_DEVICE)
		tf_outb((tf->device & HIHI) | drive->select,
			 io_ports->device_addr);
}
EXPORT_SYMBOL_GPL(ide_tf_load);

void ide_tf_read(ide_drive_t *drive, struct ide_cmd *cmd)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	struct ide_taskfile *tf = &cmd->tf;
	void (*tf_outb)(u8 addr, unsigned long port);
	u8 (*tf_inb)(unsigned long port);
	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;

	if (mmio) {
		tf_outb = ide_mm_outb;
		tf_inb  = ide_mm_inb;
	} else {
		tf_outb = ide_outb;
		tf_inb  = ide_inb;
	}

	/* be sure we're looking at the low order bits */
	tf_outb(ATA_DEVCTL_OBS, io_ports->ctl_addr);

	if (cmd->tf_flags & IDE_TFLAG_IN_ERROR)
		tf->error  = tf_inb(io_ports->feature_addr);
	if (cmd->tf_flags & IDE_TFLAG_IN_NSECT)
		tf->nsect  = tf_inb(io_ports->nsect_addr);
	if (cmd->tf_flags & IDE_TFLAG_IN_LBAL)
		tf->lbal   = tf_inb(io_ports->lbal_addr);
	if (cmd->tf_flags & IDE_TFLAG_IN_LBAM)
		tf->lbam   = tf_inb(io_ports->lbam_addr);
	if (cmd->tf_flags & IDE_TFLAG_IN_LBAH)
		tf->lbah   = tf_inb(io_ports->lbah_addr);
	if (cmd->tf_flags & IDE_TFLAG_IN_DEVICE)
		tf->device = tf_inb(io_ports->device_addr);

	if (cmd->tf_flags & IDE_TFLAG_LBA48) {
		tf_outb(ATA_HOB | ATA_DEVCTL_OBS, io_ports->ctl_addr);

		if (cmd->tf_flags & IDE_TFLAG_IN_HOB_ERROR)
			tf->hob_error = tf_inb(io_ports->feature_addr);
		if (cmd->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
			tf->hob_nsect = tf_inb(io_ports->nsect_addr);
		if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
			tf->hob_lbal  = tf_inb(io_ports->lbal_addr);
		if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
			tf->hob_lbam  = tf_inb(io_ports->lbam_addr);
		if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
			tf->hob_lbah  = tf_inb(io_ports->lbah_addr);
	}
}
EXPORT_SYMBOL_GPL(ide_tf_read);

/*
 * Some localbus EIDE interfaces require a special access sequence
 * when using 32-bit I/O instructions to transfer data.  We call this
 * the "vlb_sync" sequence, which consists of three successive reads
 * of the sector count register location, with interrupts disabled
 * to ensure that the reads all happen together.
 */
static void ata_vlb_sync(unsigned long port)
{
	(void)inb(port);
	(void)inb(port);
	(void)inb(port);
}

/*
 * This is used for most PIO data transfers *from* the IDE interface
 *
 * These routines will round up any request for an odd number of bytes,
 * so if an odd len is specified, be sure that there's at least one
 * extra byte allocated for the buffer.
 */
void ide_input_data(ide_drive_t *drive, struct ide_cmd *cmd, void *buf,
		    unsigned int len)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	unsigned long data_addr = io_ports->data_addr;
	unsigned int words = (len + 1) >> 1;
	u8 io_32bit = drive->io_32bit;
	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;

	if (io_32bit) {
		unsigned long uninitialized_var(flags);

		if ((io_32bit & 2) && !mmio) {
			local_irq_save(flags);
			ata_vlb_sync(io_ports->nsect_addr);
		}

		words >>= 1;
		if (mmio)
			__ide_mm_insl((void __iomem *)data_addr, buf, words);
		else
			insl(data_addr, buf, words);

		if ((io_32bit & 2) && !mmio)
			local_irq_restore(flags);

		if (((len + 1) & 3) < 2)
			return;

		buf += len & ~3;
		words = 1;
	}

	if (mmio)
		__ide_mm_insw((void __iomem *)data_addr, buf, words);
	else
		insw(data_addr, buf, words);
}
EXPORT_SYMBOL_GPL(ide_input_data);

/*
 * This is used for most PIO data transfers *to* the IDE interface
 */
void ide_output_data(ide_drive_t *drive, struct ide_cmd *cmd, void *buf,
		     unsigned int len)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	unsigned long data_addr = io_ports->data_addr;
	unsigned int words = (len + 1) >> 1;
	u8 io_32bit = drive->io_32bit;
	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;

	if (io_32bit) {
		unsigned long uninitialized_var(flags);

		if ((io_32bit & 2) && !mmio) {
			local_irq_save(flags);
			ata_vlb_sync(io_ports->nsect_addr);
		}

		words >>= 1;
		if (mmio)
			__ide_mm_outsl((void __iomem *)data_addr, buf, words);
		else
			outsl(data_addr, buf, words);

		if ((io_32bit & 2) && !mmio)
			local_irq_restore(flags);

		if (((len + 1) & 3) < 2)
			return;

		buf += len & ~3;
		words = 1;
	}

	if (mmio)
		__ide_mm_outsw((void __iomem *)data_addr, buf, words);
	else
		outsw(data_addr, buf, words);
}
EXPORT_SYMBOL_GPL(ide_output_data);

const struct ide_tp_ops default_tp_ops = {
	.exec_command		= ide_exec_command,
	.read_status		= ide_read_status,
	.read_altstatus		= ide_read_altstatus,
	.write_devctl		= ide_write_devctl,

	.tf_load		= ide_tf_load,
	.tf_read		= ide_tf_read,

	.input_data		= ide_input_data,
	.output_data		= ide_output_data,
};
Commit	Line	Data
1574cf6c BZ	1
	2	#include <linux/kernel.h>
	3	#include <linux/ide.h>
	4
15a453a9 BZ	5	#if defined(CONFIG_ARM) \|\| defined(CONFIG_M68K) \|\| defined(CONFIG_MIPS) \|\| \
	6	defined(CONFIG_PARISC) \|\| defined(CONFIG_PPC) \|\| defined(CONFIG_SPARC)
	7	#include <asm/ide.h>
	8	#else
	9	#include <asm-generic/ide_iops.h>
	10	#endif
	11
1574cf6c BZ	12	/*
	13	* Conventional PIO operations for ATA devices
	14	*/
	15
	16	static u8 ide_inb(unsigned long port)
	17	{
	18	return (u8) inb(port);
	19	}
	20
	21	static void ide_outb(u8 val, unsigned long port)
	22	{
	23	outb(val, port);
	24	}
	25
	26	/*
	27	* MMIO operations, typically used for SATA controllers
	28	*/
	29
	30	static u8 ide_mm_inb(unsigned long port)
	31	{
	32	return (u8) readb((void __iomem *) port);
	33	}
	34
	35	static void ide_mm_outb(u8 value, unsigned long port)
	36	{
	37	writeb(value, (void __iomem *) port);
	38	}
	39
	40	void ide_exec_command(ide_hwif_t *hwif, u8 cmd)
	41	{
	42	if (hwif->host_flags & IDE_HFLAG_MMIO)
	43	writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
	44	else
	45	outb(cmd, hwif->io_ports.command_addr);
	46	}
	47	EXPORT_SYMBOL_GPL(ide_exec_command);
	48
	49	u8 ide_read_status(ide_hwif_t *hwif)
	50	{
	51	if (hwif->host_flags & IDE_HFLAG_MMIO)
	52	return readb((void __iomem *)hwif->io_ports.status_addr);
	53	else
	54	return inb(hwif->io_ports.status_addr);
	55	}
	56	EXPORT_SYMBOL_GPL(ide_read_status);
	57
	58	u8 ide_read_altstatus(ide_hwif_t *hwif)
	59	{
	60	if (hwif->host_flags & IDE_HFLAG_MMIO)
	61	return readb((void __iomem *)hwif->io_ports.ctl_addr);
	62	else
	63	return inb(hwif->io_ports.ctl_addr);
	64	}
	65	EXPORT_SYMBOL_GPL(ide_read_altstatus);
	66
ecf3a31d	67	void ide_write_devctl(ide_hwif_t *hwif, u8 ctl)
1574cf6c	68	{
1574cf6c BZ	69	if (hwif->host_flags & IDE_HFLAG_MMIO)
	70	writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
	71	else
	72	outb(ctl, hwif->io_ports.ctl_addr);
	73	}
ecf3a31d	74	EXPORT_SYMBOL_GPL(ide_write_devctl);
1574cf6c	75
22aa4b32	76	void ide_tf_load(ide_drive_t drive, struct ide_cmd cmd)
1574cf6c BZ	77	{
	78	ide_hwif_t *hwif = drive->hwif;
	79	struct ide_io_ports *io_ports = &hwif->io_ports;
22aa4b32	80	struct ide_taskfile *tf = &cmd->tf;
1574cf6c BZ	81	void (*tf_outb)(u8 addr, unsigned long port);
1574cf6c BZ	82	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
22aa4b32	83	u8 HIHI = (cmd->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
1574cf6c BZ	84
	85	if (mmio)
	86	tf_outb = ide_mm_outb;
	87	else
	88	tf_outb = ide_outb;
	89
22aa4b32	90	if (cmd->ftf_flags & IDE_FTFLAG_FLAGGED)
1574cf6c BZ	91	HIHI = 0xFF;
1574cf6c BZ	92
22aa4b32	93	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
1574cf6c	94	tf_outb(tf->hob_feature, io_ports->feature_addr);
22aa4b32	95	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
1574cf6c	96	tf_outb(tf->hob_nsect, io_ports->nsect_addr);
22aa4b32	97	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
1574cf6c	98	tf_outb(tf->hob_lbal, io_ports->lbal_addr);
22aa4b32	99	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
1574cf6c	100	tf_outb(tf->hob_lbam, io_ports->lbam_addr);
22aa4b32	101	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
1574cf6c BZ	102	tf_outb(tf->hob_lbah, io_ports->lbah_addr);
1574cf6c BZ	103
22aa4b32	104	if (cmd->tf_flags & IDE_TFLAG_OUT_FEATURE)
1574cf6c	105	tf_outb(tf->feature, io_ports->feature_addr);
22aa4b32	106	if (cmd->tf_flags & IDE_TFLAG_OUT_NSECT)
1574cf6c	107	tf_outb(tf->nsect, io_ports->nsect_addr);
22aa4b32	108	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAL)
1574cf6c	109	tf_outb(tf->lbal, io_ports->lbal_addr);
22aa4b32	110	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAM)
1574cf6c	111	tf_outb(tf->lbam, io_ports->lbam_addr);
22aa4b32	112	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAH)
1574cf6c BZ	113	tf_outb(tf->lbah, io_ports->lbah_addr);
1574cf6c BZ	114
22aa4b32	115	if (cmd->tf_flags & IDE_TFLAG_OUT_DEVICE)
1574cf6c BZ	116	tf_outb((tf->device & HIHI) \| drive->select,
	117	io_ports->device_addr);
	118	}
	119	EXPORT_SYMBOL_GPL(ide_tf_load);
	120
22aa4b32	121	void ide_tf_read(ide_drive_t drive, struct ide_cmd cmd)
1574cf6c BZ	122	{
	123	ide_hwif_t *hwif = drive->hwif;
	124	struct ide_io_ports *io_ports = &hwif->io_ports;
22aa4b32	125	struct ide_taskfile *tf = &cmd->tf;
1574cf6c BZ	126	void (*tf_outb)(u8 addr, unsigned long port);
	127	u8 (*tf_inb)(unsigned long port);
	128	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
	129
	130	if (mmio) {
	131	tf_outb = ide_mm_outb;
	132	tf_inb = ide_mm_inb;
	133	} else {
	134	tf_outb = ide_outb;
	135	tf_inb = ide_inb;
	136	}
	137
1574cf6c	138	/* be sure we're looking at the low order bits */
4d74c3fc	139	tf_outb(ATA_DEVCTL_OBS, io_ports->ctl_addr);
1574cf6c	140
67625119 SS	141	if (cmd->tf_flags & IDE_TFLAG_IN_ERROR)
67625119 SS	142	tf->error = tf_inb(io_ports->feature_addr);
22aa4b32	143	if (cmd->tf_flags & IDE_TFLAG_IN_NSECT)
1574cf6c	144	tf->nsect = tf_inb(io_ports->nsect_addr);
22aa4b32	145	if (cmd->tf_flags & IDE_TFLAG_IN_LBAL)
1574cf6c	146	tf->lbal = tf_inb(io_ports->lbal_addr);
22aa4b32	147	if (cmd->tf_flags & IDE_TFLAG_IN_LBAM)
1574cf6c	148	tf->lbam = tf_inb(io_ports->lbam_addr);
22aa4b32	149	if (cmd->tf_flags & IDE_TFLAG_IN_LBAH)
1574cf6c	150	tf->lbah = tf_inb(io_ports->lbah_addr);
22aa4b32	151	if (cmd->tf_flags & IDE_TFLAG_IN_DEVICE)
1574cf6c BZ	152	tf->device = tf_inb(io_ports->device_addr);
1574cf6c BZ	153
22aa4b32	154	if (cmd->tf_flags & IDE_TFLAG_LBA48) {
4d74c3fc	155	tf_outb(ATA_HOB \| ATA_DEVCTL_OBS, io_ports->ctl_addr);
1574cf6c	156
67625119 SS	157	if (cmd->tf_flags & IDE_TFLAG_IN_HOB_ERROR)
67625119 SS	158	tf->hob_error = tf_inb(io_ports->feature_addr);
22aa4b32	159	if (cmd->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
67625119	160	tf->hob_nsect = tf_inb(io_ports->nsect_addr);
22aa4b32	161	if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
67625119	162	tf->hob_lbal = tf_inb(io_ports->lbal_addr);
22aa4b32	163	if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
67625119	164	tf->hob_lbam = tf_inb(io_ports->lbam_addr);
22aa4b32	165	if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
67625119	166	tf->hob_lbah = tf_inb(io_ports->lbah_addr);
1574cf6c BZ	167	}
	168	}
	169	EXPORT_SYMBOL_GPL(ide_tf_read);
	170
	171	/*
	172	* Some localbus EIDE interfaces require a special access sequence
	173	* when using 32-bit I/O instructions to transfer data. We call this
	174	* the "vlb_sync" sequence, which consists of three successive reads
	175	* of the sector count register location, with interrupts disabled
	176	* to ensure that the reads all happen together.
	177	*/
	178	static void ata_vlb_sync(unsigned long port)
	179	{
	180	(void)inb(port);
	181	(void)inb(port);
	182	(void)inb(port);
	183	}
	184
	185	/*
	186	* This is used for most PIO data transfers from the IDE interface
	187	*
	188	* These routines will round up any request for an odd number of bytes,
	189	* so if an odd len is specified, be sure that there's at least one
	190	* extra byte allocated for the buffer.
	191	*/
adb1af98	192	void ide_input_data(ide_drive_t drive, struct ide_cmd cmd, void *buf,
1574cf6c BZ	193	unsigned int len)
	194	{
	195	ide_hwif_t *hwif = drive->hwif;
	196	struct ide_io_ports *io_ports = &hwif->io_ports;
	197	unsigned long data_addr = io_ports->data_addr;
deae17fd	198	unsigned int words = (len + 1) >> 1;
1574cf6c BZ	199	u8 io_32bit = drive->io_32bit;
	200	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
	201
1574cf6c BZ	202	if (io_32bit) {
	203	unsigned long uninitialized_var(flags);
	204
	205	if ((io_32bit & 2) && !mmio) {
	206	local_irq_save(flags);
	207	ata_vlb_sync(io_ports->nsect_addr);
	208	}
	209
deae17fd	210	words >>= 1;
1574cf6c	211	if (mmio)
deae17fd	212	__ide_mm_insl((void __iomem *)data_addr, buf, words);
1574cf6c	213	else
deae17fd	214	insl(data_addr, buf, words);
1574cf6c BZ	215
	216	if ((io_32bit & 2) && !mmio)
	217	local_irq_restore(flags);
	218
deae17fd SS	219	if (((len + 1) & 3) < 2)
	220	return;
	221
	222	buf += len & ~3;
	223	words = 1;
1574cf6c	224	}
deae17fd SS	225
	226	if (mmio)
	227	__ide_mm_insw((void __iomem *)data_addr, buf, words);
	228	else
	229	insw(data_addr, buf, words);
1574cf6c BZ	230	}
	231	EXPORT_SYMBOL_GPL(ide_input_data);
	232
	233	/*
	234	* This is used for most PIO data transfers to the IDE interface
	235	*/
adb1af98	236	void ide_output_data(ide_drive_t drive, struct ide_cmd cmd, void *buf,
1574cf6c BZ	237	unsigned int len)
	238	{
	239	ide_hwif_t *hwif = drive->hwif;
	240	struct ide_io_ports *io_ports = &hwif->io_ports;
	241	unsigned long data_addr = io_ports->data_addr;
deae17fd	242	unsigned int words = (len + 1) >> 1;
1574cf6c BZ	243	u8 io_32bit = drive->io_32bit;
	244	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
	245
1574cf6c BZ	246	if (io_32bit) {
	247	unsigned long uninitialized_var(flags);
	248
	249	if ((io_32bit & 2) && !mmio) {
	250	local_irq_save(flags);
	251	ata_vlb_sync(io_ports->nsect_addr);
	252	}
	253
deae17fd	254	words >>= 1;
1574cf6c	255	if (mmio)
deae17fd	256	__ide_mm_outsl((void __iomem *)data_addr, buf, words);
1574cf6c	257	else
deae17fd	258	outsl(data_addr, buf, words);
1574cf6c BZ	259
	260	if ((io_32bit & 2) && !mmio)
	261	local_irq_restore(flags);
	262
deae17fd SS	263	if (((len + 1) & 3) < 2)
	264	return;
	265
	266	buf += len & ~3;
	267	words = 1;
1574cf6c	268	}
deae17fd SS	269
	270	if (mmio)
	271	__ide_mm_outsw((void __iomem *)data_addr, buf, words);
	272	else
	273	outsw(data_addr, buf, words);
1574cf6c BZ	274	}
	275	EXPORT_SYMBOL_GPL(ide_output_data);
	276
	277	const struct ide_tp_ops default_tp_ops = {
	278	.exec_command = ide_exec_command,
	279	.read_status = ide_read_status,
	280	.read_altstatus = ide_read_altstatus,
ecf3a31d	281	.write_devctl = ide_write_devctl,
1574cf6c BZ	282
	283	.tf_load = ide_tf_load,
	284	.tf_read = ide_tf_read,
	285
	286	.input_data = ide_input_data,
	287	.output_data = ide_output_data,
	288	};