[deliverable/linux.git] / drivers / ide / ide-io-std.c


#include <linux/kernel.h>
#include <linux/ide.h>

#if defined(CONFIG_ARM) || defined(CONFIG_M68K) || defined(CONFIG_MIPS) || \
    defined(CONFIG_PARISC) || defined(CONFIG_PPC) || defined(CONFIG_SPARC)
#include <asm/ide.h>
#else
#include <asm-generic/ide_iops.h>
#endif

/*
 *	Conventional PIO operations for ATA devices
 */

static u8 ide_inb(unsigned long port)
{
	return (u8) inb(port);
}

static void ide_outb(u8 val, unsigned long port)
{
	outb(val, port);
}

/*
 *	MMIO operations, typically used for SATA controllers
 */

static u8 ide_mm_inb(unsigned long port)
{
	return (u8) readb((void __iomem *) port);
}

static void ide_mm_outb(u8 value, unsigned long port)
{
	writeb(value, (void __iomem *) port);
}

void ide_exec_command(ide_hwif_t *hwif, u8 cmd)
{
	if (hwif->host_flags & IDE_HFLAG_MMIO)
		writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
	else
		outb(cmd, hwif->io_ports.command_addr);
}
EXPORT_SYMBOL_GPL(ide_exec_command);

u8 ide_read_status(ide_hwif_t *hwif)
{
	if (hwif->host_flags & IDE_HFLAG_MMIO)
		return readb((void __iomem *)hwif->io_ports.status_addr);
	else
		return inb(hwif->io_ports.status_addr);
}
EXPORT_SYMBOL_GPL(ide_read_status);

u8 ide_read_altstatus(ide_hwif_t *hwif)
{
	if (hwif->host_flags & IDE_HFLAG_MMIO)
		return readb((void __iomem *)hwif->io_ports.ctl_addr);
	else
		return inb(hwif->io_ports.ctl_addr);
}
EXPORT_SYMBOL_GPL(ide_read_altstatus);

void ide_write_devctl(ide_hwif_t *hwif, u8 ctl)
{
	if (hwif->host_flags & IDE_HFLAG_MMIO)
		writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
	else
		outb(ctl, hwif->io_ports.ctl_addr);
}
EXPORT_SYMBOL_GPL(ide_write_devctl);

void ide_dev_select(ide_drive_t *drive)
{
	ide_hwif_t *hwif = drive->hwif;
	u8 select = drive->select | ATA_DEVICE_OBS;

	if (hwif->host_flags & IDE_HFLAG_MMIO)
		writeb(select, (void __iomem *)hwif->io_ports.device_addr);
	else
		outb(select, hwif->io_ports.device_addr);
}
EXPORT_SYMBOL_GPL(ide_dev_select);

void ide_tf_load(ide_drive_t *drive, struct ide_taskfile *tf, u8 valid)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	void (*tf_outb)(u8 addr, unsigned long port);
	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;

	if (mmio)
		tf_outb = ide_mm_outb;
	else
		tf_outb = ide_outb;

	if (valid & IDE_VALID_FEATURE)
		tf_outb(tf->feature, io_ports->feature_addr);
	if (valid & IDE_VALID_NSECT)
		tf_outb(tf->nsect, io_ports->nsect_addr);
	if (valid & IDE_VALID_LBAL)
		tf_outb(tf->lbal, io_ports->lbal_addr);
	if (valid & IDE_VALID_LBAM)
		tf_outb(tf->lbam, io_ports->lbam_addr);
	if (valid & IDE_VALID_LBAH)
		tf_outb(tf->lbah, io_ports->lbah_addr);
	if (valid & IDE_VALID_DEVICE)
		tf_outb(tf->device, io_ports->device_addr);
}
EXPORT_SYMBOL_GPL(ide_tf_load);

void ide_tf_read(ide_drive_t *drive, struct ide_cmd *cmd)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	struct ide_taskfile *tf = &cmd->tf;
	u8 (*tf_inb)(unsigned long port);
	u8 valid = cmd->valid.in.tf;
	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;

	if (mmio)
		tf_inb  = ide_mm_inb;
	else
		tf_inb  = ide_inb;

	/* be sure we're looking at the low order bits */
	hwif->tp_ops->write_devctl(hwif, ATA_DEVCTL_OBS);

	if (valid & IDE_VALID_ERROR)
		tf->error  = tf_inb(io_ports->feature_addr);
	if (valid & IDE_VALID_NSECT)
		tf->nsect  = tf_inb(io_ports->nsect_addr);
	if (valid & IDE_VALID_LBAL)
		tf->lbal   = tf_inb(io_ports->lbal_addr);
	if (valid & IDE_VALID_LBAM)
		tf->lbam   = tf_inb(io_ports->lbam_addr);
	if (valid & IDE_VALID_LBAH)
		tf->lbah   = tf_inb(io_ports->lbah_addr);
	if (valid & IDE_VALID_DEVICE)
		tf->device = tf_inb(io_ports->device_addr);

	if (cmd->tf_flags & IDE_TFLAG_LBA48) {
		hwif->tp_ops->write_devctl(hwif, ATA_HOB | ATA_DEVCTL_OBS);

		tf = &cmd->hob;
		valid = cmd->valid.in.hob;

		if (valid & IDE_VALID_ERROR)
			tf->error = tf_inb(io_ports->feature_addr);
		if (valid & IDE_VALID_NSECT)
			tf->nsect = tf_inb(io_ports->nsect_addr);
		if (valid & IDE_VALID_LBAL)
			tf->lbal  = tf_inb(io_ports->lbal_addr);
		if (valid & IDE_VALID_LBAM)
			tf->lbam  = tf_inb(io_ports->lbam_addr);
		if (valid & IDE_VALID_LBAH)
			tf->lbah  = tf_inb(io_ports->lbah_addr);
	}
}
EXPORT_SYMBOL_GPL(ide_tf_read);

/*
 * Some localbus EIDE interfaces require a special access sequence
 * when using 32-bit I/O instructions to transfer data.  We call this
 * the "vlb_sync" sequence, which consists of three successive reads
 * of the sector count register location, with interrupts disabled
 * to ensure that the reads all happen together.
 */
static void ata_vlb_sync(unsigned long port)
{
	(void)inb(port);
	(void)inb(port);
	(void)inb(port);
}

/*
 * This is used for most PIO data transfers *from* the IDE interface
 *
 * These routines will round up any request for an odd number of bytes,
 * so if an odd len is specified, be sure that there's at least one
 * extra byte allocated for the buffer.
 */
void ide_input_data(ide_drive_t *drive, struct ide_cmd *cmd, void *buf,
		    unsigned int len)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	unsigned long data_addr = io_ports->data_addr;
	unsigned int words = (len + 1) >> 1;
	u8 io_32bit = drive->io_32bit;
	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;

	if (io_32bit) {
		unsigned long uninitialized_var(flags);

		if ((io_32bit & 2) && !mmio) {
			local_irq_save(flags);
			ata_vlb_sync(io_ports->nsect_addr);
		}

		words >>= 1;
		if (mmio)
			__ide_mm_insl((void __iomem *)data_addr, buf, words);
		else
			insl(data_addr, buf, words);

		if ((io_32bit & 2) && !mmio)
			local_irq_restore(flags);

		if (((len + 1) & 3) < 2)
			return;

		buf += len & ~3;
		words = 1;
	}

	if (mmio)
		__ide_mm_insw((void __iomem *)data_addr, buf, words);
	else
		insw(data_addr, buf, words);
}
EXPORT_SYMBOL_GPL(ide_input_data);

/*
 * This is used for most PIO data transfers *to* the IDE interface
 */
void ide_output_data(ide_drive_t *drive, struct ide_cmd *cmd, void *buf,
		     unsigned int len)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	unsigned long data_addr = io_ports->data_addr;
	unsigned int words = (len + 1) >> 1;
	u8 io_32bit = drive->io_32bit;
	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;

	if (io_32bit) {
		unsigned long uninitialized_var(flags);

		if ((io_32bit & 2) && !mmio) {
			local_irq_save(flags);
			ata_vlb_sync(io_ports->nsect_addr);
		}

		words >>= 1;
		if (mmio)
			__ide_mm_outsl((void __iomem *)data_addr, buf, words);
		else
			outsl(data_addr, buf, words);

		if ((io_32bit & 2) && !mmio)
			local_irq_restore(flags);

		if (((len + 1) & 3) < 2)
			return;

		buf += len & ~3;
		words = 1;
	}

	if (mmio)
		__ide_mm_outsw((void __iomem *)data_addr, buf, words);
	else
		outsw(data_addr, buf, words);
}
EXPORT_SYMBOL_GPL(ide_output_data);

const struct ide_tp_ops default_tp_ops = {
	.exec_command		= ide_exec_command,
	.read_status		= ide_read_status,
	.read_altstatus		= ide_read_altstatus,
	.write_devctl		= ide_write_devctl,

	.dev_select		= ide_dev_select,
	.tf_load		= ide_tf_load,
	.tf_read		= ide_tf_read,

	.input_data		= ide_input_data,
	.output_data		= ide_output_data,
};
Commit	Line	Data
1574cf6c BZ	1
	2	#include <linux/kernel.h>
	3	#include <linux/ide.h>
	4
15a453a9 BZ	5	#if defined(CONFIG_ARM) \|\| defined(CONFIG_M68K) \|\| defined(CONFIG_MIPS) \|\| \
	6	defined(CONFIG_PARISC) \|\| defined(CONFIG_PPC) \|\| defined(CONFIG_SPARC)
	7	#include <asm/ide.h>
	8	#else
	9	#include <asm-generic/ide_iops.h>
	10	#endif
	11
1574cf6c BZ	12	/*
	13	* Conventional PIO operations for ATA devices
	14	*/
	15
	16	static u8 ide_inb(unsigned long port)
	17	{
	18	return (u8) inb(port);
	19	}
	20
	21	static void ide_outb(u8 val, unsigned long port)
	22	{
	23	outb(val, port);
	24	}
	25
	26	/*
	27	* MMIO operations, typically used for SATA controllers
	28	*/
	29
	30	static u8 ide_mm_inb(unsigned long port)
	31	{
	32	return (u8) readb((void __iomem *) port);
	33	}
	34
	35	static void ide_mm_outb(u8 value, unsigned long port)
	36	{
	37	writeb(value, (void __iomem *) port);
	38	}
	39
	40	void ide_exec_command(ide_hwif_t *hwif, u8 cmd)
	41	{
	42	if (hwif->host_flags & IDE_HFLAG_MMIO)
	43	writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
	44	else
	45	outb(cmd, hwif->io_ports.command_addr);
	46	}
	47	EXPORT_SYMBOL_GPL(ide_exec_command);
	48
	49	u8 ide_read_status(ide_hwif_t *hwif)
	50	{
	51	if (hwif->host_flags & IDE_HFLAG_MMIO)
	52	return readb((void __iomem *)hwif->io_ports.status_addr);
	53	else
	54	return inb(hwif->io_ports.status_addr);
	55	}
	56	EXPORT_SYMBOL_GPL(ide_read_status);
	57
	58	u8 ide_read_altstatus(ide_hwif_t *hwif)
	59	{
	60	if (hwif->host_flags & IDE_HFLAG_MMIO)
	61	return readb((void __iomem *)hwif->io_ports.ctl_addr);
	62	else
	63	return inb(hwif->io_ports.ctl_addr);
	64	}
	65	EXPORT_SYMBOL_GPL(ide_read_altstatus);
	66
ecf3a31d	67	void ide_write_devctl(ide_hwif_t *hwif, u8 ctl)
1574cf6c	68	{
1574cf6c BZ	69	if (hwif->host_flags & IDE_HFLAG_MMIO)
	70	writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
	71	else
	72	outb(ctl, hwif->io_ports.ctl_addr);
	73	}
ecf3a31d	74	EXPORT_SYMBOL_GPL(ide_write_devctl);
1574cf6c	75
abb596b2 SS	76	void ide_dev_select(ide_drive_t *drive)
	77	{
	78	ide_hwif_t *hwif = drive->hwif;
	79	u8 select = drive->select \| ATA_DEVICE_OBS;
	80
	81	if (hwif->host_flags & IDE_HFLAG_MMIO)
	82	writeb(select, (void __iomem *)hwif->io_ports.device_addr);
	83	else
	84	outb(select, hwif->io_ports.device_addr);
	85	}
	86	EXPORT_SYMBOL_GPL(ide_dev_select);
	87
c9ff9e7b	88	void ide_tf_load(ide_drive_t drive, struct ide_taskfile tf, u8 valid)
1574cf6c BZ	89	{
	90	ide_hwif_t *hwif = drive->hwif;
	91	struct ide_io_ports *io_ports = &hwif->io_ports;
1574cf6c BZ	92	void (*tf_outb)(u8 addr, unsigned long port);
1574cf6c BZ	93	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
1574cf6c BZ	94
	95	if (mmio)
	96	tf_outb = ide_mm_outb;
	97	else
	98	tf_outb = ide_outb;
	99
60f85019	100	if (valid & IDE_VALID_FEATURE)
1574cf6c	101	tf_outb(tf->feature, io_ports->feature_addr);
60f85019	102	if (valid & IDE_VALID_NSECT)
1574cf6c	103	tf_outb(tf->nsect, io_ports->nsect_addr);
60f85019	104	if (valid & IDE_VALID_LBAL)
1574cf6c	105	tf_outb(tf->lbal, io_ports->lbal_addr);
60f85019	106	if (valid & IDE_VALID_LBAM)
1574cf6c	107	tf_outb(tf->lbam, io_ports->lbam_addr);
60f85019	108	if (valid & IDE_VALID_LBAH)
1574cf6c	109	tf_outb(tf->lbah, io_ports->lbah_addr);
60f85019	110	if (valid & IDE_VALID_DEVICE)
4109d19a	111	tf_outb(tf->device, io_ports->device_addr);
1574cf6c BZ	112	}
	113	EXPORT_SYMBOL_GPL(ide_tf_load);
	114
22aa4b32	115	void ide_tf_read(ide_drive_t drive, struct ide_cmd cmd)
1574cf6c BZ	116	{
	117	ide_hwif_t *hwif = drive->hwif;
	118	struct ide_io_ports *io_ports = &hwif->io_ports;
22aa4b32	119	struct ide_taskfile *tf = &cmd->tf;
1574cf6c	120	u8 (*tf_inb)(unsigned long port);
60f85019	121	u8 valid = cmd->valid.in.tf;
1574cf6c BZ	122	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
1574cf6c BZ	123
30881b9a	124	if (mmio)
1574cf6c	125	tf_inb = ide_mm_inb;
30881b9a	126	else
1574cf6c	127	tf_inb = ide_inb;
1574cf6c	128
1574cf6c	129	/* be sure we're looking at the low order bits */
30881b9a	130	hwif->tp_ops->write_devctl(hwif, ATA_DEVCTL_OBS);
1574cf6c	131
60f85019	132	if (valid & IDE_VALID_ERROR)
67625119	133	tf->error = tf_inb(io_ports->feature_addr);
60f85019	134	if (valid & IDE_VALID_NSECT)
1574cf6c	135	tf->nsect = tf_inb(io_ports->nsect_addr);
60f85019	136	if (valid & IDE_VALID_LBAL)
1574cf6c	137	tf->lbal = tf_inb(io_ports->lbal_addr);
60f85019	138	if (valid & IDE_VALID_LBAM)
1574cf6c	139	tf->lbam = tf_inb(io_ports->lbam_addr);
60f85019	140	if (valid & IDE_VALID_LBAH)
1574cf6c	141	tf->lbah = tf_inb(io_ports->lbah_addr);
60f85019	142	if (valid & IDE_VALID_DEVICE)
1574cf6c BZ	143	tf->device = tf_inb(io_ports->device_addr);
1574cf6c BZ	144
22aa4b32	145	if (cmd->tf_flags & IDE_TFLAG_LBA48) {
30881b9a	146	hwif->tp_ops->write_devctl(hwif, ATA_HOB \| ATA_DEVCTL_OBS);
1574cf6c	147
745483f1	148	tf = &cmd->hob;
60f85019 SS	149	valid = cmd->valid.in.hob;
	150
	151	if (valid & IDE_VALID_ERROR)
745483f1	152	tf->error = tf_inb(io_ports->feature_addr);
60f85019	153	if (valid & IDE_VALID_NSECT)
745483f1	154	tf->nsect = tf_inb(io_ports->nsect_addr);
60f85019	155	if (valid & IDE_VALID_LBAL)
745483f1	156	tf->lbal = tf_inb(io_ports->lbal_addr);
60f85019	157	if (valid & IDE_VALID_LBAM)
745483f1	158	tf->lbam = tf_inb(io_ports->lbam_addr);
60f85019	159	if (valid & IDE_VALID_LBAH)
745483f1	160	tf->lbah = tf_inb(io_ports->lbah_addr);
1574cf6c BZ	161	}
	162	}
	163	EXPORT_SYMBOL_GPL(ide_tf_read);
	164
	165	/*
	166	* Some localbus EIDE interfaces require a special access sequence
	167	* when using 32-bit I/O instructions to transfer data. We call this
	168	* the "vlb_sync" sequence, which consists of three successive reads
	169	* of the sector count register location, with interrupts disabled
	170	* to ensure that the reads all happen together.
	171	*/
	172	static void ata_vlb_sync(unsigned long port)
	173	{
	174	(void)inb(port);
	175	(void)inb(port);
	176	(void)inb(port);
	177	}
	178
	179	/*
	180	* This is used for most PIO data transfers from the IDE interface
	181	*
	182	* These routines will round up any request for an odd number of bytes,
	183	* so if an odd len is specified, be sure that there's at least one
	184	* extra byte allocated for the buffer.
	185	*/
adb1af98	186	void ide_input_data(ide_drive_t drive, struct ide_cmd cmd, void *buf,
1574cf6c BZ	187	unsigned int len)
	188	{
	189	ide_hwif_t *hwif = drive->hwif;
	190	struct ide_io_ports *io_ports = &hwif->io_ports;
	191	unsigned long data_addr = io_ports->data_addr;
deae17fd	192	unsigned int words = (len + 1) >> 1;
1574cf6c BZ	193	u8 io_32bit = drive->io_32bit;
	194	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
	195
1574cf6c BZ	196	if (io_32bit) {
	197	unsigned long uninitialized_var(flags);
	198
	199	if ((io_32bit & 2) && !mmio) {
	200	local_irq_save(flags);
	201	ata_vlb_sync(io_ports->nsect_addr);
	202	}
	203
deae17fd	204	words >>= 1;
1574cf6c	205	if (mmio)
deae17fd	206	__ide_mm_insl((void __iomem *)data_addr, buf, words);
1574cf6c	207	else
deae17fd	208	insl(data_addr, buf, words);
1574cf6c BZ	209
	210	if ((io_32bit & 2) && !mmio)
	211	local_irq_restore(flags);
	212
deae17fd SS	213	if (((len + 1) & 3) < 2)
	214	return;
	215
	216	buf += len & ~3;
	217	words = 1;
1574cf6c	218	}
deae17fd SS	219
	220	if (mmio)
	221	__ide_mm_insw((void __iomem *)data_addr, buf, words);
	222	else
	223	insw(data_addr, buf, words);
1574cf6c BZ	224	}
	225	EXPORT_SYMBOL_GPL(ide_input_data);
	226
	227	/*
	228	* This is used for most PIO data transfers to the IDE interface
	229	*/
adb1af98	230	void ide_output_data(ide_drive_t drive, struct ide_cmd cmd, void *buf,
1574cf6c BZ	231	unsigned int len)
	232	{
	233	ide_hwif_t *hwif = drive->hwif;
	234	struct ide_io_ports *io_ports = &hwif->io_ports;
	235	unsigned long data_addr = io_ports->data_addr;
deae17fd	236	unsigned int words = (len + 1) >> 1;
1574cf6c BZ	237	u8 io_32bit = drive->io_32bit;
	238	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
	239
1574cf6c BZ	240	if (io_32bit) {
	241	unsigned long uninitialized_var(flags);
	242
	243	if ((io_32bit & 2) && !mmio) {
	244	local_irq_save(flags);
	245	ata_vlb_sync(io_ports->nsect_addr);
	246	}
	247
deae17fd	248	words >>= 1;
1574cf6c	249	if (mmio)
deae17fd	250	__ide_mm_outsl((void __iomem *)data_addr, buf, words);
1574cf6c	251	else
deae17fd	252	outsl(data_addr, buf, words);
1574cf6c BZ	253
	254	if ((io_32bit & 2) && !mmio)
	255	local_irq_restore(flags);
	256
deae17fd SS	257	if (((len + 1) & 3) < 2)
	258	return;
	259
	260	buf += len & ~3;
	261	words = 1;
1574cf6c	262	}
deae17fd SS	263
	264	if (mmio)
	265	__ide_mm_outsw((void __iomem *)data_addr, buf, words);
	266	else
	267	outsw(data_addr, buf, words);
1574cf6c BZ	268	}
	269	EXPORT_SYMBOL_GPL(ide_output_data);
	270
	271	const struct ide_tp_ops default_tp_ops = {
	272	.exec_command = ide_exec_command,
	273	.read_status = ide_read_status,
	274	.read_altstatus = ide_read_altstatus,
ecf3a31d	275	.write_devctl = ide_write_devctl,
1574cf6c	276
abb596b2	277	.dev_select = ide_dev_select,
1574cf6c BZ	278	.tf_load = ide_tf_load,
	279	.tf_read = ide_tf_read,
	280
	281	.input_data = ide_input_data,
	282	.output_data = ide_output_data,
	283	};